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GET /api/patches/117014/?format=api
{ "id": 117014, "url": "http://patches.dpdk.org/api/patches/117014/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220928033130.9106-13-suanmingm@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220928033130.9106-13-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220928033130.9106-13-suanmingm@nvidia.com", "date": "2022-09-28T03:31:25", "name": "[v2,12/17] net/mlx5: implement METER MARK indirect action for HWS", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "63fda72942b3453e68ac367fd6252e349d30b877", "submitter": { "id": 1887, "url": "http://patches.dpdk.org/api/people/1887/?format=api", "name": "Suanming Mou", "email": "suanmingm@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220928033130.9106-13-suanmingm@nvidia.com/mbox/", "series": [ { "id": 24870, "url": "http://patches.dpdk.org/api/series/24870/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24870", "date": "2022-09-28T03:31:15", "name": "net/mlx5: HW steering PMD update", "version": 2, "mbox": "http://patches.dpdk.org/series/24870/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/117014/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/117014/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", 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<akozyrev@nvidia.com>", "Subject": "[PATCH v2 12/17] net/mlx5: implement METER MARK indirect action for\n HWS", "Date": "Wed, 28 Sep 2022 06:31:25 +0300", "Message-ID": "<20220928033130.9106-13-suanmingm@nvidia.com>", "X-Mailer": "git-send-email 2.18.1", "In-Reply-To": "<20220928033130.9106-1-suanmingm@nvidia.com>", "References": "<20220923144334.27736-1-suanmingm@nvidia.com>\n <20220928033130.9106-1-suanmingm@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.230.35]", "X-ClientProxiedBy": "rnnvmail201.nvidia.com (10.129.68.8) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BL02EPF0000C407:EE_|DM6PR12MB4370:EE_", "X-MS-Office365-Filtering-Correlation-Id": "625b51cf-1e0c-4956-d5aa-08daa1021805", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n 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SFS:(13230022)(4636009)(376002)(136003)(346002)(396003)(39860400002)(451199015)(46966006)(36840700001)(40470700004)(36756003)(7696005)(336012)(316002)(55016003)(82740400003)(54906003)(110136005)(16526019)(426003)(1076003)(186003)(26005)(6286002)(6636002)(2616005)(36860700001)(86362001)(8936002)(70206006)(70586007)(40480700001)(2906002)(41300700001)(83380400001)(47076005)(8676002)(4326008)(478600001)(40460700003)(30864003)(82310400005)(356005)(107886003)(6666004)(7636003)(5660300002)(559001)(579004)(309714004);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "28 Sep 2022 03:32:38.9358 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 625b51cf-1e0c-4956-d5aa-08daa1021805", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BL02EPF0000C407.namprd05.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM6PR12MB4370", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Alexander Kozyrev <akozyrev@nvidia.com>\n\nAdd ability to create an indirect action handle for METER_MARK.\nIt allows to share one Meter between several different actions.\n\nSigned-off-by: Alexander Kozyrev <akozyrev@nvidia.com>\n---\n drivers/net/mlx5/mlx5.c | 4 +-\n drivers/net/mlx5/mlx5.h | 33 ++-\n drivers/net/mlx5/mlx5_flow.c | 6 +\n drivers/net/mlx5/mlx5_flow.h | 19 +-\n drivers/net/mlx5/mlx5_flow_aso.c | 139 +++++++--\n drivers/net/mlx5/mlx5_flow_dv.c | 145 +++++++++-\n drivers/net/mlx5/mlx5_flow_hw.c | 438 +++++++++++++++++++++++++----\n drivers/net/mlx5/mlx5_flow_meter.c | 79 +++++-\n 8 files changed, 764 insertions(+), 99 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex 925e19bcd5..383a789dfa 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -442,7 +442,7 @@ mlx5_flow_aso_age_mng_init(struct mlx5_dev_ctx_shared *sh)\n \t\trte_errno = ENOMEM;\n \t\treturn -ENOMEM;\n \t}\n-\terr = mlx5_aso_queue_init(sh, ASO_OPC_MOD_FLOW_HIT);\n+\terr = mlx5_aso_queue_init(sh, ASO_OPC_MOD_FLOW_HIT, 1);\n \tif (err) {\n \t\tmlx5_free(sh->aso_age_mng);\n \t\treturn -1;\n@@ -763,7 +763,7 @@ mlx5_flow_aso_ct_mng_init(struct mlx5_dev_ctx_shared *sh)\n \t\trte_errno = ENOMEM;\n \t\treturn -rte_errno;\n \t}\n-\terr = mlx5_aso_queue_init(sh, ASO_OPC_MOD_CONNECTION_TRACKING);\n+\terr = mlx5_aso_queue_init(sh, ASO_OPC_MOD_CONNECTION_TRACKING, MLX5_ASO_CT_SQ_NUM);\n \tif (err) {\n \t\tmlx5_free(sh->ct_mng);\n \t\t/* rte_errno should be extracted from the failure. */\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 16cd261942..d85cb7adea 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -971,12 +971,16 @@ enum mlx5_aso_mtr_type {\n \n /* Generic aso_flow_meter information. */\n struct mlx5_aso_mtr {\n-\tLIST_ENTRY(mlx5_aso_mtr) next;\n+\tunion {\n+\t\tLIST_ENTRY(mlx5_aso_mtr) next;\n+\t\tstruct mlx5_aso_mtr_pool *pool;\n+\t};\n \tenum mlx5_aso_mtr_type type;\n \tstruct mlx5_flow_meter_info fm;\n \t/**< Pointer to the next aso flow meter structure. */\n \tuint8_t state; /**< ASO flow meter state. */\n \tuint32_t offset;\n+\tenum rte_color init_color;\n };\n \n /* Generic aso_flow_meter pool structure. */\n@@ -985,7 +989,11 @@ struct mlx5_aso_mtr_pool {\n \t/*Must be the first in pool*/\n \tstruct mlx5_devx_obj *devx_obj;\n \t/* The devx object of the minimum aso flow meter ID. */\n+\tstruct mlx5dr_action *action; /* HWS action. */\n+\tstruct mlx5_indexed_pool *idx_pool; /* HWS index pool. */\n \tuint32_t index; /* Pool index in management structure. */\n+\tuint32_t nb_sq; /* Number of ASO SQ. */\n+\tstruct mlx5_aso_sq *sq; /* ASO SQs. */\n };\n \n LIST_HEAD(aso_meter_list, mlx5_aso_mtr);\n@@ -1678,6 +1686,7 @@ struct mlx5_priv {\n \tstruct mlx5_aso_ct_pools_mng *ct_mng;\n \t/* Management data for ASO connection tracking. */\n \tstruct mlx5_aso_ct_pool *hws_ctpool; /* HW steering's CT pool. */\n+\tstruct mlx5_aso_mtr_pool *hws_mpool; /* HW steering's Meter pool. */\n #endif\n };\n \n@@ -1998,7 +2007,8 @@ void mlx5_pmd_socket_uninit(void);\n int mlx5_flow_meter_init(struct rte_eth_dev *dev,\n \t\t\t uint32_t nb_meters,\n \t\t\t uint32_t nb_meter_profiles,\n-\t\t\t uint32_t nb_meter_policies);\n+\t\t\t uint32_t nb_meter_policies,\n+\t\t\t uint32_t nb_queues);\n void mlx5_flow_meter_uninit(struct rte_eth_dev *dev);\n int mlx5_flow_meter_ops_get(struct rte_eth_dev *dev, void *arg);\n struct mlx5_flow_meter_info *mlx5_flow_meter_find(struct mlx5_priv *priv,\n@@ -2067,15 +2077,24 @@ eth_tx_burst_t mlx5_select_tx_function(struct rte_eth_dev *dev);\n \n /* mlx5_flow_aso.c */\n \n+int mlx5_aso_mtr_queue_init(struct mlx5_dev_ctx_shared *sh,\n+\t\t\t struct mlx5_aso_mtr_pool *hws_pool,\n+\t\t\t struct mlx5_aso_mtr_pools_mng *pool_mng,\n+\t\t\t uint32_t nb_queues);\n+void mlx5_aso_mtr_queue_uninit(struct mlx5_dev_ctx_shared *sh,\n+\t\t\t struct mlx5_aso_mtr_pool *hws_pool,\n+\t\t\t struct mlx5_aso_mtr_pools_mng *pool_mng);\n int mlx5_aso_queue_init(struct mlx5_dev_ctx_shared *sh,\n-\t\tenum mlx5_access_aso_opc_mod aso_opc_mod);\n+\t\t\tenum mlx5_access_aso_opc_mod aso_opc_mode,\n+\t\t\tuint32_t nb_queues);\n int mlx5_aso_flow_hit_queue_poll_start(struct mlx5_dev_ctx_shared *sh);\n int mlx5_aso_flow_hit_queue_poll_stop(struct mlx5_dev_ctx_shared *sh);\n void mlx5_aso_queue_uninit(struct mlx5_dev_ctx_shared *sh,\n-\t\tenum mlx5_access_aso_opc_mod aso_opc_mod);\n-int mlx5_aso_meter_update_by_wqe(struct mlx5_dev_ctx_shared *sh,\n-\t\tstruct mlx5_aso_mtr *mtr, struct mlx5_mtr_bulk *bulk);\n-int mlx5_aso_mtr_wait(struct mlx5_dev_ctx_shared *sh,\n+\t\t\t enum mlx5_access_aso_opc_mod aso_opc_mod);\n+int mlx5_aso_meter_update_by_wqe(struct mlx5_dev_ctx_shared *sh, uint32_t queue,\n+\t\t\t\t struct mlx5_aso_mtr *mtr,\n+\t\t\t\t struct mlx5_mtr_bulk *bulk);\n+int mlx5_aso_mtr_wait(struct mlx5_dev_ctx_shared *sh, uint32_t queue,\n \t\tstruct mlx5_aso_mtr *mtr);\n int mlx5_aso_ct_update_by_wqe(struct mlx5_dev_ctx_shared *sh, uint32_t queue,\n \t\t\t struct mlx5_aso_ct_action *ct,\ndiff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c\nindex cbf9c31984..9627ffc979 100644\n--- a/drivers/net/mlx5/mlx5_flow.c\n+++ b/drivers/net/mlx5/mlx5_flow.c\n@@ -4221,6 +4221,12 @@ flow_action_handles_translate(struct rte_eth_dev *dev,\n \t\t\t\t\t\tMLX5_RTE_FLOW_ACTION_TYPE_COUNT;\n \t\t\ttranslated[handle->index].conf = (void *)(uintptr_t)idx;\n \t\t\tbreak;\n+\t\tcase MLX5_INDIRECT_ACTION_TYPE_METER_MARK:\n+\t\t\ttranslated[handle->index].type =\n+\t\t\t\t\t\t(enum rte_flow_action_type)\n+\t\t\t\t\t\tMLX5_RTE_FLOW_ACTION_TYPE_METER_MARK;\n+\t\t\ttranslated[handle->index].conf = (void *)(uintptr_t)idx;\n+\t\t\tbreak;\n \t\tcase MLX5_INDIRECT_ACTION_TYPE_AGE:\n \t\t\tif (priv->sh->flow_hit_aso_en) {\n \t\t\t\ttranslated[handle->index].type =\ndiff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex 6d928b477e..ffa4f28255 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -46,6 +46,7 @@ enum mlx5_rte_flow_action_type {\n \tMLX5_RTE_FLOW_ACTION_TYPE_COUNT,\n \tMLX5_RTE_FLOW_ACTION_TYPE_JUMP,\n \tMLX5_RTE_FLOW_ACTION_TYPE_RSS,\n+\tMLX5_RTE_FLOW_ACTION_TYPE_METER_MARK,\n };\n \n /* Private (internal) Field IDs for MODIFY_FIELD action. */\n@@ -54,22 +55,23 @@ enum mlx5_rte_flow_field_id {\n \t\t\tMLX5_RTE_FLOW_FIELD_META_REG,\n };\n \n-#define MLX5_INDIRECT_ACTION_TYPE_OFFSET 30\n+#define MLX5_INDIRECT_ACTION_TYPE_OFFSET 29\n \n enum {\n \tMLX5_INDIRECT_ACTION_TYPE_RSS,\n \tMLX5_INDIRECT_ACTION_TYPE_AGE,\n \tMLX5_INDIRECT_ACTION_TYPE_COUNT,\n \tMLX5_INDIRECT_ACTION_TYPE_CT,\n+\tMLX5_INDIRECT_ACTION_TYPE_METER_MARK,\n };\n \n-/* Now, the maximal ports will be supported is 256, action number is 4M. */\n-#define MLX5_INDIRECT_ACT_CT_MAX_PORT 0x100\n+/* Now, the maximal ports will be supported is 16, action number is 32M. */\n+#define MLX5_INDIRECT_ACT_CT_MAX_PORT 0x10\n \n #define MLX5_INDIRECT_ACT_CT_OWNER_SHIFT 22\n #define MLX5_INDIRECT_ACT_CT_OWNER_MASK (MLX5_INDIRECT_ACT_CT_MAX_PORT - 1)\n \n-/* 30-31: type, 22-29: owner port, 0-21: index. */\n+/* 29-31: type, 25-28: owner port, 0-24: index */\n #define MLX5_INDIRECT_ACT_CT_GEN_IDX(owner, index) \\\n \t((MLX5_INDIRECT_ACTION_TYPE_CT << MLX5_INDIRECT_ACTION_TYPE_OFFSET) | \\\n \t (((owner) & MLX5_INDIRECT_ACT_CT_OWNER_MASK) << \\\n@@ -207,6 +209,9 @@ enum mlx5_feature_name {\n #define MLX5_FLOW_ITEM_PORT_REPRESENTOR (UINT64_C(1) << 41)\n #define MLX5_FLOW_ITEM_REPRESENTED_PORT (UINT64_C(1) << 42)\n \n+/* Meter color item */\n+#define MLX5_FLOW_ITEM_METER_COLOR (UINT64_C(1) << 44)\n+\n /* Outer Masks. */\n #define MLX5_FLOW_LAYER_OUTER_L3 \\\n \t(MLX5_FLOW_LAYER_OUTER_L3_IPV4 | MLX5_FLOW_LAYER_OUTER_L3_IPV6)\n@@ -1108,6 +1113,7 @@ struct rte_flow_hw {\n \tstruct rte_flow_template_table *table; /* The table flow allcated from. */\n \tstruct mlx5dr_rule rule; /* HWS layer data struct. */\n \tuint32_t cnt_id;\n+\tuint32_t mtr_id;\n } __rte_packed;\n \n /* rte flow action translate to DR action struct. */\n@@ -1154,6 +1160,9 @@ struct mlx5_action_construct_data {\n \t\tstruct {\n \t\t\tuint32_t id;\n \t\t} shared_counter;\n+\t\tstruct {\n+\t\t\tuint32_t id;\n+\t\t} shared_meter;\n \t};\n };\n \n@@ -1237,6 +1246,7 @@ struct mlx5_hw_actions {\n \tuint16_t encap_decap_pos; /* Encap/Decap action position. */\n \tuint32_t mark:1; /* Indicate the mark action. */\n \tuint32_t cnt_id; /* Counter id. */\n+\tuint32_t mtr_id; /* Meter id. */\n \t/* Translated DR action array from action template. */\n \tstruct mlx5dr_rule_action rule_acts[MLX5_HW_MAX_ACTS];\n };\n@@ -1524,6 +1534,7 @@ flow_hw_get_reg_id(enum rte_flow_item_type type, uint32_t id)\n \t\t */\n \t\treturn REG_A;\n \tcase RTE_FLOW_ITEM_TYPE_CONNTRACK:\n+\tcase RTE_FLOW_ITEM_TYPE_METER_COLOR:\n \t\treturn mlx5_flow_hw_aso_tag;\n \tcase RTE_FLOW_ITEM_TYPE_TAG:\n \t\tMLX5_ASSERT(id < MLX5_FLOW_HW_TAGS_MAX);\ndiff --git a/drivers/net/mlx5/mlx5_flow_aso.c b/drivers/net/mlx5/mlx5_flow_aso.c\nindex c00c07b891..f371fff2e2 100644\n--- a/drivers/net/mlx5/mlx5_flow_aso.c\n+++ b/drivers/net/mlx5/mlx5_flow_aso.c\n@@ -275,6 +275,65 @@ mlx5_aso_sq_create(struct mlx5_common_device *cdev, struct mlx5_aso_sq *sq,\n \treturn -1;\n }\n \n+void\n+mlx5_aso_mtr_queue_uninit(struct mlx5_dev_ctx_shared *sh __rte_unused,\n+\t\t\t struct mlx5_aso_mtr_pool *hws_pool,\n+\t\t\t struct mlx5_aso_mtr_pools_mng *pool_mng)\n+{\n+\tuint32_t i;\n+\n+\tif (hws_pool) {\n+\t\tfor (i = 0; i < hws_pool->nb_sq; i++)\n+\t\t\tmlx5_aso_destroy_sq(hws_pool->sq + i);\n+\t\tmlx5_free(hws_pool->sq);\n+\t\treturn;\n+\t}\n+\tif (pool_mng)\n+\t\tmlx5_aso_destroy_sq(&pool_mng->sq);\n+}\n+\n+int\n+mlx5_aso_mtr_queue_init(struct mlx5_dev_ctx_shared *sh,\n+\t\t\t\tstruct mlx5_aso_mtr_pool *hws_pool,\n+\t\t\t\tstruct mlx5_aso_mtr_pools_mng *pool_mng,\n+\t\t\t\tuint32_t nb_queues)\n+{\n+\tstruct mlx5_common_device *cdev = sh->cdev;\n+\tstruct mlx5_aso_sq *sq;\n+\tuint32_t i;\n+\n+\tif (hws_pool) {\n+\t\tsq = mlx5_malloc(MLX5_MEM_ZERO,\n+\t\t\tsizeof(struct mlx5_aso_sq) * nb_queues,\n+\t\t\tRTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);\n+\t\tif (!sq)\n+\t\t\treturn -1;\n+\t\thws_pool->sq = sq;\n+\t\tfor (i = 0; i < nb_queues; i++) {\n+\t\t\tif (mlx5_aso_sq_create(cdev, hws_pool->sq + i,\n+\t\t\t\t\t sh->tx_uar.obj,\n+\t\t\t\t\t MLX5_ASO_QUEUE_LOG_DESC))\n+\t\t\t\tgoto error;\n+\t\t\tmlx5_aso_mtr_init_sq(hws_pool->sq + i);\n+\t\t}\n+\t\thws_pool->nb_sq = nb_queues;\n+\t}\n+\tif (pool_mng) {\n+\t\tif (mlx5_aso_sq_create(cdev, &pool_mng->sq,\n+\t\t\t\t sh->tx_uar.obj,\n+\t\t\t\t MLX5_ASO_QUEUE_LOG_DESC))\n+\t\t\treturn -1;\n+\t\tmlx5_aso_mtr_init_sq(&pool_mng->sq);\n+\t}\n+\treturn 0;\n+error:\n+\tdo {\n+\t\tif (&hws_pool->sq[i])\n+\t\t\tmlx5_aso_destroy_sq(hws_pool->sq + i);\n+\t} while (i--);\n+\treturn -1;\n+}\n+\n /**\n * API to create and initialize Send Queue used for ASO access.\n *\n@@ -282,13 +341,16 @@ mlx5_aso_sq_create(struct mlx5_common_device *cdev, struct mlx5_aso_sq *sq,\n * Pointer to shared device context.\n * @param[in] aso_opc_mod\n * Mode of ASO feature.\n+ * @param[in] nb_queues\n+ * Number of Send Queues to create.\n *\n * @return\n * 0 on success, a negative errno value otherwise and rte_errno is set.\n */\n int\n mlx5_aso_queue_init(struct mlx5_dev_ctx_shared *sh,\n-\t\t enum mlx5_access_aso_opc_mod aso_opc_mod)\n+\t\t enum mlx5_access_aso_opc_mod aso_opc_mod,\n+\t\t\tuint32_t nb_queues)\n {\n \tuint32_t sq_desc_n = 1 << MLX5_ASO_QUEUE_LOG_DESC;\n \tstruct mlx5_common_device *cdev = sh->cdev;\n@@ -307,10 +369,9 @@ mlx5_aso_queue_init(struct mlx5_dev_ctx_shared *sh,\n \t\tmlx5_aso_age_init_sq(&sh->aso_age_mng->aso_sq);\n \t\tbreak;\n \tcase ASO_OPC_MOD_POLICER:\n-\t\tif (mlx5_aso_sq_create(cdev, &sh->mtrmng->pools_mng.sq,\n-\t\t\t\t sh->tx_uar.obj, MLX5_ASO_QUEUE_LOG_DESC))\n+\t\tif (mlx5_aso_mtr_queue_init(sh, NULL,\n+\t\t\t\t\t &sh->mtrmng->pools_mng, nb_queues))\n \t\t\treturn -1;\n-\t\tmlx5_aso_mtr_init_sq(&sh->mtrmng->pools_mng.sq);\n \t\tbreak;\n \tcase ASO_OPC_MOD_CONNECTION_TRACKING:\n \t\tif (mlx5_aso_ct_queue_init(sh, sh->ct_mng, MLX5_ASO_CT_SQ_NUM))\n@@ -343,7 +404,7 @@ mlx5_aso_queue_uninit(struct mlx5_dev_ctx_shared *sh,\n \t\tsq = &sh->aso_age_mng->aso_sq;\n \t\tbreak;\n \tcase ASO_OPC_MOD_POLICER:\n-\t\tsq = &sh->mtrmng->pools_mng.sq;\n+\t\tmlx5_aso_mtr_queue_uninit(sh, NULL, &sh->mtrmng->pools_mng);\n \t\tbreak;\n \tcase ASO_OPC_MOD_CONNECTION_TRACKING:\n \t\tmlx5_aso_ct_queue_uninit(sh, sh->ct_mng);\n@@ -666,7 +727,8 @@ static uint16_t\n mlx5_aso_mtr_sq_enqueue_single(struct mlx5_dev_ctx_shared *sh,\n \t\t\t struct mlx5_aso_sq *sq,\n \t\t\t struct mlx5_aso_mtr *aso_mtr,\n-\t\t\t struct mlx5_mtr_bulk *bulk)\n+\t\t\t struct mlx5_mtr_bulk *bulk,\n+\t\t\t\t bool need_lock)\n {\n \tvolatile struct mlx5_aso_wqe *wqe = NULL;\n \tstruct mlx5_flow_meter_info *fm = NULL;\n@@ -679,11 +741,13 @@ mlx5_aso_mtr_sq_enqueue_single(struct mlx5_dev_ctx_shared *sh,\n \tuint32_t param_le;\n \tint id;\n \n-\trte_spinlock_lock(&sq->sqsl);\n+\tif (need_lock)\n+\t\trte_spinlock_lock(&sq->sqsl);\n \tres = size - (uint16_t)(sq->head - sq->tail);\n \tif (unlikely(!res)) {\n \t\tDRV_LOG(ERR, \"Fail: SQ is full and no free WQE to send\");\n-\t\trte_spinlock_unlock(&sq->sqsl);\n+\t\tif (need_lock)\n+\t\t\trte_spinlock_unlock(&sq->sqsl);\n \t\treturn 0;\n \t}\n \twqe = &sq->sq_obj.aso_wqes[sq->head & mask];\n@@ -692,8 +756,11 @@ mlx5_aso_mtr_sq_enqueue_single(struct mlx5_dev_ctx_shared *sh,\n \tfm = &aso_mtr->fm;\n \tsq->elts[sq->head & mask].mtr = aso_mtr;\n \tif (aso_mtr->type == ASO_METER_INDIRECT) {\n-\t\tpool = container_of(aso_mtr, struct mlx5_aso_mtr_pool,\n-\t\t\t\t mtrs[aso_mtr->offset]);\n+\t\tif (likely(sh->config.dv_flow_en == 2))\n+\t\t\tpool = aso_mtr->pool;\n+\t\telse\n+\t\t\tpool = container_of(aso_mtr, struct mlx5_aso_mtr_pool,\n+\t\t\t\t\t mtrs[aso_mtr->offset]);\n \t\tid = pool->devx_obj->id;\n \t} else {\n \t\tid = bulk->devx_obj->id;\n@@ -756,7 +823,8 @@ mlx5_aso_mtr_sq_enqueue_single(struct mlx5_dev_ctx_shared *sh,\n \tmlx5_doorbell_ring(&sh->tx_uar.bf_db, *(volatile uint64_t *)wqe,\n \t\t\t sq->pi, &sq->sq_obj.db_rec[MLX5_SND_DBR],\n \t\t\t !sh->tx_uar.dbnc);\n-\trte_spinlock_unlock(&sq->sqsl);\n+\tif (need_lock)\n+\t\trte_spinlock_unlock(&sq->sqsl);\n \treturn 1;\n }\n \n@@ -779,7 +847,7 @@ mlx5_aso_mtrs_status_update(struct mlx5_aso_sq *sq, uint16_t aso_mtrs_nums)\n }\n \n static void\n-mlx5_aso_mtr_completion_handle(struct mlx5_aso_sq *sq)\n+mlx5_aso_mtr_completion_handle(struct mlx5_aso_sq *sq, bool need_lock)\n {\n \tstruct mlx5_aso_cq *cq = &sq->cq;\n \tvolatile struct mlx5_cqe *restrict cqe;\n@@ -791,7 +859,8 @@ mlx5_aso_mtr_completion_handle(struct mlx5_aso_sq *sq)\n \tuint16_t n = 0;\n \tint ret;\n \n-\trte_spinlock_lock(&sq->sqsl);\n+\tif (need_lock)\n+\t\trte_spinlock_lock(&sq->sqsl);\n \tmax = (uint16_t)(sq->head - sq->tail);\n \tif (unlikely(!max)) {\n \t\trte_spinlock_unlock(&sq->sqsl);\n@@ -823,7 +892,8 @@ mlx5_aso_mtr_completion_handle(struct mlx5_aso_sq *sq)\n \t\trte_io_wmb();\n \t\tcq->cq_obj.db_rec[0] = rte_cpu_to_be_32(cq->cq_ci);\n \t}\n-\trte_spinlock_unlock(&sq->sqsl);\n+\tif (need_lock)\n+\t\trte_spinlock_unlock(&sq->sqsl);\n }\n \n /**\n@@ -840,16 +910,30 @@ mlx5_aso_mtr_completion_handle(struct mlx5_aso_sq *sq)\n * 0 on success, a negative errno value otherwise and rte_errno is set.\n */\n int\n-mlx5_aso_meter_update_by_wqe(struct mlx5_dev_ctx_shared *sh,\n+mlx5_aso_meter_update_by_wqe(struct mlx5_dev_ctx_shared *sh, uint32_t queue,\n \t\t\tstruct mlx5_aso_mtr *mtr,\n \t\t\tstruct mlx5_mtr_bulk *bulk)\n {\n-\tstruct mlx5_aso_sq *sq = &sh->mtrmng->pools_mng.sq;\n+\tstruct mlx5_aso_sq *sq;\n \tuint32_t poll_wqe_times = MLX5_MTR_POLL_WQE_CQE_TIMES;\n+\tbool need_lock;\n \n+\tif (likely(sh->config.dv_flow_en == 2)) {\n+\t\tif (queue == MLX5_HW_INV_QUEUE) {\n+\t\t\tsq = &mtr->pool->sq[mtr->pool->nb_sq - 1];\n+\t\t\tneed_lock = true;\n+\t\t} else {\n+\t\t\tsq = &mtr->pool->sq[queue];\n+\t\t\tneed_lock = false;\n+\t\t}\n+\t} else {\n+\t\tsq = &sh->mtrmng->pools_mng.sq;\n+\t\tneed_lock = true;\n+\t}\n \tdo {\n-\t\tmlx5_aso_mtr_completion_handle(sq);\n-\t\tif (mlx5_aso_mtr_sq_enqueue_single(sh, sq, mtr, bulk))\n+\t\tmlx5_aso_mtr_completion_handle(sq, need_lock);\n+\t\tif (mlx5_aso_mtr_sq_enqueue_single(sh, sq, mtr,\n+\t\t\t\t\t\t bulk, need_lock))\n \t\t\treturn 0;\n \t\t/* Waiting for wqe resource. */\n \t\trte_delay_us_sleep(MLX5_ASO_WQE_CQE_RESPONSE_DELAY);\n@@ -873,17 +957,30 @@ mlx5_aso_meter_update_by_wqe(struct mlx5_dev_ctx_shared *sh,\n * 0 on success, a negative errno value otherwise and rte_errno is set.\n */\n int\n-mlx5_aso_mtr_wait(struct mlx5_dev_ctx_shared *sh,\n+mlx5_aso_mtr_wait(struct mlx5_dev_ctx_shared *sh, uint32_t queue,\n \t\t\tstruct mlx5_aso_mtr *mtr)\n {\n-\tstruct mlx5_aso_sq *sq = &sh->mtrmng->pools_mng.sq;\n+\tstruct mlx5_aso_sq *sq;\n \tuint32_t poll_cqe_times = MLX5_MTR_POLL_WQE_CQE_TIMES;\n+\tbool need_lock;\n \n+\tif (likely(sh->config.dv_flow_en == 2)) {\n+\t\tif (queue == MLX5_HW_INV_QUEUE) {\n+\t\t\tsq = &mtr->pool->sq[mtr->pool->nb_sq - 1];\n+\t\t\tneed_lock = true;\n+\t\t} else {\n+\t\t\tsq = &mtr->pool->sq[queue];\n+\t\t\tneed_lock = false;\n+\t\t}\n+\t} else {\n+\t\tsq = &sh->mtrmng->pools_mng.sq;\n+\t\tneed_lock = true;\n+\t}\n \tif (__atomic_load_n(&mtr->state, __ATOMIC_RELAXED) ==\n \t\t\t\t\t ASO_METER_READY)\n \t\treturn 0;\n \tdo {\n-\t\tmlx5_aso_mtr_completion_handle(sq);\n+\t\tmlx5_aso_mtr_completion_handle(sq, need_lock);\n \t\tif (__atomic_load_n(&mtr->state, __ATOMIC_RELAXED) ==\n \t\t\t\t\t ASO_METER_READY)\n \t\t\treturn 0;\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 7e0829d1fd..a50a600024 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -1387,6 +1387,7 @@ mlx5_flow_item_field_width(struct rte_eth_dev *dev,\n \t\treturn inherit < 0 ? 0 : inherit;\n \tcase RTE_FLOW_FIELD_IPV4_ECN:\n \tcase RTE_FLOW_FIELD_IPV6_ECN:\n+\tcase RTE_FLOW_FIELD_METER_COLOR:\n \t\treturn 2;\n \tdefault:\n \t\tMLX5_ASSERT(false);\n@@ -1856,6 +1857,31 @@ mlx5_flow_field_id_to_modify_info\n \t\t\t\tinfo[idx].offset = data->offset;\n \t\t}\n \t\tbreak;\n+\tcase RTE_FLOW_FIELD_METER_COLOR:\n+\t\t{\n+\t\t\tconst uint32_t color_mask =\n+\t\t\t\t(UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;\n+\t\t\tint reg;\n+\n+\t\t\tif (priv->sh->config.dv_flow_en == 2)\n+\t\t\t\treg = flow_hw_get_reg_id\n+\t\t\t\t\t(RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);\n+\t\t\telse\n+\t\t\t\treg = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR,\n+\t\t\t\t\t\t 0, error);\n+\t\t\tif (reg < 0)\n+\t\t\t\treturn;\n+\t\t\tMLX5_ASSERT(reg != REG_NON);\n+\t\t\tMLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));\n+\t\t\tinfo[idx] = (struct field_modify_info){4, 0,\n+\t\t\t\t\t\treg_to_field[reg]};\n+\t\t\tif (mask)\n+\t\t\t\tmask[idx] = flow_modify_info_mask_32_masked\n+\t\t\t\t\t(width, data->offset, color_mask);\n+\t\t\telse\n+\t\t\t\tinfo[idx].offset = data->offset;\n+\t\t}\n+\t\tbreak;\n \tcase RTE_FLOW_FIELD_POINTER:\n \tcase RTE_FLOW_FIELD_VALUE:\n \tdefault:\n@@ -1913,7 +1939,9 @@ flow_dv_convert_action_modify_field\n \t\titem.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ?\n \t\t\t\t\t(void *)(uintptr_t)conf->src.pvalue :\n \t\t\t\t\t(void *)(uintptr_t)&conf->src.value;\n-\t\tif (conf->dst.field == RTE_FLOW_FIELD_META) {\n+\t\tif (conf->dst.field == RTE_FLOW_FIELD_META ||\n+\t\t conf->dst.field == RTE_FLOW_FIELD_TAG ||\n+\t\t conf->dst.field == RTE_FLOW_FIELD_METER_COLOR) {\n \t\t\tmeta = *(const unaligned_uint32_t *)item.spec;\n \t\t\tmeta = rte_cpu_to_be_32(meta);\n \t\t\titem.spec = &meta;\n@@ -3687,6 +3715,69 @@ flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,\n \treturn 0;\n }\n \n+/**\n+ * Validate METER_COLOR item.\n+ *\n+ * @param[in] dev\n+ * Pointer to the rte_eth_dev structure.\n+ * @param[in] item\n+ * Item specification.\n+ * @param[in] attr\n+ * Attributes of flow that includes this item.\n+ * @param[out] error\n+ * Pointer to error structure.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+static int\n+flow_dv_validate_item_meter_color(struct rte_eth_dev *dev,\n+\t\t\t const struct rte_flow_item *item,\n+\t\t\t const struct rte_flow_attr *attr __rte_unused,\n+\t\t\t struct rte_flow_error *error)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tconst struct rte_flow_item_meter_color *spec = item->spec;\n+\tconst struct rte_flow_item_meter_color *mask = item->mask;\n+\tstruct rte_flow_item_meter_color nic_mask = {\n+\t\t.color = RTE_COLORS\n+\t};\n+\tint ret;\n+\n+\tif (priv->mtr_color_reg == REG_NON)\n+\t\treturn rte_flow_error_set(error, ENOTSUP,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM, item,\n+\t\t\t\t\t \"meter color register\"\n+\t\t\t\t\t \" isn't available\");\n+\tret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);\n+\tif (ret < 0)\n+\t\treturn ret;\n+\tif (!spec)\n+\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM_SPEC,\n+\t\t\t\t\t item->spec,\n+\t\t\t\t\t \"data cannot be empty\");\n+\tif (spec->color > RTE_COLORS)\n+\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ACTION_CONF,\n+\t\t\t\t\t &spec->color,\n+\t\t\t\t\t \"meter color is invalid\");\n+\tif (!mask)\n+\t\tmask = &rte_flow_item_meter_color_mask;\n+\tif (!mask->color)\n+\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,\n+\t\t\t\t\t\"mask cannot be zero\");\n+\n+\tret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,\n+\t\t\t\t(const uint8_t *)&nic_mask,\n+\t\t\t\tsizeof(struct rte_flow_item_meter_color),\n+\t\t\t\tMLX5_ITEM_RANGE_NOT_ACCEPTED, error);\n+\tif (ret < 0)\n+\t\treturn ret;\n+\treturn 0;\n+}\n+\n int\n flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,\n \t\t\t struct mlx5_list_entry *entry, void *cb_ctx)\n@@ -6519,7 +6610,7 @@ flow_dv_mtr_container_resize(struct rte_eth_dev *dev)\n \t\treturn -ENOMEM;\n \t}\n \tif (!pools_mng->n)\n-\t\tif (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {\n+\t\tif (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER, 1)) {\n \t\t\tmlx5_free(pools);\n \t\t\treturn -ENOMEM;\n \t\t}\n@@ -7421,6 +7512,13 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,\n \t\t\tif (ret < 0)\n \t\t\t\treturn ret;\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_METER_COLOR:\n+\t\t\tret = flow_dv_validate_item_meter_color(dev, items,\n+\t\t\t\t\t\t\t\tattr, error);\n+\t\t\tif (ret < 0)\n+\t\t\t\treturn ret;\n+\t\t\tlast_item = MLX5_FLOW_ITEM_METER_COLOR;\n+\t\t\tbreak;\n \t\tdefault:\n \t\t\treturn rte_flow_error_set(error, ENOTSUP,\n \t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n@@ -10496,6 +10594,45 @@ flow_dv_translate_item_flex(struct rte_eth_dev *dev, void *matcher, void *key,\n \tmlx5_flex_flow_translate_item(dev, matcher, key, item, is_inner);\n }\n \n+/**\n+ * Add METER_COLOR item to matcher\n+ *\n+ * @param[in] dev\n+ * The device to configure through.\n+ * @param[in, out] key\n+ * Flow matcher value.\n+ * @param[in] item\n+ * Flow pattern to translate.\n+ * @param[in] key_type\n+ * Set flow matcher mask or value.\n+ */\n+static void\n+flow_dv_translate_item_meter_color(struct rte_eth_dev *dev, void *key,\n+\t\t\t const struct rte_flow_item *item,\n+\t\t\t uint32_t key_type)\n+{\n+\tconst struct rte_flow_item_meter_color *color_m = item->mask;\n+\tconst struct rte_flow_item_meter_color *color_v = item->spec;\n+\tuint32_t value, mask;\n+\tint reg = REG_NON;\n+\n+\tMLX5_ASSERT(color_v);\n+\tif (MLX5_ITEM_VALID(item, key_type))\n+\t\treturn;\n+\tMLX5_ITEM_UPDATE(item, key_type, color_v, color_m,\n+\t\t&rte_flow_item_meter_color_mask);\n+\tvalue = rte_col_2_mlx5_col(color_v->color);\n+\tmask = color_m ?\n+\t\tcolor_m->color : (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;\n+\tif (!!(key_type & MLX5_SET_MATCHER_SW))\n+\t\treg = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, NULL);\n+\telse\n+\t\treg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);\n+\tif (reg == REG_NON)\n+\t\treturn;\n+\tflow_dv_match_meta_reg(key, (enum modify_reg)reg, value, mask);\n+}\n+\n static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };\n \n #define HEADER_IS_ZERO(match_criteria, headers)\t\t\t\t \\\n@@ -13248,6 +13385,10 @@ flow_dv_translate_items(struct rte_eth_dev *dev,\n \t\t/* No other protocol should follow eCPRI layer. */\n \t\tlast_item = MLX5_FLOW_LAYER_ECPRI;\n \t\tbreak;\n+\tcase RTE_FLOW_ITEM_TYPE_METER_COLOR:\n+\t\tflow_dv_translate_item_meter_color(dev, key, items, key_type);\n+\t\tlast_item = MLX5_FLOW_ITEM_METER_COLOR;\n+\t\tbreak;\n \tdefault:\n \t\tbreak;\n \t}\ndiff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c\nindex af06659052..d4ce2f185a 100644\n--- a/drivers/net/mlx5/mlx5_flow_hw.c\n+++ b/drivers/net/mlx5/mlx5_flow_hw.c\n@@ -395,6 +395,10 @@ __flow_hw_action_template_destroy(struct rte_eth_dev *dev,\n \t\tmlx5_hws_cnt_shared_put(priv->hws_cpool, &acts->cnt_id);\n \t\tacts->cnt_id = 0;\n \t}\n+\tif (acts->mtr_id) {\n+\t\tmlx5_ipool_free(priv->hws_mpool->idx_pool, acts->mtr_id);\n+\t\tacts->mtr_id = 0;\n+\t}\n }\n \n /**\n@@ -611,6 +615,42 @@ __flow_hw_act_data_shared_cnt_append(struct mlx5_priv *priv,\n \treturn 0;\n }\n \n+/**\n+ * Append shared meter_mark action to the dynamic action list.\n+ *\n+ * @param[in] priv\n+ * Pointer to the port private data structure.\n+ * @param[in] acts\n+ * Pointer to the template HW steering DR actions.\n+ * @param[in] type\n+ * Action type.\n+ * @param[in] action_src\n+ * Offset of source rte flow action.\n+ * @param[in] action_dst\n+ * Offset of destination DR action.\n+ * @param[in] mtr_id\n+ * Shared meter id.\n+ *\n+ * @return\n+ * 0 on success, negative value otherwise and rte_errno is set.\n+ */\n+static __rte_always_inline int\n+__flow_hw_act_data_shared_mtr_append(struct mlx5_priv *priv,\n+\t\t\t\t struct mlx5_hw_actions *acts,\n+\t\t\t\t enum rte_flow_action_type type,\n+\t\t\t\t uint16_t action_src,\n+\t\t\t\t uint16_t action_dst,\n+\t\t\t\t cnt_id_t mtr_id)\n+{\tstruct mlx5_action_construct_data *act_data;\n+\n+\tact_data = __flow_hw_act_data_alloc(priv, type, action_src, action_dst);\n+\tif (!act_data)\n+\t\treturn -1;\n+\tact_data->type = type;\n+\tact_data->shared_meter.id = mtr_id;\n+\tLIST_INSERT_HEAD(&acts->act_list, act_data, next);\n+\treturn 0;\n+}\n \n /**\n * Translate shared indirect action.\n@@ -665,6 +705,13 @@ flow_hw_shared_action_translate(struct rte_eth_dev *dev,\n \t\t\t\t idx, &acts->rule_acts[action_dst]))\n \t\t\treturn -1;\n \t\tbreak;\n+\tcase MLX5_INDIRECT_ACTION_TYPE_METER_MARK:\n+\t\tif (__flow_hw_act_data_shared_mtr_append(priv, acts,\n+\t\t\t(enum rte_flow_action_type)\n+\t\t\tMLX5_RTE_FLOW_ACTION_TYPE_METER_MARK,\n+\t\t\taction_src, action_dst, idx))\n+\t\t\treturn -1;\n+\t\tbreak;\n \tdefault:\n \t\tDRV_LOG(WARNING, \"Unsupported shared action type:%d\", type);\n \t\tbreak;\n@@ -871,6 +918,7 @@ flow_hw_modify_field_compile(struct rte_eth_dev *dev,\n \t\t\t\t(void *)(uintptr_t)&conf->src.value;\n \t\tif (conf->dst.field == RTE_FLOW_FIELD_META ||\n \t\t conf->dst.field == RTE_FLOW_FIELD_TAG ||\n+\t\t conf->dst.field == RTE_FLOW_FIELD_METER_COLOR ||\n \t\t conf->dst.field == (enum rte_flow_field_id)MLX5_RTE_FLOW_FIELD_META_REG) {\n \t\t\tvalue = *(const unaligned_uint32_t *)item.spec;\n \t\t\tvalue = rte_cpu_to_be_32(value);\n@@ -1030,7 +1078,7 @@ flow_hw_meter_compile(struct rte_eth_dev *dev,\n \tacts->rule_acts[jump_pos].action = (!!group) ?\n \t\t\t\t acts->jump->hws_action :\n \t\t\t\t acts->jump->root_action;\n-\tif (mlx5_aso_mtr_wait(priv->sh, aso_mtr))\n+\tif (mlx5_aso_mtr_wait(priv->sh, MLX5_HW_INV_QUEUE, aso_mtr))\n \t\treturn -ENOMEM;\n \treturn 0;\n }\n@@ -1104,6 +1152,74 @@ static rte_be32_t vlan_hdr_to_be32(const struct rte_flow_action *actions)\n #endif\n }\n \n+static __rte_always_inline struct mlx5_aso_mtr *\n+flow_hw_meter_mark_alloc(struct rte_eth_dev *dev,\n+\t\t\t const struct rte_flow_action *action,\n+\t\t\t uint32_t queue)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_aso_mtr_pool *pool = priv->hws_mpool;\n+\tconst struct rte_flow_action_meter_mark *meter_mark = action->conf;\n+\tstruct mlx5_aso_mtr *aso_mtr;\n+\tstruct mlx5_flow_meter_info *fm;\n+\tuint32_t mtr_id;\n+\n+\taso_mtr = mlx5_ipool_malloc(priv->hws_mpool->idx_pool, &mtr_id);\n+\tif (!aso_mtr)\n+\t\treturn NULL;\n+\t/* Fill the flow meter parameters. */\n+\taso_mtr->type = ASO_METER_INDIRECT;\n+\tfm = &aso_mtr->fm;\n+\tfm->meter_id = mtr_id;\n+\tfm->profile = (struct mlx5_flow_meter_profile *)(meter_mark->profile);\n+\tfm->is_enable = meter_mark->state;\n+\tfm->color_aware = meter_mark->color_mode;\n+\taso_mtr->pool = pool;\n+\taso_mtr->state = ASO_METER_WAIT;\n+\taso_mtr->offset = mtr_id - 1;\n+\taso_mtr->init_color = (meter_mark->color_mode) ?\n+\t\tmeter_mark->init_color : RTE_COLOR_GREEN;\n+\t/* Update ASO flow meter by wqe. */\n+\tif (mlx5_aso_meter_update_by_wqe(priv->sh, queue, aso_mtr,\n+\t\t\t\t\t &priv->mtr_bulk)) {\n+\t\tmlx5_ipool_free(pool->idx_pool, mtr_id);\n+\t\treturn NULL;\n+\t}\n+\t/* Wait for ASO object completion. */\n+\tif (queue == MLX5_HW_INV_QUEUE &&\n+\t mlx5_aso_mtr_wait(priv->sh, MLX5_HW_INV_QUEUE, aso_mtr)) {\n+\t\tmlx5_ipool_free(pool->idx_pool, mtr_id);\n+\t\treturn NULL;\n+\t}\n+\treturn aso_mtr;\n+}\n+\n+static __rte_always_inline int\n+flow_hw_meter_mark_compile(struct rte_eth_dev *dev,\n+\t\t\t uint16_t aso_mtr_pos,\n+\t\t\t const struct rte_flow_action *action,\n+\t\t\t struct mlx5dr_rule_action *acts,\n+\t\t\t uint32_t *index,\n+\t\t\t uint32_t queue)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_aso_mtr_pool *pool = priv->hws_mpool;\n+\tstruct mlx5_aso_mtr *aso_mtr;\n+\n+\taso_mtr = flow_hw_meter_mark_alloc(dev, action, queue);\n+\tif (!aso_mtr)\n+\t\treturn -1;\n+\n+\t/* Compile METER_MARK action */\n+\tacts[aso_mtr_pos].action = pool->action;\n+\tacts[aso_mtr_pos].aso_meter.offset = aso_mtr->offset;\n+\tacts[aso_mtr_pos].aso_meter.init_color =\n+\t\t(enum mlx5dr_action_aso_meter_color)\n+\t\trte_col_2_mlx5_col(aso_mtr->init_color);\n+\t*index = aso_mtr->fm.meter_id;\n+\treturn 0;\n+}\n+\n /**\n * Translate rte_flow actions to DR action.\n *\n@@ -1411,6 +1527,24 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\t\t\tgoto err;\n \t\t\t}\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_METER_MARK:\n+\t\t\taction_pos = at->actions_off[actions - action_start];\n+\t\t\tif (actions->conf && masks->conf &&\n+\t\t\t ((const struct rte_flow_action_meter_mark *)\n+\t\t\t masks->conf)->profile) {\n+\t\t\t\terr = flow_hw_meter_mark_compile(dev,\n+\t\t\t\t\t\t\taction_pos, actions,\n+\t\t\t\t\t\t\tacts->rule_acts,\n+\t\t\t\t\t\t\t&acts->mtr_id,\n+\t\t\t\t\t\t\tMLX5_HW_INV_QUEUE);\n+\t\t\t\tif (err)\n+\t\t\t\t\tgoto err;\n+\t\t\t} else if (__flow_hw_act_data_general_append(priv, acts,\n+\t\t\t\t\t\t\tactions->type,\n+\t\t\t\t\t\t\tactions - action_start,\n+\t\t\t\t\t\t\taction_pos))\n+\t\t\t\tgoto err;\n+\t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_END:\n \t\t\tactions_end = true;\n \t\t\tbreak;\n@@ -1607,8 +1741,10 @@ flow_hw_shared_action_construct(struct rte_eth_dev *dev, uint32_t queue,\n \t\t\t\tstruct mlx5dr_rule_action *rule_act)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_aso_mtr_pool *pool = priv->hws_mpool;\n \tstruct mlx5_action_construct_data act_data;\n \tstruct mlx5_shared_action_rss *shared_rss;\n+\tstruct mlx5_aso_mtr *aso_mtr;\n \tuint32_t act_idx = (uint32_t)(uintptr_t)action->conf;\n \tuint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;\n \tuint32_t idx = act_idx &\n@@ -1644,6 +1780,17 @@ flow_hw_shared_action_construct(struct rte_eth_dev *dev, uint32_t queue,\n \t\tif (flow_hw_ct_compile(dev, queue, idx, rule_act))\n \t\t\treturn -1;\n \t\tbreak;\n+\tcase MLX5_INDIRECT_ACTION_TYPE_METER_MARK:\n+\t\t/* Find ASO object. */\n+\t\taso_mtr = mlx5_ipool_get(pool->idx_pool, idx);\n+\t\tif (!aso_mtr)\n+\t\t\treturn -1;\n+\t\trule_act->action = pool->action;\n+\t\trule_act->aso_meter.offset = aso_mtr->offset;\n+\t\trule_act->aso_meter.init_color =\n+\t\t\t(enum mlx5dr_action_aso_meter_color)\n+\t\t\trte_col_2_mlx5_col(aso_mtr->init_color);\n+\t\tbreak;\n \tdefault:\n \t\tDRV_LOG(WARNING, \"Unsupported shared action type:%d\", type);\n \t\tbreak;\n@@ -1713,6 +1860,7 @@ flow_hw_modify_field_construct(struct mlx5_hw_q_job *job,\n \t\trte_memcpy(values, mhdr_action->src.pvalue, sizeof(values));\n \tif (mhdr_action->dst.field == RTE_FLOW_FIELD_META ||\n \t mhdr_action->dst.field == RTE_FLOW_FIELD_TAG ||\n+\t mhdr_action->dst.field == RTE_FLOW_FIELD_METER_COLOR ||\n \t mhdr_action->dst.field == (enum rte_flow_field_id)MLX5_RTE_FLOW_FIELD_META_REG) {\n \t\tvalue_p = (unaligned_uint32_t *)values;\n \t\t*value_p = rte_cpu_to_be_32(*value_p);\n@@ -1790,6 +1938,7 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,\n \t\t\t uint32_t queue)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_aso_mtr_pool *pool = priv->hws_mpool;\n \tstruct rte_flow_template_table *table = job->flow->table;\n \tstruct mlx5_action_construct_data *act_data;\n \tconst struct rte_flow_actions_template *at = hw_at->action_template;\n@@ -1806,8 +1955,7 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,\n \tuint32_t ft_flag;\n \tsize_t encap_len = 0;\n \tint ret;\n-\tstruct mlx5_aso_mtr *mtr;\n-\tuint32_t mtr_id;\n+\tstruct mlx5_aso_mtr *aso_mtr;\n \n \trte_memcpy(rule_acts, hw_acts->rule_acts, sizeof(*rule_acts) * at->dr_actions_num);\n \tattr.group = table->grp->group_id;\n@@ -1841,6 +1989,7 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,\n \t\tstruct mlx5_hrxq *hrxq;\n \t\tuint32_t ct_idx;\n \t\tcnt_id_t cnt_id;\n+\t\tuint32_t mtr_id;\n \n \t\taction = &actions[act_data->action_src];\n \t\t/*\n@@ -1947,13 +2096,13 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,\n \t\tcase RTE_FLOW_ACTION_TYPE_METER:\n \t\t\tmeter = action->conf;\n \t\t\tmtr_id = meter->mtr_id;\n-\t\t\tmtr = mlx5_aso_meter_by_idx(priv, mtr_id);\n+\t\t\taso_mtr = mlx5_aso_meter_by_idx(priv, mtr_id);\n \t\t\trule_acts[act_data->action_dst].action =\n \t\t\t\tpriv->mtr_bulk.action;\n \t\t\trule_acts[act_data->action_dst].aso_meter.offset =\n-\t\t\t\t\t\t\t\tmtr->offset;\n+\t\t\t\t\t\t\t\taso_mtr->offset;\n \t\t\tjump = flow_hw_jump_action_register\n-\t\t\t\t(dev, &table->cfg, mtr->fm.group, NULL);\n+\t\t\t\t(dev, &table->cfg, aso_mtr->fm.group, NULL);\n \t\t\tif (!jump)\n \t\t\t\treturn -1;\n \t\t\tMLX5_ASSERT\n@@ -1963,7 +2112,7 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,\n \t\t\t\t\t\t\t jump->root_action;\n \t\t\tjob->flow->jump = jump;\n \t\t\tjob->flow->fate_type = MLX5_FLOW_FATE_JUMP;\n-\t\t\tif (mlx5_aso_mtr_wait(priv->sh, mtr))\n+\t\t\tif (mlx5_aso_mtr_wait(priv->sh, MLX5_HW_INV_QUEUE, aso_mtr))\n \t\t\t\treturn -1;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_COUNT:\n@@ -1999,6 +2148,28 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,\n \t\t\t\t\t &rule_acts[act_data->action_dst]))\n \t\t\t\treturn -1;\n \t\t\tbreak;\n+\t\tcase MLX5_RTE_FLOW_ACTION_TYPE_METER_MARK:\n+\t\t\tmtr_id = act_data->shared_meter.id &\n+\t\t\t\t((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);\n+\t\t\t/* Find ASO object. */\n+\t\t\taso_mtr = mlx5_ipool_get(pool->idx_pool, mtr_id);\n+\t\t\tif (!aso_mtr)\n+\t\t\t\treturn -1;\n+\t\t\trule_acts[act_data->action_dst].action =\n+\t\t\t\t\t\t\tpool->action;\n+\t\t\trule_acts[act_data->action_dst].aso_meter.offset =\n+\t\t\t\t\t\t\taso_mtr->offset;\n+\t\t\trule_acts[act_data->action_dst].aso_meter.init_color =\n+\t\t\t\t(enum mlx5dr_action_aso_meter_color)\n+\t\t\t\trte_col_2_mlx5_col(aso_mtr->init_color);\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_METER_MARK:\n+\t\t\tret = flow_hw_meter_mark_compile(dev,\n+\t\t\t\tact_data->action_dst, action,\n+\t\t\t\trule_acts, &job->flow->mtr_id, queue);\n+\t\t\tif (ret != 0)\n+\t\t\t\treturn ret;\n+\t\t\tbreak;\n \t\tdefault:\n \t\t\tbreak;\n \t\t}\n@@ -2266,6 +2437,7 @@ flow_hw_pull(struct rte_eth_dev *dev,\n \t struct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_aso_mtr_pool *pool = priv->hws_mpool;\n \tstruct mlx5_hw_q_job *job;\n \tint ret, i;\n \n@@ -2290,6 +2462,10 @@ flow_hw_pull(struct rte_eth_dev *dev,\n \t\t\t\t\t\t&job->flow->cnt_id);\n \t\t\t\tjob->flow->cnt_id = 0;\n \t\t\t}\n+\t\t\tif (job->flow->mtr_id) {\n+\t\t\t\tmlx5_ipool_free(pool->idx_pool,\tjob->flow->mtr_id);\n+\t\t\t\tjob->flow->mtr_id = 0;\n+\t\t\t}\n \t\t\tmlx5_ipool_free(job->flow->table->flow, job->flow->idx);\n \t\t}\n \t\tpriv->hw_q[queue].job[priv->hw_q[queue].job_idx++] = job;\n@@ -3151,6 +3327,9 @@ flow_hw_actions_validate(struct rte_eth_dev *dev,\n \t\tcase RTE_FLOW_ACTION_TYPE_METER:\n \t\t\t/* TODO: Validation logic */\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_METER_MARK:\n+\t\t\t/* TODO: Validation logic */\n+\t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:\n \t\t\tret = flow_hw_validate_action_modify_field(action,\n \t\t\t\t\t\t\t\t\tmask,\n@@ -3244,6 +3423,11 @@ flow_hw_dr_actions_template_handle_shared(const struct rte_flow_action *mask,\n \t\taction_types[*curr_off] = MLX5DR_ACTION_TYP_ASO_CT;\n \t\t*curr_off = *curr_off + 1;\n \t\tbreak;\n+\tcase RTE_FLOW_ACTION_TYPE_METER_MARK:\n+\t\tat->actions_off[action_src] = *curr_off;\n+\t\taction_types[*curr_off] = MLX5DR_ACTION_TYP_ASO_METER;\n+\t\t*curr_off = *curr_off + 1;\n+\t\tbreak;\n \tdefault:\n \t\tDRV_LOG(WARNING, \"Unsupported shared action type: %d\", type);\n \t\treturn -EINVAL;\n@@ -3335,6 +3519,12 @@ flow_hw_dr_actions_template_create(struct rte_flow_actions_template *at)\n \t\t\t\tMLX5_HW_VLAN_PUSH_PCP_IDX :\n \t\t\t\tMLX5_HW_VLAN_PUSH_VID_IDX;\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_METER_MARK:\n+\t\t\tat->actions_off[i] = curr_off;\n+\t\t\taction_types[curr_off++] = MLX5DR_ACTION_TYP_ASO_METER;\n+\t\t\tif (curr_off >= MLX5_HW_MAX_ACTS)\n+\t\t\t\tgoto err_actions_num;\n+\t\t\tbreak;\n \t\tdefault:\n \t\t\ttype = mlx5_hw_dr_action_types[at->actions[i].type];\n \t\t\tat->actions_off[i] = curr_off;\n@@ -3810,6 +4000,16 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev,\n \t\t\t\t\t\t\t\t \" attribute\");\n \t\t\t}\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_METER_COLOR:\n+\t\t{\n+\t\t\tint reg = flow_hw_get_reg_id(RTE_FLOW_ITEM_TYPE_METER_COLOR, 0);\n+\t\t\tif (reg == REG_NON)\n+\t\t\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\t\t\t NULL,\n+\t\t\t\t\t\t\t \"Unsupported meter color register\");\n+\t\t\tbreak;\n+\t\t}\n \t\tcase RTE_FLOW_ITEM_TYPE_VOID:\n \t\tcase RTE_FLOW_ITEM_TYPE_ETH:\n \t\tcase RTE_FLOW_ITEM_TYPE_VLAN:\n@@ -5325,7 +5525,8 @@ flow_hw_configure(struct rte_eth_dev *dev,\n \t\tif (mlx5_flow_meter_init(dev,\n \t\t\t\t\tport_attr->nb_meters,\n \t\t\t\t\tport_attr->nb_meter_profiles,\n-\t\t\t\t\tport_attr->nb_meter_policies))\n+\t\t\t\t\tport_attr->nb_meter_policies,\n+\t\t\t\t\tnb_q_updated))\n \t\t\tgoto err;\n \t/* Add global actions. */\n \tfor (i = 0; i < MLX5_HW_ACTION_FLAG_MAX; i++) {\n@@ -5829,7 +6030,9 @@ flow_hw_action_handle_create(struct rte_eth_dev *dev, uint32_t queue,\n {\n \tstruct rte_flow_action_handle *handle = NULL;\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_aso_mtr *aso_mtr;\n \tcnt_id_t cnt_id;\n+\tuint32_t mtr_id;\n \n \tRTE_SET_USED(queue);\n \tRTE_SET_USED(attr);\n@@ -5848,6 +6051,14 @@ flow_hw_action_handle_create(struct rte_eth_dev *dev, uint32_t queue,\n \tcase RTE_FLOW_ACTION_TYPE_CONNTRACK:\n \t\thandle = flow_hw_conntrack_create(dev, queue, action->conf, error);\n \t\tbreak;\n+\tcase RTE_FLOW_ACTION_TYPE_METER_MARK:\n+\t\taso_mtr = flow_hw_meter_mark_alloc(dev, action, queue);\n+\t\tif (!aso_mtr)\n+\t\t\tbreak;\n+\t\tmtr_id = (MLX5_INDIRECT_ACTION_TYPE_METER_MARK <<\n+\t\t\tMLX5_INDIRECT_ACTION_TYPE_OFFSET) | (aso_mtr->fm.meter_id);\n+\t\thandle = (struct rte_flow_action_handle *)(uintptr_t)mtr_id;\n+\t\tbreak;\n \tdefault:\n \t\thandle = flow_dv_action_create(dev, conf, action, error);\n \t}\n@@ -5883,18 +6094,59 @@ flow_hw_action_handle_update(struct rte_eth_dev *dev, uint32_t queue,\n \t\t\t void *user_data,\n \t\t\t struct rte_flow_error *error)\n {\n-\tuint32_t act_idx = (uint32_t)(uintptr_t)handle;\n-\tuint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;\n-\n \tRTE_SET_USED(queue);\n \tRTE_SET_USED(attr);\n \tRTE_SET_USED(user_data);\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_aso_mtr_pool *pool = priv->hws_mpool;\n+\tconst struct rte_flow_update_meter_mark *upd_meter_mark =\n+\t\t(const struct rte_flow_update_meter_mark *)update;\n+\tconst struct rte_flow_action_meter_mark *meter_mark;\n+\tstruct mlx5_aso_mtr *aso_mtr;\n+\tstruct mlx5_flow_meter_info *fm;\n+\tuint32_t act_idx = (uint32_t)(uintptr_t)handle;\n+\tuint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;\n+\tuint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);\n+\n \tswitch (type) {\n \tcase MLX5_INDIRECT_ACTION_TYPE_CT:\n \t\treturn flow_hw_conntrack_update(dev, queue, update, act_idx, error);\n+\tcase MLX5_INDIRECT_ACTION_TYPE_METER_MARK:\n+\t\tmeter_mark = &upd_meter_mark->meter_mark;\n+\t\t/* Find ASO object. */\n+\t\taso_mtr = mlx5_ipool_get(pool->idx_pool, idx);\n+\t\tif (!aso_mtr)\n+\t\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\tNULL, \"Invalid meter_mark update index\");\n+\t\tfm = &aso_mtr->fm;\n+\t\tif (upd_meter_mark->profile_valid)\n+\t\t\tfm->profile = (struct mlx5_flow_meter_profile *)\n+\t\t\t\t\t\t\t(meter_mark->profile);\n+\t\tif (upd_meter_mark->color_mode_valid)\n+\t\t\tfm->color_aware = meter_mark->color_mode;\n+\t\tif (upd_meter_mark->init_color_valid)\n+\t\t\taso_mtr->init_color = (meter_mark->color_mode) ?\n+\t\t\t\tmeter_mark->init_color : RTE_COLOR_GREEN;\n+\t\tif (upd_meter_mark->state_valid)\n+\t\t\tfm->is_enable = meter_mark->state;\n+\t\t/* Update ASO flow meter by wqe. */\n+\t\tif (mlx5_aso_meter_update_by_wqe(priv->sh, queue,\n+\t\t\t\t\t\t aso_mtr, &priv->mtr_bulk))\n+\t\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\tNULL, \"Unable to update ASO meter WQE\");\n+\t\t/* Wait for ASO object completion. */\n+\t\tif (queue == MLX5_HW_INV_QUEUE &&\n+\t\t mlx5_aso_mtr_wait(priv->sh, MLX5_HW_INV_QUEUE, aso_mtr))\n+\t\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\tNULL, \"Unable to wait for ASO meter CQE\");\n+\t\treturn 0;\n \tdefault:\n-\t\treturn flow_dv_action_update(dev, handle, update, error);\n+\t\tbreak;\n \t}\n+\treturn flow_dv_action_update(dev, handle, update, error);\n }\n \n /**\n@@ -5925,7 +6177,11 @@ flow_hw_action_handle_destroy(struct rte_eth_dev *dev, uint32_t queue,\n {\n \tuint32_t act_idx = (uint32_t)(uintptr_t)handle;\n \tuint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;\n+\tuint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_aso_mtr_pool *pool = priv->hws_mpool;\n+\tstruct mlx5_aso_mtr *aso_mtr;\n+\tstruct mlx5_flow_meter_info *fm;\n \n \tRTE_SET_USED(queue);\n \tRTE_SET_USED(attr);\n@@ -5935,6 +6191,28 @@ flow_hw_action_handle_destroy(struct rte_eth_dev *dev, uint32_t queue,\n \t\treturn mlx5_hws_cnt_shared_put(priv->hws_cpool, &act_idx);\n \tcase MLX5_INDIRECT_ACTION_TYPE_CT:\n \t\treturn flow_hw_conntrack_destroy(dev, act_idx, error);\n+\tcase MLX5_INDIRECT_ACTION_TYPE_METER_MARK:\n+\t\taso_mtr = mlx5_ipool_get(pool->idx_pool, idx);\n+\t\tif (!aso_mtr)\n+\t\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\tNULL, \"Invalid meter_mark destroy index\");\n+\t\tfm = &aso_mtr->fm;\n+\t\tfm->is_enable = 0;\n+\t\t/* Update ASO flow meter by wqe. */\n+\t\tif (mlx5_aso_meter_update_by_wqe(priv->sh, queue, aso_mtr,\n+\t\t\t\t\t\t &priv->mtr_bulk))\n+\t\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\tNULL, \"Unable to update ASO meter WQE\");\n+\t\t/* Wait for ASO object completion. */\n+\t\tif (queue == MLX5_HW_INV_QUEUE &&\n+\t\t mlx5_aso_mtr_wait(priv->sh, MLX5_HW_INV_QUEUE, aso_mtr))\n+\t\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\tNULL, \"Unable to wait for ASO meter CQE\");\n+\t\tmlx5_ipool_free(pool->idx_pool, idx);\n+\t\treturn 0;\n \tdefault:\n \t\treturn flow_dv_action_destroy(dev, handle, error);\n \t}\n@@ -6018,8 +6296,8 @@ flow_hw_action_create(struct rte_eth_dev *dev,\n \t\t const struct rte_flow_action *action,\n \t\t struct rte_flow_error *err)\n {\n-\treturn flow_hw_action_handle_create(dev, UINT32_MAX, NULL, conf, action,\n-\t\t\t\t\t NULL, err);\n+\treturn flow_hw_action_handle_create(dev, MLX5_HW_INV_QUEUE,\n+\t\t\t\t\t NULL, conf, action, NULL, err);\n }\n \n /**\n@@ -6044,8 +6322,8 @@ flow_hw_action_destroy(struct rte_eth_dev *dev,\n \t\t struct rte_flow_action_handle *handle,\n \t\t struct rte_flow_error *error)\n {\n-\treturn flow_hw_action_handle_destroy(dev, UINT32_MAX, NULL, handle,\n-\t\t\tNULL, error);\n+\treturn flow_hw_action_handle_destroy(dev, MLX5_HW_INV_QUEUE,\n+\t\t\tNULL, handle, NULL, error);\n }\n \n /**\n@@ -6073,8 +6351,8 @@ flow_hw_action_update(struct rte_eth_dev *dev,\n \t\t const void *update,\n \t\t struct rte_flow_error *err)\n {\n-\treturn flow_hw_action_handle_update(dev, UINT32_MAX, NULL, handle,\n-\t\t\tupdate, NULL, err);\n+\treturn flow_hw_action_handle_update(dev, MLX5_HW_INV_QUEUE,\n+\t\t\tNULL, handle, update, NULL, err);\n }\n \n static int\n@@ -6604,6 +6882,12 @@ mlx5_flow_meter_uninit(struct rte_eth_dev *dev)\n \t\tmlx5_free(priv->mtr_profile_arr);\n \t\tpriv->mtr_profile_arr = NULL;\n \t}\n+\tif (priv->hws_mpool) {\n+\t\tmlx5_aso_mtr_queue_uninit(priv->sh, priv->hws_mpool, NULL);\n+\t\tmlx5_ipool_destroy(priv->hws_mpool->idx_pool);\n+\t\tmlx5_free(priv->hws_mpool);\n+\t\tpriv->hws_mpool = NULL;\n+\t}\n \tif (priv->mtr_bulk.aso) {\n \t\tmlx5_free(priv->mtr_bulk.aso);\n \t\tpriv->mtr_bulk.aso = NULL;\n@@ -6624,7 +6908,8 @@ int\n mlx5_flow_meter_init(struct rte_eth_dev *dev,\n \t\t uint32_t nb_meters,\n \t\t uint32_t nb_meter_profiles,\n-\t\t uint32_t nb_meter_policies)\n+\t\t uint32_t nb_meter_policies,\n+\t\t uint32_t nb_queues)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \tstruct mlx5_devx_obj *dcs = NULL;\n@@ -6634,29 +6919,35 @@ mlx5_flow_meter_init(struct rte_eth_dev *dev,\n \tstruct mlx5_aso_mtr *aso;\n \tuint32_t i;\n \tstruct rte_flow_error error;\n+\tuint32_t flags;\n+\tuint32_t nb_mtrs = rte_align32pow2(nb_meters);\n+\tstruct mlx5_indexed_pool_config cfg = {\n+\t\t.size = sizeof(struct mlx5_aso_mtr),\n+\t\t.trunk_size = 1 << 12,\n+\t\t.per_core_cache = 1 << 13,\n+\t\t.need_lock = 1,\n+\t\t.release_mem_en = !!priv->sh->config.reclaim_mode,\n+\t\t.malloc = mlx5_malloc,\n+\t\t.max_idx = nb_meters,\n+\t\t.free = mlx5_free,\n+\t\t.type = \"mlx5_hw_mtr_mark_action\",\n+\t};\n \n \tif (!nb_meters || !nb_meter_profiles || !nb_meter_policies) {\n \t\tret = ENOTSUP;\n \t\trte_flow_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter configuration is invalid.\");\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter configuration is invalid.\");\n \t\tgoto err;\n \t}\n \tif (!priv->mtr_en || !priv->sh->meter_aso_en) {\n \t\tret = ENOTSUP;\n \t\trte_flow_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter ASO is not supported.\");\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter ASO is not supported.\");\n \t\tgoto err;\n \t}\n \tpriv->mtr_config.nb_meters = nb_meters;\n-\tif (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {\n-\t\tret = ENOMEM;\n-\t\trte_flow_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter ASO queue allocation failed.\");\n-\t\tgoto err;\n-\t}\n \tlog_obj_size = rte_log2_u32(nb_meters >> 1);\n \tdcs = mlx5_devx_cmd_create_flow_meter_aso_obj\n \t\t(priv->sh->cdev->ctx, priv->sh->cdev->pdn,\n@@ -6664,8 +6955,8 @@ mlx5_flow_meter_init(struct rte_eth_dev *dev,\n \tif (!dcs) {\n \t\tret = ENOMEM;\n \t\trte_flow_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter ASO object allocation failed.\");\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter ASO object allocation failed.\");\n \t\tgoto err;\n \t}\n \tpriv->mtr_bulk.devx_obj = dcs;\n@@ -6673,31 +6964,33 @@ mlx5_flow_meter_init(struct rte_eth_dev *dev,\n \tif (reg_id < 0) {\n \t\tret = ENOTSUP;\n \t\trte_flow_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter register is not available.\");\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter register is not available.\");\n \t\tgoto err;\n \t}\n+\tflags = MLX5DR_ACTION_FLAG_HWS_RX | MLX5DR_ACTION_FLAG_HWS_TX;\n+\tif (priv->sh->config.dv_esw_en && priv->master)\n+\t\tflags |= MLX5DR_ACTION_FLAG_HWS_FDB;\n \tpriv->mtr_bulk.action = mlx5dr_action_create_aso_meter\n \t\t\t(priv->dr_ctx, (struct mlx5dr_devx_obj *)dcs,\n-\t\t\t\treg_id - REG_C_0, MLX5DR_ACTION_FLAG_HWS_RX |\n-\t\t\t\tMLX5DR_ACTION_FLAG_HWS_TX |\n-\t\t\t\tMLX5DR_ACTION_FLAG_HWS_FDB);\n+\t\t\t\treg_id - REG_C_0, flags);\n \tif (!priv->mtr_bulk.action) {\n \t\tret = ENOMEM;\n \t\trte_flow_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter action creation failed.\");\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter action creation failed.\");\n \t\tgoto err;\n \t}\n \tpriv->mtr_bulk.aso = mlx5_malloc(MLX5_MEM_ZERO,\n-\t\t\t\t\t\tsizeof(struct mlx5_aso_mtr) * nb_meters,\n-\t\t\t\t\t\tRTE_CACHE_LINE_SIZE,\n-\t\t\t\t\t\tSOCKET_ID_ANY);\n+\t\t\t\t\t sizeof(struct mlx5_aso_mtr) *\n+\t\t\t\t\t nb_meters,\n+\t\t\t\t\t RTE_CACHE_LINE_SIZE,\n+\t\t\t\t\t SOCKET_ID_ANY);\n \tif (!priv->mtr_bulk.aso) {\n \t\tret = ENOMEM;\n \t\trte_flow_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter bulk ASO allocation failed.\");\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter bulk ASO allocation failed.\");\n \t\tgoto err;\n \t}\n \tpriv->mtr_bulk.size = nb_meters;\n@@ -6708,32 +7001,65 @@ mlx5_flow_meter_init(struct rte_eth_dev *dev,\n \t\taso->offset = i;\n \t\taso++;\n \t}\n+\tpriv->hws_mpool = mlx5_malloc(MLX5_MEM_ZERO,\n+\t\t\t\tsizeof(struct mlx5_aso_mtr_pool),\n+\t\t\t\tRTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);\n+\tif (!priv->hws_mpool) {\n+\t\tret = ENOMEM;\n+\t\trte_flow_error_set(&error, ENOMEM,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter ipool allocation failed.\");\n+\t\tgoto err;\n+\t}\n+\tpriv->hws_mpool->devx_obj = priv->mtr_bulk.devx_obj;\n+\tpriv->hws_mpool->action = priv->mtr_bulk.action;\n+\tpriv->hws_mpool->nb_sq = nb_queues;\n+\tif (mlx5_aso_mtr_queue_init(priv->sh, priv->hws_mpool,\n+\t\t\t\t NULL, nb_queues)) {\n+\t\tret = ENOMEM;\n+\t\trte_flow_error_set(&error, ENOMEM,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter ASO queue allocation failed.\");\n+\t\tgoto err;\n+\t}\n+\t/*\n+\t * No need for local cache if Meter number is a small number.\n+\t * Since flow insertion rate will be very limited in that case.\n+\t * Here let's set the number to less than default trunk size 4K.\n+\t */\n+\tif (nb_mtrs <= cfg.trunk_size) {\n+\t\tcfg.per_core_cache = 0;\n+\t\tcfg.trunk_size = nb_mtrs;\n+\t} else if (nb_mtrs <= MLX5_HW_IPOOL_SIZE_THRESHOLD) {\n+\t\tcfg.per_core_cache = MLX5_HW_IPOOL_CACHE_MIN;\n+\t}\n+\tpriv->hws_mpool->idx_pool = mlx5_ipool_create(&cfg);\n \tpriv->mtr_config.nb_meter_profiles = nb_meter_profiles;\n \tpriv->mtr_profile_arr =\n \t\tmlx5_malloc(MLX5_MEM_ZERO,\n-\t\t\t\tsizeof(struct mlx5_flow_meter_profile) *\n-\t\t\t\tnb_meter_profiles,\n-\t\t\t\tRTE_CACHE_LINE_SIZE,\n-\t\t\t\tSOCKET_ID_ANY);\n+\t\t\t sizeof(struct mlx5_flow_meter_profile) *\n+\t\t\t nb_meter_profiles,\n+\t\t\t RTE_CACHE_LINE_SIZE,\n+\t\t\t SOCKET_ID_ANY);\n \tif (!priv->mtr_profile_arr) {\n \t\tret = ENOMEM;\n \t\trte_flow_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter profile allocation failed.\");\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter profile allocation failed.\");\n \t\tgoto err;\n \t}\n \tpriv->mtr_config.nb_meter_policies = nb_meter_policies;\n \tpriv->mtr_policy_arr =\n \t\tmlx5_malloc(MLX5_MEM_ZERO,\n-\t\t\t\tsizeof(struct mlx5_flow_meter_policy) *\n-\t\t\t\tnb_meter_policies,\n-\t\t\t\tRTE_CACHE_LINE_SIZE,\n-\t\t\t\tSOCKET_ID_ANY);\n+\t\t\t sizeof(struct mlx5_flow_meter_policy) *\n+\t\t\t nb_meter_policies,\n+\t\t\t RTE_CACHE_LINE_SIZE,\n+\t\t\t SOCKET_ID_ANY);\n \tif (!priv->mtr_policy_arr) {\n \t\tret = ENOMEM;\n \t\trte_flow_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter policy allocation failed.\");\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter policy allocation failed.\");\n \t\tgoto err;\n \t}\n \treturn 0;\ndiff --git a/drivers/net/mlx5/mlx5_flow_meter.c b/drivers/net/mlx5/mlx5_flow_meter.c\nindex 792b945c98..fd1337ae73 100644\n--- a/drivers/net/mlx5/mlx5_flow_meter.c\n+++ b/drivers/net/mlx5/mlx5_flow_meter.c\n@@ -588,6 +588,36 @@ mlx5_flow_meter_profile_delete(struct rte_eth_dev *dev,\n \treturn 0;\n }\n \n+/**\n+ * Callback to get MTR profile.\n+ *\n+ * @param[in] dev\n+ * Pointer to Ethernet device.\n+ * @param[in] meter_profile_id\n+ * Meter profile id.\n+ * @param[out] error\n+ * Pointer to the error structure.\n+ *\n+ * @return\n+ * A valid handle in case of success, NULL otherwise.\n+ */\n+static struct rte_flow_meter_profile *\n+mlx5_flow_meter_profile_get(struct rte_eth_dev *dev,\n+\t\t\t uint32_t meter_profile_id,\n+\t\t\t struct rte_mtr_error *error)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\n+\tif (!priv->mtr_en) {\n+\t\trte_mtr_error_set(error, ENOTSUP,\n+\t\t\t\t RTE_MTR_ERROR_TYPE_UNSPECIFIED, NULL,\n+\t\t\t\t \"Meter is not supported\");\n+\t\treturn NULL;\n+\t}\n+\treturn (void *)(uintptr_t)mlx5_flow_meter_profile_find(priv,\n+\t\t\t\t\t\t\tmeter_profile_id);\n+}\n+\n /**\n * Callback to add MTR profile with HWS.\n *\n@@ -1150,6 +1180,37 @@ mlx5_flow_meter_policy_delete(struct rte_eth_dev *dev,\n \treturn 0;\n }\n \n+/**\n+ * Callback to get MTR policy.\n+ *\n+ * @param[in] dev\n+ * Pointer to Ethernet device.\n+ * @param[in] policy_id\n+ * Meter policy id.\n+ * @param[out] error\n+ * Pointer to the error structure.\n+ *\n+ * @return\n+ * A valid handle in case of success, NULL otherwise.\n+ */\n+static struct rte_flow_meter_policy *\n+mlx5_flow_meter_policy_get(struct rte_eth_dev *dev,\n+\t\t\t uint32_t policy_id,\n+\t\t\t struct rte_mtr_error *error)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tuint32_t policy_idx;\n+\n+\tif (!priv->mtr_en) {\n+\t\trte_mtr_error_set(error, ENOTSUP,\n+\t\t\t\t RTE_MTR_ERROR_TYPE_UNSPECIFIED, NULL,\n+\t\t\t\t \"Meter is not supported\");\n+\t\treturn NULL;\n+\t}\n+\treturn (void *)(uintptr_t)mlx5_flow_meter_policy_find(dev, policy_id,\n+\t\t\t\t\t\t\t &policy_idx);\n+}\n+\n /**\n * Callback to delete MTR policy for HWS.\n *\n@@ -1565,11 +1626,11 @@ mlx5_flow_meter_action_modify(struct mlx5_priv *priv,\n \tif (priv->sh->meter_aso_en) {\n \t\tfm->is_enable = !!is_enable;\n \t\taso_mtr = container_of(fm, struct mlx5_aso_mtr, fm);\n-\t\tret = mlx5_aso_meter_update_by_wqe(priv->sh, aso_mtr,\n-\t\t\t\t\t\t &priv->mtr_bulk);\n+\t\tret = mlx5_aso_meter_update_by_wqe(priv->sh, MLX5_HW_INV_QUEUE,\n+\t\t\t\t\t\t aso_mtr, &priv->mtr_bulk);\n \t\tif (ret)\n \t\t\treturn ret;\n-\t\tret = mlx5_aso_mtr_wait(priv->sh, aso_mtr);\n+\t\tret = mlx5_aso_mtr_wait(priv->sh, MLX5_HW_INV_QUEUE, aso_mtr);\n \t\tif (ret)\n \t\t\treturn ret;\n \t} else {\n@@ -1815,8 +1876,8 @@ mlx5_flow_meter_create(struct rte_eth_dev *dev, uint32_t meter_id,\n \t/* If ASO meter supported, update ASO flow meter by wqe. */\n \tif (priv->sh->meter_aso_en) {\n \t\taso_mtr = container_of(fm, struct mlx5_aso_mtr, fm);\n-\t\tret = mlx5_aso_meter_update_by_wqe(priv->sh, aso_mtr,\n-\t\t\t\t\t\t &priv->mtr_bulk);\n+\t\tret = mlx5_aso_meter_update_by_wqe(priv->sh, MLX5_HW_INV_QUEUE,\n+\t\t\t\t\t\t aso_mtr, &priv->mtr_bulk);\n \t\tif (ret)\n \t\t\tgoto error;\n \t\tif (!priv->mtr_idx_tbl) {\n@@ -1921,7 +1982,7 @@ mlx5_flow_meter_hws_create(struct rte_eth_dev *dev, uint32_t meter_id,\n \tfm->shared = !!shared;\n \tfm->initialized = 1;\n \t/* Update ASO flow meter by wqe. */\n-\tret = mlx5_aso_meter_update_by_wqe(priv->sh, aso_mtr,\n+\tret = mlx5_aso_meter_update_by_wqe(priv->sh, MLX5_HW_INV_QUEUE, aso_mtr,\n \t\t\t\t\t &priv->mtr_bulk);\n \tif (ret)\n \t\treturn -rte_mtr_error_set(error, ENOTSUP,\n@@ -2401,9 +2462,11 @@ static const struct rte_mtr_ops mlx5_flow_mtr_ops = {\n \t.capabilities_get = mlx5_flow_mtr_cap_get,\n \t.meter_profile_add = mlx5_flow_meter_profile_add,\n \t.meter_profile_delete = mlx5_flow_meter_profile_delete,\n+\t.meter_profile_get = mlx5_flow_meter_profile_get,\n \t.meter_policy_validate = mlx5_flow_meter_policy_validate,\n \t.meter_policy_add = mlx5_flow_meter_policy_add,\n \t.meter_policy_delete = mlx5_flow_meter_policy_delete,\n+\t.meter_policy_get = mlx5_flow_meter_policy_get,\n \t.create = mlx5_flow_meter_create,\n \t.destroy = mlx5_flow_meter_destroy,\n \t.meter_enable = mlx5_flow_meter_enable,\n@@ -2418,9 +2481,11 @@ static const struct rte_mtr_ops mlx5_flow_mtr_hws_ops = {\n \t.capabilities_get = mlx5_flow_mtr_cap_get,\n \t.meter_profile_add = mlx5_flow_meter_profile_hws_add,\n \t.meter_profile_delete = mlx5_flow_meter_profile_hws_delete,\n+\t.meter_profile_get = mlx5_flow_meter_profile_get,\n \t.meter_policy_validate = mlx5_flow_meter_policy_hws_validate,\n \t.meter_policy_add = mlx5_flow_meter_policy_hws_add,\n \t.meter_policy_delete = mlx5_flow_meter_policy_hws_delete,\n+\t.meter_policy_get = mlx5_flow_meter_policy_get,\n \t.create = mlx5_flow_meter_hws_create,\n \t.destroy = mlx5_flow_meter_hws_destroy,\n \t.meter_enable = mlx5_flow_meter_enable,\n@@ -2566,7 +2631,7 @@ mlx5_flow_meter_attach(struct mlx5_priv *priv,\n \t\tstruct mlx5_aso_mtr *aso_mtr;\n \n \t\taso_mtr = container_of(fm, struct mlx5_aso_mtr, fm);\n-\t\tif (mlx5_aso_mtr_wait(priv->sh, aso_mtr)) {\n+\t\tif (mlx5_aso_mtr_wait(priv->sh, MLX5_HW_INV_QUEUE, aso_mtr)) {\n \t\t\treturn rte_flow_error_set(error, ENOENT,\n \t\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n \t\t\t\t\tNULL,\n", "prefixes": [ "v2", "12/17" ] }