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GET /api/patches/116765/?format=api
{ "id": 116765, "url": "http://patches.dpdk.org/api/patches/116765/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220923144334.27736-27-suanmingm@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220923144334.27736-27-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220923144334.27736-27-suanmingm@nvidia.com", "date": "2022-09-23T14:43:33", "name": "[26/27] net/mlx5: implement METER MARK action for HWS", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "76b8524e0b466311ee1e70e76cce0caef346162a", "submitter": { "id": 1887, "url": "http://patches.dpdk.org/api/people/1887/?format=api", "name": "Suanming Mou", "email": "suanmingm@nvidia.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220923144334.27736-27-suanmingm@nvidia.com/mbox/", "series": [ { "id": 24805, "url": "http://patches.dpdk.org/api/series/24805/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24805", "date": "2022-09-23T14:43:07", "name": "net/mlx5: HW steering PMD update", "version": 1, "mbox": "http://patches.dpdk.org/series/24805/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/116765/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/116765/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": 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net/mlx5: implement METER MARK action for HWS", "Date": "Fri, 23 Sep 2022 17:43:33 +0300", "Message-ID": "<20220923144334.27736-27-suanmingm@nvidia.com>", "X-Mailer": "git-send-email 2.18.1", "In-Reply-To": "<20220923144334.27736-1-suanmingm@nvidia.com>", "References": "<20220923144334.27736-1-suanmingm@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail201.nvidia.com (10.129.68.8) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CO1NAM11FT042:EE_|BL1PR12MB5828:EE_", "X-MS-Office365-Filtering-Correlation-Id": "c45201f0-4b4f-49a3-6b9a-08da9d722f75", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n t9/2VTiERLwVH37kMHh7b/R/Mkj8+0GDiF9gKyT+8JCgokHRwly0mrvnSRDA48OAkDaa5vm1dSoHCAxXoBEgZA/hNoohqAommgTZBrLMczsGQ+nSkLhDvllN2TfMdtNLBROiUErMJAPf3AQC2YJFSUn2Mjl5dsvb6HC9JSnzn6bI1bbHVSOJHSGc23KJsiwlbddtK2W6fomIyHjpt9l45IYrgUct5o8UHJxQPh+2LbOEiSq4bfl3aFwZyfW3lhu9TG82jdqoq3mHKPeei344ePYXz70QIVlnsm975j0pVDoSjF6a+FP2mQhq/sJEMqiHylQ59Wbp6h8xlRnnK+b0Vrnz+hNLEMWnC0Lgd123dUKrfGF8EceHppJXb7jfcWYiHe+dVZefJuG4YAIjtMmfVlvMe4qobSNpGEypqJpENmMKwhq6gsI8K60eSDYFRUQUEvhe5dIYyroMNJ6CYPqEW9iP1C24z/6NJM7QY/gd7zLIYFtiETla2HFRbbWvQjdAMsFf6xDhwxL/YZNVoH0vz2D1G5IKf5j5J04sLJ2OqSJC8lUN+dB2+r89eWM7XvTDcT0yYUTa42k03ZNRHs+YDorU2QDtc+zL32M9OSAasJMTziUPUe2WQ2p/WajkcjKA7BBglN9vIL9ezT8EqhNyN2cyOPAw9R9WG6jvJNLrGU66mQzPlmhj01BlUnJqUAHxa97mgYyhTaRVpkd3QmilVR/dJ7eSqprHslactd1CtfPLsQ1a9BwBCx3JqG74Z/AGS4jTOLdCrAwMSFBBJt3MWI8r0164ltl/Gjgx8QaKV6M=", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230022)(4636009)(39860400002)(136003)(396003)(376002)(346002)(451199015)(40470700004)(46966006)(36840700001)(426003)(16526019)(336012)(36860700001)(47076005)(83380400001)(356005)(1076003)(186003)(2616005)(82740400003)(7636003)(8676002)(7696005)(70586007)(82310400005)(40480700001)(70206006)(26005)(4326008)(8936002)(41300700001)(6286002)(2906002)(110136005)(5660300002)(54906003)(40460700003)(30864003)(86362001)(316002)(36756003)(6636002)(55016003)(478600001)(107886003)(309714004);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "23 Sep 2022 14:44:57.2841 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n c45201f0-4b4f-49a3-6b9a-08da9d722f75", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1NAM11FT042.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BL1PR12MB5828", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Alexander Kozyrev <akozyrev@nvidia.com>\n\nImplement METER_MARK action for hardware steering case.\n\nSigned-off-by: Alexander Kozyrev <akozyrev@nvidia.com>\n---\n drivers/net/mlx5/mlx5.h | 9 ++-\n drivers/net/mlx5/mlx5_flow.h | 2 +\n drivers/net/mlx5/mlx5_flow_aso.c | 7 +-\n drivers/net/mlx5/mlx5_flow_hw.c | 116 +++++++++++++++++++++++++++--\n drivers/net/mlx5/mlx5_flow_meter.c | 107 ++++++++++++++++++--------\n 5 files changed, 204 insertions(+), 37 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex ec08014832..ff02d4cf13 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -969,12 +969,16 @@ enum mlx5_aso_mtr_type {\n \n /* Generic aso_flow_meter information. */\n struct mlx5_aso_mtr {\n-\tLIST_ENTRY(mlx5_aso_mtr) next;\n+\tunion {\n+\t\tLIST_ENTRY(mlx5_aso_mtr) next;\n+\t\tstruct mlx5_aso_mtr_pool *pool;\n+\t};\n \tenum mlx5_aso_mtr_type type;\n \tstruct mlx5_flow_meter_info fm;\n \t/**< Pointer to the next aso flow meter structure. */\n \tuint8_t state; /**< ASO flow meter state. */\n \tuint32_t offset;\n+\tenum rte_color init_color;\n };\n \n /* Generic aso_flow_meter pool structure. */\n@@ -983,6 +987,8 @@ struct mlx5_aso_mtr_pool {\n \t/*Must be the first in pool*/\n \tstruct mlx5_devx_obj *devx_obj;\n \t/* The devx object of the minimum aso flow meter ID. */\n+\tstruct mlx5dr_action *action; /* HWS action. */\n+\tstruct mlx5_indexed_pool *idx_pool; /* HWS index pool. */\n \tuint32_t index; /* Pool index in management structure. */\n };\n \n@@ -1670,6 +1676,7 @@ struct mlx5_priv {\n \tstruct mlx5_indexed_pool *acts_ipool; /* Action data indexed pool. */\n \tstruct mlx5_hws_cnt_pool *hws_cpool; /* HW steering's counter pool. */\n \tstruct mlx5_aso_ct_pool *hws_ctpool; /* HW steering's CT pool. */\n+\tstruct mlx5_aso_mtr_pool *hws_mpool; /* Meter mark indexed pool. */\n #endif\n };\n \ndiff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex 514903dbe1..e1eb0ab697 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -1112,6 +1112,7 @@ struct rte_flow_hw {\n \tstruct rte_flow_template_table *table; /* The table flow allcated from. */\n \tstruct mlx5dr_rule rule; /* HWS layer data struct. */\n \tuint32_t cnt_id;\n+\tuint32_t mtr_id;\n } __rte_packed;\n \n /* rte flow action translate to DR action struct. */\n@@ -1241,6 +1242,7 @@ struct mlx5_hw_actions {\n \tuint16_t encap_decap_pos; /* Encap/Decap action position. */\n \tuint32_t mark:1; /* Indicate the mark action. */\n \tuint32_t cnt_id; /* Counter id. */\n+\tuint32_t mtr_id; /* Meter id. */\n \t/* Translated DR action array from action template. */\n \tstruct mlx5dr_rule_action rule_acts[MLX5_HW_MAX_ACTS];\n };\ndiff --git a/drivers/net/mlx5/mlx5_flow_aso.c b/drivers/net/mlx5/mlx5_flow_aso.c\nindex 34fed3f4b8..8bb7d4ef39 100644\n--- a/drivers/net/mlx5/mlx5_flow_aso.c\n+++ b/drivers/net/mlx5/mlx5_flow_aso.c\n@@ -700,8 +700,11 @@ mlx5_aso_mtr_sq_enqueue_single(struct mlx5_dev_ctx_shared *sh,\n \tfm = &aso_mtr->fm;\n \tsq->elts[sq->head & mask].mtr = aso_mtr;\n \tif (aso_mtr->type == ASO_METER_INDIRECT) {\n-\t\tpool = container_of(aso_mtr, struct mlx5_aso_mtr_pool,\n-\t\t\t\t mtrs[aso_mtr->offset]);\n+\t\tif (likely(sh->config.dv_flow_en == 2))\n+\t\t\tpool = aso_mtr->pool;\n+\t\telse\n+\t\t\tpool = container_of(aso_mtr, struct mlx5_aso_mtr_pool,\n+\t\t\t\t\t mtrs[aso_mtr->offset]);\n \t\tid = pool->devx_obj->id;\n \t} else {\n \t\tid = bulk->devx_obj->id;\ndiff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c\nindex 87b3e34cb4..90a6c0c78f 100644\n--- a/drivers/net/mlx5/mlx5_flow_hw.c\n+++ b/drivers/net/mlx5/mlx5_flow_hw.c\n@@ -395,6 +395,10 @@ __flow_hw_action_template_destroy(struct rte_eth_dev *dev,\n \t\tmlx5_hws_cnt_shared_put(priv->hws_cpool, &acts->cnt_id);\n \t\tacts->cnt_id = 0;\n \t}\n+\tif (acts->mtr_id) {\n+\t\tmlx5_ipool_free(priv->hws_mpool->idx_pool, acts->mtr_id);\n+\t\tacts->mtr_id = 0;\n+\t}\n }\n \n /**\n@@ -1096,6 +1100,70 @@ static rte_be32_t vlan_hdr_to_be32(const struct rte_flow_action *actions)\n #endif\n }\n \n+static __rte_always_inline struct mlx5_aso_mtr *\n+flow_hw_meter_mark_alloc(struct rte_eth_dev *dev,\n+\t\t\t const struct rte_flow_action *action)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_aso_mtr_pool *pool = priv->hws_mpool;\n+\tconst struct rte_flow_action_meter_mark *meter_mark = action->conf;\n+\tstruct mlx5_aso_mtr *aso_mtr;\n+\tstruct mlx5_flow_meter_info *fm;\n+\tuint32_t mtr_id;\n+\n+\taso_mtr = mlx5_ipool_malloc(priv->hws_mpool->idx_pool, &mtr_id);\n+\tif (!aso_mtr)\n+\t\treturn NULL;\n+\t/* Fill the flow meter parameters. */\n+\taso_mtr->type = ASO_METER_INDIRECT;\n+\tfm = &aso_mtr->fm;\n+\tfm->meter_id = mtr_id;\n+\tfm->profile = (struct mlx5_flow_meter_profile *)(meter_mark->profile);\n+\tfm->is_enable = meter_mark->state;\n+\tfm->color_aware = meter_mark->color_mode;\n+\taso_mtr->pool = pool;\n+\taso_mtr->state = ASO_METER_WAIT;\n+\taso_mtr->offset = mtr_id - 1;\n+\taso_mtr->init_color = (meter_mark->color_mode) ?\n+\t\tmeter_mark->init_color : RTE_COLOR_GREEN;\n+\t/* Update ASO flow meter by wqe. */\n+\tif (mlx5_aso_meter_update_by_wqe(priv->sh, aso_mtr, &priv->mtr_bulk)) {\n+\t\tmlx5_ipool_free(pool->idx_pool, mtr_id);\n+\t\treturn NULL;\n+\t}\n+\t/* Wait for ASO object completion. */\n+\tif (mlx5_aso_mtr_wait(priv->sh, aso_mtr)) {\n+\t\tmlx5_ipool_free(pool->idx_pool, mtr_id);\n+\t\treturn NULL;\n+\t}\n+\treturn aso_mtr;\n+}\n+\n+static __rte_always_inline int\n+flow_hw_meter_mark_compile(struct rte_eth_dev *dev,\n+\t\t\t uint16_t aso_mtr_pos,\n+\t\t\t const struct rte_flow_action *action,\n+\t\t\t struct mlx5dr_rule_action *acts,\n+\t\t\t uint32_t *index)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_aso_mtr_pool *pool = priv->hws_mpool;\n+\tstruct mlx5_aso_mtr *aso_mtr;\n+\n+\taso_mtr = flow_hw_meter_mark_alloc(dev, action);\n+\tif (!aso_mtr)\n+\t\treturn -1;\n+\n+\t/* Compile METER_MARK action */\n+\tacts[aso_mtr_pos].action = pool->action;\n+\tacts[aso_mtr_pos].aso_meter.offset = aso_mtr->offset;\n+\tacts[aso_mtr_pos].aso_meter.init_color =\n+\t\t(enum mlx5dr_action_aso_meter_color)\n+\t\trte_col_2_mlx5_col(aso_mtr->init_color);\n+\t*index = aso_mtr->fm.meter_id;\n+\treturn 0;\n+}\n+\n /**\n * Translate rte_flow actions to DR action.\n *\n@@ -1403,6 +1471,23 @@ __flow_hw_actions_translate(struct rte_eth_dev *dev,\n \t\t\t\tgoto err;\n \t\t\t}\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_METER_MARK:\n+\t\t\taction_pos = at->actions_off[actions - action_start];\n+\t\t\tif (actions->conf && masks->conf &&\n+\t\t\t ((const struct rte_flow_action_meter_mark *)\n+\t\t\t masks->conf)->profile) {\n+\t\t\t\tret = flow_hw_meter_mark_compile(dev,\n+\t\t\t\t\t\t\taction_pos, actions,\n+\t\t\t\t\t\t\tacts->rule_acts,\n+\t\t\t\t\t\t\t&acts->mtr_id);\n+\t\t\t\tif (ret)\n+\t\t\t\t\tgoto err;\n+\t\t\t} else if (__flow_hw_act_data_general_append(priv, acts,\n+\t\t\t\t\t\t\tactions->type,\n+\t\t\t\t\t\t\tactions - action_start,\n+\t\t\t\t\t\t\taction_pos))\n+\t\t\t\tgoto err;\n+\t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_END:\n \t\t\tactions_end = true;\n \t\t\tbreak;\n@@ -1788,7 +1873,6 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,\n \tsize_t encap_len = 0;\n \tint ret;\n \tstruct mlx5_aso_mtr *mtr;\n-\tuint32_t mtr_id;\n \n \trte_memcpy(rule_acts, hw_acts->rule_acts, sizeof(*rule_acts) * at->dr_actions_num);\n \tattr.group = table->grp->group_id;\n@@ -1822,6 +1906,7 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,\n \t\tstruct mlx5_hrxq *hrxq;\n \t\tuint32_t ct_idx;\n \t\tcnt_id_t cnt_id;\n+\t\tuint32_t mtr_id;\n \n \t\taction = &actions[act_data->action_src];\n \t\t/*\n@@ -1928,13 +2013,13 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,\n \t\tcase RTE_FLOW_ACTION_TYPE_METER:\n \t\t\tmeter = action->conf;\n \t\t\tmtr_id = meter->mtr_id;\n-\t\t\tmtr = mlx5_aso_meter_by_idx(priv, mtr_id);\n+\t\t\taso_mtr = mlx5_aso_meter_by_idx(priv, mtr_id);\n \t\t\trule_acts[act_data->action_dst].action =\n \t\t\t\tpriv->mtr_bulk.action;\n \t\t\trule_acts[act_data->action_dst].aso_meter.offset =\n-\t\t\t\t\t\t\t\tmtr->offset;\n+\t\t\t\t\t\t\t\taso_mtr->offset;\n \t\t\tjump = flow_hw_jump_action_register\n-\t\t\t\t(dev, &table->cfg, mtr->fm.group, NULL);\n+\t\t\t\t(dev, &table->cfg, aso_mtr->fm.group, NULL);\n \t\t\tif (!jump)\n \t\t\t\treturn -1;\n \t\t\tMLX5_ASSERT\n@@ -1944,7 +2029,7 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,\n \t\t\t\t\t\t\t jump->root_action;\n \t\t\tjob->flow->jump = jump;\n \t\t\tjob->flow->fate_type = MLX5_FLOW_FATE_JUMP;\n-\t\t\tif (mlx5_aso_mtr_wait(priv->sh, mtr))\n+\t\t\tif (mlx5_aso_mtr_wait(priv->sh, aso_mtr))\n \t\t\t\treturn -1;\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_COUNT:\n@@ -1980,6 +2065,13 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,\n \t\t\t\t\t &rule_acts[act_data->action_dst]))\n \t\t\t\treturn -1;\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_METER_MARK:\n+\t\t\tret = flow_hw_meter_mark_compile(dev,\n+\t\t\t\tact_data->action_dst, action,\n+\t\t\t\trule_acts, &job->flow->mtr_id);\n+\t\t\tif (ret != 0)\n+\t\t\t\treturn ret;\n+\t\t\tbreak;\n \t\tdefault:\n \t\t\tbreak;\n \t\t}\n@@ -2242,6 +2334,7 @@ flow_hw_pull(struct rte_eth_dev *dev,\n \t struct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_aso_mtr_pool *pool = priv->hws_mpool;\n \tstruct mlx5_hw_q_job *job;\n \tint ret, i;\n \n@@ -2266,6 +2359,10 @@ flow_hw_pull(struct rte_eth_dev *dev,\n \t\t\t\t\t\t&job->flow->cnt_id);\n \t\t\t\tjob->flow->cnt_id = 0;\n \t\t\t}\n+\t\t\tif (job->flow->mtr_id) {\n+\t\t\t\tmlx5_ipool_free(pool->idx_pool,\tjob->flow->mtr_id);\n+\t\t\t\tjob->flow->mtr_id = 0;\n+\t\t\t}\n \t\t\tmlx5_ipool_free(job->flow->table->flow, job->flow->idx);\n \t\t}\n \t\tpriv->hw_q[queue].job[priv->hw_q[queue].job_idx++] = job;\n@@ -3059,6 +3156,9 @@ flow_hw_actions_validate(struct rte_eth_dev *dev,\n \t\tcase RTE_FLOW_ACTION_TYPE_METER:\n \t\t\t/* TODO: Validation logic */\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_METER_MARK:\n+\t\t\t/* TODO: Validation logic */\n+\t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:\n \t\t\tret = flow_hw_validate_action_modify_field(action,\n \t\t\t\t\t\t\t\t\tmask,\n@@ -3243,6 +3343,12 @@ flow_hw_dr_actions_template_create(struct rte_flow_actions_template *at)\n \t\t\t\tMLX5_HW_VLAN_PUSH_PCP_IDX :\n \t\t\t\tMLX5_HW_VLAN_PUSH_VID_IDX;\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_METER_MARK:\n+\t\t\tat->actions_off[i] = curr_off;\n+\t\t\taction_types[curr_off++] = MLX5DR_ACTION_TYP_ASO_METER;\n+\t\t\tif (curr_off >= MLX5_HW_MAX_ACTS)\n+\t\t\t\tgoto err_actions_num;\n+\t\t\tbreak;\n \t\tdefault:\n \t\t\ttype = mlx5_hw_dr_action_types[at->actions[i].type];\n \t\t\tat->actions_off[i] = curr_off;\ndiff --git a/drivers/net/mlx5/mlx5_flow_meter.c b/drivers/net/mlx5/mlx5_flow_meter.c\nindex 893dc42cef..1c8bb5fc8c 100644\n--- a/drivers/net/mlx5/mlx5_flow_meter.c\n+++ b/drivers/net/mlx5/mlx5_flow_meter.c\n@@ -17,6 +17,13 @@\n \n static int mlx5_flow_meter_disable(struct rte_eth_dev *dev,\n \t\tuint32_t meter_id, struct rte_mtr_error *error);\n+/*\n+ * The default ipool threshold value indicates which per_core_cache\n+ * value to set.\n+ */\n+#define MLX5_MTR_IPOOL_SIZE_THRESHOLD (1 << 19)\n+/* The default min local cache size. */\n+#define MLX5_MTR_IPOOL_CACHE_MIN (1 << 9)\n \n static void\n mlx5_flow_meter_uninit(struct rte_eth_dev *dev)\n@@ -31,6 +38,11 @@ mlx5_flow_meter_uninit(struct rte_eth_dev *dev)\n \t\tmlx5_free(priv->mtr_profile_arr);\n \t\tpriv->mtr_profile_arr = NULL;\n \t}\n+\tif (priv->hws_mpool) {\n+\t\tmlx5_ipool_destroy(priv->hws_mpool->idx_pool);\n+\t\tmlx5_free(priv->hws_mpool);\n+\t\tpriv->hws_mpool = NULL;\n+\t}\n \tif (priv->mtr_bulk.aso) {\n \t\tmlx5_free(priv->mtr_bulk.aso);\n \t\tpriv->mtr_bulk.aso = NULL;\n@@ -62,27 +74,39 @@ mlx5_flow_meter_init(struct rte_eth_dev *dev,\n \tuint32_t i;\n \tstruct rte_mtr_error error;\n \tuint32_t flags;\n+\tuint32_t nb_mtrs = rte_align32pow2(nb_meters);\n+\tstruct mlx5_indexed_pool_config cfg = {\n+\t\t.size = sizeof(struct mlx5_aso_mtr),\n+\t\t.trunk_size = 1 << 12,\n+\t\t.per_core_cache = 1 << 13,\n+\t\t.need_lock = 1,\n+\t\t.release_mem_en = !!priv->sh->config.reclaim_mode,\n+\t\t.malloc = mlx5_malloc,\n+\t\t.max_idx = nb_meters,\n+\t\t.free = mlx5_free,\n+\t\t.type = \"mlx5_hw_mtr_mark_action\",\n+\t};\n \n \tif (!nb_meters || !nb_meter_profiles || !nb_meter_policies) {\n \t\tret = ENOTSUP;\n \t\trte_mtr_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_MTR_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter configuration is invalid.\");\n+\t\t\t\t RTE_MTR_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter configuration is invalid.\");\n \t\tgoto err;\n \t}\n \tif (!priv->mtr_en || !priv->sh->meter_aso_en) {\n \t\tret = ENOTSUP;\n \t\trte_mtr_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_MTR_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter ASO is not supported.\");\n+\t\t\t\t RTE_MTR_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter ASO is not supported.\");\n \t\tgoto err;\n \t}\n \tpriv->mtr_config.nb_meters = nb_meters;\n \tif (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {\n \t\tret = ENOMEM;\n \t\trte_mtr_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_MTR_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter ASO queue allocation failed.\");\n+\t\t\t\t RTE_MTR_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter ASO queue allocation failed.\");\n \t\tgoto err;\n \t}\n \tlog_obj_size = rte_log2_u32(nb_meters >> 1);\n@@ -92,8 +116,8 @@ mlx5_flow_meter_init(struct rte_eth_dev *dev,\n \tif (!dcs) {\n \t\tret = ENOMEM;\n \t\trte_mtr_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_MTR_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter ASO object allocation failed.\");\n+\t\t\t\t RTE_MTR_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter ASO object allocation failed.\");\n \t\tgoto err;\n \t}\n \tpriv->mtr_bulk.devx_obj = dcs;\n@@ -101,8 +125,8 @@ mlx5_flow_meter_init(struct rte_eth_dev *dev,\n \tif (reg_id < 0) {\n \t\tret = ENOTSUP;\n \t\trte_mtr_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_MTR_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter register is not available.\");\n+\t\t\t\t RTE_MTR_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter register is not available.\");\n \t\tgoto err;\n \t}\n \tflags = MLX5DR_ACTION_FLAG_HWS_RX | MLX5DR_ACTION_FLAG_HWS_TX;\n@@ -114,19 +138,20 @@ mlx5_flow_meter_init(struct rte_eth_dev *dev,\n \tif (!priv->mtr_bulk.action) {\n \t\tret = ENOMEM;\n \t\trte_mtr_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_MTR_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter action creation failed.\");\n+\t\t\t\t RTE_MTR_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter action creation failed.\");\n \t\tgoto err;\n \t}\n \tpriv->mtr_bulk.aso = mlx5_malloc(MLX5_MEM_ZERO,\n-\t\t\t\t\t\tsizeof(struct mlx5_aso_mtr) * nb_meters,\n-\t\t\t\t\t\tRTE_CACHE_LINE_SIZE,\n-\t\t\t\t\t\tSOCKET_ID_ANY);\n+\t\t\t\t\t sizeof(struct mlx5_aso_mtr) *\n+\t\t\t\t\t nb_meters,\n+\t\t\t\t\t RTE_CACHE_LINE_SIZE,\n+\t\t\t\t\t SOCKET_ID_ANY);\n \tif (!priv->mtr_bulk.aso) {\n \t\tret = ENOMEM;\n \t\trte_mtr_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_MTR_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter bulk ASO allocation failed.\");\n+\t\t\t\t RTE_MTR_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter bulk ASO allocation failed.\");\n \t\tgoto err;\n \t}\n \tpriv->mtr_bulk.size = nb_meters;\n@@ -137,32 +162,56 @@ mlx5_flow_meter_init(struct rte_eth_dev *dev,\n \t\taso->offset = i;\n \t\taso++;\n \t}\n+\tpriv->hws_mpool = mlx5_malloc(MLX5_MEM_ZERO,\n+\t\t\t\tsizeof(struct mlx5_aso_mtr_pool),\n+\t\t\t\tRTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);\n+\tif (!priv->hws_mpool) {\n+\t\tret = ENOMEM;\n+\t\trte_mtr_error_set(&error, ENOMEM,\n+\t\t\t\t RTE_MTR_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter ipool allocation failed.\");\n+\t\tgoto err;\n+\t}\n+\tpriv->hws_mpool->devx_obj = priv->mtr_bulk.devx_obj;\n+\tpriv->hws_mpool->action = priv->mtr_bulk.action;\n+\t/*\n+\t * No need for local cache if Meter number is a small number.\n+\t * Since flow insertion rate will be very limited in that case.\n+\t * Here let's set the number to less than default trunk size 4K.\n+\t */\n+\tif (nb_mtrs <= cfg.trunk_size) {\n+\t\tcfg.per_core_cache = 0;\n+\t\tcfg.trunk_size = nb_mtrs;\n+\t} else if (nb_mtrs <= MLX5_MTR_IPOOL_SIZE_THRESHOLD) {\n+\t\tcfg.per_core_cache = MLX5_MTR_IPOOL_CACHE_MIN;\n+\t}\n+\tpriv->hws_mpool->idx_pool = mlx5_ipool_create(&cfg);\n \tpriv->mtr_config.nb_meter_profiles = nb_meter_profiles;\n \tpriv->mtr_profile_arr =\n \t\tmlx5_malloc(MLX5_MEM_ZERO,\n-\t\t\t\tsizeof(struct mlx5_flow_meter_profile) *\n-\t\t\t\tnb_meter_profiles,\n-\t\t\t\tRTE_CACHE_LINE_SIZE,\n-\t\t\t\tSOCKET_ID_ANY);\n+\t\t\t sizeof(struct mlx5_flow_meter_profile) *\n+\t\t\t nb_meter_profiles,\n+\t\t\t RTE_CACHE_LINE_SIZE,\n+\t\t\t SOCKET_ID_ANY);\n \tif (!priv->mtr_profile_arr) {\n \t\tret = ENOMEM;\n \t\trte_mtr_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_MTR_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter profile allocation failed.\");\n+\t\t\t\t RTE_MTR_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter profile allocation failed.\");\n \t\tgoto err;\n \t}\n \tpriv->mtr_config.nb_meter_policies = nb_meter_policies;\n \tpriv->mtr_policy_arr =\n \t\tmlx5_malloc(MLX5_MEM_ZERO,\n-\t\t\t\tsizeof(struct mlx5_flow_meter_policy) *\n-\t\t\t\tnb_meter_policies,\n-\t\t\t\tRTE_CACHE_LINE_SIZE,\n-\t\t\t\tSOCKET_ID_ANY);\n+\t\t\t sizeof(struct mlx5_flow_meter_policy) *\n+\t\t\t nb_meter_policies,\n+\t\t\t RTE_CACHE_LINE_SIZE,\n+\t\t\t SOCKET_ID_ANY);\n \tif (!priv->mtr_policy_arr) {\n \t\tret = ENOMEM;\n \t\trte_mtr_error_set(&error, ENOMEM,\n-\t\t\t\t\tRTE_MTR_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\tNULL, \"Meter policy allocation failed.\");\n+\t\t\t\t RTE_MTR_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Meter policy allocation failed.\");\n \t\tgoto err;\n \t}\n \treturn 0;\n", "prefixes": [ "26/27" ] }