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GET /api/patches/116659/?format=api
{ "id": 116659, "url": "http://patches.dpdk.org/api/patches/116659/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1663868722-39949-5-git-send-email-nicolas.chautru@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1663868722-39949-5-git-send-email-nicolas.chautru@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1663868722-39949-5-git-send-email-nicolas.chautru@intel.com", "date": "2022-09-22T17:45:19", "name": "[v9,4/7] drivers/baseband: update PMDs to expose queue per operation", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "c3a6ddadb81e1c7bf867534fb6b141c9eb061f86", "submitter": { "id": 1314, "url": "http://patches.dpdk.org/api/people/1314/?format=api", "name": "Chautru, Nicolas", "email": "nicolas.chautru@intel.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1663868722-39949-5-git-send-email-nicolas.chautru@intel.com/mbox/", "series": [ { "id": 24785, "url": "http://patches.dpdk.org/api/series/24785/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24785", "date": "2022-09-22T17:45:15", "name": "bbdev changes for 22.11", "version": 9, "mbox": "http://patches.dpdk.org/series/24785/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/116659/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/116659/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2CE58A0543;\n\tThu, 22 Sep 2022 19:46:19 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A481B4284D;\n\tThu, 22 Sep 2022 19:45:59 +0200 (CEST)", "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n by mails.dpdk.org (Postfix) with ESMTP id 3AEB440691\n for <dev@dpdk.org>; Thu, 22 Sep 2022 19:45:55 +0200 (CEST)", "from orsmga002.jf.intel.com ([10.7.209.21])\n by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 22 Sep 2022 10:45:54 -0700", "from unknown (HELO icx-npg-scs1-cp1.localdomain) ([10.233.180.245])\n by orsmga002.jf.intel.com with ESMTP; 22 Sep 2022 10:45:53 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1663868755; x=1695404755;\n h=from:to:cc:subject:date:message-id:in-reply-to: references;\n bh=I8oIGIG8n1DYyCNSEUBuBgw6vvrY2ttbHFAgfoG6+Qw=;\n b=Nse2s03v7SYbj5Mpas0lmPJaFJs0LePwc4HJIumpHph92le5ykUK5kYc\n VMc/BXyIA8IBF5Wyv7lQsQc6AJsaBP4ZcKmQnFtrqOJ8FKTqDNXkMz7wZ\n wS3eeu1FFjjcuEa4YiDFPKDCvwthKRKOdMQ8DCbiW9DtdI1rbhTx+utWC\n YGxgCEc25FzMvqmzP3QBFGDZW/0q3fWheLGzJ3hKXRybXFeqD5N6zLWX3\n dwkU5tinhh0W2+I6bgTaDHeSqvcSzyRBSnwdCzoP/t/2r+AnCXuu2VTAm\n 1Y6eFXEFOXZE/A1RNM8dSJCiFeyxSY+DwMS4KXYrYsr4yI4FozItodaGU w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10478\"; a=\"280099966\"", "E=Sophos;i=\"5.93,337,1654585200\"; d=\"scan'208\";a=\"280099966\"", "E=Sophos;i=\"5.93,337,1654585200\"; d=\"scan'208\";a=\"619887795\"" ], "X-ExtLoop1": "1", "From": "Nic Chautru <nicolas.chautru@intel.com>", "To": "dev@dpdk.org,\n\tthomas@monjalon.net,\n\tgakhil@marvell.com", "Cc": "maxime.coquelin@redhat.com, trix@redhat.com, mdr@ashroe.eu,\n bruce.richardson@intel.com, david.marchand@redhat.com,\n stephen@networkplumber.org, mingshan.zhang@intel.com,\n hemant.agrawal@nxp.com, Nicolas Chautru <nicolas.chautru@intel.com>", "Subject": "[PATCH v9 4/7] drivers/baseband: update PMDs to expose queue per\n operation", "Date": "Thu, 22 Sep 2022 10:45:19 -0700", "Message-Id": "<1663868722-39949-5-git-send-email-nicolas.chautru@intel.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1663868722-39949-1-git-send-email-nicolas.chautru@intel.com>", "References": "<1655491040-183649-6-git-send-email-nicolas.chautru@intel.com>\n <1663868722-39949-1-git-send-email-nicolas.chautru@intel.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Nicolas Chautru <nicolas.chautru@intel.com>\n\nAdd support in existing bbdev PMDs for the explicit number of queues\nand priority for each operation type configured on the device.\n\nSigned-off-by: Nicolas Chautru <nicolas.chautru@intel.com>\nAcked-by: Maxime Coquelin <maxime.coquelin@redhat.com>\nAcked-by: Hemant Agrawal <hemant.agrawal@nxp.com>\n---\n drivers/baseband/acc100/rte_acc100_pmd.c | 29 +++++++++++++---------\n drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 8 ++++++\n drivers/baseband/fpga_lte_fec/fpga_lte_fec.c | 8 ++++++\n drivers/baseband/la12xx/bbdev_la12xx.c | 7 ++++++\n drivers/baseband/turbo_sw/bbdev_turbo_software.c | 12 +++++++++\n 5 files changed, 52 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c\nindex 17ba798..f967e3f 100644\n--- a/drivers/baseband/acc100/rte_acc100_pmd.c\n+++ b/drivers/baseband/acc100/rte_acc100_pmd.c\n@@ -966,6 +966,7 @@\n \t\tstruct rte_bbdev_driver_info *dev_info)\n {\n \tstruct acc100_device *d = dev->data->dev_private;\n+\tint i;\n \n \tstatic const struct rte_bbdev_op_cap bbdev_capabilities[] = {\n \t\t{\n@@ -1062,19 +1063,23 @@\n \tfetch_acc100_config(dev);\n \tdev_info->device_status = RTE_BBDEV_DEV_NOT_SUPPORTED;\n \n-\t/* This isn't ideal because it reports the maximum number of queues but\n-\t * does not provide info on how many can be uplink/downlink or different\n-\t * priorities\n-\t */\n-\tdev_info->max_num_queues =\n-\t\t\td->acc100_conf.q_dl_5g.num_aqs_per_groups *\n-\t\t\td->acc100_conf.q_dl_5g.num_qgroups +\n-\t\t\td->acc100_conf.q_ul_5g.num_aqs_per_groups *\n-\t\t\td->acc100_conf.q_ul_5g.num_qgroups +\n-\t\t\td->acc100_conf.q_dl_4g.num_aqs_per_groups *\n-\t\t\td->acc100_conf.q_dl_4g.num_qgroups +\n-\t\t\td->acc100_conf.q_ul_4g.num_aqs_per_groups *\n+\t/* Expose number of queues */\n+\tdev_info->num_queues[RTE_BBDEV_OP_NONE] = 0;\n+\tdev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] = d->acc100_conf.q_ul_4g.num_aqs_per_groups *\n \t\t\td->acc100_conf.q_ul_4g.num_qgroups;\n+\tdev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] = d->acc100_conf.q_dl_4g.num_aqs_per_groups *\n+\t\t\td->acc100_conf.q_dl_4g.num_qgroups;\n+\tdev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] = d->acc100_conf.q_ul_5g.num_aqs_per_groups *\n+\t\t\td->acc100_conf.q_ul_5g.num_qgroups;\n+\tdev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = d->acc100_conf.q_dl_5g.num_aqs_per_groups *\n+\t\t\td->acc100_conf.q_dl_5g.num_qgroups;\n+\tdev_info->queue_priority[RTE_BBDEV_OP_TURBO_DEC] = d->acc100_conf.q_ul_4g.num_qgroups;\n+\tdev_info->queue_priority[RTE_BBDEV_OP_TURBO_ENC] = d->acc100_conf.q_dl_4g.num_qgroups;\n+\tdev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] = d->acc100_conf.q_ul_5g.num_qgroups;\n+\tdev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] = d->acc100_conf.q_dl_5g.num_qgroups;\n+\tdev_info->max_num_queues = 0;\n+\tfor (i = RTE_BBDEV_OP_TURBO_DEC; i <= RTE_BBDEV_OP_LDPC_ENC; i++)\n+\t\tdev_info->max_num_queues += dev_info->num_queues[i];\n \tdev_info->queue_size_lim = ACC100_MAX_QUEUE_DEPTH;\n \tdev_info->hardware_accelerated = true;\n \tdev_info->max_dl_queue_priority =\ndiff --git a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c\nindex 57b12af..b4982af 100644\n--- a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c\n+++ b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c\n@@ -379,6 +379,14 @@\n \t\tif (hw_q_id != FPGA_INVALID_HW_QUEUE_ID)\n \t\t\tdev_info->max_num_queues++;\n \t}\n+\t/* Expose number of queue per operation type */\n+\tdev_info->num_queues[RTE_BBDEV_OP_NONE] = 0;\n+\tdev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] = 0;\n+\tdev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] = 0;\n+\tdev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] = dev_info->max_num_queues / 2;\n+\tdev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = dev_info->max_num_queues / 2;\n+\tdev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] = 1;\n+\tdev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] = 1;\n }\n \n /**\ndiff --git a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c\nindex 2a330c4..dc7f479 100644\n--- a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c\n+++ b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c\n@@ -655,6 +655,14 @@ struct __rte_cache_aligned fpga_queue {\n \t\tif (hw_q_id != FPGA_INVALID_HW_QUEUE_ID)\n \t\t\tdev_info->max_num_queues++;\n \t}\n+\t/* Expose number of queue per operation type */\n+\tdev_info->num_queues[RTE_BBDEV_OP_NONE] = 0;\n+\tdev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] = dev_info->max_num_queues / 2;\n+\tdev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] = dev_info->max_num_queues / 2;\n+\tdev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] = 0;\n+\tdev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = 0;\n+\tdev_info->queue_priority[RTE_BBDEV_OP_TURBO_DEC] = 1;\n+\tdev_info->queue_priority[RTE_BBDEV_OP_TURBO_ENC] = 1;\n }\n \n /**\ndiff --git a/drivers/baseband/la12xx/bbdev_la12xx.c b/drivers/baseband/la12xx/bbdev_la12xx.c\nindex c1f88c6..e99ea9a 100644\n--- a/drivers/baseband/la12xx/bbdev_la12xx.c\n+++ b/drivers/baseband/la12xx/bbdev_la12xx.c\n@@ -102,6 +102,13 @@ struct bbdev_la12xx_params {\n \tdev_info->min_alignment = 64;\n \tdev_info->device_status = RTE_BBDEV_DEV_NOT_SUPPORTED;\n \n+\tdev_info->num_queues[RTE_BBDEV_OP_NONE] = 0;\n+\tdev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] = 0;\n+\tdev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] = 0;\n+\tdev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] = LA12XX_MAX_QUEUES / 2;\n+\tdev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = LA12XX_MAX_QUEUES / 2;\n+\tdev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] = 1;\n+\tdev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] = 1;\n \trte_bbdev_log_debug(\"got device info from %u\", dev->data->dev_id);\n }\n \ndiff --git a/drivers/baseband/turbo_sw/bbdev_turbo_software.c b/drivers/baseband/turbo_sw/bbdev_turbo_software.c\nindex dbc5524..3609c13 100644\n--- a/drivers/baseband/turbo_sw/bbdev_turbo_software.c\n+++ b/drivers/baseband/turbo_sw/bbdev_turbo_software.c\n@@ -157,6 +157,8 @@ struct turbo_sw_queue {\n info_get(struct rte_bbdev *dev, struct rte_bbdev_driver_info *dev_info)\n {\n \tstruct bbdev_private *internals = dev->data->dev_private;\n+\tconst struct rte_bbdev_op_cap *op_cap;\n+\tint num_op_type = 0;\n \n \tstatic const struct rte_bbdev_op_cap bbdev_capabilities[] = {\n #ifdef RTE_BBDEV_SDK_AVX2\n@@ -256,6 +258,16 @@ struct turbo_sw_queue {\n \tdev_info->data_endianness = RTE_LITTLE_ENDIAN;\n \tdev_info->device_status = RTE_BBDEV_DEV_NOT_SUPPORTED;\n \n+\top_cap = bbdev_capabilities;\n+\tfor (; op_cap->type != RTE_BBDEV_OP_NONE; ++op_cap)\n+\t\tnum_op_type++;\n+\top_cap = bbdev_capabilities;\n+\tif (num_op_type > 0) {\n+\t\tint num_queue_per_type = dev_info->max_num_queues / num_op_type;\n+\t\tfor (; op_cap->type != RTE_BBDEV_OP_NONE; ++op_cap)\n+\t\t\tdev_info->num_queues[op_cap->type] = num_queue_per_type;\n+\t}\n+\n \trte_bbdev_log_debug(\"got device info from %u\\n\", dev->data->dev_id);\n }\n \n", "prefixes": [ "v9", "4/7" ] }