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GET /api/patches/116431/?format=api
{ "id": 116431, "url": "http://patches.dpdk.org/api/patches/116431/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220919124117.1059642-3-skori@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220919124117.1059642-3-skori@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220919124117.1059642-3-skori@marvell.com", "date": "2022-09-19T12:41:17", "name": "[3/3] net/cnxk: support congestion management ops", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "33eff23e310f390b84496cdac1b5bfcc49fac3a9", "submitter": { "id": 1318, "url": "http://patches.dpdk.org/api/people/1318/?format=api", "name": "Sunil Kumar Kori", "email": "skori@marvell.com" }, "delegate": { "id": 3961, "url": "http://patches.dpdk.org/api/users/3961/?format=api", "username": "arybchenko", "first_name": "Andrew", "last_name": "Rybchenko", "email": "andrew.rybchenko@oktetlabs.ru" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220919124117.1059642-3-skori@marvell.com/mbox/", "series": [ { "id": 24712, "url": "http://patches.dpdk.org/api/series/24712/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24712", "date": "2022-09-19T12:41:15", "name": "[1/3] app/testpmd: support congestion management CLIs", "version": 1, "mbox": "http://patches.dpdk.org/series/24712/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/116431/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/116431/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 00D71A00C3;\n\tMon, 19 Sep 2022 14:41:31 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 3F21641145;\n\tMon, 19 Sep 2022 14:41:30 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 4EF0B41145\n for <dev@dpdk.org>; Mon, 19 Sep 2022 14:41:29 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id\n 28J5EoBu011666\n for <dev@dpdk.org>; Mon, 19 Sep 2022 05:41:28 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3jndrmp7d9-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Mon, 19 Sep 2022 05:41:28 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Mon, 19 Sep 2022 05:41:26 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Mon, 19 Sep 2022 05:41:26 -0700", "from localhost.localdomain (unknown [10.28.34.25])\n by maili.marvell.com (Postfix) with ESMTP id F40743F7065;\n Mon, 19 Sep 2022 05:41:24 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=B9jZgZTrexVaiDcOIIUbHUP5ZhPvBiEnkDyXJbzUZPI=;\n b=JedIIfhy3+YvRD0XTxdkBJWbG5SsaJxxWlavOERS7+94q94MYiJ8aRztAOSnrhkaHNAa\n Cpe1gX9A8+a8EvVmLhFuM8NUI9YfJX6RKcccHqPBbHu30QQ1oFK2l9bu5WqS0A4PUSig\n XJzTvllb7FQ1FcKFlDscNrmhD711kD16r13sbnvUggkgcsRhajEyViaNctGrbM41nFrR\n doV9lbS8IkAs0DEpTkniaOJ897xtxF51NGXP0aceIL9AaWKX0/4bjigF+6gPOWbgwTX/\n tqdCfz0RbXqQyL+HjnZhz67lg2BP4jRWMnYNjtB0Hxibsfj9JmSkj+viZlGFT/e0/+pI Aw==", "From": "<skori@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>", "CC": "<dev@dpdk.org>", "Subject": "[PATCH 3/3] net/cnxk: support congestion management ops", "Date": "Mon, 19 Sep 2022 18:11:17 +0530", "Message-ID": "<20220919124117.1059642-3-skori@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20220919124117.1059642-1-skori@marvell.com>", "References": "<20220919124117.1059642-1-skori@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "Q0bqAQUkzlsg1bf6nmmG2Ie6uU1mumm4", "X-Proofpoint-ORIG-GUID": "Q0bqAQUkzlsg1bf6nmmG2Ie6uU1mumm4", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1\n definitions=2022-09-19_05,2022-09-16_01,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Sunil Kumar Kori <skori@marvell.com>\n\nSupport congestion management.\n\nDepends-on: patch-24710 (\"ethdev: support congestion management\")\n\nSigned-off-by: Sunil Kumar Kori <skori@marvell.com>\n---\n doc/guides/nics/features/cnxk.ini | 1 +\n drivers/net/cnxk/cnxk_ethdev.c | 4 +\n drivers/net/cnxk/cnxk_ethdev.h | 12 +++\n drivers/net/cnxk/cnxk_ethdev_cman.c | 140 ++++++++++++++++++++++++++++\n drivers/net/cnxk/meson.build | 1 +\n 5 files changed, 158 insertions(+)\n create mode 100644 drivers/net/cnxk/cnxk_ethdev_cman.c", "diff": "diff --git a/doc/guides/nics/features/cnxk.ini b/doc/guides/nics/features/cnxk.ini\nindex 1876fe86c7..bbb90e9527 100644\n--- a/doc/guides/nics/features/cnxk.ini\n+++ b/doc/guides/nics/features/cnxk.ini\n@@ -41,6 +41,7 @@ Rx descriptor status = Y\n Tx descriptor status = Y\n Basic stats = Y\n Stats per queue = Y\n+Congestion management = Y\n Extended stats = Y\n FW version = Y\n Module EEPROM dump = Y\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c\nindex 48170147a4..2d46938d68 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.c\n+++ b/drivers/net/cnxk/cnxk_ethdev.c\n@@ -1678,6 +1678,10 @@ struct eth_dev_ops cnxk_eth_dev_ops = {\n \t.tm_ops_get = cnxk_nix_tm_ops_get,\n \t.mtr_ops_get = cnxk_nix_mtr_ops_get,\n \t.eth_dev_priv_dump = cnxk_nix_eth_dev_priv_dump,\n+\t.cman_info_get = cnxk_nix_cman_info_get,\n+\t.cman_config_init = cnxk_nix_cman_config_init,\n+\t.cman_config_set = cnxk_nix_cman_config_set,\n+\t.cman_config_get = cnxk_nix_cman_config_get,\n };\n \n static int\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h\nindex c09e9bff8e..f884a532e1 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.h\n+++ b/drivers/net/cnxk/cnxk_ethdev.h\n@@ -417,6 +417,9 @@ struct cnxk_eth_dev {\n \tstruct cnxk_mtr_policy mtr_policy;\n \tstruct cnxk_mtr mtr;\n \n+\t/* Congestion Management */\n+\tstruct rte_eth_cman_config cman_cfg;\n+\n \t/* Rx burst for cleanup(Only Primary) */\n \teth_rx_burst_t rx_pkt_burst_no_offload;\n \n@@ -649,6 +652,15 @@ cnxk_eth_sec_sess_get_by_sess(struct cnxk_eth_dev *dev,\n int cnxk_nix_inl_meta_pool_cb(uint64_t *aura_handle, uint32_t buf_sz, uint32_t nb_bufs,\n \t\t\t bool destroy);\n \n+/* Congestion Management */\n+int cnxk_nix_cman_info_get(struct rte_eth_dev *dev, struct rte_eth_cman_info *info);\n+\n+int cnxk_nix_cman_config_init(struct rte_eth_dev *dev, struct rte_eth_cman_config *config);\n+\n+int cnxk_nix_cman_config_set(struct rte_eth_dev *dev, struct rte_eth_cman_config *config);\n+\n+int cnxk_nix_cman_config_get(struct rte_eth_dev *dev, struct rte_eth_cman_config *config);\n+\n /* Other private functions */\n int nix_recalc_mtu(struct rte_eth_dev *eth_dev);\n int nix_mtr_validate(struct rte_eth_dev *dev, uint32_t id);\ndiff --git a/drivers/net/cnxk/cnxk_ethdev_cman.c b/drivers/net/cnxk/cnxk_ethdev_cman.c\nnew file mode 100644\nindex 0000000000..5f019cd721\n--- /dev/null\n+++ b/drivers/net/cnxk/cnxk_ethdev_cman.c\n@@ -0,0 +1,140 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2022 Marvell International Ltd.\n+ */\n+\n+#include \"cnxk_ethdev.h\"\n+\n+#define CNXK_NIX_CMAN_RED_MIN_THRESH 75\n+#define CNXK_NIX_CMAN_RED_MAX_THRESH 95\n+\n+int\n+cnxk_nix_cman_info_get(struct rte_eth_dev *dev, struct rte_eth_cman_info *info)\n+{\n+\tRTE_SET_USED(dev);\n+\n+\tinfo->modes_supported = RTE_CMAN_RED;\n+\tinfo->objs_supported = RTE_ETH_CMAN_OBJ_RX_QUEUE | RTE_ETH_CMAN_OBJ_RX_QUEUE_MEMPOOL;\n+\n+\treturn 0;\n+}\n+\n+int\n+cnxk_nix_cman_config_init(struct rte_eth_dev *dev, struct rte_eth_cman_config *config)\n+{\n+\tRTE_SET_USED(dev);\n+\n+\tmemset(config, 0, sizeof(struct rte_eth_cman_config));\n+\n+\tconfig->obj = RTE_ETH_CMAN_OBJ_RX_QUEUE;\n+\tconfig->mode = RTE_CMAN_RED;\n+\tconfig->mode_param.red.min_th = CNXK_NIX_CMAN_RED_MIN_THRESH;\n+\tconfig->mode_param.red.max_th = CNXK_NIX_CMAN_RED_MAX_THRESH;\n+\treturn 0;\n+}\n+\n+static int\n+nix_cman_config_validate(struct rte_eth_dev *eth_dev, struct rte_eth_cman_config *config)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct rte_eth_cman_info info;\n+\n+\tmemset(&info, 0, sizeof(struct rte_eth_cman_info));\n+\tcnxk_nix_cman_info_get(eth_dev, &info);\n+\n+\tif (!(config->obj & info.objs_supported)) {\n+\t\tplt_err(\"Invalid object\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (!(config->mode & info.modes_supported)) {\n+\t\tplt_err(\"Invalid mode\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (config->obj_param.rx_queue >= dev->nb_rxq) {\n+\t\tplt_err(\"Invalid queue ID. Queue = %u\", config->obj_param.rx_queue);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (config->mode_param.red.min_th > CNXK_NIX_CMAN_RED_MAX_THRESH) {\n+\t\tplt_err(\"Invalid RED minimum threshold. min_th = %u\",\n+\t\t\tconfig->mode_param.red.min_th);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (config->mode_param.red.max_th > CNXK_NIX_CMAN_RED_MAX_THRESH) {\n+\t\tplt_err(\"Invalid RED maximum threshold. max_th = %u\",\n+\t\t\tconfig->mode_param.red.max_th);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+int\n+cnxk_nix_cman_config_set(struct rte_eth_dev *eth_dev, struct rte_eth_cman_config *config)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct roc_nix *nix = &dev->nix;\n+\tuint8_t drop, pass, shift;\n+\tuint8_t min_th, max_th;\n+\tstruct roc_nix_cq *cq;\n+\tstruct roc_nix_rq *rq;\n+\tbool is_mempool;\n+\tuint64_t buf_cnt;\n+\tint rc;\n+\n+\trc = nix_cman_config_validate(eth_dev, config);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tcq = &dev->cqs[config->obj_param.rx_queue];\n+\trq = &dev->rqs[config->obj_param.rx_queue];\n+\tis_mempool = config->obj & RTE_ETH_CMAN_OBJ_RX_QUEUE_MEMPOOL ? true : false;\n+\tmin_th = config->mode_param.red.min_th;\n+\tmax_th = config->mode_param.red.max_th;\n+\n+\tif (is_mempool) {\n+\t\tbuf_cnt = roc_npa_aura_op_limit_get(rq->aura_handle);\n+\t\tshift = plt_log2_u32(buf_cnt);\n+\t\tshift = shift < 8 ? 0 : shift - 8;\n+\t\tpass = (buf_cnt >> shift) - ((buf_cnt * min_th / 100) >> shift);\n+\t\tdrop = (buf_cnt >> shift) - ((buf_cnt * max_th / 100) >> shift);\n+\t\trq->red_pass = pass;\n+\t\trq->red_drop = drop;\n+\n+\t\tif (rq->spb_ena) {\n+\t\t\tbuf_cnt = roc_npa_aura_op_limit_get(rq->spb_aura_handle);\n+\t\t\tshift = plt_log2_u32(buf_cnt);\n+\t\t\tshift = shift < 8 ? 0 : shift - 8;\n+\t\t\tpass = (buf_cnt >> shift) - ((buf_cnt * min_th / 100) >> shift);\n+\t\t\tdrop = (buf_cnt >> shift) - ((buf_cnt * max_th / 100) >> shift);\n+\t\t\trq->spb_red_pass = pass;\n+\t\t\trq->spb_red_drop = drop;\n+\t\t}\n+\t} else {\n+\t\tshift = plt_log2_u32(cq->nb_desc);\n+\t\tshift = shift < 8 ? 0 : shift - 8;\n+\t\tpass = 256 - ((cq->nb_desc * min_th / 100) >> shift);\n+\t\tdrop = 256 - ((cq->nb_desc * max_th / 100) >> shift);\n+\n+\t\trq->xqe_red_pass = pass;\n+\t\trq->xqe_red_drop = drop;\n+\t}\n+\n+\trc = roc_nix_rq_cman_config(nix, rq);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tmemcpy(&dev->cman_cfg, config, sizeof(struct rte_eth_cman_config));\n+\treturn 0;\n+}\n+\n+int\n+cnxk_nix_cman_config_get(struct rte_eth_dev *eth_dev, struct rte_eth_cman_config *config)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\n+\tmemcpy(config, &dev->cman_cfg, sizeof(struct rte_eth_cman_config));\n+\treturn 0;\n+}\ndiff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build\nindex f347e98fce..9253e8d0ab 100644\n--- a/drivers/net/cnxk/meson.build\n+++ b/drivers/net/cnxk/meson.build\n@@ -10,6 +10,7 @@ endif\n \n sources = files(\n 'cnxk_ethdev.c',\n+ 'cnxk_ethdev_cman.c',\n 'cnxk_ethdev_devargs.c',\n 'cnxk_ethdev_mtr.c',\n 'cnxk_ethdev_ops.c',\n", "prefixes": [ "3/3" ] }