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GET /api/patches/116342/?format=api
{ "id": 116342, "url": "http://patches.dpdk.org/api/patches/116342/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1663238669-12244-8-git-send-email-chaoyong.he@corigine.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1663238669-12244-8-git-send-email-chaoyong.he@corigine.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1663238669-12244-8-git-send-email-chaoyong.he@corigine.com", "date": "2022-09-15T10:44:24", "name": "[v9,07/12] net/nfp: add flower ctrl VNIC related logics", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "23c35e1dee8fd462563d59ead090cfc7f9efa3da", "submitter": { "id": 2554, "url": "http://patches.dpdk.org/api/people/2554/?format=api", "name": "Chaoyong He", "email": "chaoyong.he@corigine.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1663238669-12244-8-git-send-email-chaoyong.he@corigine.com/mbox/", "series": [ { "id": 24678, "url": "http://patches.dpdk.org/api/series/24678/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24678", "date": "2022-09-15T10:44:17", "name": "preparation for the rte_flow offload of nfp PMD", "version": 9, "mbox": "http://patches.dpdk.org/series/24678/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/116342/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/116342/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7DF49A00C5;\n\tThu, 15 Sep 2022 12:45:42 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 3E1EA42B82;\n\tThu, 15 Sep 2022 12:45:06 +0200 (CEST)", "from NAM04-MW2-obe.outbound.protection.outlook.com\n (mail-mw2nam04on2122.outbound.protection.outlook.com [40.107.101.122])\n by mails.dpdk.org (Postfix) with ESMTP id 071E642B76\n for <dev@dpdk.org>; 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a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=UHapacVK1I/t8Krwjz7LtdflzqdCvEYRxndht/SueBM=;\n b=cVHxXlkcbRh/+hKZyTlp7svd8ncLvcfTMUkf99KpsWzLWYLydjuj5Rp6WHuhXJ6Gv6ouqILHlPc+LK1bFNsI4OyjvbSiYjP/yk5O7HHEUaKuLow+N2CfrlZjUXIIvYN7Qqy3juaDUCEo+eWj/2IEL0GJENxeIrYdLONdiCDMnougsUG13tEPioVZJe/DAx+uy13uIPO/iBObmHrzHqF1M4jARcp7v3Bear+OSrDS+/3ri2O+lB0c4vmsh9hhMC+Ohr37RQWmWrGQSnxJ2ZulDZVjdbz9zHOvpiNDMasS2iklyXwf6FnZTcpzHZpZEeanyzlxXnnM+oRVKstfZFZitw==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=corigine.com; dmarc=pass action=none header.from=corigine.com;\n dkim=pass header.d=corigine.com; arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=corigine.onmicrosoft.com; s=selector2-corigine-onmicrosoft-com;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=UHapacVK1I/t8Krwjz7LtdflzqdCvEYRxndht/SueBM=;\n b=jv9gjS5EpKb6F2E8lC4bQ5lnCdaDAnvGLZcxShsKj/0VOtFc4cObX+62zD7rAYNjQtdGJaPCHG5BQzfwbVJIHv6oKSpPu8RFfwKqOLB4i+9BkaD05Cfv5e4pXexZTH865enMds4A+x2ULJEqS2fzkjYwSGmDlDohukCHLhrKs88=", "Authentication-Results": "dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=corigine.com;", "From": "Chaoyong He <chaoyong.he@corigine.com>", "To": "dev@dpdk.org", "Cc": "oss-drivers@corigine.com, niklas.soderlund@corigine.com,\n Chaoyong He <chaoyong.he@corigine.com>", "Subject": "[PATCH v9 07/12] net/nfp: add flower ctrl VNIC related logics", "Date": "Thu, 15 Sep 2022 18:44:24 +0800", "Message-Id": "<1663238669-12244-8-git-send-email-chaoyong.he@corigine.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1663238669-12244-1-git-send-email-chaoyong.he@corigine.com>", "References": "<1663238669-12244-1-git-send-email-chaoyong.he@corigine.com>", "Content-Type": "text/plain; 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This vNIC is used by\nthe PMD and flower firmware application as a communication channel\nbetween driver and firmware. In the case of OVS it is also used to\ncommunicate flow statistics from hardware to the driver.\n\nA rte_eth device is not exposed to DPDK for this vNIC as it is strictly\nused internally by flower logic.\n\nBecause of the add of ctrl vNIC, a new PCItoCPPBar is needed. Modify the\nrelated logics.\n\nSigned-off-by: Chaoyong He <chaoyong.he@corigine.com>\nReviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>\n---\n drivers/net/nfp/flower/nfp_flower.c | 220 +++++++++++++++++++++++++++++\n drivers/net/nfp/flower/nfp_flower.h | 6 +\n drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c | 31 ++--\n 3 files changed, 245 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/net/nfp/flower/nfp_flower.c b/drivers/net/nfp/flower/nfp_flower.c\nindex 24aa288..18ffa5c 100644\n--- a/drivers/net/nfp/flower/nfp_flower.c\n+++ b/drivers/net/nfp/flower/nfp_flower.c\n@@ -27,6 +27,7 @@\n #define DEFAULT_FLBUF_SIZE 9216\n \n #define PF_VNIC_NB_DESC 1024\n+#define CTRL_VNIC_NB_DESC 512\n \n static const struct rte_eth_rxconf rx_conf = {\n \t.rx_free_thresh = DEFAULT_RX_FREE_THRESH,\n@@ -206,6 +207,11 @@\n \t.dev_close = nfp_flower_pf_close,\n };\n \n+static const struct eth_dev_ops nfp_flower_ctrl_vnic_ops = {\n+\t.dev_infos_get = nfp_net_infos_get,\n+\t.dev_configure = nfp_net_configure,\n+};\n+\n struct dp_packet {\n \tstruct rte_mbuf mbuf;\n \tuint32_t source;\n@@ -496,12 +502,192 @@ struct dp_packet {\n \treturn 0;\n }\n \n+static int\n+nfp_flower_init_ctrl_vnic(struct nfp_net_hw *hw)\n+{\n+\tuint32_t i;\n+\tint ret = 0;\n+\tuint16_t n_txq;\n+\tuint16_t n_rxq;\n+\tunsigned int numa_node;\n+\tstruct rte_mempool *mp;\n+\tstruct nfp_pf_dev *pf_dev;\n+\tstruct rte_eth_dev *eth_dev;\n+\tstruct nfp_app_fw_flower *app_fw_flower;\n+\n+\t/* Set up some pointers here for ease of use */\n+\tpf_dev = hw->pf_dev;\n+\tapp_fw_flower = NFP_PRIV_TO_APP_FW_FLOWER(pf_dev->app_fw_priv);\n+\n+\tret = nfp_flower_init_vnic_common(hw, \"ctrl_vnic\");\n+\tif (ret != 0) {\n+\t\tPMD_INIT_LOG(ERR, \"Could not init pf vnic\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Allocate memory for the eth_dev of the vNIC */\n+\thw->eth_dev = rte_eth_dev_allocate(\"nfp_ctrl_vnic\");\n+\tif (hw->eth_dev == NULL) {\n+\t\tPMD_INIT_LOG(ERR, \"Could not allocate ctrl vnic\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\t/* Grab the pointer to the newly created rte_eth_dev here */\n+\teth_dev = hw->eth_dev;\n+\n+\tnuma_node = rte_socket_id();\n+\n+\t/* Create a mbuf pool for the ctrl vNIC */\n+\tapp_fw_flower->ctrl_pktmbuf_pool = rte_pktmbuf_pool_create(\"ctrl_mbuf_pool\",\n+\t\t\t4 * CTRL_VNIC_NB_DESC, 64, 0, 9216, numa_node);\n+\tif (app_fw_flower->ctrl_pktmbuf_pool == NULL) {\n+\t\tPMD_INIT_LOG(ERR, \"create mbuf pool for ctrl vnic failed\");\n+\t\tret = -ENOMEM;\n+\t\tgoto port_release;\n+\t}\n+\n+\tmp = app_fw_flower->ctrl_pktmbuf_pool;\n+\n+\teth_dev->dev_ops = &nfp_flower_ctrl_vnic_ops;\n+\trte_eth_dev_probing_finish(eth_dev);\n+\n+\t/* Configure the ctrl vNIC device */\n+\tn_rxq = hw->max_rx_queues;\n+\tn_txq = hw->max_tx_queues;\n+\teth_dev->data->rx_queues = rte_zmalloc(\"ethdev->rx_queues\",\n+\t\tsizeof(eth_dev->data->rx_queues[0]) * n_rxq,\n+\t\tRTE_CACHE_LINE_SIZE);\n+\tif (eth_dev->data->rx_queues == NULL) {\n+\t\tPMD_INIT_LOG(ERR, \"rte_zmalloc failed for ctrl vNIC rx queues\");\n+\t\tret = -ENOMEM;\n+\t\tgoto mempool_cleanup;\n+\t}\n+\n+\teth_dev->data->tx_queues = rte_zmalloc(\"ethdev->tx_queues\",\n+\t\tsizeof(eth_dev->data->tx_queues[0]) * n_txq,\n+\t\tRTE_CACHE_LINE_SIZE);\n+\tif (eth_dev->data->tx_queues == NULL) {\n+\t\tPMD_INIT_LOG(ERR, \"rte_zmalloc failed for ctrl vNIC tx queues\");\n+\t\tret = -ENOMEM;\n+\t\tgoto rx_queue_free;\n+\t}\n+\n+\t/* Fill in some of the eth_dev fields */\n+\teth_dev->device = &pf_dev->pci_dev->device;\n+\teth_dev->data->nb_tx_queues = n_rxq;\n+\teth_dev->data->nb_rx_queues = n_txq;\n+\teth_dev->data->dev_private = hw;\n+\n+\t/* Set up the Rx queues */\n+\tfor (i = 0; i < n_rxq; i++) {\n+\t\tret = nfp_net_rx_queue_setup(eth_dev, i, CTRL_VNIC_NB_DESC, numa_node,\n+\t\t\t\t&rx_conf, mp);\n+\t\tif (ret != 0) {\n+\t\t\tPMD_INIT_LOG(ERR, \"Configure ctrl vNIC Rx queue %d failed\", i);\n+\t\t\tgoto rx_queue_cleanup;\n+\t\t}\n+\t}\n+\n+\t/* Set up the Tx queues */\n+\tfor (i = 0; i < n_txq; i++) {\n+\t\tret = nfp_net_nfd3_tx_queue_setup(eth_dev, i, CTRL_VNIC_NB_DESC, numa_node,\n+\t\t\t\t&tx_conf);\n+\t\tif (ret != 0) {\n+\t\t\tPMD_INIT_LOG(ERR, \"Configure ctrl vNIC Tx queue %d failed\", i);\n+\t\t\tgoto tx_queue_cleanup;\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+\n+tx_queue_cleanup:\n+\tfor (i = 0; i < n_txq; i++)\n+\t\tnfp_net_tx_queue_release(eth_dev, i);\n+rx_queue_cleanup:\n+\tfor (i = 0; i < n_rxq; i++)\n+\t\tnfp_net_rx_queue_release(eth_dev, i);\n+\trte_free(eth_dev->data->tx_queues);\n+rx_queue_free:\n+\trte_free(eth_dev->data->rx_queues);\n+mempool_cleanup:\n+\trte_mempool_free(mp);\n+port_release:\n+\trte_eth_dev_release_port(hw->eth_dev);\n+\n+\treturn ret;\n+}\n+\n+static void\n+nfp_flower_cleanup_ctrl_vnic(struct nfp_net_hw *hw)\n+{\n+\tuint32_t i;\n+\tstruct nfp_app_fw_flower *app_fw_flower;\n+\n+\tapp_fw_flower = NFP_PRIV_TO_APP_FW_FLOWER(hw->pf_dev->app_fw_priv);\n+\n+\tfor (i = 0; i < hw->max_tx_queues; i++)\n+\t\tnfp_net_tx_queue_release(hw->eth_dev, i);\n+\n+\tfor (i = 0; i < hw->max_rx_queues; i++)\n+\t\tnfp_net_rx_queue_release(hw->eth_dev, i);\n+\n+\trte_free(hw->eth_dev->data->tx_queues);\n+\trte_free(hw->eth_dev->data->rx_queues);\n+\trte_mempool_free(app_fw_flower->ctrl_pktmbuf_pool);\n+\trte_eth_dev_release_port(hw->eth_dev);\n+}\n+\n+static int\n+nfp_flower_start_ctrl_vnic(struct nfp_net_hw *hw)\n+{\n+\tint ret;\n+\tuint32_t update;\n+\tuint32_t new_ctrl;\n+\tstruct rte_eth_dev *dev;\n+\n+\tdev = hw->eth_dev;\n+\n+\t/* Disabling queues just in case... */\n+\tnfp_net_disable_queues(dev);\n+\n+\t/* Enabling the required queues in the device */\n+\tnfp_net_enable_queues(dev);\n+\n+\t/* Writing configuration parameters in the device */\n+\tnfp_net_params_setup(hw);\n+\n+\tnew_ctrl = NFP_NET_CFG_CTRL_ENABLE;\n+\tupdate = NFP_NET_CFG_UPDATE_GEN | NFP_NET_CFG_UPDATE_RING |\n+\t\t\tNFP_NET_CFG_UPDATE_MSIX;\n+\n+\trte_wmb();\n+\n+\t/* If an error when reconfig we avoid to change hw state */\n+\tret = nfp_net_reconfig(hw, new_ctrl, update);\n+\tif (ret != 0) {\n+\t\tPMD_INIT_LOG(ERR, \"Failed to reconfig ctrl vnic\");\n+\t\treturn -EIO;\n+\t}\n+\n+\thw->ctrl = new_ctrl;\n+\n+\t/* Setup the freelist ring */\n+\tret = nfp_net_rx_freelist_setup(dev);\n+\tif (ret != 0) {\n+\t\tPMD_INIT_LOG(ERR, \"Error with flower ctrl vNIC freelist setup\");\n+\t\treturn -EIO;\n+\t}\n+\n+\treturn 0;\n+}\n+\n int\n nfp_init_app_fw_flower(struct nfp_pf_dev *pf_dev)\n {\n \tint ret;\n \tunsigned int numa_node;\n \tstruct nfp_net_hw *pf_hw;\n+\tstruct nfp_net_hw *ctrl_hw;\n \tstruct nfp_app_fw_flower *app_fw_flower;\n \n \tnuma_node = rte_socket_id();\n@@ -561,8 +747,42 @@ struct dp_packet {\n \t\tgoto pf_vnic_cleanup;\n \t}\n \n+\t/* The ctrl vNIC struct comes directly after the PF one */\n+\tapp_fw_flower->ctrl_hw = pf_hw + 1;\n+\tctrl_hw = app_fw_flower->ctrl_hw;\n+\n+\t/* Map the ctrl vNIC ctrl bar */\n+\tctrl_hw->ctrl_bar = nfp_rtsym_map(pf_dev->sym_tbl, \"_pf0_net_ctrl_bar\",\n+\t\t32768, &ctrl_hw->ctrl_area);\n+\tif (ctrl_hw->ctrl_bar == NULL) {\n+\t\tPMD_INIT_LOG(ERR, \"Cloud not map the ctrl vNIC ctrl bar\");\n+\t\tret = -ENODEV;\n+\t\tgoto pf_vnic_cleanup;\n+\t}\n+\n+\t/* Now populate the ctrl vNIC */\n+\tctrl_hw->pf_dev = pf_dev;\n+\tctrl_hw->cpp = pf_dev->cpp;\n+\n+\tret = nfp_flower_init_ctrl_vnic(app_fw_flower->ctrl_hw);\n+\tif (ret != 0) {\n+\t\tPMD_INIT_LOG(ERR, \"Could not initialize flower ctrl vNIC\");\n+\t\tgoto ctrl_cpp_area_cleanup;\n+\t}\n+\n+\t/* Start the ctrl vNIC */\n+\tret = nfp_flower_start_ctrl_vnic(app_fw_flower->ctrl_hw);\n+\tif (ret != 0) {\n+\t\tPMD_INIT_LOG(ERR, \"Could not start flower ctrl vNIC\");\n+\t\tgoto ctrl_vnic_cleanup;\n+\t}\n+\n \treturn 0;\n \n+ctrl_vnic_cleanup:\n+\tnfp_flower_cleanup_ctrl_vnic(app_fw_flower->ctrl_hw);\n+ctrl_cpp_area_cleanup:\n+\tnfp_cpp_area_free(ctrl_hw->ctrl_area);\n pf_vnic_cleanup:\n \tnfp_flower_cleanup_pf_vnic(app_fw_flower->pf_hw);\n pf_cpp_area_cleanup:\ndiff --git a/drivers/net/nfp/flower/nfp_flower.h b/drivers/net/nfp/flower/nfp_flower.h\nindex 981d88d..e18703e 100644\n--- a/drivers/net/nfp/flower/nfp_flower.h\n+++ b/drivers/net/nfp/flower/nfp_flower.h\n@@ -14,6 +14,12 @@ struct nfp_app_fw_flower {\n \t/* Pointer to the PF vNIC */\n \tstruct nfp_net_hw *pf_hw;\n \n+\t/* Pointer to a mempool for the ctrlvNIC */\n+\tstruct rte_mempool *ctrl_pktmbuf_pool;\n+\n+\t/* Pointer to the ctrl vNIC */\n+\tstruct nfp_net_hw *ctrl_hw;\n+\n \t/* the eth table as reported by firmware */\n \tstruct nfp_eth_table *nfp_eth_table;\n };\ndiff --git a/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c b/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c\nindex 08bc4e8..22c8bc4 100644\n--- a/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c\n+++ b/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c\n@@ -91,7 +91,10 @@\n * @refcnt:\tnumber of current users\n * @iomem:\tmapped IO memory\n */\n+#define NFP_BAR_MIN 1\n+#define NFP_BAR_MID 5\n #define NFP_BAR_MAX 7\n+\n struct nfp_bar {\n \tstruct nfp_pcie_user *nfp;\n \tuint32_t barcfg;\n@@ -292,6 +295,7 @@ struct nfp_pcie_user {\n * BAR0.0: Reserved for General Mapping (for MSI-X access to PCIe SRAM)\n *\n * Halving PCItoCPPBars for primary and secondary processes.\n+ * For CoreNIC firmware:\n * NFP PMD just requires two fixed slots, one for configuration BAR,\n * and another for accessing the hw queues. Another slot is needed\n * for setting the link up or down. Secondary processes do not need\n@@ -301,6 +305,9 @@ struct nfp_pcie_user {\n * supported. Due to this requirement and future extensions requiring\n * new slots per process, only one secondary process is supported by\n * now.\n+ * For Flower firmware:\n+ * NFP PMD need another fixed slots, used as the configureation BAR\n+ * for ctrl vNIC.\n */\n static int\n nfp_enable_bars(struct nfp_pcie_user *nfp)\n@@ -309,11 +316,11 @@ struct nfp_pcie_user {\n \tint x, start, end;\n \n \tif (rte_eal_process_type() == RTE_PROC_PRIMARY) {\n-\t\tstart = 4;\n-\t\tend = 1;\n+\t\tstart = NFP_BAR_MID;\n+\t\tend = NFP_BAR_MIN;\n \t} else {\n-\t\tstart = 7;\n-\t\tend = 4;\n+\t\tstart = NFP_BAR_MAX;\n+\t\tend = NFP_BAR_MID;\n \t}\n \tfor (x = start; x > end; x--) {\n \t\tbar = &nfp->bar[x - 1];\n@@ -341,11 +348,11 @@ struct nfp_pcie_user {\n \tint x, start, end;\n \n \tif (rte_eal_process_type() == RTE_PROC_PRIMARY) {\n-\t\tstart = 4;\n-\t\tend = 1;\n+\t\tstart = NFP_BAR_MID;\n+\t\tend = NFP_BAR_MIN;\n \t} else {\n-\t\tstart = 7;\n-\t\tend = 4;\n+\t\tstart = NFP_BAR_MAX;\n+\t\tend = NFP_BAR_MID;\n \t}\n \tfor (x = start; x > end; x--) {\n \t\tbar = &nfp->bar[x - 1];\n@@ -364,11 +371,11 @@ struct nfp_pcie_user {\n \tint x, start, end;\n \n \tif (rte_eal_process_type() == RTE_PROC_PRIMARY) {\n-\t\tstart = 4;\n-\t\tend = 1;\n+\t\tstart = NFP_BAR_MID;\n+\t\tend = NFP_BAR_MIN;\n \t} else {\n-\t\tstart = 7;\n-\t\tend = 4;\n+\t\tstart = NFP_BAR_MAX;\n+\t\tend = NFP_BAR_MID;\n \t}\n \n \tfor (x = start; x > end; x--) {\n", "prefixes": [ "v9", "07/12" ] }