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GET /api/patches/115056/?format=api
{ "id": 115056, "url": "http://patches.dpdk.org/api/patches/115056/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220815073206.2917968-29-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220815073206.2917968-29-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220815073206.2917968-29-qi.z.zhang@intel.com", "date": "2022-08-15T07:31:24", "name": "[v2,28/70] net/ice/base: convert array of u8 to bitmap", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "05a68d3e45ea6f50342d4378d12bd6c4ae992c3b", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220815073206.2917968-29-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 24308, "url": "http://patches.dpdk.org/api/series/24308/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24308", "date": "2022-08-15T07:30:56", "name": "ice base code update", "version": 2, "mbox": "http://patches.dpdk.org/series/24308/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/115056/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/115056/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id EAEA7A00C3;\n\tMon, 15 Aug 2022 01:24:59 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 595A842B95;\n\tMon, 15 Aug 2022 01:23:04 +0200 (CEST)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by mails.dpdk.org (Postfix) with ESMTP id F2C8942C5F\n for <dev@dpdk.org>; Mon, 15 Aug 2022 01:23:02 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 14 Aug 2022 16:23:02 -0700", "from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4])\n by orsmga008.jf.intel.com with ESMTP; 14 Aug 2022 16:23:00 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1660519383; x=1692055383;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=vLz+8htMnBCewAsHe0m6gYIwj6g7OA99ZQGeeM/HPeA=;\n b=BK5mGqPIvMRPntNWjoA/NjDBhEq0CyKu3JCnzPqDzPgY0ypFpAnsHuYl\n yWKs4w0dn4SClOZE80R6eoet9FAk+BgvzCM4L34bioUkEQPZSN557HN4T\n DPW2hXN6Lm64mHWyH41tzbU3uZdM1+USFcIiMUdUCsxUj3uROhAgjdhbW\n GvQqRBcgO2VO3XyL0/YN32aiXfOL8L/yQpGi0EOArOus15mPm+ccscEj9\n YHES4leeAyVsg342TSO6IUsND5MTJjc6n/pvZa0+9EgYykDBiICa92kwN\n UrHHQVGzioRO/dTZerRczz8heTtmxJmRKd27kls9SNXPrrZplC5xwx9WB g==;", "X-IronPort-AV": [ "E=McAfee;i=\"6400,9594,10439\"; a=\"291857963\"", "E=Sophos;i=\"5.93,237,1654585200\"; d=\"scan'208\";a=\"291857963\"", "E=Sophos;i=\"5.93,237,1654585200\"; d=\"scan'208\";a=\"635283149\"" ], "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Jacob Keller <jacob.e.keller@intel.com>,\n Jesse Brandeburg <jesse.brandeburg@intel.com>", "Subject": "[PATCH v2 28/70] net/ice/base: convert array of u8 to bitmap", "Date": "Mon, 15 Aug 2022 03:31:24 -0400", "Message-Id": "<20220815073206.2917968-29-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.31.1", "In-Reply-To": "<20220815073206.2917968-1-qi.z.zhang@intel.com>", "References": "<20220815071306.2910599-1-qi.z.zhang@intel.com>\n <20220815073206.2917968-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Previously the ice_add_prof function took an array of u8 and looped\nover it with for_each_set_bit, examining each 8 bit value as a bitmap.\n\nThis was just hard to understand and unnecessary, and was triggering\nundefined behavior sanitizers with unaligned accesses within bitmap\nfields. Since the ptype being passed in was already declared as a\nbitmap, refactor this to use native types with the advantage of\nsimplifying the code to use a single loop.\n\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\nSigned-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_flex_pipe.c | 76 ++++++++++------------------\n drivers/net/ice/base/ice_flex_pipe.h | 6 +--\n drivers/net/ice/base/ice_flow.c | 4 +-\n 3 files changed, 32 insertions(+), 54 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c\nindex a43d7ef76b..0840b976aa 100644\n--- a/drivers/net/ice/base/ice_flex_pipe.c\n+++ b/drivers/net/ice/base/ice_flex_pipe.c\n@@ -3170,7 +3170,7 @@ void ice_disable_fd_swap(struct ice_hw *hw, u16 prof_id)\n * @hw: pointer to the HW struct\n * @blk: hardware block\n * @id: profile tracking ID\n- * @ptypes: array of bitmaps indicating ptypes (ICE_FLOW_PTYPE_MAX bits)\n+ * @ptypes: bitmap indicating ptypes (ICE_FLOW_PTYPE_MAX bits)\n * @attr: array of attributes\n * @attr_cnt: number of elements in attrib array\n * @es: extraction sequence (length of array is determined by the block)\n@@ -3183,16 +3183,15 @@ void ice_disable_fd_swap(struct ice_hw *hw, u16 prof_id)\n * the ID value used here.\n */\n enum ice_status\n-ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],\n-\t const struct ice_ptype_attributes *attr, u16 attr_cnt,\n-\t struct ice_fv_word *es, u16 *masks, bool fd_swap)\n+ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id,\n+\t ice_bitmap_t *ptypes, const struct ice_ptype_attributes *attr,\n+\t u16 attr_cnt, struct ice_fv_word *es, u16 *masks, bool fd_swap)\n {\n-\tu32 bytes = DIVIDE_AND_ROUND_UP(ICE_FLOW_PTYPE_MAX, BITS_PER_BYTE);\n \tice_declare_bitmap(ptgs_used, ICE_XLT1_CNT);\n \tstruct ice_prof_map *prof;\n \tenum ice_status status;\n-\tu8 byte = 0;\n \tu8 prof_id;\n+\tu16 ptype;\n \n \tice_zero_bitmap(ptgs_used, ICE_XLT1_CNT);\n \n@@ -3241,56 +3240,35 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],\n \tprof->context = 0;\n \n \t/* build list of ptgs */\n-\twhile (bytes && prof->ptg_cnt < ICE_MAX_PTG_PER_PROFILE) {\n-\t\tu8 bit;\n+\tice_for_each_set_bit(ptype, ptypes, ICE_FLOW_PTYPE_MAX) {\n+\t\tu8 ptg;\n \n-\t\tif (!ptypes[byte]) {\n-\t\t\tbytes--;\n-\t\t\tbyte++;\n+\t\t/* The package should place all ptypes in a non-zero\n+\t\t * PTG, so the following call should never fail.\n+\t\t */\n+\t\tif (ice_ptg_find_ptype(hw, blk, ptype, &ptg))\n \t\t\tcontinue;\n-\t\t}\n-\n-\t\t/* Examine 8 bits per byte */\n-\t\tice_for_each_set_bit(bit, (ice_bitmap_t *)&ptypes[byte],\n-\t\t\t\t BITS_PER_BYTE) {\n-\t\t\tu16 ptype;\n-\t\t\tu8 ptg;\n-\n-\t\t\tptype = byte * BITS_PER_BYTE + bit;\n \n-\t\t\t/* The package should place all ptypes in a non-zero\n-\t\t\t * PTG, so the following call should never fail.\n-\t\t\t */\n-\t\t\tif (ice_ptg_find_ptype(hw, blk, ptype, &ptg))\n-\t\t\t\tcontinue;\n+\t\t/* If PTG is already added, skip and continue */\n+\t\tif (ice_is_bit_set(ptgs_used, ptg))\n+\t\t\tcontinue;\n \n-\t\t\t/* If PTG is already added, skip and continue */\n-\t\t\tif (ice_is_bit_set(ptgs_used, ptg))\n-\t\t\t\tcontinue;\n+\t\tice_set_bit(ptg, ptgs_used);\n+\t\t/* Check to see there are any attributes for this ptype, and\n+\t\t * add them if found.\n+\t\t */\n+\t\tstatus = ice_add_prof_attrib(prof, ptg, ptype, attr, attr_cnt);\n+\t\tif (status == ICE_ERR_MAX_LIMIT)\n+\t\t\tbreak;\n+\t\tif (status) {\n+\t\t\t/* This is simple a ptype/PTG with no attribute */\n+\t\t\tprof->ptg[prof->ptg_cnt] = ptg;\n+\t\t\tprof->attr[prof->ptg_cnt].flags = 0;\n+\t\t\tprof->attr[prof->ptg_cnt].mask = 0;\n \n-\t\t\tice_set_bit(ptg, ptgs_used);\n-\t\t\t/* Check to see there are any attributes for this\n-\t\t\t * ptype, and add them if found.\n-\t\t\t */\n-\t\t\tstatus = ice_add_prof_attrib(prof, ptg, ptype, attr,\n-\t\t\t\t\t\t attr_cnt);\n-\t\t\tif (status == ICE_ERR_MAX_LIMIT)\n+\t\t\tif (++prof->ptg_cnt >= ICE_MAX_PTG_PER_PROFILE)\n \t\t\t\tbreak;\n-\t\t\tif (status) {\n-\t\t\t\t/* This is simple a ptype/PTG with no\n-\t\t\t\t * attribute\n-\t\t\t\t */\n-\t\t\t\tprof->ptg[prof->ptg_cnt] = ptg;\n-\t\t\t\tprof->attr[prof->ptg_cnt].flags = 0;\n-\t\t\t\tprof->attr[prof->ptg_cnt].mask = 0;\n-\n-\t\t\t\tif (++prof->ptg_cnt >= ICE_MAX_PTG_PER_PROFILE)\n-\t\t\t\t\tbreak;\n-\t\t\t}\n \t\t}\n-\n-\t\tbytes--;\n-\t\tbyte++;\n \t}\n \n \tLIST_ADD(&prof->list, &hw->blk[blk].es.prof_map);\ndiff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h\nindex aab765e68f..777790a9c0 100644\n--- a/drivers/net/ice/base/ice_flex_pipe.h\n+++ b/drivers/net/ice/base/ice_flex_pipe.h\n@@ -40,9 +40,9 @@ enum ice_status\n ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig);\n void ice_disable_fd_swap(struct ice_hw *hw, u16 prof_id);\n enum ice_status\n-ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],\n-\t const struct ice_ptype_attributes *attr, u16 attr_cnt,\n-\t struct ice_fv_word *es, u16 *masks, bool fd_swap);\n+ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id,\n+\t ice_bitmap_t *ptypes, const struct ice_ptype_attributes *attr,\n+\t u16 attr_cnt, struct ice_fv_word *es, u16 *masks, bool fd_swap);\n void ice_init_all_prof_masks(struct ice_hw *hw);\n void ice_shutdown_all_prof_masks(struct ice_hw *hw);\n struct ice_prof_map *\ndiff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c\nindex bdb584c7f5..54181044f1 100644\n--- a/drivers/net/ice/base/ice_flow.c\n+++ b/drivers/net/ice/base/ice_flow.c\n@@ -2257,7 +2257,7 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,\n \t}\n \n \t/* Add a HW profile for this flow profile */\n-\tstatus = ice_add_prof(hw, blk, prof_id, (u8 *)params->ptypes,\n+\tstatus = ice_add_prof(hw, blk, prof_id, params->ptypes,\n \t\t\t params->attr, params->attr_cnt, params->es,\n \t\t\t params->mask, true);\n \tif (status) {\n@@ -2604,7 +2604,7 @@ ice_flow_set_hw_prof(struct ice_hw *hw, u16 dest_vsi_handle,\n \t\tbreak;\n \t}\n \n-\tstatus = ice_add_prof(hw, blk, id, (u8 *)prof->ptypes,\n+\tstatus = ice_add_prof(hw, blk, id, prof->ptypes,\n \t\t\t params->attr, params->attr_cnt,\n \t\t\t params->es, params->mask, false);\n \tif (status)\n", "prefixes": [ "v2", "28/70" ] }