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GET /api/patches/115039/?format=api
{ "id": 115039, "url": "http://patches.dpdk.org/api/patches/115039/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220815073206.2917968-12-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220815073206.2917968-12-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220815073206.2917968-12-qi.z.zhang@intel.com", "date": "2022-08-15T07:31:07", "name": "[v2,11/70] net/ice/base: explicitly name E822 HW-dependent functions", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "b0e34c4782d62096af845bcd5306215b57824f9b", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220815073206.2917968-12-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 24308, "url": "http://patches.dpdk.org/api/series/24308/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24308", "date": "2022-08-15T07:30:56", "name": "ice base code update", "version": 2, "mbox": "http://patches.dpdk.org/series/24308/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/115039/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/115039/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A2F1BA00C3;\n\tMon, 15 Aug 2022 01:23:19 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B1EC942BAE;\n\tMon, 15 Aug 2022 01:22:33 +0200 (CEST)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by mails.dpdk.org (Postfix) with ESMTP id 28D0842B96\n for <dev@dpdk.org>; Mon, 15 Aug 2022 01:22:32 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 14 Aug 2022 16:22:31 -0700", "from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4])\n by orsmga008.jf.intel.com with ESMTP; 14 Aug 2022 16:22:30 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1660519352; x=1692055352;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=wXQgQoKkxwiNf2y6YLsUmATUp1FKifWbd3ov2TPw8WU=;\n b=VHNbcZOEabe4lE+zDnEhiMjNJv2e0MgJjlCyWoE/QcUALKyCEg+4/Ay9\n PsXLvAMTRPuFxcFdaClnbPXS1/M2nggud6oljdc06OsKcxG6Y7Dl2xDon\n s3wRZM/3TenSKpWF9BP70+LAbYkdTh3YrIwA+T8vcROr81QQ2ZrdNHh9U\n B1hn9n/RzpwlYDFzpLSbXyfwwckkCtJC82xCVjK53yesi+FAi+OLlgoUJ\n jI6HMrDpT3+N1SErdstgMWAygSRERz7f/i6R1Tl8UpnrVcWHqWV0blInU\n +HDFPyzpUFegiZ1GdhQqp6eZN8bFKb3PJs2MxOFz4vaOxFru0VUn31Wed g==;", "X-IronPort-AV": [ "E=McAfee;i=\"6400,9594,10439\"; a=\"291857932\"", "E=Sophos;i=\"5.93,237,1654585200\"; d=\"scan'208\";a=\"291857932\"", "E=Sophos;i=\"5.93,237,1654585200\"; d=\"scan'208\";a=\"635283036\"" ], "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Sergey Temerkhanov <sergey.temerkhanov@intel.com>", "Subject": "[PATCH v2 11/70] net/ice/base: explicitly name E822 HW-dependent\n functions", "Date": "Mon, 15 Aug 2022 03:31:07 -0400", "Message-Id": "<20220815073206.2917968-12-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.31.1", "In-Reply-To": "<20220815073206.2917968-1-qi.z.zhang@intel.com>", "References": "<20220815071306.2910599-1-qi.z.zhang@intel.com>\n <20220815073206.2917968-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add the suffix to E822 HW-dependent function names\n\nSigned-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_ptp_hw.c | 23 ++++++++++++-----------\n drivers/net/ice/base/ice_ptp_hw.h | 7 ++++---\n 2 files changed, 16 insertions(+), 14 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c\nindex 76119364e4..23d90b127d 100644\n--- a/drivers/net/ice/base/ice_ptp_hw.c\n+++ b/drivers/net/ice/base/ice_ptp_hw.c\n@@ -1268,7 +1268,7 @@ ice_ptp_prep_phy_adj_target_e822(struct ice_hw *hw, u32 target_time)\n }\n \n /**\n- * ice_ptp_read_port_capture - Read a port's local time capture\n+ * ice_ptp_read_port_capture_e822 - Read a port's local time capture\n * @hw: pointer to HW struct\n * @port: Port number to read\n * @tx_ts: on return, the Tx port time capture\n@@ -1279,7 +1279,8 @@ ice_ptp_prep_phy_adj_target_e822(struct ice_hw *hw, u32 target_time)\n * Note this has no equivalent for the E810 devices.\n */\n enum ice_status\n-ice_ptp_read_port_capture(struct ice_hw *hw, u8 port, u64 *tx_ts, u64 *rx_ts)\n+ice_ptp_read_port_capture_e822(struct ice_hw *hw, u8 port, u64 *tx_ts,\n+\t\t\t u64 *rx_ts)\n {\n \tenum ice_status status;\n \n@@ -1309,7 +1310,7 @@ ice_ptp_read_port_capture(struct ice_hw *hw, u8 port, u64 *tx_ts, u64 *rx_ts)\n }\n \n /**\n- * ice_ptp_one_port_cmd - Prepare a single PHY port for a timer command\n+ * ice_ptp_one_port_cmd_e822 - Prepare a single PHY port for a timer command\n * @hw: pointer to HW struct\n * @port: Port to which cmd has to be sent\n * @cmd: Command to be sent to the port\n@@ -1321,8 +1322,8 @@ ice_ptp_read_port_capture(struct ice_hw *hw, u8 port, u64 *tx_ts, u64 *rx_ts)\n * always handles all external PHYs internally.\n */\n enum ice_status\n-ice_ptp_one_port_cmd(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd,\n-\t\t bool lock_sbq)\n+ice_ptp_one_port_cmd_e822(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd,\n+\t\t\t bool lock_sbq)\n {\n \tenum ice_status status;\n \tu32 cmd_val, val;\n@@ -1416,7 +1417,7 @@ ice_ptp_port_cmd_e822(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,\n \tfor (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) {\n \t\tenum ice_status status;\n \n-\t\tstatus = ice_ptp_one_port_cmd(hw, port, cmd, lock_sbq);\n+\t\tstatus = ice_ptp_one_port_cmd_e822(hw, port, cmd, lock_sbq);\n \t\tif (status)\n \t\t\treturn status;\n \t}\n@@ -2318,7 +2319,7 @@ ice_read_phy_and_phc_time_e822(struct ice_hw *hw, u8 port, u64 *phy_time,\n \tice_ptp_src_cmd(hw, READ_TIME);\n \n \t/* Prepare the PHY timer for a READ_TIME capture command */\n-\tstatus = ice_ptp_one_port_cmd(hw, port, READ_TIME, true);\n+\tstatus = ice_ptp_one_port_cmd_e822(hw, port, READ_TIME, true);\n \tif (status)\n \t\treturn status;\n \n@@ -2331,7 +2332,7 @@ ice_read_phy_and_phc_time_e822(struct ice_hw *hw, u8 port, u64 *phy_time,\n \t*phc_time = (u64)lo << 32 | zo;\n \n \t/* Read the captured PHY time from the PHY shadow registers */\n-\tstatus = ice_ptp_read_port_capture(hw, port, &tx_time, &rx_time);\n+\tstatus = ice_ptp_read_port_capture_e822(hw, port, &tx_time, &rx_time);\n \tif (status)\n \t\treturn status;\n \n@@ -2388,7 +2389,7 @@ static enum ice_status ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port)\n \tif (status)\n \t\tgoto err_unlock;\n \n-\tstatus = ice_ptp_one_port_cmd(hw, port, ADJ_TIME, true);\n+\tstatus = ice_ptp_one_port_cmd_e822(hw, port, ADJ_TIME, true);\n \tif (status)\n \t\tgoto err_unlock;\n \n@@ -2513,7 +2514,7 @@ ice_start_phy_timer_e822(struct ice_hw *hw, u8 port, bool bypass)\n \tif (status)\n \t\treturn status;\n \n-\tstatus = ice_ptp_one_port_cmd(hw, port, INIT_INCVAL, true);\n+\tstatus = ice_ptp_one_port_cmd_e822(hw, port, INIT_INCVAL, true);\n \tif (status)\n \t\treturn status;\n \n@@ -2538,7 +2539,7 @@ ice_start_phy_timer_e822(struct ice_hw *hw, u8 port, bool bypass)\n \tif (status)\n \t\treturn status;\n \n-\tstatus = ice_ptp_one_port_cmd(hw, port, INIT_INCVAL, true);\n+\tstatus = ice_ptp_one_port_cmd_e822(hw, port, INIT_INCVAL, true);\n \tif (status)\n \t\treturn status;\n \ndiff --git a/drivers/net/ice/base/ice_ptp_hw.h b/drivers/net/ice/base/ice_ptp_hw.h\nindex d27815fd94..9cc3436aa8 100644\n--- a/drivers/net/ice/base/ice_ptp_hw.h\n+++ b/drivers/net/ice/base/ice_ptp_hw.h\n@@ -157,10 +157,11 @@ ice_ptp_prep_port_adj_e822(struct ice_hw *hw, u8 port, s64 time,\n enum ice_status\n ice_ptp_read_phy_incval_e822(struct ice_hw *hw, u8 port, u64 *incval);\n enum ice_status\n-ice_ptp_read_port_capture(struct ice_hw *hw, u8 port, u64 *tx_ts, u64 *rx_ts);\n+ice_ptp_read_port_capture_e822(struct ice_hw *hw, u8 port,\n+\t\t\t u64 *tx_ts, u64 *rx_ts);\n enum ice_status\n-ice_ptp_one_port_cmd(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd,\n-\t\t bool lock_sbq);\n+ice_ptp_one_port_cmd_e822(struct ice_hw *hw, u8 port,\n+\t\t\t enum ice_ptp_tmr_cmd cmd, bool lock_sbq);\n enum ice_status\n ice_cfg_cgu_pll_e822(struct ice_hw *hw, enum ice_time_ref_freq clk_freq,\n \t\t enum ice_clk_src clk_src);\n", "prefixes": [ "v2", "11/70" ] }