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GET /api/patches/115029/?format=api
{ "id": 115029, "url": "http://patches.dpdk.org/api/patches/115029/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220815073206.2917968-2-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220815073206.2917968-2-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220815073206.2917968-2-qi.z.zhang@intel.com", "date": "2022-08-15T07:30:57", "name": "[v2,01/70] net/ice/base: add netlist helper functions", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "78a5b7908ee168678f765fb8c0c7f1198bf4fc8a", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220815073206.2917968-2-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 24308, "url": "http://patches.dpdk.org/api/series/24308/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24308", "date": "2022-08-15T07:30:56", "name": "ice base code update", "version": 2, "mbox": "http://patches.dpdk.org/series/24308/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/115029/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/115029/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B7FA9A00C3;\n\tMon, 15 Aug 2022 01:22:23 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 48E5B427F3;\n\tMon, 15 Aug 2022 01:22:18 +0200 (CEST)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by mails.dpdk.org (Postfix) with ESMTP id A78F9400EF\n for <dev@dpdk.org>; Mon, 15 Aug 2022 01:22:15 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 14 Aug 2022 16:22:15 -0700", "from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4])\n by orsmga008.jf.intel.com with ESMTP; 14 Aug 2022 16:22:13 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1660519335; x=1692055335;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=n9SndTJYLARCbLX4mL4EMevnjGVf/jmoXYKu3pmD89w=;\n b=Z1nuIFs422GZE7dEv1HDBttj0bGAXriZhMy1uMemfiUpmmGoA2uSo5S3\n 37ryKlTrTIOPytPzvpB0XAu2iqPXgZ+KRagugTKibXLP4JmugW4gsWqTe\n JqHpWXXcZQxeDtLxY+0iYvHu2bEgZ1x1Jn265YZXaN5AKKdCRJcLFnqoN\n zYjEC67V6wYPbF62UFe3nB1cp15zuunAppPPEvnz+BRjAhs4Y7ZvPvJl6\n 0w9yiAQTp5hnAVi/tqLmXK71g6+B2hhoFlt0D8GdVT6SNnvxkNOLXnJAJ\n ZBZpZwIP272qMYsdLgoJ5K1s++YDjm333ybZyQrvO+gyjtQj0TFCa/cAE A==;", "X-IronPort-AV": [ "E=McAfee;i=\"6400,9594,10439\"; a=\"291857909\"", "E=Sophos;i=\"5.93,237,1654585200\"; d=\"scan'208\";a=\"291857909\"", "E=Sophos;i=\"5.93,237,1654585200\"; d=\"scan'208\";a=\"635282975\"" ], "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Michal Michalik <michal.michalik@intel.com>", "Subject": "[PATCH v2 01/70] net/ice/base: add netlist helper functions", "Date": "Mon, 15 Aug 2022 03:30:57 -0400", "Message-Id": "<20220815073206.2917968-2-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.31.1", "In-Reply-To": "<20220815073206.2917968-1-qi.z.zhang@intel.com>", "References": "<20220815071306.2910599-1-qi.z.zhang@intel.com>\n <20220815073206.2917968-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add new functions to check in netlist if HW has:\n- Recovered Clock device,\n- Clock Generation Unit,\n- Clock Multiplexer,\n- GPS generic device.\n\nSigned-off-by: Michal Michalik <michal.michalik@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_adminq_cmd.h | 54 +++++++++++\n drivers/net/ice/base/ice_common.c | 130 +++++++++++++++++++++-----\n drivers/net/ice/base/ice_common.h | 10 ++\n drivers/net/ice/base/ice_ptp_hw.c | 37 +++++---\n drivers/net/ice/base/ice_ptp_hw.h | 1 +\n 5 files changed, 195 insertions(+), 37 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h\nindex 253b971dfd..a3add411b8 100644\n--- a/drivers/net/ice/base/ice_adminq_cmd.h\n+++ b/drivers/net/ice/base/ice_adminq_cmd.h\n@@ -1635,6 +1635,7 @@ struct ice_aqc_link_topo_params {\n #define ICE_AQC_LINK_TOPO_NODE_TYPE_CAGE\t6\n #define ICE_AQC_LINK_TOPO_NODE_TYPE_MEZZ\t7\n #define ICE_AQC_LINK_TOPO_NODE_TYPE_ID_EEPROM\t8\n+#define ICE_AQC_LINK_TOPO_NODE_TYPE_GPS\t\t11\n #define ICE_AQC_LINK_TOPO_NODE_CTX_S\t\t4\n #define ICE_AQC_LINK_TOPO_NODE_CTX_M\t\t\\\n \t\t\t\t(0xF << ICE_AQC_LINK_TOPO_NODE_CTX_S)\n@@ -1672,9 +1673,61 @@ struct ice_aqc_get_link_topo {\n \tstruct ice_aqc_link_topo_addr addr;\n \tu8 node_part_num;\n #define ICE_ACQ_GET_LINK_TOPO_NODE_NR_PCA9575\t0x21\n+#define ICE_ACQ_GET_LINK_TOPO_NODE_NR_GEN_GPS\t0x48\n \tu8 rsvd[9];\n };\n \n+/* Get Link Topology Pin (direct, 0x06E1) */\n+struct ice_aqc_get_link_topo_pin {\n+\tstruct ice_aqc_link_topo_addr addr;\n+\tu8 input_io_params;\n+#define ICE_AQC_LINK_TOPO_INPUT_IO_FUNC_S\t0\n+#define ICE_AQC_LINK_TOPO_INPUT_IO_FUNC_M\t\\\n+\t\t\t\t(0x1F << ICE_AQC_LINK_TOPO_INPUT_IO_FUNC_S)\n+#define ICE_AQC_LINK_TOPO_IO_FUNC_GPIO\t\t0\n+#define ICE_AQC_LINK_TOPO_IO_FUNC_RESET_N\t1\n+#define ICE_AQC_LINK_TOPO_IO_FUNC_INT_N\t\t2\n+#define ICE_AQC_LINK_TOPO_IO_FUNC_PRESENT_N\t3\n+#define ICE_AQC_LINK_TOPO_IO_FUNC_TX_DIS\t4\n+#define ICE_AQC_LINK_TOPO_IO_FUNC_MODSEL_N\t5\n+#define ICE_AQC_LINK_TOPO_IO_FUNC_LPMODE\t6\n+#define ICE_AQC_LINK_TOPO_IO_FUNC_TX_FAULT\t7\n+#define ICE_AQC_LINK_TOPO_IO_FUNC_RX_LOSS\t8\n+#define ICE_AQC_LINK_TOPO_IO_FUNC_RS0\t\t9\n+#define ICE_AQC_LINK_TOPO_IO_FUNC_RS1\t\t10\n+#define ICE_AQC_LINK_TOPO_IO_FUNC_EEPROM_WP\t11\n+/* 12 repeats intentionally due to two different uses depending on context */\n+#define ICE_AQC_LINK_TOPO_IO_FUNC_LED\t\t12\n+#define ICE_AQC_LINK_TOPO_IO_FUNC_RED_LED\t12\n+#define ICE_AQC_LINK_TOPO_IO_FUNC_GREEN_LED\t13\n+#define ICE_AQC_LINK_TOPO_IO_FUNC_BLUE_LED\t14\n+#define ICE_AQC_LINK_TOPO_INPUT_IO_TYPE_S\t5\n+#define ICE_AQC_LINK_TOPO_INPUT_IO_TYPE_M\t\\\n+\t\t\t(0x7 << ICE_AQC_LINK_TOPO_INPUT_IO_TYPE_S)\n+#define ICE_AQC_LINK_TOPO_INPUT_IO_TYPE_GPIO\t3\n+/* Use ICE_AQC_LINK_TOPO_NODE_TYPE_* for the type values */\n+\tu8 output_io_params;\n+#define ICE_AQC_LINK_TOPO_OUTPUT_IO_FUNC_S\t0\n+#define ICE_AQC_LINK_TOPO_OUTPUT_IO_FUNC_M\t\\\n+\t\t\t(0x1F << \\ ICE_AQC_LINK_TOPO_INPUT_IO_FUNC_NUM_S)\n+/* Use ICE_AQC_LINK_TOPO_IO_FUNC_* for the non-numerical options */\n+#define ICE_AQC_LINK_TOPO_OUTPUT_IO_TYPE_S\t5\n+#define ICE_AQC_LINK_TOPO_OUTPUT_IO_TYPE_M\t\\\n+\t\t\t(0x7 << ICE_AQC_LINK_TOPO_INPUT_IO_TYPE_S)\n+/* Use ICE_AQC_LINK_TOPO_NODE_TYPE_* for the type values */\n+\tu8 output_io_flags;\n+#define ICE_AQC_LINK_TOPO_OUTPUT_SPEED_S\t0\n+#define ICE_AQC_LINK_TOPO_OUTPUT_SPEED_M\t\\\n+\t\t\t(0x7 << ICE_AQC_LINK_TOPO_OUTPUT_SPEED_S)\n+#define ICE_AQC_LINK_TOPO_OUTPUT_INT_S\t\t3\n+#define ICE_AQC_LINK_TOPO_OUTPUT_INT_M\t\t\\\n+\t\t\t(0x3 << ICE_AQC_LINK_TOPO_OUTPUT_INT_S)\n+#define ICE_AQC_LINK_TOPO_OUTPUT_POLARITY\tBIT(5)\n+#define ICE_AQC_LINK_TOPO_OUTPUT_VALUE\t\tBIT(6)\n+#define ICE_AQC_LINK_TOPO_OUTPUT_DRIVEN\t\tBIT(7)\n+\tu8 rsvd[7];\n+};\n+\n /* Read/Write I2C (direct, 0x06E2/0x06E3) */\n struct ice_aqc_i2c {\n \tstruct ice_aqc_link_topo_addr topo_addr;\n@@ -2936,6 +2989,7 @@ struct ice_aq_desc {\n \t\tstruct ice_aqc_get_link_status get_link_status;\n \t\tstruct ice_aqc_event_lan_overflow lan_overflow;\n \t\tstruct ice_aqc_get_link_topo get_link_topo;\n+\t\tstruct ice_aqc_get_link_topo_pin get_link_topo_pin;\n \t\tstruct ice_aqc_set_health_status_config\n \t\t\tset_health_status_config;\n \t\tstruct ice_aqc_get_supported_health_status_codes\ndiff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex db87bacd97..edc24030ec 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -396,37 +396,103 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,\n }\n \n /**\n- * ice_aq_get_link_topo_handle - get link topology node return status\n- * @pi: port information structure\n- * @node_type: requested node type\n- * @cd: pointer to command details structure or NULL\n- *\n- * Get link topology node return status for specified node type (0x06E0)\n- *\n- * Node type cage can be used to determine if cage is present. If AQC\n- * returns error (ENOENT), then no cage present. If no cage present, then\n- * connection type is backplane or BASE-T.\n+ * ice_aq_get_netlist_node_pin\n+ * @hw: pointer to the hw struct\n+ * @cmd: get_link_topo_pin AQ structure\n+ * @node_handle: output node handle parameter if node found\n */\n-static enum ice_status\n-ice_aq_get_link_topo_handle(struct ice_port_info *pi, u8 node_type,\n-\t\t\t struct ice_sq_cd *cd)\n+enum ice_status\n+ice_aq_get_netlist_node_pin(struct ice_hw *hw,\n+\t\t\t struct ice_aqc_get_link_topo_pin *cmd,\n+\t\t\t u16 *node_handle)\n {\n-\tstruct ice_aqc_get_link_topo *cmd;\n \tstruct ice_aq_desc desc;\n \n-\tcmd = &desc.params.get_link_topo;\n+\tice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo_pin);\n+\tdesc.params.get_link_topo_pin = *cmd;\n+\n+\tif (ice_aq_send_cmd(hw, &desc, NULL, 0, NULL))\n+\t\treturn ICE_ERR_NOT_SUPPORTED;\n+\n+\tif (node_handle)\n+\t\t*node_handle =\n+\t\t\tLE16_TO_CPU(desc.params.get_link_topo_pin.addr.handle);\n+\n+\treturn ICE_SUCCESS;\n+}\n+\n+/**\n+ * ice_aq_get_netlist_node\n+ * @hw: pointer to the hw struct\n+ * @cmd: get_link_topo AQ structure\n+ * @node_part_number: output node part number if node found\n+ * @node_handle: output node handle parameter if node found\n+ */\n+enum ice_status\n+ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd,\n+\t\t\tu8 *node_part_number, u16 *node_handle)\n+{\n+\tstruct ice_aq_desc desc;\n \n \tice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo);\n+\tdesc.params.get_link_topo = *cmd;\n \n-\tcmd->addr.topo_params.node_type_ctx =\n-\t\t(ICE_AQC_LINK_TOPO_NODE_CTX_PORT <<\n-\t\t ICE_AQC_LINK_TOPO_NODE_CTX_S);\n+\tif (ice_aq_send_cmd(hw, &desc, NULL, 0, NULL))\n+\t\treturn ICE_ERR_NOT_SUPPORTED;\n \n-\t/* set node type */\n-\tcmd->addr.topo_params.node_type_ctx |=\n-\t\t(ICE_AQC_LINK_TOPO_NODE_TYPE_M & node_type);\n+\tif (node_handle)\n+\t\t*node_handle =\n+\t\t\tLE16_TO_CPU(desc.params.get_link_topo.addr.handle);\n+\tif (node_part_number)\n+\t\t*node_part_number = desc.params.get_link_topo.node_part_num;\n \n-\treturn ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd);\n+\treturn ICE_SUCCESS;\n+}\n+\n+#define MAX_NETLIST_SIZE 10\n+/**\n+ * ice_find_netlist_node\n+ * @hw: pointer to the hw struct\n+ * @node_type_ctx: type of netlist node to look for\n+ * @node_part_number: node part number to look for\n+ * @node_handle: output parameter if node found - optional\n+ *\n+ * Find and return the node handle for a given node type and part number in the\n+ * netlist. When found ICE_SUCCESS is returned, ICE_ERR_DOES_NOT_EXIST\n+ * otherwise. If node_handle provided, it would be set to found node handle.\n+ */\n+enum ice_status\n+ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number,\n+\t\t u16 *node_handle)\n+{\n+\tstruct ice_aqc_get_link_topo cmd;\n+\tu8 rec_node_part_number;\n+\tu16 rec_node_handle;\n+\tu8 idx;\n+\n+\tfor (idx = 0; idx < MAX_NETLIST_SIZE; idx++) {\n+\t\tenum ice_status status;\n+\n+\t\tmemset(&cmd, 0, sizeof(cmd));\n+\n+\t\tcmd.addr.topo_params.node_type_ctx =\n+\t\t\t(node_type_ctx << ICE_AQC_LINK_TOPO_NODE_TYPE_S);\n+\t\tcmd.addr.topo_params.index = idx;\n+\n+\t\tstatus = ice_aq_get_netlist_node(hw, &cmd,\n+\t\t\t\t\t\t &rec_node_part_number,\n+\t\t\t\t\t\t &rec_node_handle);\n+\t\tif (status)\n+\t\t\treturn status;\n+\n+\t\tif (rec_node_part_number == node_part_number) {\n+\t\t\tif (node_handle)\n+\t\t\t\t*node_handle = rec_node_handle;\n+\t\t\treturn ICE_SUCCESS;\n+\t\t}\n+\t}\n+\n+\treturn ICE_ERR_DOES_NOT_EXIST;\n }\n \n /**\n@@ -438,13 +504,27 @@ ice_aq_get_link_topo_handle(struct ice_port_info *pi, u8 node_type,\n */\n static bool ice_is_media_cage_present(struct ice_port_info *pi)\n {\n+\tstruct ice_aqc_get_link_topo *cmd;\n+\tstruct ice_aq_desc desc;\n+\n+\tcmd = &desc.params.get_link_topo;\n+\n+\tice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo);\n+\n+\tcmd->addr.topo_params.node_type_ctx =\n+\t\t(ICE_AQC_LINK_TOPO_NODE_CTX_PORT <<\n+\t\t ICE_AQC_LINK_TOPO_NODE_CTX_S);\n+\n+\t/* set node type */\n+\tcmd->addr.topo_params.node_type_ctx |=\n+\t\t(ICE_AQC_LINK_TOPO_NODE_TYPE_M &\n+\t\t ICE_AQC_LINK_TOPO_NODE_TYPE_CAGE);\n+\n \t/* Node type cage can be used to determine if cage is present. If AQC\n \t * returns error (ENOENT), then no cage present. If no cage present then\n \t * connection type is backplane or BASE-T.\n \t */\n-\treturn !ice_aq_get_link_topo_handle(pi,\n-\t\t\t\t\t ICE_AQC_LINK_TOPO_NODE_TYPE_CAGE,\n-\t\t\t\t\t NULL);\n+\treturn ice_aq_get_netlist_node(pi->hw, cmd, NULL, NULL);\n }\n \n /**\ndiff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h\nindex a3cbf4fb05..1044a3088e 100644\n--- a/drivers/net/ice/base/ice_common.h\n+++ b/drivers/net/ice/base/ice_common.h\n@@ -145,6 +145,16 @@ enum ice_status\n ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,\n \t\t struct ice_aqc_get_phy_caps_data *caps,\n \t\t struct ice_sq_cd *cd);\n+enum ice_status\n+ice_aq_get_netlist_node_pin(struct ice_hw *hw,\n+\t\t\t struct ice_aqc_get_link_topo_pin *cmd,\n+\t\t\t u16 *node_handle);\n+enum ice_status\n+ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd,\n+\t\t\tu8 *node_part_number, u16 *node_handle);\n+enum ice_status\n+ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number,\n+\t\t u16 *node_handle);\n void\n ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,\n \t\t u16 link_speeds_bitmap);\ndiff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c\nindex 7e797c9511..5b366c95c5 100644\n--- a/drivers/net/ice/base/ice_ptp_hw.c\n+++ b/drivers/net/ice/base/ice_ptp_hw.c\n@@ -3095,10 +3095,10 @@ ice_ptp_port_cmd_e810(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,\n static enum ice_status\n ice_get_pca9575_handle(struct ice_hw *hw, __le16 *pca9575_handle)\n {\n-\tstruct ice_aqc_get_link_topo *cmd;\n-\tstruct ice_aq_desc desc;\n+\tstruct ice_aqc_get_link_topo cmd;\n+\tu8 node_part_number, idx;\n \tenum ice_status status;\n-\tu8 idx;\n+\tu16 node_handle;\n \n \tif (!hw || !pca9575_handle)\n \t\treturn ICE_ERR_PARAM;\n@@ -3109,12 +3109,10 @@ ice_get_pca9575_handle(struct ice_hw *hw, __le16 *pca9575_handle)\n \t\treturn ICE_SUCCESS;\n \t}\n \n-\t/* If handle was not detected read it from the netlist */\n-\tcmd = &desc.params.get_link_topo;\n-\tice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo);\n+\tmemset(&cmd, 0, sizeof(cmd));\n \n \t/* Set node type to GPIO controller */\n-\tcmd->addr.topo_params.node_type_ctx =\n+\tcmd.addr.topo_params.node_type_ctx =\n \t\t(ICE_AQC_LINK_TOPO_NODE_TYPE_M &\n \t\t ICE_AQC_LINK_TOPO_NODE_TYPE_GPIO_CTRL);\n \n@@ -3129,24 +3127,39 @@ ice_get_pca9575_handle(struct ice_hw *hw, __le16 *pca9575_handle)\n \telse\n \t\treturn ICE_ERR_NOT_SUPPORTED;\n \n-\tcmd->addr.topo_params.index = idx;\n+\tcmd.addr.topo_params.index = idx;\n \n-\tstatus = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);\n+\tstatus = ice_aq_get_netlist_node(hw, &cmd, &node_part_number,\n+\t\t\t\t\t &node_handle);\n \tif (status)\n \t\treturn ICE_ERR_NOT_SUPPORTED;\n \n \t/* Verify if we found the right IO expander type */\n-\tif (desc.params.get_link_topo.node_part_num !=\n-\t\tICE_ACQ_GET_LINK_TOPO_NODE_NR_PCA9575)\n+\tif (node_part_number != ICE_ACQ_GET_LINK_TOPO_NODE_NR_PCA9575)\n \t\treturn ICE_ERR_NOT_SUPPORTED;\n \n \t/* If present save the handle and return it */\n-\thw->io_expander_handle = desc.params.get_link_topo.addr.handle;\n+\thw->io_expander_handle = node_handle;\n \t*pca9575_handle = hw->io_expander_handle;\n \n \treturn ICE_SUCCESS;\n }\n \n+/**\n+ * ice_is_gps_present_e810t\n+ * @hw: pointer to the hw struct\n+ *\n+ * Check if the GPS generic device is present in the netlist\n+ */\n+bool ice_is_gps_present_e810t(struct ice_hw *hw)\n+{\n+\tif (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_GPS,\n+\t\t\t\t ICE_ACQ_GET_LINK_TOPO_NODE_NR_GEN_GPS, NULL))\n+\t\treturn false;\n+\n+\treturn true;\n+}\n+\n /**\n * ice_read_e810t_pca9575_reg\n * @hw: pointer to the hw struct\ndiff --git a/drivers/net/ice/base/ice_ptp_hw.h b/drivers/net/ice/base/ice_ptp_hw.h\nindex ee3366e83c..4f349593aa 100644\n--- a/drivers/net/ice/base/ice_ptp_hw.h\n+++ b/drivers/net/ice/base/ice_ptp_hw.h\n@@ -221,6 +221,7 @@ enum ice_status ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port);\n enum ice_status ice_phy_exit_bypass_e822(struct ice_hw *hw, u8 port);\n \n /* E810 family functions */\n+bool ice_is_gps_present_e810t(struct ice_hw *hw);\n enum ice_status ice_ptp_init_phy_e810(struct ice_hw *hw);\n enum ice_status\n ice_read_e810t_pca9575_reg(struct ice_hw *hw, u8 offset, u8 *data);\n", "prefixes": [ "v2", "01/70" ] }