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GET /api/patches/114929/?format=api
{ "id": 114929, "url": "http://patches.dpdk.org/api/patches/114929/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220812172451.1208933-1-hpothula@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220812172451.1208933-1-hpothula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220812172451.1208933-1-hpothula@marvell.com", "date": "2022-08-12T17:24:49", "name": "[v2,1/3] ethdev: introduce pool sort capability", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d6295bf0fb80e2d9be40608fefc306940ded98c0", "submitter": { "id": 2319, "url": "http://patches.dpdk.org/api/people/2319/?format=api", "name": "Hanumanth Pothula", "email": "hpothula@marvell.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220812172451.1208933-1-hpothula@marvell.com/mbox/", "series": [ { "id": 24301, "url": "http://patches.dpdk.org/api/series/24301/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24301", "date": "2022-08-12T17:24:49", "name": "[v2,1/3] ethdev: introduce pool sort capability", "version": 2, "mbox": "http://patches.dpdk.org/series/24301/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/114929/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/114929/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 18A18A0543;\n\tFri, 12 Aug 2022 19:27:11 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id AD97B40A82;\n\tFri, 12 Aug 2022 19:27:10 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id B574C40A7F\n for <dev@dpdk.org>; Fri, 12 Aug 2022 19:27:09 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id\n 27CFCZ7w028243;\n Fri, 12 Aug 2022 10:25:04 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3hwsa18ggq-3\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Fri, 12 Aug 2022 10:25:04 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Fri, 12 Aug 2022 10:25:02 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Fri, 12 Aug 2022 10:25:02 -0700", "from localhost.localdomain (unknown [10.28.36.155])\n by maili.marvell.com (Postfix) with ESMTP id B82DD5B6934;\n Fri, 12 Aug 2022 10:24:56 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=9zZbwve6GyYJxLnNm8Sxnj7L0KEbMSZEVfLDbIAzC7s=;\n b=OnSHtgzNevhWZx42mCwAXxjUqLNMleldRsyaeqVCjQ1sENrXUHH4/TkArA5gqu6dJDip\n bwDM0LYIJAuYTeKjlduKcNIrEkHw/2SdlpSl9ngGy086Qy/aeJMWKEj+eKqvUwXX90AI\n yLAnurmnbUmeGc76RCuteZQ2zn5bokVPO/kywEhd+vC+CLx+ntmqqwi6c9uY15lthhS8\n XSKQNimHT6Cor6hyAHIHuzfDv19Xb6c4x6w+XfWLnpz/jYmv58aMdxAuCze6x6NZ2JzN\n 7G7vILirxMrfQMCd02xNeaC1CE/dZ/+5QogwkygEkFb5KXj00Zt3dtdDNiQhMuKTUMWm tg==", "From": "Hanumanth Pothula <hpothula@marvell.com>", "To": "Thomas Monjalon <thomas@monjalon.net>, Ferruh Yigit\n <ferruh.yigit@xilinx.com>, Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>", "CC": "<dev@dpdk.org>, <xuan.ding@intel.com>, <wenxuanx.wu@intel.com>,\n <xiaoyun.li@intel.com>, <stephen@networkplumber.org>,\n <yuanx.wang@intel.com>, <mdr@ashroe.eu>, <yuying.zhang@intel.com>,\n <qi.z.zhang@intel.com>, <viacheslavo@nvidia.com>, <jerinj@marvell.com>,\n <ndabilpuram@marvell.com>, Hanumanth Pothula <hpothula@marvell.com>", "Subject": "[PATCH v2 1/3] ethdev: introduce pool sort capability", "Date": "Fri, 12 Aug 2022 22:54:49 +0530", "Message-ID": "<20220812172451.1208933-1-hpothula@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20220812104648.1019978-1-hpothula@marvell.com>", "References": "<20220812104648.1019978-1-hpothula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "d261cvZJiCUXIF928raR6MgZ52zQyVR0", "X-Proofpoint-GUID": "d261cvZJiCUXIF928raR6MgZ52zQyVR0", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1\n definitions=2022-08-12_10,2022-08-11_01,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Presently, the 'Buffer Split' feature supports sending multiple\nsegments of the received packet to PMD, which programs the HW\nto receive the packet in segments from different pools.\n\nThis patch extends the feature to support the pool sort capability.\nSome of the HW has support for choosing memory pools based on the\npacket's size. The pool sort capability allows PMD to choose a\nmemory pool based on the packet's length.\n\nThis is often useful for saving the memory where the application\ncan create a different pool to steer the specific size of the\npacket, thus enabling effective use of memory.\n\nFor example, let's say HW has a capability of three pools,\n - pool-1 size is 2K\n - pool-2 size is > 2K and < 4K\n - pool-3 size is > 4K\nHere,\n pool-1 can accommodate packets with sizes < 2K\n pool-2 can accommodate packets with sizes > 2K and < 4K\n pool-3 can accommodate packets with sizes > 4K\n\nWith pool sort capability enabled in SW, an application may create\nthree pools of different sizes and send them to PMD. Allowing PMD\nto program HW based on packet lengths. So that packets with less\nthan 2K are received on pool-1, packets with lengths between 2K\nand 4K are received on pool-2 and finally packets greater than 4K\nare received on pool-3.\n\nThe following two capabilities are added to the rte_eth_rxseg_capa\nstructure,\n1. pool_sort --> tells pool sort capability is supported by HW.\n2. max_npool --> max number of pools supported by HW.\n\nDefined new structure rte_eth_rxseg_sort, to be used only when pool\nsort capability is present. If required this may be extended further\nto support more configurations.\n\nSigned-off-by: Hanumanth Pothula <hpothula@marvell.com>\n\nv2:\n - Along with spec changes, uploading testpmd and driver changes.\n---\n lib/ethdev/rte_ethdev.c | 87 +++++++++++++++++++++++++++++++++++------\n lib/ethdev/rte_ethdev.h | 45 +++++++++++++++++++--\n 2 files changed, 118 insertions(+), 14 deletions(-)", "diff": "diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c\nindex 1979dc0850..7fd5443eb8 100644\n--- a/lib/ethdev/rte_ethdev.c\n+++ b/lib/ethdev/rte_ethdev.c\n@@ -1635,7 +1635,55 @@ rte_eth_dev_is_removed(uint16_t port_id)\n }\n \n static int\n-rte_eth_rx_queue_check_split(const struct rte_eth_rxseg_split *rx_seg,\n+rte_eth_rx_queue_check_sort(const struct rte_eth_rxseg *rx_seg,\n+\t\t\t uint16_t n_seg, uint32_t *mbp_buf_size,\n+\t\t\t const struct rte_eth_dev_info *dev_info)\n+{\n+\tconst struct rte_eth_rxseg_capa *seg_capa = &dev_info->rx_seg_capa;\n+\tuint16_t seg_idx;\n+\n+\tif (!seg_capa->multi_pools || n_seg > seg_capa->max_npool) {\n+\t\tRTE_ETHDEV_LOG(ERR,\n+\t\t\t \"Invalid capabilities, multi_pools:%d differnt length segments %u exceed supported %u\\n\",\n+\t\t\t seg_capa->multi_pools, n_seg, seg_capa->max_nseg);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tfor (seg_idx = 0; seg_idx < n_seg; seg_idx++) {\n+\t\tstruct rte_mempool *mpl = rx_seg[seg_idx].sort.mp;\n+\t\tuint32_t length = rx_seg[seg_idx].sort.length;\n+\n+\t\tif (mpl == NULL) {\n+\t\t\tRTE_ETHDEV_LOG(ERR, \"null mempool pointer\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\n+\t\tif (mpl->private_data_size <\n+\t\t\tsizeof(struct rte_pktmbuf_pool_private)) {\n+\t\t\tRTE_ETHDEV_LOG(ERR,\n+\t\t\t\t \"%s private_data_size %u < %u\\n\",\n+\t\t\t\t mpl->name, mpl->private_data_size,\n+\t\t\t\t (unsigned int)sizeof\n+\t\t\t\t\t(struct rte_pktmbuf_pool_private));\n+\t\t\treturn -ENOSPC;\n+\t\t}\n+\n+\t\t*mbp_buf_size = rte_pktmbuf_data_room_size(mpl);\n+\t\tlength = length != 0 ? length : (*mbp_buf_size - RTE_PKTMBUF_HEADROOM);\n+\t\tif (*mbp_buf_size < length + RTE_PKTMBUF_HEADROOM) {\n+\t\t\tRTE_ETHDEV_LOG(ERR,\n+\t\t\t\t \"%s mbuf_data_room_size %u < %u))\\n\",\n+\t\t\t\t mpl->name, *mbp_buf_size,\n+\t\t\t\t length);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+rte_eth_rx_queue_check_split(const struct rte_eth_rxseg *rx_seg,\n \t\t\t uint16_t n_seg, uint32_t *mbp_buf_size,\n \t\t\t const struct rte_eth_dev_info *dev_info)\n {\n@@ -1654,12 +1702,12 @@ rte_eth_rx_queue_check_split(const struct rte_eth_rxseg_split *rx_seg,\n \t * Check the sizes and offsets against buffer sizes\n \t * for each segment specified in extended configuration.\n \t */\n-\tmp_first = rx_seg[0].mp;\n+\tmp_first = rx_seg[0].split.mp;\n \toffset_mask = RTE_BIT32(seg_capa->offset_align_log2) - 1;\n \tfor (seg_idx = 0; seg_idx < n_seg; seg_idx++) {\n-\t\tstruct rte_mempool *mpl = rx_seg[seg_idx].mp;\n-\t\tuint32_t length = rx_seg[seg_idx].length;\n-\t\tuint32_t offset = rx_seg[seg_idx].offset;\n+\t\tstruct rte_mempool *mpl = rx_seg[seg_idx].split.mp;\n+\t\tuint32_t length = rx_seg[seg_idx].split.length;\n+\t\tuint32_t offset = rx_seg[seg_idx].split.offset;\n \n \t\tif (mpl == NULL) {\n \t\t\tRTE_ETHDEV_LOG(ERR, \"null mempool pointer\\n\");\n@@ -1693,7 +1741,11 @@ rte_eth_rx_queue_check_split(const struct rte_eth_rxseg_split *rx_seg,\n \t\t}\n \t\toffset += seg_idx != 0 ? 0 : RTE_PKTMBUF_HEADROOM;\n \t\t*mbp_buf_size = rte_pktmbuf_data_room_size(mpl);\n-\t\tlength = length != 0 ? length : *mbp_buf_size;\n+\t\t/* On segment length == 0, update segment's length with\n+\t\t * the pool's length - headeroom space, to make sure enough\n+\t\t * space is accomidate for header.\n+\t\t **/\n+\t\tlength = length != 0 ? length : (*mbp_buf_size - RTE_PKTMBUF_HEADROOM);\n \t\tif (*mbp_buf_size < length + offset) {\n \t\t\tRTE_ETHDEV_LOG(ERR,\n \t\t\t\t \"%s mbuf_data_room_size %u < %u (segment length=%u + segment offset=%u)\\n\",\n@@ -1764,7 +1816,6 @@ rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,\n \t\t\treturn -EINVAL;\n \t\t}\n \t} else {\n-\t\tconst struct rte_eth_rxseg_split *rx_seg;\n \t\tuint16_t n_seg;\n \n \t\t/* Extended multi-segment configuration check. */\n@@ -1774,13 +1825,27 @@ rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,\n \t\t\treturn -EINVAL;\n \t\t}\n \n-\t\trx_seg = (const struct rte_eth_rxseg_split *)rx_conf->rx_seg;\n \t\tn_seg = rx_conf->rx_nseg;\n \n \t\tif (rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT) {\n-\t\t\tret = rte_eth_rx_queue_check_split(rx_seg, n_seg,\n-\t\t\t\t\t\t\t &mbp_buf_size,\n-\t\t\t\t\t\t\t &dev_info);\n+\t\t\tret = -1; /* To make sure at least one of below conditions becomes true */\n+\n+\t\t\t/* Check both NIX and application supports buffer-split capability */\n+\t\t\tif (dev_info.rx_seg_capa.mode_split &&\n+\t\t\t rx_conf->mode_flag == RTE_ETH_RXSEG_MODE_SPLIT) {\n+\t\t\t\tret = rte_eth_rx_queue_check_split(rx_conf->rx_seg, n_seg,\n+\t\t\t\t\t\t\t\t &mbp_buf_size,\n+\t\t\t\t\t\t\t\t &dev_info);\n+\t\t\t}\n+\n+\t\t\t/* Check both NIX and application supports pool-sort capability */\n+\t\t\tif (dev_info.rx_seg_capa.mode_sort &&\n+\t\t\t rx_conf->mode_flag == RTE_ETH_RXSEG_MODE_SORT) {\n+\t\t\t\tret = rte_eth_rx_queue_check_sort(rx_conf->rx_seg, n_seg,\n+\t\t\t\t\t\t\t\t &mbp_buf_size,\n+\t\t\t\t\t\t\t\t &dev_info);\n+\t\t\t}\n+\n \t\t\tif (ret != 0)\n \t\t\t\treturn ret;\n \t\t} else {\ndiff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h\nindex de9e970d4d..9f6787d7ad 100644\n--- a/lib/ethdev/rte_ethdev.h\n+++ b/lib/ethdev/rte_ethdev.h\n@@ -1204,16 +1204,46 @@ struct rte_eth_rxseg_split {\n \tuint32_t reserved; /**< Reserved field. */\n };\n \n+/**\n+ * The pool sort capability allows PMD to choose a memory pool based on the\n+ * packet's length. So, basically, PMD programs HW for receiving packets from\n+ * different pools, based on the packet's length.\n+ *\n+ * This is often useful for saving the memory where the application can create\n+ * a different pool to steer the specific size of the packet, thus enabling\n+ * effective use of memory.\n+ */\n+struct rte_eth_rxseg_sort {\n+\tstruct rte_mempool *mp; /**< Memory pool to allocate packets from. */\n+\tuint16_t length; /**< Packet data length. */\n+\tuint32_t reserved; /**< Reserved field. */\n+};\n+\n+enum rte_eth_rxseg_mode {\n+\t/**\n+\t * Buffer split mode: PMD split the received packets into multiple segments.\n+\t * @see struct rte_eth_rxseg_split\n+\t */\n+\tRTE_ETH_RXSEG_MODE_SPLIT = RTE_BIT64(0),\n+\t/**\n+\t * Pool sort mode: PMD to chooses a memory pool based on the packet's length.\n+\t * @see struct rte_eth_rxseg_sort\n+\t */\n+\tRTE_ETH_RXSEG_MODE_SORT = RTE_BIT64(1),\n+};\n+\n /**\n * @warning\n * @b EXPERIMENTAL: this structure may change without prior notice.\n *\n * A common structure used to describe Rx packet segment properties.\n */\n-union rte_eth_rxseg {\n+struct rte_eth_rxseg {\n \t/* The settings for buffer split offload. */\n \tstruct rte_eth_rxseg_split split;\n-\t/* The other features settings should be added here. */\n+\n+\t/*The settings for packet sort offload. */\n+\tstruct rte_eth_rxseg_sort sort;\n };\n \n /**\n@@ -1239,6 +1269,11 @@ struct rte_eth_rxconf {\n \t * fields on rte_eth_dev_info structure are allowed to be set.\n \t */\n \tuint64_t offloads;\n+\t/**\n+\t * PMD may support more than one rxseg mode. This allows application\n+\t * to chose which mode to enable.\n+\t */\n+\tenum rte_eth_rxseg_mode mode_flag;\n \t/**\n \t * Points to the array of segment descriptions for an entire packet.\n \t * Array elements are properties for consecutive Rx segments.\n@@ -1246,7 +1281,7 @@ struct rte_eth_rxconf {\n \t * The supported capabilities of receiving segmentation is reported\n \t * in rte_eth_dev_info.rx_seg_capa field.\n \t */\n-\tunion rte_eth_rxseg *rx_seg;\n+\tstruct rte_eth_rxseg *rx_seg;\n \n \tuint64_t reserved_64s[2]; /**< Reserved for future fields */\n \tvoid *reserved_ptrs[2]; /**< Reserved for future fields */\n@@ -1827,10 +1862,14 @@ struct rte_eth_switch_info {\n */\n struct rte_eth_rxseg_capa {\n \t__extension__\n+\tuint32_t mode_split : 1; /**< Supports buffer split capability @see struct rte_eth_rxseg_split */\n+\tuint32_t mode_sort : 1; /**< Supports pool sort capability @see struct rte_eth_rxseg_sort */\n \tuint32_t multi_pools:1; /**< Supports receiving to multiple pools.*/\n \tuint32_t offset_allowed:1; /**< Supports buffer offsets. */\n \tuint32_t offset_align_log2:4; /**< Required offset alignment. */\n \tuint16_t max_nseg; /**< Maximum amount of segments to split. */\n+\t/* < Maximum amount of pools that PMD can sort based on packet/segment lengths */\n+\tuint16_t max_npool;\n \tuint16_t reserved; /**< Reserved field. */\n };\n \n", "prefixes": [ "v2", "1/3" ] }