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GET /api/patches/114785/?format=api
http://patches.dpdk.org/api/patches/114785/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220809184908.24030-6-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220809184908.24030-6-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220809184908.24030-6-ndabilpuram@marvell.com", "date": "2022-08-09T18:48:50", "name": "[06/23] common/cnxk: delay inline device RQ enable to dev start", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "2d4464fb3c99c37cb350c903d621d45c1177c05e", "submitter": { "id": 1202, "url": "http://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220809184908.24030-6-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 24239, "url": "http://patches.dpdk.org/api/series/24239/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24239", "date": "2022-08-09T18:48:45", "name": "[01/23] common/cnxk: fix part value for cn10k", "version": 1, "mbox": "http://patches.dpdk.org/series/24239/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/114785/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/114785/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 756E3A04FD;\n\tTue, 9 Aug 2022 20:52:10 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6198C42BD6;\n\tTue, 9 Aug 2022 20:52:10 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 174EF42BDA\n for <dev@dpdk.org>; Tue, 9 Aug 2022 20:52:07 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id\n 279CnFCa017235;\n Tue, 9 Aug 2022 11:50:01 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3hudy6ujqv-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Tue, 09 Aug 2022 11:50:01 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Tue, 9 Aug 2022 11:49:59 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Tue, 9 Aug 2022 11:49:59 -0700", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 3A40E3F7086;\n Tue, 9 Aug 2022 11:49:56 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=vBTselbWV2x7VrszG2EyGf2sDidPVkXpetJYb9FWaPA=;\n b=HtJqG6zSgXHFE++J9U80GxHbGUq6mcqBfbrllci3V2Gq56SE/y0tlNixriLODP6tFRpf\n c1PML0FC75iKmyyoa7CopqwoLucI+NXrNAp/ySgyGfz3RYES4KZtkr3z+KSyBvVXFqAi\n zJoLsAQ661eLdUqhH30WhbDx6i1u1g1hWxWxz245SbK0sTbzZtIZG7s76HluLAjCo27w\n SdsXdxLhBX6CPnKN3oOlK44o4lWJPtTxy4LbYYTYs8RN6oLyBjosNuZpkDlNKv18qtKn\n soY2KKxOD+yWt2McXkCMpENLYrYdOMGftmB4ZnZlUgWQPkLI2OjwUOFLYLOfnoIKoV4k EQ==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>", "CC": "<jerinj@marvell.com>, <dev@dpdk.org>", "Subject": "[PATCH 06/23] common/cnxk: delay inline device RQ enable to dev start", "Date": "Wed, 10 Aug 2022 00:18:50 +0530", "Message-ID": "<20220809184908.24030-6-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20220809184908.24030-1-ndabilpuram@marvell.com>", "References": "<20220809184908.24030-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "-spcDmKxLEXNLLRIGNhi0dBAj2fm5rEn", "X-Proofpoint-ORIG-GUID": "-spcDmKxLEXNLLRIGNhi0dBAj2fm5rEn", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1\n definitions=2022-08-09_05,2022-08-09_02,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Similar to other RQ's, delay inline device rq until dev is started\nto avoid traffic reception when device is stopped.\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n drivers/common/cnxk/roc_idev.h | 2 --\n drivers/common/cnxk/roc_nix_inl.c | 34 +++++++++++++++++++++++++++++++---\n drivers/common/cnxk/roc_nix_inl.h | 5 ++++-\n drivers/common/cnxk/version.map | 7 ++++---\n drivers/net/cnxk/cnxk_ethdev.c | 14 +++++++++++++-\n 5 files changed, 52 insertions(+), 10 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_idev.h b/drivers/common/cnxk/roc_idev.h\nindex 7e0beed..16793c2 100644\n--- a/drivers/common/cnxk/roc_idev.h\n+++ b/drivers/common/cnxk/roc_idev.h\n@@ -17,6 +17,4 @@ void __roc_api roc_idev_cpt_set(struct roc_cpt *cpt);\n \n struct roc_nix *__roc_api roc_idev_npa_nix_get(void);\n \n-uint64_t *__roc_api roc_nix_inl_outb_ring_base_get(struct roc_nix *roc_nix);\n-\n #endif /* _ROC_IDEV_H_ */\ndiff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c\nindex 603551b..c621867 100644\n--- a/drivers/common/cnxk/roc_nix_inl.c\n+++ b/drivers/common/cnxk/roc_nix_inl.c\n@@ -245,6 +245,9 @@ roc_nix_reassembly_configure(uint32_t max_wait_time, uint16_t max_frags)\n \tstruct roc_cpt *roc_cpt;\n \tstruct roc_cpt_rxc_time_cfg cfg;\n \n+\tif (!idev)\n+\t\treturn -EFAULT;\n+\n \tPLT_SET_USED(max_frags);\n \tif (idev == NULL)\n \t\treturn -ENOTSUP;\n@@ -587,7 +590,7 @@ roc_nix_inl_outb_is_enabled(struct roc_nix *roc_nix)\n }\n \n int\n-roc_nix_inl_dev_rq_get(struct roc_nix_rq *rq)\n+roc_nix_inl_dev_rq_get(struct roc_nix_rq *rq, bool enable)\n {\n \tstruct idev_cfg *idev = idev_get_cfg();\n \tint port_id = rq->roc_nix->port_id;\n@@ -688,9 +691,9 @@ roc_nix_inl_dev_rq_get(struct roc_nix_rq *rq)\n \n \t/* Prepare and send RQ init mbox */\n \tif (roc_model_is_cn9k())\n-\t\trc = nix_rq_cn9k_cfg(dev, inl_rq, inl_dev->qints, false, true);\n+\t\trc = nix_rq_cn9k_cfg(dev, inl_rq, inl_dev->qints, false, enable);\n \telse\n-\t\trc = nix_rq_cfg(dev, inl_rq, inl_dev->qints, false, true);\n+\t\trc = nix_rq_cfg(dev, inl_rq, inl_dev->qints, false, enable);\n \tif (rc) {\n \t\tplt_err(\"Failed to prepare aq_enq msg, rc=%d\", rc);\n \t\treturn rc;\n@@ -755,6 +758,31 @@ roc_nix_inl_dev_rq_put(struct roc_nix_rq *rq)\n \treturn rc;\n }\n \n+int\n+roc_nix_inl_rq_ena_dis(struct roc_nix *roc_nix, bool enable)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct roc_nix_rq *inl_rq = roc_nix_inl_dev_rq(roc_nix);\n+\tstruct idev_cfg *idev = idev_get_cfg();\n+\tstruct nix_inl_dev *inl_dev;\n+\tint rc;\n+\n+\tif (!idev)\n+\t\treturn -EFAULT;\n+\n+\tif (nix->inb_inl_dev) {\n+\t\tif (!inl_rq || !idev->nix_inl_dev)\n+\t\t\treturn -EFAULT;\n+\n+\t\tinl_dev = idev->nix_inl_dev;\n+\n+\t\trc = nix_rq_ena_dis(&inl_dev->dev, inl_rq, enable);\n+\t\tif (rc)\n+\t\t\treturn rc;\n+\t}\n+\treturn 0;\n+}\n+\n void\n roc_nix_inb_mode_set(struct roc_nix *roc_nix, bool use_inl_dev)\n {\ndiff --git a/drivers/common/cnxk/roc_nix_inl.h b/drivers/common/cnxk/roc_nix_inl.h\nindex c7b1817..702ec01 100644\n--- a/drivers/common/cnxk/roc_nix_inl.h\n+++ b/drivers/common/cnxk/roc_nix_inl.h\n@@ -165,7 +165,7 @@ uint32_t __roc_api roc_nix_inl_inb_sa_sz(struct roc_nix *roc_nix,\n uintptr_t __roc_api roc_nix_inl_inb_sa_get(struct roc_nix *roc_nix,\n \t\t\t\t\t bool inl_dev_sa, uint32_t spi);\n void __roc_api roc_nix_inb_mode_set(struct roc_nix *roc_nix, bool use_inl_dev);\n-int __roc_api roc_nix_inl_dev_rq_get(struct roc_nix_rq *rq);\n+int __roc_api roc_nix_inl_dev_rq_get(struct roc_nix_rq *rq, bool ena);\n int __roc_api roc_nix_inl_dev_rq_put(struct roc_nix_rq *rq);\n bool __roc_api roc_nix_inb_is_with_inl_dev(struct roc_nix *roc_nix);\n struct roc_nix_rq *__roc_api roc_nix_inl_dev_rq(struct roc_nix *roc_nix);\n@@ -175,6 +175,7 @@ int __roc_api roc_nix_reassembly_configure(uint32_t max_wait_time,\n \t\t\t\t\t uint16_t max_frags);\n int __roc_api roc_nix_inl_ts_pkind_set(struct roc_nix *roc_nix, bool ts_ena,\n \t\t\t\t bool inb_inl_dev);\n+int __roc_api roc_nix_inl_rq_ena_dis(struct roc_nix *roc_nix, bool ena);\n \n /* NIX Inline Outbound API */\n int __roc_api roc_nix_inl_outb_init(struct roc_nix *roc_nix);\n@@ -189,6 +190,8 @@ int __roc_api roc_nix_inl_cb_unregister(roc_nix_inl_sso_work_cb_t cb,\n \t\t\t\t\tvoid *args);\n int __roc_api roc_nix_inl_outb_soft_exp_poll_switch(struct roc_nix *roc_nix,\n \t\t\t\t\t\t bool poll);\n+uint64_t *__roc_api roc_nix_inl_outb_ring_base_get(struct roc_nix *roc_nix);\n+\n /* NIX Inline/Outbound API */\n enum roc_nix_inl_sa_sync_op {\n \tROC_NIX_INL_SA_OP_FLUSH,\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex a2d99e1..6d43e37 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -90,7 +90,6 @@ INTERNAL {\n \troc_hash_sha512_gen;\n \troc_idev_cpt_get;\n \troc_idev_cpt_set;\n-\troc_nix_inl_outb_ring_base_get;\n \troc_idev_lmt_base_addr_get;\n \troc_idev_npa_maxpools_get;\n \troc_idev_npa_maxpools_set;\n@@ -137,11 +136,13 @@ INTERNAL {\n \troc_nix_get_vwqe_interval;\n \troc_nix_inl_cb_register;\n \troc_nix_inl_cb_unregister;\n+\troc_nix_inl_ctx_write;\n \troc_nix_inl_dev_dump;\n \troc_nix_inl_dev_fini;\n \troc_nix_inl_dev_init;\n \troc_nix_inl_dev_is_probed;\n \troc_nix_inl_dev_lock;\n+\troc_nix_inl_dev_pffunc_get;\n \troc_nix_inl_dev_rq;\n \troc_nix_inl_dev_rq_get;\n \troc_nix_inl_dev_rq_put;\n@@ -163,11 +164,11 @@ INTERNAL {\n \troc_nix_inl_outb_sa_base_get;\n \troc_nix_inl_outb_sso_pffunc_get;\n \troc_nix_inl_outb_is_enabled;\n+\troc_nix_inl_outb_ring_base_get;\n \troc_nix_inl_outb_soft_exp_poll_switch;\n+\troc_nix_inl_rq_ena_dis;\n \troc_nix_inl_sa_sync;\n \troc_nix_inl_ts_pkind_set;\n-\troc_nix_inl_ctx_write;\n-\troc_nix_inl_dev_pffunc_get;\n \troc_nix_inl_outb_cpt_lfs_dump;\n \troc_nix_cpt_ctx_cache_sync;\n \troc_nix_is_lbk;\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c\nindex df20f27..b3af2f8 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.c\n+++ b/drivers/net/cnxk/cnxk_ethdev.c\n@@ -660,7 +660,7 @@ cnxk_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,\n \t\t\t0x0FF00000 | ((uint32_t)RTE_EVENT_TYPE_ETHDEV << 28);\n \n \t\t/* Setup rq reference for inline dev if present */\n-\t\trc = roc_nix_inl_dev_rq_get(rq);\n+\t\trc = roc_nix_inl_dev_rq_get(rq, !!eth_dev->data->dev_started);\n \t\tif (rc)\n \t\t\tgoto free_mem;\n \t}\n@@ -1482,6 +1482,10 @@ cnxk_nix_dev_stop(struct rte_eth_dev *eth_dev)\n \n \troc_nix_inl_outb_soft_exp_poll_switch(&dev->nix, false);\n \n+\t/* Stop inline device RQ first */\n+\tif (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY)\n+\t\troc_nix_inl_rq_ena_dis(&dev->nix, false);\n+\n \t/* Stop rx queues and free up pkts pending */\n \tfor (i = 0; i < eth_dev->data->nb_rx_queues; i++) {\n \t\trc = dev_ops->rx_queue_stop(eth_dev, i);\n@@ -1527,6 +1531,14 @@ cnxk_nix_dev_start(struct rte_eth_dev *eth_dev)\n \t\t\treturn rc;\n \t}\n \n+\tif (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY) {\n+\t\trc = roc_nix_inl_rq_ena_dis(&dev->nix, true);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to enable Inline device RQ, rc=%d\", rc);\n+\t\t\treturn rc;\n+\t\t}\n+\t}\n+\n \t/* Start tx queues */\n \tfor (i = 0; i < eth_dev->data->nb_tx_queues; i++) {\n \t\trc = cnxk_nix_tx_queue_start(eth_dev, i);\n", "prefixes": [ "06/23" ] }{ "id": 114785, "url": "