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GET /api/patches/114775/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 114775,
    "url": "http://patches.dpdk.org/api/patches/114775/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220809184908.24030-13-ndabilpuram@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20220809184908.24030-13-ndabilpuram@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20220809184908.24030-13-ndabilpuram@marvell.com",
    "date": "2022-08-09T18:48:57",
    "name": "[13/23] net/cnxk: use full context IPsec structures in fp",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "ead0c6d47cfe8de7c19fd9bec0d99634d9659c3d",
    "submitter": {
        "id": 1202,
        "url": "http://patches.dpdk.org/api/people/1202/?format=api",
        "name": "Nithin Dabilpuram",
        "email": "ndabilpuram@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "http://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220809184908.24030-13-ndabilpuram@marvell.com/mbox/",
    "series": [
        {
            "id": 24239,
            "url": "http://patches.dpdk.org/api/series/24239/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24239",
            "date": "2022-08-09T18:48:45",
            "name": "[01/23] common/cnxk: fix part value for cn10k",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/24239/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/114775/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/114775/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E281FA04FD;\n\tTue,  9 Aug 2022 20:50:53 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 7C23542C03;\n\tTue,  9 Aug 2022 20:50:38 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id D2D2242BF6\n for <dev@dpdk.org>; Tue,  9 Aug 2022 20:50:35 +0200 (CEST)",
            "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id\n 279CZ8Yh017274\n for <dev@dpdk.org>; Tue, 9 Aug 2022 11:50:35 -0700",
            "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3hudy6ujvq-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 09 Aug 2022 11:50:34 -0700",
            "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Tue, 9 Aug 2022 11:50:32 -0700",
            "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Tue, 9 Aug 2022 11:50:32 -0700",
            "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id E285A5B699B;\n Tue,  9 Aug 2022 11:50:18 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=s1lsA94EGP6zXIcr4Z8pDmApFAsH7mflEiaEL2QZ6X4=;\n b=kOahqPwh+u2cRj/9n95UR+TCawc9fhdkXJZcBcR7AKjpLAA7O5uCYOd8RGOfJa2yVwhd\n yvvNce+AM2MQSX4MV6Z7wUc++siYlmN7O8NiuVuZl5Y9ma8AA2Q+MlzbRg2mafL3YOk+\n Twd0apR/2Sqg9SUBM8bxUETmN3aEYTnOmdvPW1h8g3708ecx8oMZx3mkp/56mrawlukx\n FB5vwCAfIdPF/8uqVFloHZAzTKePldzDb8G/ZEaUAPbIZS6Y+AQg0xlERnqhCQelWlPS\n B7f5cgmy2KVSoarf8t17/YI+YH2wMQIfAtcv7lMoxF4w/3e88UK2ReBvWroWLgiJkxf7 zA==",
        "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>",
        "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Ankur Dwivedi <adwivedi@marvell.com>,\n Anoob Joseph <anoobj@marvell.com>, Tejasree Kondoj <ktejasree@marvell.com>,\n \"Pavan Nikhilesh\" <pbhagavatula@marvell.com>,\n Shijith Thotton <sthotton@marvell.com>",
        "CC": "<jerinj@marvell.com>, <dev@dpdk.org>, Vidya Sagar Velumuri\n <vvelumuri@marvell.com>",
        "Subject": "[PATCH 13/23] net/cnxk: use full context IPsec structures in fp",
        "Date": "Wed, 10 Aug 2022 00:18:57 +0530",
        "Message-ID": "<20220809184908.24030-13-ndabilpuram@marvell.com>",
        "X-Mailer": "git-send-email 2.8.4",
        "In-Reply-To": "<20220809184908.24030-1-ndabilpuram@marvell.com>",
        "References": "<20220809184908.24030-1-ndabilpuram@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-Proofpoint-GUID": "IfVGbvpQcFI4iFo_FeRtLChhp25pbNWt",
        "X-Proofpoint-ORIG-GUID": "IfVGbvpQcFI4iFo_FeRtLChhp25pbNWt",
        "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1\n definitions=2022-08-09_05,2022-08-09_02,2022-06-22_01",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "From: Vidya Sagar Velumuri <vvelumuri@marvell.com>\n\nUse the Full context SA structures and command in IPsec fast path.\nFor inline outbound, populate CPT instruction as per Full context.\nAdd new macros and functions with respect to Full context.\nPopulate wqe ptr in CPT instruction with proper offset from mbuf.\nAdd option to override outbound inline sa iv for debug\nUpdate mbuf len based on IP version in rx post process\npurposes via environment variable. User can set env variable as:\nexport ETH_SEC_IV_OVR=\"0x0, 0x0,...\"\n\nSigned-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n drivers/common/cnxk/cnxk_security.c          |   8 +-\n drivers/common/cnxk/roc_cpt.c                |   9 ++-\n drivers/common/cnxk/roc_cpt.h                |   8 +-\n drivers/common/cnxk/roc_ie_on.h              |   6 ++\n drivers/common/cnxk/roc_nix_inl.c            |  33 +++++---\n drivers/common/cnxk/roc_nix_inl.h            |  46 +++++++++++\n drivers/common/cnxk/roc_nix_inl_dev.c        |   2 +-\n drivers/crypto/cnxk/cn9k_ipsec.c             |   8 +-\n drivers/event/cnxk/cn9k_worker.h             |  48 +++++++-----\n drivers/net/cnxk/cn9k_ethdev.h               |   3 +\n drivers/net/cnxk/cn9k_ethdev_sec.c           | 111 ++++++++++++++++++++++-----\n drivers/net/cnxk/cn9k_rx.h                   |  43 +++++++----\n drivers/net/cnxk/cnxk_ethdev_sec_telemetry.c |  32 +++-----\n 13 files changed, 255 insertions(+), 102 deletions(-)",
    "diff": "diff --git a/drivers/common/cnxk/cnxk_security.c b/drivers/common/cnxk/cnxk_security.c\nindex dca8742..89ac900 100644\n--- a/drivers/common/cnxk/cnxk_security.c\n+++ b/drivers/common/cnxk/cnxk_security.c\n@@ -1242,7 +1242,9 @@ cnxk_on_ipsec_outb_sa_create(struct rte_security_ipsec_xform *ipsec,\n \t\t\tctx_len += sizeof(template->ip4);\n \n \t\t\tip4->version_ihl = RTE_IPV4_VHL_DEF;\n-\t\t\tip4->time_to_live = ipsec->tunnel.ipv4.ttl;\n+\t\t\tip4->time_to_live = ipsec->tunnel.ipv4.ttl ?\n+\t\t\t\t\t\t    ipsec->tunnel.ipv4.ttl :\n+\t\t\t\t\t\t    0x40;\n \t\t\tip4->type_of_service |= (ipsec->tunnel.ipv4.dscp << 2);\n \t\t\tif (ipsec->tunnel.ipv4.df)\n \t\t\t\tfrag_off |= RTE_IPV4_HDR_DF_FLAG;\n@@ -1275,7 +1277,9 @@ cnxk_on_ipsec_outb_sa_create(struct rte_security_ipsec_xform *ipsec,\n \t\t\t\t\t\t ((ipsec->tunnel.ipv6.flabel\n \t\t\t\t\t\t   << RTE_IPV6_HDR_FL_SHIFT) &\n \t\t\t\t\t\t  RTE_IPV6_HDR_FL_MASK));\n-\t\t\tip6->hop_limits = ipsec->tunnel.ipv6.hlimit;\n+\t\t\tip6->hop_limits = ipsec->tunnel.ipv6.hlimit ?\n+\t\t\t\t\t\t  ipsec->tunnel.ipv6.hlimit :\n+\t\t\t\t\t\t  0x40;\n \t\t\tmemcpy(&ip6->src_addr, &ipsec->tunnel.ipv6.src_addr,\n \t\t\t       sizeof(struct in6_addr));\n \t\t\tmemcpy(&ip6->dst_addr, &ipsec->tunnel.ipv6.dst_addr,\ndiff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c\nindex 6f0ee44..8fc072b 100644\n--- a/drivers/common/cnxk/roc_cpt.c\n+++ b/drivers/common/cnxk/roc_cpt.c\n@@ -277,7 +277,7 @@ roc_cpt_inline_ipsec_inb_cfg_read(struct roc_cpt *roc_cpt,\n \n int\n roc_cpt_inline_ipsec_inb_cfg(struct roc_cpt *roc_cpt, uint16_t param1,\n-\t\t\t     uint16_t param2)\n+\t\t\t     uint16_t param2, uint16_t opcode)\n {\n \tstruct cpt *cpt = roc_cpt_to_cpt_priv(roc_cpt);\n \tstruct cpt_rx_inline_lf_cfg_msg *req;\n@@ -292,6 +292,7 @@ roc_cpt_inline_ipsec_inb_cfg(struct roc_cpt *roc_cpt, uint16_t param1,\n \treq->sso_pf_func = idev_sso_pffunc_get();\n \treq->param1 = param1;\n \treq->param2 = param2;\n+\treq->opcode = opcode;\n \n \treturn mbox_process(mbox);\n }\n@@ -998,7 +999,7 @@ roc_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa_dptr, void *sa_cptr,\n }\n \n int\n-roc_on_cpt_ctx_write(struct roc_cpt_lf *lf, uint64_t sa, uint8_t opcode,\n+roc_on_cpt_ctx_write(struct roc_cpt_lf *lf, uint64_t sa, bool inb,\n \t\t     uint16_t ctx_len, uint8_t egrp)\n {\n \tunion cpt_res_s res, *hw_res;\n@@ -1014,7 +1015,9 @@ roc_on_cpt_ctx_write(struct roc_cpt_lf *lf, uint64_t sa, uint8_t opcode,\n \n \thw_res->cn9k.compcode = CPT_COMP_NOT_DONE;\n \n-\tinst.w4.s.opcode_major = opcode;\n+\tinst.w4.s.opcode_major = ROC_IE_ON_MAJOR_OP_WRITE_IPSEC_OUTBOUND;\n+\tif (inb)\n+\t\tinst.w4.s.opcode_major = ROC_IE_ON_MAJOR_OP_WRITE_IPSEC_INBOUND;\n \tinst.w4.s.opcode_minor = ctx_len >> 3;\n \tinst.w4.s.param1 = 0;\n \tinst.w4.s.param2 = 0;\ndiff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h\nindex 6953f2b..9a79998 100644\n--- a/drivers/common/cnxk/roc_cpt.h\n+++ b/drivers/common/cnxk/roc_cpt.h\n@@ -161,7 +161,8 @@ int __roc_api roc_cpt_inline_ipsec_cfg(struct dev *dev, uint8_t slot,\n int __roc_api roc_cpt_inline_ipsec_inb_cfg_read(\n \tstruct roc_cpt *roc_cpt, struct nix_inline_ipsec_cfg *inb_cfg);\n int __roc_api roc_cpt_inline_ipsec_inb_cfg(struct roc_cpt *roc_cpt,\n-\t\t\t\t\t   uint16_t param1, uint16_t param2);\n+\t\t\t\t\t   uint16_t param1, uint16_t param2,\n+\t\t\t\t\t   uint16_t opcode);\n int __roc_api roc_cpt_afs_print(struct roc_cpt *roc_cpt);\n int __roc_api roc_cpt_lfs_print(struct roc_cpt *roc_cpt);\n void __roc_api roc_cpt_iq_disable(struct roc_cpt_lf *lf);\n@@ -173,7 +174,6 @@ void __roc_api roc_cpt_parse_hdr_dump(const struct cpt_parse_hdr_s *cpth);\n int __roc_api roc_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa_dptr,\n \t\t\t\tvoid *sa_cptr, uint16_t sa_len);\n \n-int __roc_api roc_on_cpt_ctx_write(struct roc_cpt_lf *lf, uint64_t sa,\n-\t\t\t\t   uint8_t opcode, uint16_t ctx_len,\n-\t\t\t\t   uint8_t egrp);\n+int __roc_api roc_on_cpt_ctx_write(struct roc_cpt_lf *lf, uint64_t sa, bool inb,\n+\t\t\t\t   uint16_t ctx_len, uint8_t egrp);\n #endif /* _ROC_CPT_H_ */\ndiff --git a/drivers/common/cnxk/roc_ie_on.h b/drivers/common/cnxk/roc_ie_on.h\nindex 2d93cb6..961d5fc 100644\n--- a/drivers/common/cnxk/roc_ie_on.h\n+++ b/drivers/common/cnxk/roc_ie_on.h\n@@ -13,6 +13,12 @@\n #define ROC_IE_ON_MAJOR_OP_PROCESS_OUTBOUND_IPSEC 0x23\n #define ROC_IE_ON_MAJOR_OP_PROCESS_INBOUND_IPSEC  0x24\n \n+#define ROC_IE_ON_INB_MAX_CTX_LEN\t       34UL\n+#define ROC_IE_ON_INB_IKEV2_SINGLE_SA_SUPPORT  (1 << 12)\n+#define ROC_IE_ON_OUTB_MAX_CTX_LEN\t       31UL\n+#define ROC_IE_ON_OUTB_IKEV2_SINGLE_SA_SUPPORT (1 << 9)\n+#define ROC_IE_ON_OUTB_PER_PKT_IV\t       (1 << 11)\n+\n /* Ucode completion codes */\n enum roc_ie_on_ucc_ipsec {\n \tROC_IE_ON_UCC_SUCCESS = 0,\ndiff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c\nindex 507a153..be0b806 100644\n--- a/drivers/common/cnxk/roc_nix_inl.c\n+++ b/drivers/common/cnxk/roc_nix_inl.c\n@@ -8,11 +8,11 @@\n uint32_t soft_exp_consumer_cnt;\n roc_nix_inl_meta_pool_cb_t meta_pool_cb;\n \n-PLT_STATIC_ASSERT(ROC_NIX_INL_ONF_IPSEC_INB_SA_SZ ==\n-\t\t  1UL << ROC_NIX_INL_ONF_IPSEC_INB_SA_SZ_LOG2);\n-PLT_STATIC_ASSERT(ROC_NIX_INL_ONF_IPSEC_INB_SA_SZ == 512);\n-PLT_STATIC_ASSERT(ROC_NIX_INL_ONF_IPSEC_OUTB_SA_SZ ==\n-\t\t  1UL << ROC_NIX_INL_ONF_IPSEC_OUTB_SA_SZ_LOG2);\n+PLT_STATIC_ASSERT(ROC_NIX_INL_ON_IPSEC_INB_SA_SZ ==\n+\t\t  1UL << ROC_NIX_INL_ON_IPSEC_INB_SA_SZ_LOG2);\n+PLT_STATIC_ASSERT(ROC_NIX_INL_ON_IPSEC_INB_SA_SZ == 1024);\n+PLT_STATIC_ASSERT(ROC_NIX_INL_ON_IPSEC_OUTB_SA_SZ ==\n+\t\t  1UL << ROC_NIX_INL_ON_IPSEC_OUTB_SA_SZ_LOG2);\n PLT_STATIC_ASSERT(ROC_NIX_INL_OT_IPSEC_INB_SA_SZ ==\n \t\t  1UL << ROC_NIX_INL_OT_IPSEC_INB_SA_SZ_LOG2);\n PLT_STATIC_ASSERT(ROC_NIX_INL_OT_IPSEC_INB_SA_SZ == 1024);\n@@ -184,7 +184,7 @@ nix_inl_inb_sa_tbl_setup(struct roc_nix *roc_nix)\n \n \t/* CN9K SA size is different */\n \tif (roc_model_is_cn9k())\n-\t\tinb_sa_sz = ROC_NIX_INL_ONF_IPSEC_INB_SA_SZ;\n+\t\tinb_sa_sz = ROC_NIX_INL_ON_IPSEC_INB_SA_SZ;\n \telse\n \t\tinb_sa_sz = ROC_NIX_INL_OT_IPSEC_INB_SA_SZ;\n \n@@ -422,7 +422,9 @@ roc_nix_inl_inb_init(struct roc_nix *roc_nix)\n \tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n \tstruct idev_cfg *idev = idev_get_cfg();\n \tstruct roc_cpt *roc_cpt;\n+\tuint16_t opcode;\n \tuint16_t param1;\n+\tuint16_t param2;\n \tint rc;\n \n \tif (idev == NULL)\n@@ -439,17 +441,23 @@ roc_nix_inl_inb_init(struct roc_nix *roc_nix)\n \t}\n \n \tif (roc_model_is_cn9k()) {\n-\t\tparam1 = ROC_ONF_IPSEC_INB_MAX_L2_SZ;\n+\t\tparam1 = (ROC_ONF_IPSEC_INB_MAX_L2_SZ >> 3) & 0xf;\n+\t\tparam2 = ROC_IE_ON_INB_IKEV2_SINGLE_SA_SUPPORT;\n+\t\topcode =\n+\t\t\t((ROC_IE_ON_INB_MAX_CTX_LEN << 8) |\n+\t\t\t (ROC_IE_ON_MAJOR_OP_PROCESS_INBOUND_IPSEC | (1 << 6)));\n \t} else {\n \t\tunion roc_ot_ipsec_inb_param1 u;\n \n \t\tu.u16 = 0;\n \t\tu.s.esp_trailer_disable = 1;\n \t\tparam1 = u.u16;\n+\t\tparam2 = 0;\n+\t\topcode = (ROC_IE_OT_MAJOR_OP_PROCESS_INBOUND_IPSEC | (1 << 6));\n \t}\n \n \t/* Do onetime Inbound Inline config in CPTPF */\n-\trc = roc_cpt_inline_ipsec_inb_cfg(roc_cpt, param1, 0);\n+\trc = roc_cpt_inline_ipsec_inb_cfg(roc_cpt, param1, param2, opcode);\n \tif (rc && rc != -EEXIST) {\n \t\tplt_err(\"Failed to setup inbound lf, rc=%d\", rc);\n \t\treturn rc;\n@@ -605,7 +613,7 @@ roc_nix_inl_outb_init(struct roc_nix *roc_nix)\n \n \t/* CN9K SA size is different */\n \tif (roc_model_is_cn9k())\n-\t\tsa_sz = ROC_NIX_INL_ONF_IPSEC_OUTB_SA_SZ;\n+\t\tsa_sz = ROC_NIX_INL_ON_IPSEC_OUTB_SA_SZ;\n \telse\n \t\tsa_sz = ROC_NIX_INL_OT_IPSEC_OUTB_SA_SZ;\n \t/* Alloc contiguous memory of outbound SA */\n@@ -1212,7 +1220,12 @@ roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr, void *sa_cptr,\n \n \t/* Nothing much to do on cn9k */\n \tif (roc_model_is_cn9k()) {\n-\t\tplt_atomic_thread_fence(__ATOMIC_ACQ_REL);\n+\t\tnix = roc_nix_to_nix_priv(roc_nix);\n+\t\toutb_lf = nix->cpt_lf_base;\n+\t\trc = roc_on_cpt_ctx_write(outb_lf, (uint64_t)sa_dptr, inb,\n+\t\t\t\t\t  sa_len, ROC_CPT_DFLT_ENG_GRP_SE_IE);\n+\t\tif (rc)\n+\t\t\treturn rc;\n \t\treturn 0;\n \t}\n \ndiff --git a/drivers/common/cnxk/roc_nix_inl.h b/drivers/common/cnxk/roc_nix_inl.h\nindex 9911a48..555cb28 100644\n--- a/drivers/common/cnxk/roc_nix_inl.h\n+++ b/drivers/common/cnxk/roc_nix_inl.h\n@@ -22,6 +22,24 @@\n \t(ROC_NIX_INL_ONF_IPSEC_OUTB_HW_SZ + ROC_NIX_INL_ONF_IPSEC_OUTB_SW_RSVD)\n #define ROC_NIX_INL_ONF_IPSEC_OUTB_SA_SZ_LOG2 8\n \n+/* ON INB HW area */\n+#define ROC_NIX_INL_ON_IPSEC_INB_HW_SZ                                         \\\n+\tPLT_ALIGN(sizeof(struct roc_ie_on_inb_sa), ROC_ALIGN)\n+/* ON INB SW reserved area */\n+#define ROC_NIX_INL_ON_IPSEC_INB_SW_RSVD 640\n+#define ROC_NIX_INL_ON_IPSEC_INB_SA_SZ                                         \\\n+\t(ROC_NIX_INL_ON_IPSEC_INB_HW_SZ + ROC_NIX_INL_ON_IPSEC_INB_SW_RSVD)\n+#define ROC_NIX_INL_ON_IPSEC_INB_SA_SZ_LOG2 10\n+\n+/* ONF OUTB HW area */\n+#define ROC_NIX_INL_ON_IPSEC_OUTB_HW_SZ                                        \\\n+\tPLT_ALIGN(sizeof(struct roc_ie_on_outb_sa), ROC_ALIGN)\n+/* ONF OUTB SW reserved area */\n+#define ROC_NIX_INL_ON_IPSEC_OUTB_SW_RSVD 256\n+#define ROC_NIX_INL_ON_IPSEC_OUTB_SA_SZ                                        \\\n+\t(ROC_NIX_INL_ON_IPSEC_OUTB_HW_SZ + ROC_NIX_INL_ON_IPSEC_OUTB_SW_RSVD)\n+#define ROC_NIX_INL_ON_IPSEC_OUTB_SA_SZ_LOG2 9\n+\n /* OT INB HW area */\n #define ROC_NIX_INL_OT_IPSEC_INB_HW_SZ                                         \\\n \tPLT_ALIGN(sizeof(struct roc_ot_ipsec_inb_sa), ROC_ALIGN)\n@@ -61,6 +79,34 @@\n #define ROC_NIX_INL_REAS_ZOMBIE_LIMIT\t  0xFFF\n #define ROC_NIX_INL_REAS_ZOMBIE_THRESHOLD 10\n \n+static inline struct roc_ie_on_inb_sa *\n+roc_nix_inl_on_ipsec_inb_sa(uintptr_t base, uint64_t idx)\n+{\n+\tuint64_t off = idx << ROC_NIX_INL_ON_IPSEC_INB_SA_SZ_LOG2;\n+\n+\treturn PLT_PTR_ADD(base, off);\n+}\n+\n+static inline struct roc_ie_on_outb_sa *\n+roc_nix_inl_on_ipsec_outb_sa(uintptr_t base, uint64_t idx)\n+{\n+\tuint64_t off = idx << ROC_NIX_INL_ON_IPSEC_OUTB_SA_SZ_LOG2;\n+\n+\treturn PLT_PTR_ADD(base, off);\n+}\n+\n+static inline void *\n+roc_nix_inl_on_ipsec_inb_sa_sw_rsvd(void *sa)\n+{\n+\treturn PLT_PTR_ADD(sa, ROC_NIX_INL_ON_IPSEC_INB_HW_SZ);\n+}\n+\n+static inline void *\n+roc_nix_inl_on_ipsec_outb_sa_sw_rsvd(void *sa)\n+{\n+\treturn PLT_PTR_ADD(sa, ROC_NIX_INL_ON_IPSEC_OUTB_HW_SZ);\n+}\n+\n static inline struct roc_onf_ipsec_inb_sa *\n roc_nix_inl_onf_ipsec_inb_sa(uintptr_t base, uint64_t idx)\n {\ndiff --git a/drivers/common/cnxk/roc_nix_inl_dev.c b/drivers/common/cnxk/roc_nix_inl_dev.c\nindex 1e9b2b9..4fe7b51 100644\n--- a/drivers/common/cnxk/roc_nix_inl_dev.c\n+++ b/drivers/common/cnxk/roc_nix_inl_dev.c\n@@ -394,7 +394,7 @@ nix_inl_nix_setup(struct nix_inl_dev *inl_dev)\n \n \t/* CN9K SA is different */\n \tif (roc_model_is_cn9k())\n-\t\tinb_sa_sz = ROC_NIX_INL_ONF_IPSEC_INB_SA_SZ;\n+\t\tinb_sa_sz = ROC_NIX_INL_ON_IPSEC_INB_SA_SZ;\n \telse\n \t\tinb_sa_sz = ROC_NIX_INL_OT_IPSEC_INB_SA_SZ;\n \ndiff --git a/drivers/crypto/cnxk/cn9k_ipsec.c b/drivers/crypto/cnxk/cn9k_ipsec.c\nindex 78c181b..8491558 100644\n--- a/drivers/crypto/cnxk/cn9k_ipsec.c\n+++ b/drivers/crypto/cnxk/cn9k_ipsec.c\n@@ -29,7 +29,6 @@ cn9k_ipsec_outb_sa_create(struct cnxk_cpt_qp *qp,\n \tunion cpt_inst_w4 w4;\n \tunion cpt_inst_w7 w7;\n \tsize_t ctx_len;\n-\tuint8_t opcode;\n \tuint8_t egrp;\n \tint ret;\n \n@@ -80,10 +79,9 @@ cn9k_ipsec_outb_sa_create(struct cnxk_cpt_qp *qp,\n \t\treturn ret;\n \n \tctx_len = ret;\n-\topcode = ROC_IE_ON_MAJOR_OP_WRITE_IPSEC_OUTBOUND;\n \tegrp = roc_cpt->eng_grp[CPT_ENG_TYPE_IE];\n \tret = roc_on_cpt_ctx_write(&qp->lf, rte_mempool_virt2iova(&sa->out_sa),\n-\t\t\t\t   opcode, ctx_len, egrp);\n+\t\t\t\t   false, ctx_len, egrp);\n \n \tif (ret)\n \t\treturn ret;\n@@ -133,7 +131,6 @@ cn9k_ipsec_inb_sa_create(struct cnxk_cpt_qp *qp,\n \tunion cpt_inst_w4 w4;\n \tunion cpt_inst_w7 w7;\n \tsize_t ctx_len = 0;\n-\tuint8_t opcode;\n \tuint8_t egrp;\n \tint ret = 0;\n \n@@ -172,10 +169,9 @@ cn9k_ipsec_inb_sa_create(struct cnxk_cpt_qp *qp,\n \t\tsa->esn_en = 1;\n \n \tctx_len = ret;\n-\topcode = ROC_IE_ON_MAJOR_OP_WRITE_IPSEC_INBOUND;\n \tegrp = roc_cpt->eng_grp[CPT_ENG_TYPE_IE];\n \tret = roc_on_cpt_ctx_write(&qp->lf, rte_mempool_virt2iova(&sa->in_sa),\n-\t\t\t\t   opcode, ctx_len, egrp);\n+\t\t\t\t   true, ctx_len, egrp);\n \tif (ret)\n \t\treturn ret;\n \ndiff --git a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_worker.h\nindex b087255..881861f 100644\n--- a/drivers/event/cnxk/cn9k_worker.h\n+++ b/drivers/event/cnxk/cn9k_worker.h\n@@ -626,12 +626,14 @@ cn9k_sso_hws_xmit_sec_one(const struct cn9k_eth_txq *txq, uint64_t base,\n \tstruct nix_send_hdr_s *send_hdr;\n \tuint64_t sa_base = txq->sa_base;\n \tuint32_t pkt_len, dlen_adj, rlen;\n+\tstruct roc_ie_on_outb_hdr *hdr;\n \tuint64x2_t cmd01, cmd23;\n \tuint64_t lmt_status, sa;\n \tunion nix_send_sg_s *sg;\n+\tuint32_t esn_lo, esn_hi;\n \tuintptr_t dptr, nixtx;\n \tuint64_t ucode_cmd[4];\n-\tuint64_t esn, *iv;\n+\tuint64_t esn;\n \tuint8_t l2_len;\n \n \tmdata.u64 = *rte_security_dynfield(m);\n@@ -670,14 +672,19 @@ cn9k_sso_hws_xmit_sec_one(const struct cn9k_eth_txq *txq, uint64_t base,\n \n \t/* Load opcode and cptr already prepared at pkt metadata set */\n \tpkt_len -= l2_len;\n-\tpkt_len += sizeof(struct roc_onf_ipsec_outb_hdr) +\n-\t\t    ROC_ONF_IPSEC_OUTB_MAX_L2_INFO_SZ;\n+\tpkt_len += (sizeof(struct roc_ie_on_outb_hdr) - ROC_IE_ON_MAX_IV_LEN) +\n+\t\t   ROC_ONF_IPSEC_OUTB_MAX_L2_INFO_SZ;\n \tsa_base &= ~(ROC_NIX_INL_SA_BASE_ALIGN - 1);\n \n-\tsa = (uintptr_t)roc_nix_inl_onf_ipsec_outb_sa(sa_base, mdata.sa_idx);\n+\tsa = (uintptr_t)roc_nix_inl_on_ipsec_outb_sa(sa_base, mdata.sa_idx);\n \tucode_cmd[3] = (ROC_CPT_DFLT_ENG_GRP_SE_IE << 61 | sa);\n-\tucode_cmd[0] = (ROC_IE_ONF_MAJOR_OP_PROCESS_OUTBOUND_IPSEC << 48 |\n-\t\t\t0x40UL << 48 | pkt_len);\n+\tucode_cmd[0] = (((ROC_IE_ON_OUTB_MAX_CTX_LEN << 8) |\n+\t\t\t ROC_IE_ON_MAJOR_OP_PROCESS_OUTBOUND_IPSEC)\n+\t\t\t\t<< 48 |\n+\t\t\t(ROC_IE_ON_OUTB_IKEV2_SINGLE_SA_SUPPORT |\n+\t\t\t (ROC_ONF_IPSEC_OUTB_MAX_L2_INFO_SZ >>\n+\t\t\t  3)) << 32 |\n+\t\t\tpkt_len);\n \n \t/* CPT Word 0 and Word 1 */\n \tcmd01 = vdupq_n_u64((nixtx + 16) | (cn9k_nix_tx_ext_subs(flags) + 1));\n@@ -687,35 +694,40 @@ cn9k_sso_hws_xmit_sec_one(const struct cn9k_eth_txq *txq, uint64_t base,\n \t/* CPT word 2 and 3 */\n \tcmd23 = vdupq_n_u64(0);\n \tcmd23 = vsetq_lane_u64((((uint64_t)RTE_EVENT_TYPE_CPU << 28) |\n-\t\t\t\tCNXK_ETHDEV_SEC_OUTB_EV_SUB << 20), cmd23, 0);\n-\tcmd23 = vsetq_lane_u64((uintptr_t)m | 1, cmd23, 1);\n+\t\t\t\tCNXK_ETHDEV_SEC_OUTB_EV_SUB << 20),\n+\t\t\t       cmd23, 0);\n+\tcmd23 = vsetq_lane_u64(((uintptr_t)m + sizeof(struct rte_mbuf)) | 1,\n+\t\t\t       cmd23, 1);\n \n \tdptr += l2_len - ROC_ONF_IPSEC_OUTB_MAX_L2_INFO_SZ -\n-\t\tsizeof(struct roc_onf_ipsec_outb_hdr);\n+\t\t(sizeof(struct roc_ie_on_outb_hdr) - ROC_IE_ON_MAX_IV_LEN);\n \tucode_cmd[1] = dptr;\n \tucode_cmd[2] = dptr;\n \n-\t/* Update IV to zero and l2 sz */\n-\t*(uint16_t *)(dptr + sizeof(struct roc_onf_ipsec_outb_hdr)) =\n+\t/* Update l2 sz */\n+\t*(uint16_t *)(dptr + (sizeof(struct roc_ie_on_outb_hdr) -\n+\t\t\t      ROC_IE_ON_MAX_IV_LEN)) =\n \t\trte_cpu_to_be_16(ROC_ONF_IPSEC_OUTB_MAX_L2_INFO_SZ);\n-\tiv = (uint64_t *)(dptr + 8);\n-\tiv[0] = 0;\n-\tiv[1] = 0;\n \n \t/* Head wait if needed */\n \tif (base)\n \t\troc_sso_hws_head_wait(base);\n \n \t/* ESN */\n-\toutb_priv = roc_nix_inl_onf_ipsec_outb_sa_sw_rsvd((void *)sa);\n+\toutb_priv = roc_nix_inl_on_ipsec_outb_sa_sw_rsvd((void *)sa);\n \tesn = outb_priv->esn;\n \toutb_priv->esn = esn + 1;\n \n \tucode_cmd[0] |= (esn >> 32) << 16;\n-\tesn = rte_cpu_to_be_32(esn & (BIT_ULL(32) - 1));\n+\tesn_lo = rte_cpu_to_be_32(esn & (BIT_ULL(32) - 1));\n+\tesn_hi = rte_cpu_to_be_32(esn >> 32);\n \n-\t/* Update ESN and IPID and IV */\n-\t*(uint64_t *)dptr = esn << 32 | esn;\n+\t/* Update ESN, IPID and IV */\n+\thdr = (struct roc_ie_on_outb_hdr *)dptr;\n+\thdr->ip_id = esn_lo;\n+\thdr->seq = esn_lo;\n+\thdr->esn = esn_hi;\n+\thdr->df_tos = 0;\n \n \trte_io_wmb();\n \tcn9k_sso_txq_fc_wait(txq);\ndiff --git a/drivers/net/cnxk/cn9k_ethdev.h b/drivers/net/cnxk/cn9k_ethdev.h\nindex 449729f..472a4b0 100644\n--- a/drivers/net/cnxk/cn9k_ethdev.h\n+++ b/drivers/net/cnxk/cn9k_ethdev.h\n@@ -79,6 +79,9 @@ struct cn9k_outb_priv_data {\n \n \t/* Back pointer to eth sec session */\n \tstruct cnxk_eth_sec_sess *eth_sec;\n+\n+\t/* IV in DBG mode */\n+\tuint8_t iv_dbg[ROC_IE_ON_MAX_IV_LEN];\n };\n \n struct cn9k_sec_sess_priv {\ndiff --git a/drivers/net/cnxk/cn9k_ethdev_sec.c b/drivers/net/cnxk/cn9k_ethdev_sec.c\nindex 4dd0b61..88b95fb 100644\n--- a/drivers/net/cnxk/cn9k_ethdev_sec.c\n+++ b/drivers/net/cnxk/cn9k_ethdev_sec.c\n@@ -134,6 +134,37 @@ ar_window_init(struct cn9k_inb_priv_data *inb_priv)\n \treturn 0;\n }\n \n+static void\n+outb_dbg_iv_update(struct roc_ie_on_common_sa *common_sa, const char *__iv_str)\n+{\n+\tuint8_t *iv_dbg = common_sa->iv.aes_iv;\n+\tchar *iv_str = strdup(__iv_str);\n+\tchar *iv_b = NULL;\n+\tchar *save;\n+\tint i, iv_len = ROC_IE_ON_MAX_IV_LEN;\n+\n+\tif (!iv_str)\n+\t\treturn;\n+\n+\tif (common_sa->ctl.enc_type == ROC_IE_OT_SA_ENC_AES_GCM ||\n+\t    common_sa->ctl.enc_type == ROC_IE_OT_SA_ENC_AES_CTR ||\n+\t    common_sa->ctl.enc_type == ROC_IE_OT_SA_ENC_AES_CCM ||\n+\t    common_sa->ctl.auth_type == ROC_IE_OT_SA_AUTH_AES_GMAC) {\n+\t\tiv_dbg = common_sa->iv.gcm.iv;\n+\t\tiv_len = 8;\n+\t}\n+\n+\tmemset(iv_dbg, 0, iv_len);\n+\tfor (i = 0; i < iv_len; i++) {\n+\t\tiv_b = strtok_r(i ? NULL : iv_str, \",\", &save);\n+\t\tif (!iv_b)\n+\t\t\tbreak;\n+\t\tiv_dbg[i] = strtoul(iv_b, NULL, 0);\n+\t}\n+\n+\tfree(iv_str);\n+}\n+\n static int\n cn9k_eth_sec_session_create(void *device,\n \t\t\t    struct rte_security_session_conf *conf,\n@@ -150,6 +181,7 @@ cn9k_eth_sec_session_create(void *device,\n \trte_spinlock_t *lock;\n \tchar tbuf[128] = {0};\n \tbool inbound;\n+\tint ctx_len;\n \tint rc = 0;\n \n \tif (conf->action_type != RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL)\n@@ -183,21 +215,26 @@ cn9k_eth_sec_session_create(void *device,\n \tmemset(eth_sec, 0, sizeof(struct cnxk_eth_sec_sess));\n \tsess_priv.u64 = 0;\n \n+\tif (!dev->outb.lf_base) {\n+\t\tplt_err(\"Could not allocate security session private data\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n \tif (inbound) {\n \t\tstruct cn9k_inb_priv_data *inb_priv;\n-\t\tstruct roc_onf_ipsec_inb_sa *inb_sa;\n+\t\tstruct roc_ie_on_inb_sa *inb_sa;\n \t\tuint32_t spi_mask;\n \n \t\tPLT_STATIC_ASSERT(sizeof(struct cn9k_inb_priv_data) <\n-\t\t\t\t  ROC_NIX_INL_ONF_IPSEC_INB_SW_RSVD);\n+\t\t\t\t  ROC_NIX_INL_ON_IPSEC_INB_SW_RSVD);\n \n \t\tspi_mask = roc_nix_inl_inb_spi_range(nix, false, NULL, NULL);\n \n \t\t/* Get Inbound SA from NIX_RX_IPSEC_SA_BASE. Assume no inline\n \t\t * device always for CN9K.\n \t\t */\n-\t\tinb_sa = (struct roc_onf_ipsec_inb_sa *)\n-\t\t\t roc_nix_inl_inb_sa_get(nix, false, ipsec->spi);\n+\t\tinb_sa = (struct roc_ie_on_inb_sa *)roc_nix_inl_inb_sa_get(\n+\t\t\tnix, false, ipsec->spi);\n \t\tif (!inb_sa) {\n \t\t\tsnprintf(tbuf, sizeof(tbuf),\n \t\t\t\t \"Failed to create ingress sa\");\n@@ -206,7 +243,7 @@ cn9k_eth_sec_session_create(void *device,\n \t\t}\n \n \t\t/* Check if SA is already in use */\n-\t\tif (inb_sa->ctl.valid) {\n+\t\tif (inb_sa->common_sa.ctl.valid) {\n \t\t\tsnprintf(tbuf, sizeof(tbuf),\n \t\t\t\t \"Inbound SA with SPI %u already in use\",\n \t\t\t\t ipsec->spi);\n@@ -214,17 +251,26 @@ cn9k_eth_sec_session_create(void *device,\n \t\t\tgoto mempool_put;\n \t\t}\n \n-\t\tmemset(inb_sa, 0, sizeof(struct roc_onf_ipsec_inb_sa));\n+\t\tmemset(inb_sa, 0, sizeof(struct roc_ie_on_inb_sa));\n \n \t\t/* Fill inbound sa params */\n-\t\trc = cnxk_onf_ipsec_inb_sa_fill(inb_sa, ipsec, crypto);\n-\t\tif (rc) {\n+\t\trc = cnxk_on_ipsec_inb_sa_create(ipsec, crypto, inb_sa);\n+\t\tif (rc < 0) {\n \t\t\tsnprintf(tbuf, sizeof(tbuf),\n \t\t\t\t \"Failed to init inbound sa, rc=%d\", rc);\n \t\t\tgoto mempool_put;\n \t\t}\n \n-\t\tinb_priv = roc_nix_inl_onf_ipsec_inb_sa_sw_rsvd(inb_sa);\n+\t\tctx_len = rc;\n+\t\trc = roc_nix_inl_ctx_write(&dev->nix, inb_sa, inb_sa, inbound,\n+\t\t\t\t\t   ctx_len);\n+\t\tif (rc) {\n+\t\t\tsnprintf(tbuf, sizeof(tbuf),\n+\t\t\t\t \"Failed to create inbound sa, rc=%d\", rc);\n+\t\t\tgoto mempool_put;\n+\t\t}\n+\n+\t\tinb_priv = roc_nix_inl_on_ipsec_inb_sa_sw_rsvd(inb_sa);\n \t\t/* Back pointer to get eth_sec */\n \t\tinb_priv->eth_sec = eth_sec;\n \n@@ -253,27 +299,38 @@ cn9k_eth_sec_session_create(void *device,\n \t\tdev->inb.nb_sess++;\n \t} else {\n \t\tstruct cn9k_outb_priv_data *outb_priv;\n-\t\tstruct roc_onf_ipsec_outb_sa *outb_sa;\n \t\tuintptr_t sa_base = dev->outb.sa_base;\n \t\tstruct cnxk_ipsec_outb_rlens *rlens;\n+\t\tstruct roc_ie_on_outb_sa *outb_sa;\n+\t\tconst char *iv_str;\n \t\tuint32_t sa_idx;\n \n \t\tPLT_STATIC_ASSERT(sizeof(struct cn9k_outb_priv_data) <\n-\t\t\t\t  ROC_NIX_INL_ONF_IPSEC_OUTB_SW_RSVD);\n+\t\t\t\t  ROC_NIX_INL_ON_IPSEC_OUTB_SW_RSVD);\n \n \t\t/* Alloc an sa index */\n \t\trc = cnxk_eth_outb_sa_idx_get(dev, &sa_idx, 0);\n \t\tif (rc)\n \t\t\tgoto mempool_put;\n \n-\t\toutb_sa = roc_nix_inl_onf_ipsec_outb_sa(sa_base, sa_idx);\n-\t\toutb_priv = roc_nix_inl_onf_ipsec_outb_sa_sw_rsvd(outb_sa);\n+\t\toutb_sa = roc_nix_inl_on_ipsec_outb_sa(sa_base, sa_idx);\n+\t\toutb_priv = roc_nix_inl_on_ipsec_outb_sa_sw_rsvd(outb_sa);\n \t\trlens = &outb_priv->rlens;\n \n-\t\tmemset(outb_sa, 0, sizeof(struct roc_onf_ipsec_outb_sa));\n+\t\tmemset(outb_sa, 0, sizeof(struct roc_ie_on_outb_sa));\n \n \t\t/* Fill outbound sa params */\n-\t\trc = cnxk_onf_ipsec_outb_sa_fill(outb_sa, ipsec, crypto);\n+\t\trc = cnxk_on_ipsec_outb_sa_create(ipsec, crypto, outb_sa);\n+\t\tif (rc < 0) {\n+\t\t\tsnprintf(tbuf, sizeof(tbuf),\n+\t\t\t\t \"Failed to init outbound sa, rc=%d\", rc);\n+\t\t\trc |= cnxk_eth_outb_sa_idx_put(dev, sa_idx);\n+\t\t\tgoto mempool_put;\n+\t\t}\n+\n+\t\tctx_len = rc;\n+\t\trc = roc_nix_inl_ctx_write(&dev->nix, outb_sa, outb_sa, inbound,\n+\t\t\t\t\t   ctx_len);\n \t\tif (rc) {\n \t\t\tsnprintf(tbuf, sizeof(tbuf),\n \t\t\t\t \"Failed to init outbound sa, rc=%d\", rc);\n@@ -281,6 +338,18 @@ cn9k_eth_sec_session_create(void *device,\n \t\t\tgoto mempool_put;\n \t\t}\n \n+\t\t/* Always enable explicit IV.\n+\t\t * Copy the IV from application only when iv_gen_disable flag is\n+\t\t * set\n+\t\t */\n+\t\toutb_sa->common_sa.ctl.explicit_iv_en = 1;\n+\n+\t\tif (conf->ipsec.options.iv_gen_disable == 1) {\n+\t\t\tiv_str = getenv(\"ETH_SEC_IV_OVR\");\n+\t\t\tif (iv_str)\n+\t\t\t\toutb_dbg_iv_update(&outb_sa->common_sa, iv_str);\n+\t\t}\n+\n \t\t/* Save userdata */\n \t\toutb_priv->userdata = conf->userdata;\n \t\toutb_priv->sa_idx = sa_idx;\n@@ -288,8 +357,8 @@ cn9k_eth_sec_session_create(void *device,\n \t\t/* Start sequence number with 1 */\n \t\toutb_priv->seq = 1;\n \n-\t\tmemcpy(&outb_priv->nonce, outb_sa->nonce, 4);\n-\t\tif (outb_sa->ctl.enc_type == ROC_IE_ON_SA_ENC_AES_GCM)\n+\t\tmemcpy(&outb_priv->nonce, outb_sa->common_sa.iv.gcm.nonce, 4);\n+\t\tif (outb_sa->common_sa.ctl.enc_type == ROC_IE_ON_SA_ENC_AES_GCM)\n \t\t\toutb_priv->copy_salt = 1;\n \n \t\t/* Save rlen info */\n@@ -337,9 +406,9 @@ cn9k_eth_sec_session_destroy(void *device, struct rte_security_session *sess)\n {\n \tstruct rte_eth_dev *eth_dev = (struct rte_eth_dev *)device;\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n-\tstruct roc_onf_ipsec_outb_sa *outb_sa;\n-\tstruct roc_onf_ipsec_inb_sa *inb_sa;\n \tstruct cnxk_eth_sec_sess *eth_sec;\n+\tstruct roc_ie_on_outb_sa *outb_sa;\n+\tstruct roc_ie_on_inb_sa *inb_sa;\n \tstruct rte_mempool *mp;\n \trte_spinlock_t *lock;\n \n@@ -353,14 +422,14 @@ cn9k_eth_sec_session_destroy(void *device, struct rte_security_session *sess)\n \tif (eth_sec->inb) {\n \t\tinb_sa = eth_sec->sa;\n \t\t/* Disable SA */\n-\t\tinb_sa->ctl.valid = 0;\n+\t\tinb_sa->common_sa.ctl.valid = 0;\n \n \t\tTAILQ_REMOVE(&dev->inb.list, eth_sec, entry);\n \t\tdev->inb.nb_sess--;\n \t} else {\n \t\toutb_sa = eth_sec->sa;\n \t\t/* Disable SA */\n-\t\toutb_sa->ctl.valid = 0;\n+\t\toutb_sa->common_sa.ctl.valid = 0;\n \n \t\t/* Release Outbound SA index */\n \t\tcnxk_eth_outb_sa_idx_put(dev, eth_sec->sa_idx);\ndiff --git a/drivers/net/cnxk/cn9k_rx.h b/drivers/net/cnxk/cn9k_rx.h\nindex 25a4927..1a9f920 100644\n--- a/drivers/net/cnxk/cn9k_rx.h\n+++ b/drivers/net/cnxk/cn9k_rx.h\n@@ -171,7 +171,7 @@ nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf,\n }\n \n static inline int\n-ipsec_antireplay_check(struct roc_onf_ipsec_inb_sa *sa,\n+ipsec_antireplay_check(struct roc_ie_on_inb_sa *sa,\n \t\t       struct cn9k_inb_priv_data *priv, uintptr_t data,\n \t\t       uint32_t win_sz)\n {\n@@ -183,7 +183,7 @@ ipsec_antireplay_check(struct roc_onf_ipsec_inb_sa *sa,\n \tuint8_t esn;\n \tint rc;\n \n-\tesn = sa->ctl.esn_en;\n+\tesn = sa->common_sa.ctl.esn_en;\n \tseql = rte_be_to_cpu_32(*((uint32_t *)(data + IPSEC_SQ_LO_IDX)));\n \n \tif (!esn) {\n@@ -200,11 +200,12 @@ ipsec_antireplay_check(struct roc_onf_ipsec_inb_sa *sa,\n \trte_spinlock_lock(&ar->lock);\n \trc = cnxk_on_anti_replay_check(seq, ar, win_sz);\n \tif (esn && !rc) {\n-\t\tseq_in_sa = ((uint64_t)rte_be_to_cpu_32(sa->esn_hi) << 32) |\n-\t\t\t    rte_be_to_cpu_32(sa->esn_low);\n+\t\tseq_in_sa = ((uint64_t)rte_be_to_cpu_32(sa->common_sa.seq_t.th)\n+\t\t\t     << 32) |\n+\t\t\t    rte_be_to_cpu_32(sa->common_sa.seq_t.tl);\n \t\tif (seq > seq_in_sa) {\n-\t\t\tsa->esn_low = rte_cpu_to_be_32(seql);\n-\t\t\tsa->esn_hi = rte_cpu_to_be_32(seqh);\n+\t\t\tsa->common_sa.seq_t.tl = rte_cpu_to_be_32(seql);\n+\t\t\tsa->common_sa.seq_t.th = rte_cpu_to_be_32(seqh);\n \t\t}\n \t}\n \trte_spinlock_unlock(&ar->lock);\n@@ -266,9 +267,10 @@ nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m,\n \tconst union nix_rx_parse_u *rx =\n \t\t(const union nix_rx_parse_u *)((const uint64_t *)cq + 1);\n \tstruct cn9k_inb_priv_data *sa_priv;\n-\tstruct roc_onf_ipsec_inb_sa *sa;\n+\tstruct roc_ie_on_inb_sa *sa;\n \tuint8_t lcptr = rx->lcptr;\n-\tstruct rte_ipv4_hdr *ipv4;\n+\tstruct rte_ipv4_hdr *ip;\n+\tstruct rte_ipv6_hdr *ip6;\n \tuint16_t data_off, res;\n \tuint32_t spi, win_sz;\n \tuint32_t spi_mask;\n@@ -279,6 +281,7 @@ nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m,\n \tres = *(uint64_t *)(res_sg0 + 8);\n \tdata_off = *rearm_val & (BIT_ULL(16) - 1);\n \tdata = (uintptr_t)m->buf_addr;\n+\n \tdata += data_off;\n \n \trte_prefetch0((void *)data);\n@@ -294,10 +297,10 @@ nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m,\n \tsa_w = sa_base & (ROC_NIX_INL_SA_BASE_ALIGN - 1);\n \tsa_base &= ~(ROC_NIX_INL_SA_BASE_ALIGN - 1);\n \tspi_mask = (1ULL << sa_w) - 1;\n-\tsa = roc_nix_inl_onf_ipsec_inb_sa(sa_base, spi & spi_mask);\n+\tsa = roc_nix_inl_on_ipsec_inb_sa(sa_base, spi & spi_mask);\n \n \t/* Update dynamic field with userdata */\n-\tsa_priv = roc_nix_inl_onf_ipsec_inb_sa_sw_rsvd(sa);\n+\tsa_priv = roc_nix_inl_on_ipsec_inb_sa_sw_rsvd(sa);\n \tdw = *(__uint128_t *)sa_priv;\n \t*rte_security_dynfield(m) = (uint64_t)dw;\n \n@@ -309,16 +312,26 @@ nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m,\n \t}\n \n \t/* Get total length from IPv4 header. We can assume only IPv4 */\n-\tipv4 = (struct rte_ipv4_hdr *)(data + ROC_ONF_IPSEC_INB_SPI_SEQ_SZ +\n-\t\t\t\t       ROC_ONF_IPSEC_INB_MAX_L2_SZ);\n+\tip = (struct rte_ipv4_hdr *)(data + ROC_ONF_IPSEC_INB_SPI_SEQ_SZ +\n+\t\t\t\t     ROC_ONF_IPSEC_INB_MAX_L2_SZ);\n+\n+\tif (((ip->version_ihl & 0xf0) >> RTE_IPV4_IHL_MULTIPLIER) ==\n+\t    IPVERSION) {\n+\t\t*len = rte_be_to_cpu_16(ip->total_length) + lcptr;\n+\t} else {\n+\t\tPLT_ASSERT(((ip->version_ihl & 0xf0) >>\n+\t\t\t    RTE_IPV4_IHL_MULTIPLIER) == 6);\n+\t\tip6 = (struct rte_ipv6_hdr *)ip;\n+\t\t*len = rte_be_to_cpu_16(ip6->payload_len) +\n+\t\t       sizeof(struct rte_ipv6_hdr) + lcptr;\n+\t}\n \n \t/* Update data offset */\n-\tdata_off += (ROC_ONF_IPSEC_INB_SPI_SEQ_SZ +\n-\t\t     ROC_ONF_IPSEC_INB_MAX_L2_SZ);\n+\tdata_off +=\n+\t\t(ROC_ONF_IPSEC_INB_SPI_SEQ_SZ + ROC_ONF_IPSEC_INB_MAX_L2_SZ);\n \t*rearm_val = *rearm_val & ~(BIT_ULL(16) - 1);\n \t*rearm_val |= data_off;\n \n-\t*len = rte_be_to_cpu_16(ipv4->total_length) + lcptr;\n \treturn RTE_MBUF_F_RX_SEC_OFFLOAD;\n }\n \ndiff --git a/drivers/net/cnxk/cnxk_ethdev_sec_telemetry.c b/drivers/net/cnxk/cnxk_ethdev_sec_telemetry.c\nindex bfdbd1e..dd8b7a5 100644\n--- a/drivers/net/cnxk/cnxk_ethdev_sec_telemetry.c\n+++ b/drivers/net/cnxk/cnxk_ethdev_sec_telemetry.c\n@@ -14,59 +14,47 @@\n static int\n copy_outb_sa_9k(struct rte_tel_data *d, uint32_t i, void *sa)\n {\n-\tstruct roc_onf_ipsec_outb_sa *out_sa;\n \tunion {\n-\t\tstruct roc_ie_onf_sa_ctl ctl;\n+\t\tstruct roc_ie_on_sa_ctl ctl;\n \t\tuint64_t u64;\n \t} w0;\n+\tstruct roc_ie_on_outb_sa *out_sa;\n \tchar strw0[W0_MAXLEN];\n \tchar str[STR_MAXLEN];\n \n-\tout_sa = (struct roc_onf_ipsec_outb_sa *)sa;\n-\tw0.ctl = out_sa->ctl;\n+\tout_sa = (struct roc_ie_on_outb_sa *)sa;\n+\tw0.ctl = out_sa->common_sa.ctl;\n \n \tsnprintf(str, sizeof(str), \"outsa_w0_%u\", i);\n \tsnprintf(strw0, sizeof(strw0), \"%\" PRIu64, w0.u64);\n \trte_tel_data_add_dict_string(d, str, strw0);\n \n-\tsnprintf(str, sizeof(str), \"outsa_src_%u\", i);\n-\trte_tel_data_add_dict_u64(d, str, out_sa->udp_src);\n-\n-\tsnprintf(str, sizeof(str), \"outsa_dst_%u\", i);\n-\trte_tel_data_add_dict_u64(d, str, out_sa->udp_dst);\n-\n-\tsnprintf(str, sizeof(str), \"outsa_isrc_%u\", i);\n-\trte_tel_data_add_dict_u64(d, str, out_sa->ip_src);\n-\n-\tsnprintf(str, sizeof(str), \"outsa_idst_%u\", i);\n-\trte_tel_data_add_dict_u64(d, str, out_sa->ip_dst);\n-\n \treturn 0;\n }\n \n static int\n copy_inb_sa_9k(struct rte_tel_data *d, uint32_t i, void *sa)\n {\n-\tstruct roc_onf_ipsec_inb_sa *in_sa;\n \tunion {\n-\t\tstruct roc_ie_onf_sa_ctl ctl;\n+\t\tstruct roc_ie_on_sa_ctl ctl;\n \t\tuint64_t u64;\n \t} w0;\n+\tstruct roc_ie_on_inb_sa *in_sa;\n \tchar strw0[W0_MAXLEN];\n \tchar str[STR_MAXLEN];\n \n-\tin_sa = (struct roc_onf_ipsec_inb_sa *)sa;\n-\tw0.ctl = in_sa->ctl;\n+\tin_sa = (struct roc_ie_on_inb_sa *)sa;\n+\tw0.ctl = in_sa->common_sa.ctl;\n \n \tsnprintf(str, sizeof(str), \"insa_w0_%u\", i);\n \tsnprintf(strw0, sizeof(strw0), \"%\" PRIu64, w0.u64);\n \trte_tel_data_add_dict_string(d, str, strw0);\n \n \tsnprintf(str, sizeof(str), \"insa_esnh_%u\", i);\n-\trte_tel_data_add_dict_u64(d, str, in_sa->esn_hi);\n+\trte_tel_data_add_dict_u64(d, str, in_sa->common_sa.seq_t.th);\n \n \tsnprintf(str, sizeof(str), \"insa_esnl_%u\", i);\n-\trte_tel_data_add_dict_u64(d, str, in_sa->esn_low);\n+\trte_tel_data_add_dict_u64(d, str, in_sa->common_sa.seq_t.tl);\n \n \treturn 0;\n }\n",
    "prefixes": [
        "13/23"
    ]
}