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GET /api/patches/114568/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 114568,
    "url": "http://patches.dpdk.org/api/patches/114568/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220803113104.1184059-3-junfeng.guo@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20220803113104.1184059-3-junfeng.guo@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20220803113104.1184059-3-junfeng.guo@intel.com",
    "date": "2022-08-03T11:30:53",
    "name": "[02/13] net/idpf/base: add logs and OS specific implementation",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "d8e95b7499577be262a3f618c0a88f8617ebf560",
    "submitter": {
        "id": 1785,
        "url": "http://patches.dpdk.org/api/people/1785/?format=api",
        "name": "Junfeng Guo",
        "email": "junfeng.guo@intel.com"
    },
    "delegate": {
        "id": 3961,
        "url": "http://patches.dpdk.org/api/users/3961/?format=api",
        "username": "arybchenko",
        "first_name": "Andrew",
        "last_name": "Rybchenko",
        "email": "andrew.rybchenko@oktetlabs.ru"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220803113104.1184059-3-junfeng.guo@intel.com/mbox/",
    "series": [
        {
            "id": 24188,
            "url": "http://patches.dpdk.org/api/series/24188/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24188",
            "date": "2022-08-03T11:30:51",
            "name": "add support for idpf PMD in DPDK",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/24188/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/114568/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/114568/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 248AAA00C5;\n\tWed,  3 Aug 2022 13:31:38 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A7F1242BAC;\n\tWed,  3 Aug 2022 13:31:23 +0200 (CEST)",
            "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n by mails.dpdk.org (Postfix) with ESMTP id AD49E4281A\n for <dev@dpdk.org>; Wed,  3 Aug 2022 13:31:21 +0200 (CEST)",
            "from fmsmga003.fm.intel.com ([10.253.24.29])\n by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 03 Aug 2022 04:31:21 -0700",
            "from dpdk-jf-ntb-v2.sh.intel.com ([10.67.118.246])\n by FMSMGA003.fm.intel.com with ESMTP; 03 Aug 2022 04:31:19 -0700"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1659526281; x=1691062281;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=MJ9pFotDN6BINFOCVfv4a44Xue2XA+7SJEKLHfkaQM0=;\n b=BJz+kMMgH7ek3GvxlVOMaHXHapkQqpmUJth7y2dc5igqd4FnRQuWu2P3\n WDB4JDe8JHYvqYdNx4B45BH7p2CMl5b4rtCV1JjpNBeKW923PA8isgcj+\n NO/m4gYUFdl8tKWiVlA2qIwx2Hv0LavTtilqsKrju9pjxgccC+WZtz8Fz\n 45vf405I7uHVUIaoLj5WrnuZOZSxvOycL9YVYbeanDFhiF/+1RMvl/4+r\n v1b0l1G9aUJp2M0co3FJzKbCWi7vIyPA26s2thk7pVydpKPxHwJYxKg6C\n S//Y7DOMOg4484XpN0V/Y2Tg073j/PAVihAqJVAPLb/oVhE4MZPagGrMd A==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6400,9594,10427\"; a=\"375948496\"",
            "E=Sophos;i=\"5.93,214,1654585200\"; d=\"scan'208\";a=\"375948496\"",
            "E=Sophos;i=\"5.93,214,1654585200\"; d=\"scan'208\";a=\"692211040\""
        ],
        "X-ExtLoop1": "1",
        "From": "Junfeng Guo <junfeng.guo@intel.com>",
        "To": "qi.z.zhang@intel.com,\n\tjingjing.wu@intel.com,\n\tbeilei.xing@intel.com",
        "Cc": "dev@dpdk.org,\n\tjunfeng.guo@intel.com",
        "Subject": "[PATCH 02/13] net/idpf/base: add logs and OS specific implementation",
        "Date": "Wed,  3 Aug 2022 19:30:53 +0800",
        "Message-Id": "<20220803113104.1184059-3-junfeng.guo@intel.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20220803113104.1184059-1-junfeng.guo@intel.com>",
        "References": "<20220803113104.1184059-1-junfeng.guo@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Add PMD logs.\nAdd some MACRO definations and small functions which are specific\nfor DPDK.\n\nSigned-off-by: Beilei Xing <beilei.xing@intel.com>\nSigned-off-by: Junfeng Guo <junfeng.guo@intel.com>\n---\n drivers/net/idpf/base/iecm_osdep.h | 365 +++++++++++++++++++++++++++++\n drivers/net/idpf/idpf_logs.h       |  38 +++\n 2 files changed, 403 insertions(+)\n create mode 100644 drivers/net/idpf/base/iecm_osdep.h\n create mode 100644 drivers/net/idpf/idpf_logs.h",
    "diff": "diff --git a/drivers/net/idpf/base/iecm_osdep.h b/drivers/net/idpf/base/iecm_osdep.h\nnew file mode 100644\nindex 0000000000..60e21fbc1b\n--- /dev/null\n+++ b/drivers/net/idpf/base/iecm_osdep.h\n@@ -0,0 +1,365 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2001-2022 Intel Corporation\n+ */\n+\n+#ifndef _IECM_OSDEP_H_\n+#define _IECM_OSDEP_H_\n+\n+#include <string.h>\n+#include <stdint.h>\n+#include <stdio.h>\n+#include <stdarg.h>\n+#include <inttypes.h>\n+#include <sys/queue.h>\n+#include <stdbool.h>\n+\n+#include <rte_common.h>\n+#include <rte_memcpy.h>\n+#include <rte_malloc.h>\n+#include <rte_memzone.h>\n+#include <rte_byteorder.h>\n+#include <rte_cycles.h>\n+#include <rte_spinlock.h>\n+#include <rte_log.h>\n+#include <rte_random.h>\n+#include <rte_io.h>\n+\n+#include \"../idpf_logs.h\"\n+\n+#define INLINE inline\n+#define STATIC static\n+\n+typedef uint8_t\t\tu8;\n+typedef int8_t\t\ts8;\n+typedef uint16_t\tu16;\n+typedef int16_t\t\ts16;\n+typedef uint32_t\tu32;\n+typedef int32_t\t\ts32;\n+typedef uint64_t\tu64;\n+typedef uint64_t\ts64;\n+\n+typedef enum iecm_status iecm_status;\n+typedef struct iecm_lock iecm_lock;\n+\n+#define __iomem\n+#define hw_dbg(hw, S, A...)\tdo {} while (0)\n+#define upper_32_bits(n)\t((u32)(((n) >> 16) >> 16))\n+#define lower_32_bits(n)\t((u32)(n))\n+#define low_16_bits(x)\t\t((x) & 0xFFFF)\n+#define high_16_bits(x)\t\t(((x) & 0xFFFF0000) >> 16)\n+\n+#ifndef ETH_ADDR_LEN\n+#define ETH_ADDR_LEN\t\t6\n+#endif\n+\n+#ifndef __le16\n+#define __le16\tuint16_t\n+#endif\n+#ifndef __le32\n+#define __le32\tuint32_t\n+#endif\n+#ifndef __le64\n+#define __le64\tuint64_t\n+#endif\n+#ifndef __be16\n+#define __be16\tuint16_t\n+#endif\n+#ifndef __be32\n+#define __be32\tuint32_t\n+#endif\n+#ifndef __be64\n+#define __be64\tuint64_t\n+#endif\n+\n+#ifndef __always_unused\n+#define __always_unused  __attribute__((__unused__))\n+#endif\n+#ifndef __maybe_unused\n+#define __maybe_unused  __attribute__((__unused__))\n+#endif\n+#ifndef __packed\n+#define __packed  __attribute__((packed))\n+#endif\n+\n+#ifndef BIT_ULL\n+#define BIT_ULL(a) (1ULL << (a))\n+#endif\n+\n+#ifndef BIT\n+#define BIT(a) (1ULL << (a))\n+#endif\n+\n+#define FALSE\t0\n+#define TRUE\t1\n+#define false\t0\n+#define true\t1\n+\n+#define min(a, b) RTE_MIN(a, b)\n+#define max(a, b) RTE_MAX(a, b)\n+\n+#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0]))\n+#define FIELD_SIZEOF(t, f) (sizeof(((t *)0)->(f)))\n+#define MAKEMASK(m, s) ((m) << (s))\n+\n+#define DEBUGOUT(S) PMD_DRV_LOG_RAW(DEBUG, S)\n+#define DEBUGOUT2(S, A...) PMD_DRV_LOG_RAW(DEBUG, S, ##A)\n+#define DEBUGFUNC(F) PMD_DRV_LOG_RAW(DEBUG, F)\n+\n+#define iecm_debug(h, m, s, ...)\t\t\t\t\t\\\n+\tdo {\t\t\t\t\t\t\t\t\\\n+\t\tif (((m) & (h)->debug_mask))\t\t\t\t\\\n+\t\t\tPMD_DRV_LOG_RAW(DEBUG, \"iecm %02x.%x \" s,       \\\n+\t\t\t\t\t(h)->bus.device, (h)->bus.func,\t\\\n+\t\t\t\t\t##__VA_ARGS__);\t\t\t\\\n+\t} while (0)\n+\n+#define iecm_info(hw, fmt, args...) iecm_debug(hw, IECM_DBG_ALL, fmt, ##args)\n+#define iecm_warn(hw, fmt, args...) iecm_debug(hw, IECM_DBG_ALL, fmt, ##args)\n+#define iecm_debug_array(hw, type, rowsize, groupsize, buf, len)\t\\\n+\tdo {\t\t\t\t\t\t\t\t\\\n+\t\tstruct iecm_hw *hw_l = hw;\t\t\t\t\\\n+\t\tu16 len_l = len;\t\t\t\t\t\\\n+\t\tu8 *buf_l = buf;\t\t\t\t\t\\\n+\t\tint i;\t\t\t\t\t\t\t\\\n+\t\tfor (i = 0; i < len_l; i += 8)\t\t\t\t\\\n+\t\t\tiecm_debug(hw_l, type,\t\t\t\t\\\n+\t\t\t\t   \"0x%04X  0x%016\"PRIx64\"\\n\",\t\t\\\n+\t\t\t\t   i, *((u64 *)((buf_l) + i)));\t\t\\\n+\t} while (0)\n+#define iecm_snprintf snprintf\n+#ifndef SNPRINTF\n+#define SNPRINTF iecm_snprintf\n+#endif\n+\n+#define IECM_PCI_REG(reg)     rte_read32(reg)\n+#define IECM_PCI_REG_ADDR(a, reg)\t\t\t\t\\\n+\t((volatile uint32_t *)((char *)(a)->hw_addr + (reg)))\n+#define IECM_PCI_REG64(reg)     rte_read64(reg)\n+#define IECM_PCI_REG_ADDR64(a, reg)\t\t\t\t\\\n+\t((volatile uint64_t *)((char *)(a)->hw_addr + (reg)))\n+\n+#define iecm_wmb() rte_io_wmb()\n+#define iecm_rmb() rte_io_rmb()\n+#define iecm_mb() rte_io_mb()\n+\n+static inline uint32_t iecm_read_addr(volatile void *addr)\n+{\n+\treturn rte_le_to_cpu_32(IECM_PCI_REG(addr));\n+}\n+\n+static inline uint64_t iecm_read_addr64(volatile void *addr)\n+{\n+\treturn rte_le_to_cpu_64(IECM_PCI_REG64(addr));\n+}\n+\n+#define IECM_PCI_REG_WRITE(reg, value)\t\t\t\\\n+\trte_write32((rte_cpu_to_le_32(value)), reg)\n+\n+#define IECM_PCI_REG_WRITE64(reg, value)\t\t\\\n+\trte_write64((rte_cpu_to_le_64(value)), reg)\n+\n+#define IECM_READ_REG(hw, reg) iecm_read_addr(IECM_PCI_REG_ADDR((hw), (reg)))\n+#define IECM_WRITE_REG(hw, reg, value)\t\t\t\t\t\\\n+\tIECM_PCI_REG_WRITE(IECM_PCI_REG_ADDR((hw), (reg)), (value))\n+\n+#define rd32(a, reg) iecm_read_addr(IECM_PCI_REG_ADDR((a), (reg)))\n+#define wr32(a, reg, value)\t\t\t\t\t\t\\\n+\tIECM_PCI_REG_WRITE(IECM_PCI_REG_ADDR((a), (reg)), (value))\n+#define div64_long(n, d) ((n) / (d))\n+#define rd64(a, reg) iecm_read_addr64(IECM_PCI_REG_ADDR64((a), (reg)))\n+\n+#define BITS_PER_BYTE       8\n+\n+/* memory allocation tracking */\n+struct iecm_dma_mem {\n+\tvoid *va;\n+\tu64 pa;\n+\tu32 size;\n+\tconst void *zone;\n+} __attribute__((packed));\n+\n+struct iecm_virt_mem {\n+\tvoid *va;\n+\tu32 size;\n+} __attribute__((packed));\n+\n+#define iecm_malloc(h, s)\trte_zmalloc(NULL, s, 0)\n+#define iecm_calloc(h, c, s)\trte_zmalloc(NULL, (c) * (s), 0)\n+#define iecm_free(h, m)\t\trte_free(m)\n+\n+#define iecm_memset(a, b, c, d)\tmemset((a), (b), (c))\n+#define iecm_memcpy(a, b, c, d)\trte_memcpy((a), (b), (c))\n+#define iecm_memdup(a, b, c, d)\trte_memcpy(iecm_malloc(a, c), b, c)\n+\n+#define CPU_TO_BE16(o) rte_cpu_to_be_16(o)\n+#define CPU_TO_BE32(o) rte_cpu_to_be_32(o)\n+#define CPU_TO_BE64(o) rte_cpu_to_be_64(o)\n+#define CPU_TO_LE16(o) rte_cpu_to_le_16(o)\n+#define CPU_TO_LE32(s) rte_cpu_to_le_32(s)\n+#define CPU_TO_LE64(h) rte_cpu_to_le_64(h)\n+#define LE16_TO_CPU(a) rte_le_to_cpu_16(a)\n+#define LE32_TO_CPU(c) rte_le_to_cpu_32(c)\n+#define LE64_TO_CPU(k) rte_le_to_cpu_64(k)\n+\n+#define NTOHS(a) rte_be_to_cpu_16(a)\n+#define NTOHL(a) rte_be_to_cpu_32(a)\n+#define HTONS(a) rte_cpu_to_be_16(a)\n+#define HTONL(a) rte_cpu_to_be_32(a)\n+\n+/* SW spinlock */\n+struct iecm_lock {\n+\trte_spinlock_t spinlock;\n+};\n+\n+static inline void\n+iecm_init_lock(struct iecm_lock *sp)\n+{\n+\trte_spinlock_init(&sp->spinlock);\n+}\n+\n+static inline void\n+iecm_acquire_lock(struct iecm_lock *sp)\n+{\n+\trte_spinlock_lock(&sp->spinlock);\n+}\n+\n+static inline void\n+iecm_release_lock(struct iecm_lock *sp)\n+{\n+\trte_spinlock_unlock(&sp->spinlock);\n+}\n+\n+static inline void\n+iecm_destroy_lock(__attribute__((unused)) struct iecm_lock *sp)\n+{\n+}\n+\n+struct iecm_hw;\n+\n+static inline void *\n+iecm_alloc_dma_mem(__attribute__((unused)) struct iecm_hw *hw,\n+\t\t   struct iecm_dma_mem *mem, u64 size)\n+{\n+\tconst struct rte_memzone *mz = NULL;\n+\tchar z_name[RTE_MEMZONE_NAMESIZE];\n+\n+\tif (!mem)\n+\t\treturn NULL;\n+\n+\tsnprintf(z_name, sizeof(z_name), \"iecm_dma_%\"PRIu64, rte_rand());\n+\tmz = rte_memzone_reserve_aligned(z_name, size, SOCKET_ID_ANY,\n+\t\t\t\t\t RTE_MEMZONE_IOVA_CONTIG, RTE_PGSIZE_4K);\n+\tif (!mz)\n+\t\treturn NULL;\n+\n+\tmem->size = size;\n+\tmem->va = mz->addr;\n+\tmem->pa = mz->iova;\n+\tmem->zone = (const void *)mz;\n+\tmemset(mem->va, 0, size);\n+\n+\treturn mem->va;\n+}\n+\n+static inline void\n+iecm_free_dma_mem(__attribute__((unused)) struct iecm_hw *hw,\n+\t\t  struct iecm_dma_mem *mem)\n+{\n+\trte_memzone_free((const struct rte_memzone *)mem->zone);\n+\tmem->size = 0;\n+\tmem->va = NULL;\n+\tmem->pa = 0;\n+}\n+\n+static inline u8\n+iecm_hweight8(u32 num)\n+{\n+\tu8 bits = 0;\n+\tu32 i;\n+\n+\tfor (i = 0; i < 8; i++) {\n+\t\tbits += (u8)(num & 0x1);\n+\t\tnum >>= 1;\n+\t}\n+\n+\treturn bits;\n+}\n+\n+static inline u8\n+iecm_hweight32(u32 num)\n+{\n+\tu8 bits = 0;\n+\tu32 i;\n+\n+\tfor (i = 0; i < 32; i++) {\n+\t\tbits += (u8)(num & 0x1);\n+\t\tnum >>= 1;\n+\t}\n+\n+\treturn bits;\n+}\n+\n+#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))\n+#define DELAY(x) rte_delay_us(x)\n+#define iecm_usec_delay(x) rte_delay_us(x)\n+#define iecm_msec_delay(x, y) rte_delay_us(1000 * (x))\n+#define udelay(x) DELAY(x)\n+#define msleep(x) DELAY(1000 * (x))\n+#define usleep_range(min, max) msleep(DIV_ROUND_UP(min, 1000))\n+\n+#ifndef IECM_DBG_TRACE\n+#define IECM_DBG_TRACE\t  BIT_ULL(0)\n+#endif\n+\n+#ifndef DIVIDE_AND_ROUND_UP\n+#define DIVIDE_AND_ROUND_UP(a, b) (((a) + (b) - 1) / (b))\n+#endif\n+\n+#ifndef IECM_INTEL_VENDOR_ID\n+#define IECM_INTEL_VENDOR_ID\t    0x8086\n+#endif\n+\n+#ifndef IS_UNICAST_ETHER_ADDR\n+#define IS_UNICAST_ETHER_ADDR(addr)\t\t\t\\\n+\t((bool)((((u8 *)(addr))[0] % ((u8)0x2)) == 0))\n+#endif\n+\n+#ifndef IS_MULTICAST_ETHER_ADDR\n+#define IS_MULTICAST_ETHER_ADDR(addr)\t\t\t\\\n+\t((bool)((((u8 *)(addr))[0] % ((u8)0x2)) == 1))\n+#endif\n+\n+#ifndef IS_BROADCAST_ETHER_ADDR\n+/* Check whether an address is broadcast. */\n+#define IS_BROADCAST_ETHER_ADDR(addr)\t\t\t\\\n+\t((bool)((((u16 *)(addr))[0] == ((u16)0xffff))))\n+#endif\n+\n+#ifndef IS_ZERO_ETHER_ADDR\n+#define IS_ZERO_ETHER_ADDR(addr)\t\t\t\t\\\n+\t(((bool)((((u16 *)(addr))[0] == ((u16)0x0)))) &&\t\\\n+\t ((bool)((((u16 *)(addr))[1] == ((u16)0x0)))) &&\t\\\n+\t ((bool)((((u16 *)(addr))[2] == ((u16)0x0)))))\n+#endif\n+\n+#ifndef LIST_HEAD_TYPE\n+#define LIST_HEAD_TYPE(list_name, type) LIST_HEAD(list_name, type)\n+#endif\n+\n+#ifndef LIST_ENTRY_TYPE\n+#define LIST_ENTRY_TYPE(type)\t   LIST_ENTRY(type)\n+#endif\n+\n+#ifndef LIST_FOR_EACH_ENTRY_SAFE\n+#define LIST_FOR_EACH_ENTRY_SAFE(pos, temp, head, entry_type, list)\t\\\n+\tLIST_FOREACH(pos, head, list)\n+\n+#endif\n+\n+#ifndef LIST_FOR_EACH_ENTRY\n+#define LIST_FOR_EACH_ENTRY(pos, head, entry_type, list)\t\t\\\n+\tLIST_FOREACH(pos, head, list)\n+\n+#endif\n+\n+#endif /* _IECM_OSDEP_H_ */\ndiff --git a/drivers/net/idpf/idpf_logs.h b/drivers/net/idpf/idpf_logs.h\nnew file mode 100644\nindex 0000000000..906aae8463\n--- /dev/null\n+++ b/drivers/net/idpf/idpf_logs.h\n@@ -0,0 +1,38 @@\n+#ifndef _IDPF_LOGS_H_\n+#define _IDPF_LOGS_H_\n+\n+#include <rte_log.h>\n+\n+extern int idpf_logtype_init;\n+extern int idpf_logtype_driver;\n+\n+#define PMD_INIT_LOG(level, fmt, args...) \\\n+\trte_log(RTE_LOG_ ## level, idpf_logtype_init, \\\n+\t\t\"%s(): \" fmt \"\\n\", __func__, ##args)\n+\n+#define PMD_INIT_FUNC_TRACE() PMD_DRV_LOG(DEBUG, \" >>\")\n+\n+#define PMD_DRV_LOG_RAW(level, fmt, args...) \\\n+\trte_log(RTE_LOG_ ## level, idpf_logtype_driver, \\\n+\t\t\"%s(): \" fmt \"\\n\", __func__, ##args)\n+\n+#define PMD_DRV_LOG(level, fmt, args...) \\\n+\tPMD_DRV_LOG_RAW(level, fmt \"\\n\", ## args)\n+\n+#define PMD_DRV_FUNC_TRACE() PMD_DRV_LOG(DEBUG, \" >>\")\n+\n+#ifdef RTE_LIBRTE_IDPF_DEBUG_RX\n+#define PMD_RX_LOG(level, fmt, args...) \\\n+\tRTE_LOG(level, PMD, \"%s(): \" fmt \"\\n\", __func__, ## args)\n+#else\n+#define PMD_RX_LOG(level, fmt, args...) do { } while (0)\n+#endif\n+\n+#ifdef RTE_LIBRTE_IDPF_DEBUG_TX\n+#define PMD_TX_LOG(level, fmt, args...) \\\n+\tRTE_LOG(level, PMD, \"%s(): \" fmt \"\\n\", __func__, ## args)\n+#else\n+#define PMD_TX_LOG(level, fmt, args...) do { } while (0)\n+#endif\n+\n+#endif /* _IDPF_LOGS_H_ */\n",
    "prefixes": [
        "02/13"
    ]
}