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GET /api/patches/114277/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 114277,
    "url": "http://patches.dpdk.org/api/patches/114277/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220727103616.18596-9-liudongdong3@huawei.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20220727103616.18596-9-liudongdong3@huawei.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20220727103616.18596-9-liudongdong3@huawei.com",
    "date": "2022-07-27T10:36:16",
    "name": "[8/8] net/hns3: revert optimize Tx performance",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "2807620e1be98fe768312ac8a9a898698283d667",
    "submitter": {
        "id": 2718,
        "url": "http://patches.dpdk.org/api/people/2718/?format=api",
        "name": "Dongdong Liu",
        "email": "liudongdong3@huawei.com"
    },
    "delegate": {
        "id": 3961,
        "url": "http://patches.dpdk.org/api/users/3961/?format=api",
        "username": "arybchenko",
        "first_name": "Andrew",
        "last_name": "Rybchenko",
        "email": "andrew.rybchenko@oktetlabs.ru"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220727103616.18596-9-liudongdong3@huawei.com/mbox/",
    "series": [
        {
            "id": 24104,
            "url": "http://patches.dpdk.org/api/series/24104/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24104",
            "date": "2022-07-27T10:36:08",
            "name": "some bugfixes for hns3",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/24104/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/114277/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/114277/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5DC2EA00C4;\n\tWed, 27 Jul 2022 12:38:03 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 1F85742B8B;\n\tWed, 27 Jul 2022 12:37:37 +0200 (CEST)",
            "from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187])\n by mails.dpdk.org (Postfix) with ESMTP id A749142B75;\n Wed, 27 Jul 2022 12:37:34 +0200 (CEST)",
            "from kwepemi500017.china.huawei.com (unknown [172.30.72.57])\n by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4Lt9Cz4mXWzmVCP;\n Wed, 27 Jul 2022 18:35:43 +0800 (CST)",
            "from localhost.localdomain (10.28.79.22) by\n kwepemi500017.china.huawei.com (7.221.188.110) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id\n 15.1.2375.24; Wed, 27 Jul 2022 18:37:32 +0800"
        ],
        "From": "Dongdong Liu <liudongdong3@huawei.com>",
        "To": "<dev@dpdk.org>, <andrew.rybchenko@oktetlabs.ru>,\n <ferruh.yigit@xilinx.com>, <thomas@monjalon.net>",
        "CC": "<stable@dpdk.org>, Chengwen Feng <fengchengwen@huawei.com>, Dongdong Liu\n <liudongdong3@huawei.com>, Yisen Zhuang <yisen.zhuang@huawei.com>, \"Min Hu\n (Connor)\" <humin29@huawei.com>",
        "Subject": "[PATCH 8/8] net/hns3: revert optimize Tx performance",
        "Date": "Wed, 27 Jul 2022 18:36:16 +0800",
        "Message-ID": "<20220727103616.18596-9-liudongdong3@huawei.com>",
        "X-Mailer": "git-send-email 2.22.0",
        "In-Reply-To": "<20220727103616.18596-1-liudongdong3@huawei.com>",
        "References": "<20220727103616.18596-1-liudongdong3@huawei.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Originating-IP": "[10.28.79.22]",
        "X-ClientProxiedBy": "dggems702-chm.china.huawei.com (10.3.19.179) To\n kwepemi500017.china.huawei.com (7.221.188.110)",
        "X-CFilter-Loop": "Reflected",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "From: Chengwen Feng <fengchengwen@huawei.com>\n\nThe Tx performance deteriorates in the case of larger packets size and\nlarger burst. It may take a long time to optimize in these scenarios,\nso this commit reverts\ncommit 0b77e8f3d364 (\"net/hns3: optimize Tx performance\")\n\nFixes: 0b77e8f3d364 (\"net/hns3: optimize Tx performance\")\nCc: stable@dpdk.org\n\nSigned-off-by: Chengwen Feng <fengchengwen@huawei.com>\nSigned-off-by: Dongdong Liu <liudongdong3@huawei.com>\n---\n drivers/net/hns3/hns3_rxtx.c | 115 ++++++++++++++++++-----------------\n 1 file changed, 60 insertions(+), 55 deletions(-)",
    "diff": "diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c\nindex bb06038848..169c058c95 100644\n--- a/drivers/net/hns3/hns3_rxtx.c\n+++ b/drivers/net/hns3/hns3_rxtx.c\n@@ -3072,51 +3072,40 @@ hns3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t nb_desc,\n \treturn 0;\n }\n \n-static int\n+static void\n hns3_tx_free_useless_buffer(struct hns3_tx_queue *txq)\n {\n \tuint16_t tx_next_clean = txq->next_to_clean;\n-\tuint16_t tx_next_use = txq->next_to_use;\n-\tstruct hns3_entry *tx_entry = &txq->sw_ring[tx_next_clean];\n+\tuint16_t tx_next_use   = txq->next_to_use;\n+\tuint16_t tx_bd_ready   = txq->tx_bd_ready;\n+\tuint16_t tx_bd_max     = txq->nb_tx_desc;\n+\tstruct hns3_entry *tx_bak_pkt = &txq->sw_ring[tx_next_clean];\n \tstruct hns3_desc *desc = &txq->tx_ring[tx_next_clean];\n-\tuint16_t i;\n-\n-\tif (tx_next_use >= tx_next_clean &&\n-\t    tx_next_use < tx_next_clean + txq->tx_rs_thresh)\n-\t\treturn -1;\n+\tstruct rte_mbuf *mbuf;\n \n-\t/*\n-\t * All mbufs can be released only when the VLD bits of all\n-\t * descriptors in a batch are cleared.\n-\t */\n-\tfor (i = 0; i < txq->tx_rs_thresh; i++) {\n-\t\tif (desc[i].tx.tp_fe_sc_vld_ra_ri &\n-\t\t\trte_le_to_cpu_16(BIT(HNS3_TXD_VLD_B)))\n-\t\t\treturn -1;\n-\t}\n+\twhile ((!(desc->tx.tp_fe_sc_vld_ra_ri &\n+\t\trte_cpu_to_le_16(BIT(HNS3_TXD_VLD_B)))) &&\n+\t\ttx_next_use != tx_next_clean) {\n+\t\tmbuf = tx_bak_pkt->mbuf;\n+\t\tif (mbuf) {\n+\t\t\trte_pktmbuf_free_seg(mbuf);\n+\t\t\ttx_bak_pkt->mbuf = NULL;\n+\t\t}\n \n-\tfor (i = 0; i < txq->tx_rs_thresh; i++) {\n-\t\trte_pktmbuf_free_seg(tx_entry[i].mbuf);\n-\t\ttx_entry[i].mbuf = NULL;\n+\t\tdesc++;\n+\t\ttx_bak_pkt++;\n+\t\ttx_next_clean++;\n+\t\ttx_bd_ready++;\n+\n+\t\tif (tx_next_clean >= tx_bd_max) {\n+\t\t\ttx_next_clean = 0;\n+\t\t\tdesc = txq->tx_ring;\n+\t\t\ttx_bak_pkt = txq->sw_ring;\n+\t\t}\n \t}\n \n-\t/* Update numbers of available descriptor due to buffer freed */\n-\ttxq->tx_bd_ready += txq->tx_rs_thresh;\n-\ttxq->next_to_clean += txq->tx_rs_thresh;\n-\tif (txq->next_to_clean >= txq->nb_tx_desc)\n-\t\ttxq->next_to_clean = 0;\n-\n-\treturn 0;\n-}\n-\n-static inline int\n-hns3_tx_free_required_buffer(struct hns3_tx_queue *txq, uint16_t required_bds)\n-{\n-\twhile (required_bds > txq->tx_bd_ready) {\n-\t\tif (hns3_tx_free_useless_buffer(txq) != 0)\n-\t\t\treturn -1;\n-\t}\n-\treturn 0;\n+\ttxq->next_to_clean = tx_next_clean;\n+\ttxq->tx_bd_ready   = tx_bd_ready;\n }\n \n int\n@@ -4159,8 +4148,7 @@ hns3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \tuint16_t nb_tx;\n \tuint16_t i;\n \n-\tif (txq->tx_bd_ready < txq->tx_free_thresh)\n-\t\t(void)hns3_tx_free_useless_buffer(txq);\n+\thns3_tx_free_useless_buffer(txq);\n \n \ttx_next_use   = txq->next_to_use;\n \ttx_bd_max     = txq->nb_tx_desc;\n@@ -4175,14 +4163,10 @@ hns3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \t\tnb_buf = tx_pkt->nb_segs;\n \n \t\tif (nb_buf > txq->tx_bd_ready) {\n-\t\t\t/* Try to release the required MBUF, but avoid releasing\n-\t\t\t * all MBUFs, otherwise, the MBUFs will be released for\n-\t\t\t * a long time and may cause jitter.\n-\t\t\t */\n-\t\t\tif (hns3_tx_free_required_buffer(txq, nb_buf) != 0) {\n-\t\t\t\ttxq->dfx_stats.queue_full_cnt++;\n-\t\t\t\tgoto end_of_tx;\n-\t\t\t}\n+\t\t\ttxq->dfx_stats.queue_full_cnt++;\n+\t\t\tif (nb_tx == 0)\n+\t\t\t\treturn 0;\n+\t\t\tgoto end_of_tx;\n \t\t}\n \n \t\t/*\n@@ -4598,22 +4582,43 @@ hns3_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n static int\n hns3_tx_done_cleanup_full(struct hns3_tx_queue *txq, uint32_t free_cnt)\n {\n-\tuint16_t round_cnt;\n+\tuint16_t next_to_clean = txq->next_to_clean;\n+\tuint16_t next_to_use   = txq->next_to_use;\n+\tuint16_t tx_bd_ready   = txq->tx_bd_ready;\n+\tstruct hns3_entry *tx_pkt = &txq->sw_ring[next_to_clean];\n+\tstruct hns3_desc *desc = &txq->tx_ring[next_to_clean];\n \tuint32_t idx;\n \n \tif (free_cnt == 0 || free_cnt > txq->nb_tx_desc)\n \t\tfree_cnt = txq->nb_tx_desc;\n \n-\tif (txq->tx_rs_thresh == 0)\n-\t\treturn 0;\n-\n-\tround_cnt = rounddown(free_cnt, txq->tx_rs_thresh);\n-\tfor (idx = 0; idx < round_cnt; idx += txq->tx_rs_thresh) {\n-\t\tif (hns3_tx_free_useless_buffer(txq) != 0)\n+\tfor (idx = 0; idx < free_cnt; idx++) {\n+\t\tif (next_to_clean == next_to_use)\n+\t\t\tbreak;\n+\t\tif (desc->tx.tp_fe_sc_vld_ra_ri &\n+\t\t    rte_cpu_to_le_16(BIT(HNS3_TXD_VLD_B)))\n \t\t\tbreak;\n+\t\tif (tx_pkt->mbuf != NULL) {\n+\t\t\trte_pktmbuf_free_seg(tx_pkt->mbuf);\n+\t\t\ttx_pkt->mbuf = NULL;\n+\t\t}\n+\t\tnext_to_clean++;\n+\t\ttx_bd_ready++;\n+\t\ttx_pkt++;\n+\t\tdesc++;\n+\t\tif (next_to_clean == txq->nb_tx_desc) {\n+\t\t\ttx_pkt = txq->sw_ring;\n+\t\t\tdesc = txq->tx_ring;\n+\t\t\tnext_to_clean = 0;\n+\t\t}\n+\t}\n+\n+\tif (idx > 0) {\n+\t\ttxq->next_to_clean = next_to_clean;\n+\t\ttxq->tx_bd_ready = tx_bd_ready;\n \t}\n \n-\treturn idx;\n+\treturn (int)idx;\n }\n \n int\n",
    "prefixes": [
        "8/8"
    ]
}