Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/113589/?format=api
{ "id": 113589, "url": "http://patches.dpdk.org/api/patches/113589/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1656642017-8992-8-git-send-email-chaoyong.he@corigine.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1656642017-8992-8-git-send-email-chaoyong.he@corigine.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1656642017-8992-8-git-send-email-chaoyong.he@corigine.com", "date": "2022-07-01T02:20:12", "name": "[v4,07/12] net/nfp: add flower ctrl VNIC related logics", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "def7b8eb4f509067c712c8096cd6a97ec21e9019", "submitter": { "id": 2554, "url": "http://patches.dpdk.org/api/people/2554/?format=api", "name": "Chaoyong He", "email": "chaoyong.he@corigine.com" }, "delegate": { "id": 3961, "url": "http://patches.dpdk.org/api/users/3961/?format=api", "username": "arybchenko", "first_name": "Andrew", "last_name": "Rybchenko", "email": "andrew.rybchenko@oktetlabs.ru" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1656642017-8992-8-git-send-email-chaoyong.he@corigine.com/mbox/", "series": [ { "id": 23850, "url": "http://patches.dpdk.org/api/series/23850/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=23850", "date": "2022-07-01T02:20:05", "name": "preparation for the rte_flow offload of nfp PMD", "version": 4, "mbox": "http://patches.dpdk.org/series/23850/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/113589/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/113589/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1F42BA0093;\n\tFri, 1 Jul 2022 04:21:57 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 810EB42B88;\n\tFri, 1 Jul 2022 04:21:21 +0200 (CEST)", "from NAM12-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam12on2126.outbound.protection.outlook.com [40.107.243.126])\n by mails.dpdk.org (Postfix) with ESMTP id 6AA0542B70\n for <dev@dpdk.org>; Fri, 1 Jul 2022 04:21:19 +0200 (CEST)", "from SJ0PR13MB5545.namprd13.prod.outlook.com (2603:10b6:a03:424::5)\n by DM6PR13MB2379.namprd13.prod.outlook.com (2603:10b6:5:bf::23) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5417.8; Fri, 1 Jul\n 2022 02:21:17 +0000", "from SJ0PR13MB5545.namprd13.prod.outlook.com\n ([fe80::5d9e:9ce5:51d1:2021]) by SJ0PR13MB5545.namprd13.prod.outlook.com\n ([fe80::5d9e:9ce5:51d1:2021%9]) with mapi id 15.20.5395.014; Fri, 1 Jul 2022\n 02:21:17 +0000" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=CeJJZYQYgZW8WnX/7nRWnDshYi4xXpFFGntoL7QYDTfcd+vmmD4qcTByEtAG1sF7Eb9y2GO3xNkGZ8weMR0ARX73wKN1xjb+zSUd7WoM6I6OwzbBQVMcqmUefqBQY/T0vyfsyEmwHzg4v7Er4QoZdvuoginBM737FSfIH1+BT13RJNp3ldH5FWs9ZKeKXHL4+nDfgE65+qkNRkQWQBAD+M4Rgfd6Bakv2Rt6jddPzWO/sXkrBEso0TZlIrpf3LLmXy2bUatCbST/m6PNo46ob5GXqHwgW/RhwnNslIU57ocQNuxzDEotz19mAtoo5ZJi9XVd1Rdy2Svz40S7zyGI5A==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=ZFvN8wSuV0Q6wtdTXcZht1tdO4+KGwvrQZMBFDO6S0U=;\n b=c6XmcX0F79iguiWvQqRPxxW6WXb/Qb8sBtB+s0lJDEYKtcQB74t9bcIXc1MMvMSQcc7ezPDqUdYTzmmg3Chxy7JztLgxt/feke94qBM5ZLRWW+yDT5cPR/1BSiTGkt2KMGsSihTsVv/PbXrTIeUdbDmWl19oTnCO5rV/eMjzrpy0R4jNccyDkr6BOxk0jygNz2EXqi7UUZ1ZlNjmmVuccJGwEzQFpjhgm2Bpl2mxoTkAEEyanm5+/VVi5rkofcXROZS9TisoaJvoWIR4J57DK+CZxT9sjb4RBxzbaQjU5d8q0b3dB6akJKyK+AMWE3yAtz2DV3v3eTUGMmirgZ/TLw==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=corigine.com; dmarc=pass action=none header.from=corigine.com;\n dkim=pass header.d=corigine.com; arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=corigine.onmicrosoft.com; s=selector2-corigine-onmicrosoft-com;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=ZFvN8wSuV0Q6wtdTXcZht1tdO4+KGwvrQZMBFDO6S0U=;\n b=bf1swIJlih4zKrZB4+9jeTlrLDguuvw/EMuY369vIFrOI1vj4a9X+X/Y967t0Q6rqP/Y8u7za6ITSyk8F/giiBY+/3XbeKXOvl6MPb5vj55fkqzUYpTM1k3SPdw7sjzMc+fTINuvINF2fwhctT/4xsrSwZFMuP+VRpmqwkqMbQo=", "Authentication-Results": "dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=corigine.com;", "From": "Chaoyong He <chaoyong.he@corigine.com>", "To": "dev@dpdk.org", "Cc": "niklas.soderlund@corigine.com,\n\tChaoyong He <chaoyong.he@corigine.com>", "Subject": "[PATCH v4 07/12] net/nfp: add flower ctrl VNIC related logics", "Date": "Fri, 1 Jul 2022 10:20:12 +0800", "Message-Id": "<1656642017-8992-8-git-send-email-chaoyong.he@corigine.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1656642017-8992-1-git-send-email-chaoyong.he@corigine.com>", "References": "<1656642017-8992-1-git-send-email-chaoyong.he@corigine.com>", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-ClientProxiedBy": "SG2PR02CA0079.apcprd02.prod.outlook.com\n (2603:1096:4:90::19) To SJ0PR13MB5545.namprd13.prod.outlook.com\n (2603:10b6:a03:424::5)", "MIME-Version": "1.0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "7e95dae0-164a-4fb9-3d98-08da5b086158", "X-MS-TrafficTypeDiagnostic": "DM6PR13MB2379:EE_", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n Jwsgkmvl77ZEE68iMCvK6pwz1TtxGUQkxgUTQP22oiZdyM4RkeMtyEo2yLITtHrurasxH1pgFLHE8wMe2F9rdUXoK6qrIdGM750/weHE1N/V2kjQ3FFr0I5X4x1XhBKAwNcZYQ0jEr/cdQliH+Q67c7MWE8eHYFI1W0BUrEL5udSDZT9PqoOpYMuJXXqvqi9ylFXJJhtyEmH6n973IrD8k6ZjFz4ipPuqaMTxPgtLBkHJ/Much3MdKGHywFcQxNHV/X32i/NsrlUd5Wc3+lEAXYLVb0L+EPrqY/11bPF+Qk5DP2ulaYjnO4/SBVdSHvmgxjVgrMcT22ZynXRSg0bAvXJS8uiEoZWkEjig41iAvATrObX1I07F0xajRLm4Ftq4DtLLNYfLxNeAo/l3wmWUK6c6Y37U3TJyX+aKdb5+RFud+P0evBe/HeuSREEKABs69yC56enh6BsWfuXldYCQtyNBmFDRkLP0RuLmavbvrazJByL+6GJ/FqPzM3bPhqIhFl6cOvgoFAUZfwlAQc7O99o9/xougA+q3NFsFFK7TGaeDuCXFB+JpYI+LDfdKy7mvHZ/akH5s5Obui0lalbZZOjthlFAefPWALhAUEZYoDURVKpB21hhV7Jacjiev8lTvHeTlNKcXU14653f3kBtABWWG8iXrJ5m48RnvcRBM+YHsyjLsaU9AIS5rjmNGhBDxxaTMj98gYELuHZ3wj08+aV1rwEs+KYAvo5d5GgPMo5muMkqTWBvaWm2Wvc8kFU6QRZTkXcqTmvskxcuLEwkYC9cCHmvCFDkD0krwPJuCBj80ICGXUmvmF55nyl/4Cm", "X-Forefront-Antispam-Report": "CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:;\n IPV:NLI; SFV:NSPM; H:SJ0PR13MB5545.namprd13.prod.outlook.com; PTR:; CAT:NONE;\n SFS:(13230016)(4636009)(376002)(396003)(346002)(366004)(136003)(39840400004)(186003)(6486002)(38100700002)(478600001)(66574015)(83380400001)(107886003)(2616005)(38350700002)(4326008)(316002)(6916009)(66946007)(66476007)(5660300002)(6512007)(6506007)(66556008)(26005)(52116002)(30864003)(44832011)(41300700001)(86362001)(36756003)(8936002)(6666004)(2906002)(8676002);\n DIR:OUT; SFP:1102;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "=?utf-8?q?JWuHMVRhIeafbDcBJp7bpfb3mWIW?=\n\t=?utf-8?q?EhFYrA2fckq8fIS74ukFoH+27CfUahQpgOdm8C0mxVnp3k/961npfC7GvByv1Pgmb?=\n\t=?utf-8?q?2jI56UwgTRAMwaElGCz3SvqDNHVJYxS1QPUlK3ZROlqy1svrsDvj1nzBSEBO5hG5Z?=\n\t=?utf-8?q?lB8efQx02cAWYP9lXk/bcB6bVkYRJATC26YNrnEquSUMv9751aXOSwVN2StzmFghk?=\n\t=?utf-8?q?/s5HbsPYCgynN2QHq1LsXgCwvEpBXDRgF8E/5rint18PpSmw13dQvvD1rT6kVs0f4?=\n\t=?utf-8?q?yRfx6RYaDuOrggYkPhlGbmLaCnmsQPvWEuC5BdJlATBJAT2XDzsZMe1mhXfpV8hNG?=\n\t=?utf-8?q?QLD/vQp5Fs5vN+gd0c74Lub++lxsehSe2GGS2H+qoraJMsqQ2A4rHBB6P0wNIczcE?=\n\t=?utf-8?q?hw3i9IM9Q8cdgEeCEiJO/ukKSvK982Gfe2JUJdl+oavSvmXQx4totHRRIcGxc2NMg?=\n\t=?utf-8?q?frDZpPuzN0M81eCn5mWtNI2CuJ2/+WI0EEjE/Q2nbmibK6GkCiBpU5IT9gjtiCfJJ?=\n\t=?utf-8?q?1WAauJHDagBan6SDyOpmVmctUhz70HWPrs2Gj8LebCJsCdlPIe9HHyJsYXtDBbuG3?=\n\t=?utf-8?q?3xKjVNWLTIuS6jcWYDRRkx7D4nrUeYiSIik8cc82K/ptP8VOpxjuiq9SwZX6UK+5F?=\n\t=?utf-8?q?AoYtIokZcFjdhkp6YgT3Nn6k9AEZURxyq92HFJ2b79Aci6a6U8uSWwBu4XUrX93Jk?=\n\t=?utf-8?q?eiKszBueCRP8yDcEV08rcVTkcZOeN+5v5HgiaYl7URCXOElKw5K6Cpb50vTRJad0w?=\n\t=?utf-8?q?9NeMJ3piQe6ZX3V17CipeKMB1GGnEHcxFQCEBd4OtTBkjl7BAdFwZTKPzfBQsNt2O?=\n\t=?utf-8?q?1Rn1A7nKOEN7Jcr0EjQU+XS1iqvdK0IDj/09rYNBttGRc5WyVEQA1BbQ5R7b9sGpQ?=\n\t=?utf-8?q?V1L4bGo35gM3DTxp7x+ZO1uIG+6XXhhEwD9FV7oPAhuIxYQwW0vFM8IY9nsJgk8Zr?=\n\t=?utf-8?q?XSPrGxV3qSWBjiXF/NoxvMXhqaDRuFWtXiT2E9BKvfT3fLXwi4LweC1SYOYHlHS4L?=\n\t=?utf-8?q?vfIgLpx5H2e0L+Zl/Qd9ZhG2MiFLsbNpymQl1sSxrysdmFGcGrpzoSdQmHhac4Oj7?=\n\t=?utf-8?q?si2wMWxIfGwQPtEOPv9MOG2d2prKPXqfhsQQ126215MsBOb1hXxCD75Q0OL8HrSP+?=\n\t=?utf-8?q?ba1O3NTrSTWxUlV9huO1PWrRHqdLkVqv+szwOKpExNQo+qKZ/avZHGRwnTRk7S0Zy?=\n\t=?utf-8?q?hySct5beChDC0O5vjMrQyvK7kCIF2+3c8Fx5zkZwmVgCvKvHcX8s+4fAhi6UWWtW8?=\n\t=?utf-8?q?ObdK8sGj565S+MTN1hNXNyJRYNvlVp0WIIV5Xpf2gveNp2FQIHtdlWR3xKFtKV/Ps?=\n\t=?utf-8?q?ooY5fT0uGkU1zW9KsiQdqTchvmxeaAB4uTz3yZjZABnCH683CE/aP+fxbspvu8tXE?=\n\t=?utf-8?q?/rW6YsBcsZdPeuyJi+4Oc3eyZj0TT6kBNFoX+pTxPsZZpKMJunRkczUaKouUCRT4S?=\n\t=?utf-8?q?WK+75WYITrDRJdbavGYXw00hKZElth4z3SRH57gTRRhjy7YoTirwOzd67uNhATFYz?=\n\t=?utf-8?q?gg8JAqiLtUzZXY+06xpHSkD9Inx1aapxPA=3D=3D?=", "X-OriginatorOrg": "corigine.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 7e95dae0-164a-4fb9-3d98-08da5b086158", "X-MS-Exchange-CrossTenant-AuthSource": "SJ0PR13MB5545.namprd13.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "01 Jul 2022 02:21:17.8478 (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "fe128f2c-073b-4c20-818e-7246a585940c", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n AkkLeLNMLsPPulZRraSmFqAN9a1n0im3+gOjsm9j3JC92I5c2fHt4exLJHx7K4K3j04nMdhCBFs9czs3xixkxoq8FCA/2La0NO384G7+s4k=", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM6PR13MB2379", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "This commit adds the setup/start logic for the ctrl vNIC. This vNIC\nis used by the PMD and flower firmware as a communication channel\nbetween driver and firmware. In the case of OVS it is also used to\ncommunicate flow statistics from hardware to the driver.\n\nA rte_eth device is not exposed to DPDK for this vNIC as it is strictly\nused internally by flower logic. Rx and Tx logic will be added later for\nthis vNIC.\n\nSigned-off-by: Chaoyong He <chaoyong.he@corigine.com>\nReviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>\n---\n drivers/net/nfp/flower/nfp_flower.c | 391 +++++++++++++++++++++++++++++++++++-\n drivers/net/nfp/flower/nfp_flower.h | 6 +\n 2 files changed, 394 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/net/nfp/flower/nfp_flower.c b/drivers/net/nfp/flower/nfp_flower.c\nindex 417155e..6cdec87 100644\n--- a/drivers/net/nfp/flower/nfp_flower.c\n+++ b/drivers/net/nfp/flower/nfp_flower.c\n@@ -26,6 +26,10 @@\n #define MEMPOOL_CACHE_SIZE 512\n #define DEFAULT_FLBUF_SIZE 9216\n \n+#define CTRL_VNIC_NB_DESC 64\n+#define CTRL_VNIC_RX_FREE_THRESH 32\n+#define CTRL_VNIC_TX_FREE_THRESH 32\n+\n /*\n * Simple dev ops functions for the flower PF. Because a rte_device is exposed\n * to DPDK the flower logic also makes use of helper functions like\n@@ -549,6 +553,308 @@\n \treturn ret;\n }\n \n+static void\n+nfp_flower_cleanup_ctrl_vnic(struct nfp_net_hw *hw)\n+{\n+\tuint32_t i;\n+\tstruct nfp_net_rxq *rxq;\n+\tstruct nfp_net_txq *txq;\n+\tstruct rte_eth_dev *eth_dev;\n+\n+\teth_dev = hw->eth_dev;\n+\n+\tfor (i = 0; i < hw->max_tx_queues; i++) {\n+\t\ttxq = eth_dev->data->tx_queues[i];\n+\t\tif (txq) {\n+\t\t\trte_free(txq->txbufs);\n+\t\t\trte_eth_dma_zone_free(eth_dev, \"ctrl_tx_ring\", i);\n+\t\t\trte_free(txq);\n+\t\t}\n+\t}\n+\n+\tfor (i = 0; i < hw->max_rx_queues; i++) {\n+\t\trxq = eth_dev->data->rx_queues[i];\n+\t\tif (rxq) {\n+\t\t\trte_free(rxq->rxbufs);\n+\t\t\trte_eth_dma_zone_free(eth_dev, \"ctrl_rx_ring\", i);\n+\t\t\trte_free(rxq);\n+\t\t}\n+\t}\n+\n+\trte_free(eth_dev->data->tx_queues);\n+\trte_free(eth_dev->data->rx_queues);\n+\trte_free(eth_dev->data);\n+\trte_free(eth_dev);\n+}\n+\n+static int\n+nfp_flower_init_ctrl_vnic(struct nfp_net_hw *hw)\n+{\n+\tuint32_t i;\n+\tint ret = 0;\n+\tuint16_t nb_desc;\n+\tunsigned int numa_node;\n+\tstruct rte_mempool *mp;\n+\tuint16_t rx_free_thresh;\n+\tuint16_t tx_free_thresh;\n+\tstruct nfp_net_rxq *rxq;\n+\tstruct nfp_net_txq *txq;\n+\tstruct nfp_pf_dev *pf_dev;\n+\tstruct rte_eth_dev *eth_dev;\n+\tconst struct rte_memzone *tz;\n+\tstruct nfp_app_flower *app_flower;\n+\n+\t/* Hardcoded values for now */\n+\tnb_desc = CTRL_VNIC_NB_DESC;\n+\trx_free_thresh = CTRL_VNIC_RX_FREE_THRESH;\n+\ttx_free_thresh = CTRL_VNIC_TX_FREE_THRESH;\n+\tnuma_node = rte_socket_id();\n+\n+\t/* Set up some pointers here for ease of use */\n+\tpf_dev = hw->pf_dev;\n+\tapp_flower = NFP_APP_PRIV_TO_APP_FLOWER(pf_dev->app_priv);\n+\n+\tret = nfp_flower_init_vnic_common(hw, \"ctrl_vnic\");\n+\tif (ret)\n+\t\tgoto done;\n+\n+\t/* Allocate memory for the eth_dev of the vNIC */\n+\thw->eth_dev = rte_zmalloc(\"ctrl_vnic_eth_dev\",\n+\t\tsizeof(struct rte_eth_dev), RTE_CACHE_LINE_SIZE);\n+\tif (hw->eth_dev == NULL) {\n+\t\tret = -ENOMEM;\n+\t\tgoto done;\n+\t}\n+\n+\t/* Grab the pointer to the newly created rte_eth_dev here */\n+\teth_dev = hw->eth_dev;\n+\n+\t/* Also allocate memory for the data part of the eth_dev */\n+\teth_dev->data = rte_zmalloc(\"ctrl_vnic_eth_dev_data\",\n+\t\tsizeof(struct rte_eth_dev_data), RTE_CACHE_LINE_SIZE);\n+\tif (eth_dev->data == NULL) {\n+\t\tret = -ENOMEM;\n+\t\tgoto eth_dev_cleanup;\n+\t}\n+\n+\teth_dev->data->rx_queues = rte_zmalloc(\"ethdev->rx_queues\",\n+\t\tsizeof(eth_dev->data->rx_queues[0]) * hw->max_rx_queues,\n+\t\tRTE_CACHE_LINE_SIZE);\n+\tif (eth_dev->data->rx_queues == NULL) {\n+\t\tPMD_INIT_LOG(ERR, \"rte_zmalloc failed for ctrl vnic rx queues\");\n+\t\tret = -ENOMEM;\n+\t\tgoto dev_data_cleanup;\n+\t}\n+\n+\teth_dev->data->tx_queues = rte_zmalloc(\"ethdev->tx_queues\",\n+\t\tsizeof(eth_dev->data->tx_queues[0]) * hw->max_tx_queues,\n+\t\tRTE_CACHE_LINE_SIZE);\n+\tif (eth_dev->data->tx_queues == NULL) {\n+\t\tPMD_INIT_LOG(ERR, \"rte_zmalloc failed for ctrl vnic tx queues\");\n+\t\tret = -ENOMEM;\n+\t\tgoto rx_queue_cleanup;\n+\t}\n+\n+\teth_dev->device = &pf_dev->pci_dev->device;\n+\teth_dev->data->nb_tx_queues = hw->max_tx_queues;\n+\teth_dev->data->nb_rx_queues = hw->max_rx_queues;\n+\teth_dev->data->dev_private = hw;\n+\n+\t/* Create a mbuf pool for the vNIC */\n+\tapp_flower->ctrl_pktmbuf_pool = rte_pktmbuf_pool_create(\"ctrl_mbuf_pool\",\n+\t\t2 * nb_desc, 64, 0, 9216, numa_node);\n+\tif (app_flower->ctrl_pktmbuf_pool == NULL) {\n+\t\tPMD_INIT_LOG(ERR, \"create mbuf pool for ctrl vnic failed\");\n+\t\tret = -ENOMEM;\n+\t\tgoto tx_queue_cleanup;\n+\t}\n+\n+\tmp = app_flower->ctrl_pktmbuf_pool;\n+\n+\t/* Set up the Rx queues */\n+\tPMD_INIT_LOG(INFO, \"Configuring flower ctrl vNIC Rx queue\");\n+\tfor (i = 0; i < hw->max_rx_queues; i++) {\n+\t\t/* Hardcoded number of desc to 64 */\n+\t\trxq = rte_zmalloc_socket(\"ethdev RX queue\",\n+\t\t\tsizeof(struct nfp_net_rxq), RTE_CACHE_LINE_SIZE,\n+\t\t\tnuma_node);\n+\t\tif (rxq == NULL) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Error allocating rxq\");\n+\t\t\tret = -ENOMEM;\n+\t\t\tgoto rx_queue_setup_cleanup;\n+\t\t}\n+\n+\t\teth_dev->data->rx_queues[i] = rxq;\n+\n+\t\t/* Hw queues mapping based on firmware configuration */\n+\t\trxq->qidx = i;\n+\t\trxq->fl_qcidx = i * hw->stride_rx;\n+\t\trxq->rx_qcidx = rxq->fl_qcidx + (hw->stride_rx - 1);\n+\t\trxq->qcp_fl = hw->rx_bar + NFP_QCP_QUEUE_OFF(rxq->fl_qcidx);\n+\t\trxq->qcp_rx = hw->rx_bar + NFP_QCP_QUEUE_OFF(rxq->rx_qcidx);\n+\n+\t\t/*\n+\t\t * Tracking mbuf size for detecting a potential mbuf overflow due to\n+\t\t * RX offset\n+\t\t */\n+\t\trxq->mem_pool = mp;\n+\t\trxq->mbuf_size = rxq->mem_pool->elt_size;\n+\t\trxq->mbuf_size -= (sizeof(struct rte_mbuf) + RTE_PKTMBUF_HEADROOM);\n+\t\thw->flbufsz = rxq->mbuf_size;\n+\n+\t\trxq->rx_count = nb_desc;\n+\t\trxq->rx_free_thresh = rx_free_thresh;\n+\t\trxq->drop_en = 1;\n+\n+\t\t/*\n+\t\t * Allocate RX ring hardware descriptors. A memzone large enough to\n+\t\t * handle the maximum ring size is allocated in order to allow for\n+\t\t * resizing in later calls to the queue setup function.\n+\t\t */\n+\t\ttz = rte_eth_dma_zone_reserve(eth_dev, \"ctrl_rx_ring\", i,\n+\t\t\tsizeof(struct nfp_net_rx_desc) * NFP_NET_MAX_RX_DESC,\n+\t\t\tNFP_MEMZONE_ALIGN, numa_node);\n+\t\tif (tz == NULL) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Error allocating rx dma\");\n+\t\t\trte_free(rxq);\n+\t\t\tret = -ENOMEM;\n+\t\t\tgoto rx_queue_setup_cleanup;\n+\t\t}\n+\n+\t\t/* Saving physical and virtual addresses for the RX ring */\n+\t\trxq->dma = (uint64_t)tz->iova;\n+\t\trxq->rxds = (struct nfp_net_rx_desc *)tz->addr;\n+\n+\t\t/* mbuf pointers array for referencing mbufs linked to RX descriptors */\n+\t\trxq->rxbufs = rte_zmalloc_socket(\"rxq->rxbufs\",\n+\t\t\tsizeof(*rxq->rxbufs) * nb_desc, RTE_CACHE_LINE_SIZE,\n+\t\t\tnuma_node);\n+\t\tif (rxq->rxbufs == NULL) {\n+\t\t\trte_eth_dma_zone_free(eth_dev, \"ctrl_rx_ring\", i);\n+\t\t\trte_free(rxq);\n+\t\t\tret = -ENOMEM;\n+\t\t\tgoto rx_queue_setup_cleanup;\n+\t\t}\n+\n+\t\tPMD_RX_LOG(DEBUG, \"rxbufs=%p hw_ring=%p dma_addr=0x%llx\",\n+\t\t\trxq->rxbufs, rxq->rxds, rxq->dma);\n+\n+\t\tnfp_net_reset_rx_queue(rxq);\n+\n+\t\trxq->hw = hw;\n+\n+\t\t/*\n+\t\t * Telling the HW about the physical address of the RX ring and number\n+\t\t * of descriptors in log2 format\n+\t\t */\n+\t\tnn_cfg_writeq(hw, NFP_NET_CFG_RXR_ADDR(i), rxq->dma);\n+\t\tnn_cfg_writeb(hw, NFP_NET_CFG_RXR_SZ(i), rte_log2_u32(nb_desc));\n+\t}\n+\n+\t/* Now the Tx queues */\n+\tPMD_INIT_LOG(INFO, \"Configuring flower ctrl vNIC Tx queue\");\n+\tfor (i = 0; i < hw->max_tx_queues; i++) {\n+\t\t/* Hardcoded number of desc to 64 */\n+\t\t/* Allocating tx queue data structure */\n+\t\ttxq = rte_zmalloc_socket(\"ethdev TX queue\",\n+\t\t\tsizeof(struct nfp_net_txq), RTE_CACHE_LINE_SIZE,\n+\t\t\tnuma_node);\n+\t\tif (txq == NULL) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Error allocating txq\");\n+\t\t\tret = -ENOMEM;\n+\t\t\tgoto tx_queue_setup_cleanup;\n+\t\t}\n+\n+\t\teth_dev->data->tx_queues[i] = txq;\n+\n+\t\t/*\n+\t\t * Allocate TX ring hardware descriptors. A memzone large enough to\n+\t\t * handle the maximum ring size is allocated in order to allow for\n+\t\t * resizing in later calls to the queue setup function.\n+\t\t */\n+\t\ttz = rte_eth_dma_zone_reserve(eth_dev, \"ctrl_tx_ring\", i,\n+\t\t\tsizeof(struct nfp_net_nfd3_tx_desc) * NFP_NET_MAX_TX_DESC,\n+\t\t\tNFP_MEMZONE_ALIGN, numa_node);\n+\t\tif (tz == NULL) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Error allocating tx dma\");\n+\t\t\trte_free(txq);\n+\t\t\tret = -ENOMEM;\n+\t\t\tgoto tx_queue_setup_cleanup;\n+\t\t}\n+\n+\t\ttxq->tx_count = nb_desc;\n+\t\ttxq->tx_free_thresh = tx_free_thresh;\n+\t\ttxq->tx_pthresh = DEFAULT_TX_PTHRESH;\n+\t\ttxq->tx_hthresh = DEFAULT_TX_HTHRESH;\n+\t\ttxq->tx_wthresh = DEFAULT_TX_WTHRESH;\n+\n+\t\t/* queue mapping based on firmware configuration */\n+\t\ttxq->qidx = i;\n+\t\ttxq->tx_qcidx = i * hw->stride_tx;\n+\t\ttxq->qcp_q = hw->tx_bar + NFP_QCP_QUEUE_OFF(txq->tx_qcidx);\n+\n+\t\t/* Saving physical and virtual addresses for the TX ring */\n+\t\ttxq->dma = (uint64_t)tz->iova;\n+\t\ttxq->txds = (struct nfp_net_nfd3_tx_desc *)tz->addr;\n+\n+\t\t/* mbuf pointers array for referencing mbufs linked to TX descriptors */\n+\t\ttxq->txbufs = rte_zmalloc_socket(\"txq->txbufs\",\n+\t\t\tsizeof(*txq->txbufs) * nb_desc, RTE_CACHE_LINE_SIZE,\n+\t\t\tnuma_node);\n+\t\tif (txq->txbufs == NULL) {\n+\t\t\trte_eth_dma_zone_free(eth_dev, \"ctrl_tx_ring\", i);\n+\t\t\trte_free(txq);\n+\t\t\tret = -ENOMEM;\n+\t\t\tgoto tx_queue_setup_cleanup;\n+\t\t}\n+\n+\t\tPMD_TX_LOG(DEBUG, \"txbufs=%p hw_ring=%p dma_addr=0x%llx\",\n+\t\t\ttxq->txbufs, txq->txds, txq->dma);\n+\n+\t\tnfp_net_reset_tx_queue(txq);\n+\n+\t\ttxq->hw = hw;\n+\n+\t\t/*\n+\t\t * Telling the HW about the physical address of the TX ring and number\n+\t\t * of descriptors in log2 format\n+\t\t */\n+\t\tnn_cfg_writeq(hw, NFP_NET_CFG_TXR_ADDR(i), txq->dma);\n+\t\tnn_cfg_writeb(hw, NFP_NET_CFG_TXR_SZ(i), rte_log2_u32(nb_desc));\n+\t}\n+\n+\treturn 0;\n+\n+tx_queue_setup_cleanup:\n+\tfor (i = 0; i < hw->max_tx_queues; i++) {\n+\t\ttxq = eth_dev->data->tx_queues[i];\n+\t\tif (txq) {\n+\t\t\trte_free(txq->txbufs);\n+\t\t\trte_eth_dma_zone_free(eth_dev, \"ctrl_tx_ring\", i);\n+\t\t\trte_free(txq);\n+\t\t}\n+\t}\n+rx_queue_setup_cleanup:\n+\tfor (i = 0; i < hw->max_rx_queues; i++) {\n+\t\trxq = eth_dev->data->rx_queues[i];\n+\t\tif (rxq) {\n+\t\t\trte_free(rxq->rxbufs);\n+\t\t\trte_eth_dma_zone_free(eth_dev, \"ctrl_rx_ring\", i);\n+\t\t\trte_free(rxq);\n+\t\t}\n+\t}\n+tx_queue_cleanup:\n+\trte_free(eth_dev->data->tx_queues);\n+rx_queue_cleanup:\n+\trte_free(eth_dev->data->rx_queues);\n+dev_data_cleanup:\n+\trte_free(eth_dev->data);\n+eth_dev_cleanup:\n+\trte_free(eth_dev);\n+done:\n+\treturn ret;\n+}\n+\n static int\n nfp_flower_start_pf_vnic(struct nfp_net_hw *hw)\n {\n@@ -567,12 +873,57 @@\n \treturn 0;\n }\n \n+static int\n+nfp_flower_start_ctrl_vnic(struct nfp_net_hw *hw)\n+{\n+\tint ret;\n+\tuint32_t update;\n+\tuint32_t new_ctrl;\n+\tstruct rte_eth_dev *dev;\n+\n+\tdev = hw->eth_dev;\n+\n+\t/* Disabling queues just in case... */\n+\tnfp_net_disable_queues(dev);\n+\n+\t/* Enabling the required queues in the device */\n+\tnfp_net_enable_queues(dev);\n+\n+\t/* Writing configuration parameters in the device */\n+\tnfp_net_params_setup(hw);\n+\n+\tnew_ctrl = NFP_NET_CFG_CTRL_ENABLE;\n+\tupdate = NFP_NET_CFG_UPDATE_GEN | NFP_NET_CFG_UPDATE_RING |\n+\t\t NFP_NET_CFG_UPDATE_MSIX;\n+\n+\trte_wmb();\n+\n+\t/* If an error when reconfig we avoid to change hw state */\n+\tret = nfp_net_reconfig(hw, new_ctrl, update);\n+\tif (ret) {\n+\t\tPMD_INIT_LOG(ERR, \"Failed to reconfig ctrl vnic\");\n+\t\treturn -EIO;\n+\t}\n+\n+\thw->ctrl = new_ctrl;\n+\n+\t/* Setup the freelist ring */\n+\tret = nfp_net_rx_freelist_setup(dev);\n+\tif (ret) {\n+\t\tPMD_INIT_LOG(ERR, \"Error with flower ctrl vNIC freelist setup\");\n+\t\treturn -EIO;\n+\t}\n+\n+\treturn 0;\n+}\n+\n int\n nfp_init_app_flower(struct nfp_pf_dev *pf_dev)\n {\n \tint ret;\n \tunsigned int numa_node;\n \tstruct nfp_net_hw *pf_hw;\n+\tstruct nfp_net_hw *ctrl_hw;\n \tstruct nfp_app_flower *app_flower;\n \n \tnuma_node = rte_socket_id();\n@@ -618,29 +969,63 @@\n \tpf_hw->pf_dev = pf_dev;\n \tpf_hw->cpp = pf_dev->cpp;\n \n+\t/* The ctrl vNIC struct comes directly after the PF one */\n+\tapp_flower->ctrl_hw = pf_hw + 1;\n+\tctrl_hw = app_flower->ctrl_hw;\n+\n+\t/* Map the ctrl vNIC ctrl bar */\n+\tctrl_hw->ctrl_bar = nfp_rtsym_map(pf_dev->sym_tbl, \"_pf0_net_ctrl_bar\",\n+\t\t32768, &ctrl_hw->ctrl_area);\n+\tif (ctrl_hw->ctrl_bar == NULL) {\n+\t\tPMD_INIT_LOG(ERR, \"Cloud not map the ctrl vNIC ctrl bar\");\n+\t\tret = -ENODEV;\n+\t\tgoto pf_cpp_area_cleanup;\n+\t}\n+\n+\t/* Now populate the ctrl vNIC */\n+\tctrl_hw->pf_dev = pf_dev;\n+\tctrl_hw->cpp = pf_dev->cpp;\n+\n \tret = nfp_flower_init_pf_vnic(app_flower->pf_hw);\n \tif (ret) {\n \t\tPMD_INIT_LOG(ERR, \"Could not initialize flower PF vNIC\");\n-\t\tgoto pf_cpp_area_cleanup;\n+\t\tgoto ctrl_cpp_area_cleanup;\n+\t}\n+\n+\tret = nfp_flower_init_ctrl_vnic(app_flower->ctrl_hw);\n+\tif (ret) {\n+\t\tPMD_INIT_LOG(ERR, \"Could not initialize flower ctrl vNIC\");\n+\t\tgoto pf_vnic_cleanup;\n \t}\n \n \t/* Start the PF vNIC */\n \tret = nfp_flower_start_pf_vnic(app_flower->pf_hw);\n \tif (ret) {\n \t\tPMD_INIT_LOG(ERR, \"Could not start flower PF vNIC\");\n-\t\tgoto pf_vnic_cleanup;\n+\t\tgoto ctrl_vnic_cleanup;\n+\t}\n+\n+\t/* Start the ctrl vNIC */\n+\tret = nfp_flower_start_ctrl_vnic(app_flower->ctrl_hw);\n+\tif (ret) {\n+\t\tPMD_INIT_LOG(ERR, \"Could not start flower ctrl vNIC\");\n+\t\tgoto ctrl_vnic_cleanup;\n \t}\n \n \t/* Start up flower services */\n \tif (nfp_flower_enable_services(app_flower)) {\n \t\tret = -ESRCH;\n-\t\tgoto pf_vnic_cleanup;\n+\t\tgoto ctrl_vnic_cleanup;\n \t}\n \n \treturn 0;\n \n+ctrl_vnic_cleanup:\n+\tnfp_flower_cleanup_ctrl_vnic(app_flower->ctrl_hw);\n pf_vnic_cleanup:\n \tnfp_flower_cleanup_pf_vnic(app_flower->pf_hw);\n+ctrl_cpp_area_cleanup:\n+\tnfp_cpp_area_free(ctrl_hw->ctrl_area);\n pf_cpp_area_cleanup:\n \tnfp_cpp_area_free(pf_dev->ctrl_area);\n eth_tbl_cleanup:\ndiff --git a/drivers/net/nfp/flower/nfp_flower.h b/drivers/net/nfp/flower/nfp_flower.h\nindex f6fd4eb..f11ef6d 100644\n--- a/drivers/net/nfp/flower/nfp_flower.h\n+++ b/drivers/net/nfp/flower/nfp_flower.h\n@@ -21,6 +21,12 @@ struct nfp_app_flower {\n \t/* Pointer to the PF vNIC */\n \tstruct nfp_net_hw *pf_hw;\n \n+\t/* Pointer to a mempool for the ctrlvNIC */\n+\tstruct rte_mempool *ctrl_pktmbuf_pool;\n+\n+\t/* Pointer to the ctrl vNIC */\n+\tstruct nfp_net_hw *ctrl_hw;\n+\n \t/* the eth table as reported by firmware */\n \tstruct nfp_eth_table *nfp_eth_table;\n };\n", "prefixes": [ "v4", "07/12" ] }