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GET /api/patches/112322/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 112322,
    "url": "http://patches.dpdk.org/api/patches/112322/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220604162651.3503338-6-tduszynski@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20220604162651.3503338-6-tduszynski@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20220604162651.3503338-6-tduszynski@marvell.com",
    "date": "2022-06-04T16:26:46",
    "name": "[05/10] raw/cnxk_bphy: support switching from eCPRI to CPRI",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "d44547b525fdf3f1c692d8cfc244cc658591e8a3",
    "submitter": {
        "id": 2215,
        "url": "http://patches.dpdk.org/api/people/2215/?format=api",
        "name": "Tomasz Duszynski",
        "email": "tduszynski@marvell.com"
    },
    "delegate": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220604162651.3503338-6-tduszynski@marvell.com/mbox/",
    "series": [
        {
            "id": 23325,
            "url": "http://patches.dpdk.org/api/series/23325/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=23325",
            "date": "2022-06-04T16:26:41",
            "name": "Sync BPHY changes",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/23325/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/112322/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/112322/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8E954A034C;\n\tSat,  4 Jun 2022 18:29:31 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 820504021E;\n\tSat,  4 Jun 2022 18:29:31 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id AB76640041\n for <dev@dpdk.org>; Sat,  4 Jun 2022 18:29:30 +0200 (CEST)",
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            "from localhost.localdomain (unknown [10.28.34.39])\n by maili.marvell.com (Postfix) with ESMTP id 8146C3F70AB;\n Sat,  4 Jun 2022 09:27:22 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=+PxteVAo5JK+Xz/H2GMwCwMr6Vtfd8VTAB4h1NCj7BQ=;\n b=ZhXeP4CajAv23KEkWYvZ1i/FHumBQWasEBXHAlrKMKZ4QO4zOhoZrUFiL5bfDnHlvUZ9\n izPVcF/+qhjSIliHFuyHhwhHmiujoQNLVX8cKzS7DvVwuEsdjS3cJEdFka8S0IpjYlue\n HASf88LurovI8LeuFsBLcXZMA+zbgaaJrGhNOGt2CWQWtGDzovTyDSwmKmJQ2ZdhHP/d\n csZW19Nml1UJxuMFX3G0hDdfvA/BCdReZSy2n+h+M+fLKFRVqZoZRv48aLAZ63lWhLB1\n 29T10gAE9B9sJZZlJHEFpKhQt9Qr08YRWRmevLKeP3LLfsGFfGL8fyXMDRwgfhVCv0ex iQ==",
        "From": "Tomasz Duszynski <tduszynski@marvell.com>",
        "To": "<dev@dpdk.org>, Jakub Palider <jpalider@marvell.com>, Tomasz Duszynski\n <tduszynski@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>,\n \"Kiran Kumar K\" <kirankumark@marvell.com>,\n Sunil Kumar Kori <skori@marvell.com>,\n Satha Rao <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>",
        "CC": "<thomas@monjalon.net>, <jerinj@marvell.com>",
        "Subject": "[PATCH 05/10] raw/cnxk_bphy: support switching from eCPRI to CPRI",
        "Date": "Sat, 4 Jun 2022 18:26:46 +0200",
        "Message-ID": "<20220604162651.3503338-6-tduszynski@marvell.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20220604162651.3503338-1-tduszynski@marvell.com>",
        "References": "<20220604162651.3503338-1-tduszynski@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-ORIG-GUID": "vq1neueeXiOWwo7mV7Fp2QLn_66a_Q5S",
        "X-Proofpoint-GUID": "vq1neueeXiOWwo7mV7Fp2QLn_66a_Q5S",
        "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.517,FMLib:17.11.64.514\n definitions=2022-06-04_05,2022-06-03_01,2022-02-23_01",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Add support for switching from ethernet (eCPRI) to CPRI mode.\n\nSigned-off-by: Tomasz Duszynski <tduszynski@marvell.com>\nReviewed-by: Jakub Palider <jpalider@marvell.com>\nReviewed-by: Jerin Jacob Kollanukkaran <jerinj@marvell.com>\n---\n doc/guides/rawdevs/cnxk_bphy.rst        | 11 +++++++\n drivers/common/cnxk/roc_bphy_cgx.c      | 33 ++++++++++++++++++++\n drivers/common/cnxk/roc_bphy_cgx.h      | 14 +++++++--\n drivers/common/cnxk/roc_bphy_cgx_priv.h |  8 +++++\n drivers/common/cnxk/roc_model.h         | 24 +++++++++++++++\n drivers/common/cnxk/version.map         |  1 +\n drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c   | 13 ++++++++\n drivers/raw/cnxk_bphy/rte_pmd_bphy.h    | 40 +++++++++++++++++++++++++\n 8 files changed, 141 insertions(+), 3 deletions(-)",
    "diff": "diff --git a/doc/guides/rawdevs/cnxk_bphy.rst b/doc/guides/rawdevs/cnxk_bphy.rst\nindex 522390bf1b..7f55e9eac6 100644\n--- a/doc/guides/rawdevs/cnxk_bphy.rst\n+++ b/doc/guides/rawdevs/cnxk_bphy.rst\n@@ -100,6 +100,17 @@ Message must have type set to ``CNXK_BPHY_CGX_MSG_TYPE_START_RXTX`` or\n ``CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX``. Former will enable traffic while the latter will\n do the opposite.\n \n+Change mode from eCPRI to CPRI\n+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n+\n+Message is used to change operating mode from eCPRI to CPRI along with other\n+settings.\n+\n+Message must have type set to ``CNXK_BPHY_CGX_MSG_TYPE_CPRI_MODE_CHANGE``.\n+Prior to sending actual message payload i.e\n+``struct cnxk_bphy_cgx_msg_cpri_mode_change`` needs to be filled with relevant\n+information.\n+\n BPHY PMD\n --------\n \ndiff --git a/drivers/common/cnxk/roc_bphy_cgx.c b/drivers/common/cnxk/roc_bphy_cgx.c\nindex a0a0d22f85..223bd313fa 100644\n--- a/drivers/common/cnxk/roc_bphy_cgx.c\n+++ b/drivers/common/cnxk/roc_bphy_cgx.c\n@@ -455,3 +455,36 @@ roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,\n \n \treturn 0;\n }\n+\n+int\n+roc_bphy_cgx_cpri_mode_change(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,\n+\t\t\t      struct roc_bphy_cgx_cpri_mode_change *mode)\n+{\n+\tuint64_t scr1, scr0;\n+\n+\tif (!(roc_model_is_cnf95xxn_a0() ||\n+\t      roc_model_is_cnf95xxn_a1() ||\n+\t      roc_model_is_cnf95xxn_b0()))\n+\t\treturn -ENOTSUP;\n+\n+\tif (!roc_cgx)\n+\t\treturn -EINVAL;\n+\n+\tif (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac))\n+\t\treturn -ENODEV;\n+\n+\tif (!mode)\n+\t\treturn -EINVAL;\n+\n+\tscr1 = FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_CPRI_MODE_CHANGE) |\n+\t       FIELD_PREP(SCR1_CPRI_MODE_CHANGE_ARGS_GSERC_IDX,\n+\t\t\t  mode->gserc_idx) |\n+\t       FIELD_PREP(SCR1_CPRI_MODE_CHANGE_ARGS_LANE_IDX, mode->lane_idx) |\n+\t       FIELD_PREP(SCR1_CPRI_MODE_CHANGE_ARGS_RATE, mode->rate) |\n+\t       FIELD_PREP(SCR1_CPRI_MODE_CHANGE_ARGS_DISABLE_LEQ,\n+\t\t\t  mode->disable_leq) |\n+\t       FIELD_PREP(SCR1_CPRI_MODE_CHANGE_ARGS_DISABLE_DFE,\n+\t\t\t  mode->disable_dfe);\n+\n+\treturn roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0);\n+}\ndiff --git a/drivers/common/cnxk/roc_bphy_cgx.h b/drivers/common/cnxk/roc_bphy_cgx.h\nindex d522d4e202..59adddd420 100644\n--- a/drivers/common/cnxk/roc_bphy_cgx.h\n+++ b/drivers/common/cnxk/roc_bphy_cgx.h\n@@ -92,6 +92,14 @@ struct roc_bphy_cgx_link_info {\n \tenum roc_bphy_cgx_eth_link_mode mode;\n };\n \n+struct roc_bphy_cgx_cpri_mode_change {\n+\tint gserc_idx;\n+\tint lane_idx;\n+\tint rate;\n+\tbool disable_leq;\n+\tbool disable_dfe;\n+};\n+\n __roc_api int roc_bphy_cgx_dev_init(struct roc_bphy_cgx *roc_cgx);\n __roc_api int roc_bphy_cgx_dev_fini(struct roc_bphy_cgx *roc_cgx);\n \n@@ -118,9 +126,9 @@ __roc_api int roc_bphy_cgx_ptp_rx_disable(struct roc_bphy_cgx *roc_cgx,\n __roc_api int roc_bphy_cgx_fec_set(struct roc_bphy_cgx *roc_cgx,\n \t\t\t\t   unsigned int lmac,\n \t\t\t\t   enum roc_bphy_cgx_eth_link_fec fec);\n-__roc_api int roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx *roc_cgx,\n-\t\t\t\t\t     unsigned int lmac,\n+__roc_api int roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,\n \t\t\t\t\t     enum roc_bphy_cgx_eth_link_fec *fec);\n-\n+__roc_api int roc_bphy_cgx_cpri_mode_change(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,\n+\t\t\t\t\t    struct roc_bphy_cgx_cpri_mode_change *mode);\n \n #endif /* _ROC_BPHY_CGX_H_ */\ndiff --git a/drivers/common/cnxk/roc_bphy_cgx_priv.h b/drivers/common/cnxk/roc_bphy_cgx_priv.h\nindex 6a6b5a7b08..cdd94989c8 100644\n--- a/drivers/common/cnxk/roc_bphy_cgx_priv.h\n+++ b/drivers/common/cnxk/roc_bphy_cgx_priv.h\n@@ -69,6 +69,7 @@ enum eth_cmd_id {\n \tETH_CMD_GET_SUPPORTED_FEC = 18,\n \tETH_CMD_SET_FEC = 19,\n \tETH_CMD_SET_PTP_MODE = 34,\n+\tETH_CMD_CPRI_MODE_CHANGE = 35,\n };\n \n /* event types - cause of interrupt */\n@@ -133,6 +134,13 @@ enum eth_cmd_own {\n /* struct eth_set_fec_args */\n #define SCR1_ETH_SET_FEC_ARGS GENMASK_ULL(9, 8)\n \n+/* struct eth_cpri_mode_change_args */\n+#define SCR1_CPRI_MODE_CHANGE_ARGS_GSERC_IDX   GENMASK_ULL(11, 8)\n+#define SCR1_CPRI_MODE_CHANGE_ARGS_LANE_IDX    GENMASK_ULL(15, 12)\n+#define SCR1_CPRI_MODE_CHANGE_ARGS_RATE        GENMASK_ULL(31, 16)\n+#define SCR1_CPRI_MODE_CHANGE_ARGS_DISABLE_LEQ BIT_ULL(32)\n+#define SCR1_CPRI_MODE_CHANGE_ARGS_DISABLE_DFE BIT_ULL(33)\n+\n #define SCR1_OWN_STATUS GENMASK_ULL(1, 0)\n \n #endif /* _ROC_BPHY_CGX_PRIV_H_ */\ndiff --git a/drivers/common/cnxk/roc_model.h b/drivers/common/cnxk/roc_model.h\nindex 4567566169..e28965d896 100644\n--- a/drivers/common/cnxk/roc_model.h\n+++ b/drivers/common/cnxk/roc_model.h\n@@ -134,6 +134,30 @@ roc_model_is_cn95_a0(void)\n \treturn roc_model->flag & ROC_MODEL_CNF95xx_A0;\n }\n \n+static inline uint64_t\n+roc_model_is_cnf95xxn_a0(void)\n+{\n+\treturn roc_model->flag & ROC_MODEL_CNF95xxN_A0;\n+}\n+\n+static inline uint64_t\n+roc_model_is_cnf95xxn_a1(void)\n+{\n+\treturn roc_model->flag & ROC_MODEL_CNF95xxN_A1;\n+}\n+\n+static inline uint64_t\n+roc_model_is_cnf95xxn_b0(void)\n+{\n+\treturn roc_model->flag & ROC_MODEL_CNF95xxN_B0;\n+}\n+\n+static inline uint16_t\n+roc_model_is_cn95xxn_a0(void)\n+{\n+\treturn roc_model->flag & ROC_MODEL_CNF95xxN_A0;\n+}\n+\n static inline uint64_t\n roc_model_is_cn10ka(void)\n {\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex a77f3f6e3c..720cad61ea 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -28,6 +28,7 @@ INTERNAL {\n \troc_ae_fpm_get;\n \troc_ae_fpm_put;\n \troc_aes_xcbc_key_derive;\n+\troc_bphy_cgx_cpri_mode_change;\n \troc_bphy_cgx_dev_fini;\n \troc_bphy_cgx_dev_init;\n \troc_bphy_cgx_fec_set;\ndiff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c\nindex 169cbc7855..803b245c78 100644\n--- a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c\n+++ b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c\n@@ -56,10 +56,12 @@ cnxk_bphy_cgx_process_buf(struct cnxk_bphy_cgx *cgx, unsigned int queue,\n \t\t\t  struct rte_rawdev_buf *buf)\n {\n \tstruct cnxk_bphy_cgx_queue *qp = &cgx->queues[queue];\n+\tstruct cnxk_bphy_cgx_msg_cpri_mode_change *cpri_mode;\n \tstruct cnxk_bphy_cgx_msg_set_link_state *link_state;\n \tstruct cnxk_bphy_cgx_msg *msg = buf->buf_addr;\n \tstruct cnxk_bphy_cgx_msg_link_mode *link_mode;\n \tstruct cnxk_bphy_cgx_msg_link_info *link_info;\n+\tstruct roc_bphy_cgx_cpri_mode_change rcpri_mode;\n \tstruct roc_bphy_cgx_link_info rlink_info;\n \tstruct roc_bphy_cgx_link_mode rlink_mode;\n \tenum roc_bphy_cgx_eth_link_fec *fec;\n@@ -135,6 +137,17 @@ cnxk_bphy_cgx_process_buf(struct cnxk_bphy_cgx *cgx, unsigned int queue,\n \t\tfec = msg->data;\n \t\tret = roc_bphy_cgx_fec_set(cgx->rcgx, lmac, *fec);\n \t\tbreak;\n+\tcase CNXK_BPHY_CGX_MSG_TYPE_CPRI_MODE_CHANGE:\n+\t\tcpri_mode = msg->data;\n+\t\tmemset(&rcpri_mode, 0, sizeof(rcpri_mode));\n+\t\trcpri_mode.gserc_idx = cpri_mode->gserc_idx;\n+\t\trcpri_mode.lane_idx = cpri_mode->lane_idx;\n+\t\trcpri_mode.rate = cpri_mode->rate;\n+\t\trcpri_mode.disable_leq = cpri_mode->disable_leq;\n+\t\trcpri_mode.disable_dfe = cpri_mode->disable_dfe;\n+\t\tret = roc_bphy_cgx_cpri_mode_change(cgx->rcgx, lmac,\n+\t\t\t\t\t\t    &rcpri_mode);\n+\t\tbreak;\n \tdefault:\n \t\treturn -EINVAL;\n \t}\ndiff --git a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h\nindex db8a13a4f8..36b75aa385 100644\n--- a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h\n+++ b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h\n@@ -50,6 +50,8 @@ enum cnxk_bphy_cgx_msg_type {\n \tCNXK_BPHY_CGX_MSG_TYPE_GET_SUPPORTED_FEC,\n \t/** Type used to set FEC */\n \tCNXK_BPHY_CGX_MSG_TYPE_SET_FEC,\n+\t/** Type used to switch from eCPRI to CPRI */\n+\tCNXK_BPHY_CGX_MSG_TYPE_CPRI_MODE_CHANGE,\n };\n \n /** Available link speeds */\n@@ -171,6 +173,19 @@ struct cnxk_bphy_cgx_msg_set_link_state {\n \tbool state; /* up or down */\n };\n \n+struct cnxk_bphy_cgx_msg_cpri_mode_change {\n+\t/** SERDES index (0 - 4) */\n+\tint gserc_idx;\n+\t/** Lane index (0 - 1) */\n+\tint lane_idx;\n+\t/** Baud rate (9830/4915/2458/6144/3072) */\n+\tint rate;\n+\t/** Disable LEQ */\n+\tbool disable_leq;\n+\t/** Disable  DFE */\n+\tbool disable_dfe;\n+};\n+\n struct cnxk_bphy_cgx_msg {\n \t/** Message type */\n \tenum cnxk_bphy_cgx_msg_type type;\n@@ -694,6 +709,31 @@ rte_pmd_bphy_cgx_set_fec(uint16_t dev_id, uint16_t lmac,\n \treturn __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);\n }\n \n+/**\n+ * Switch from eCPRI to CPRI and change\n+ *\n+ * @param dev_id\n+ *   The identifier of the device\n+ * @param lmac\n+ *   LMAC number for operation\n+ * @param mode\n+ *   CPRI structure which holds configuration data\n+ *\n+ * @return\n+ *   Returns 0 on success, negative error code otherwise\n+ */\n+static __rte_always_inline int\n+rte_pmd_bphy_cgx_cpri_mode_change(uint16_t dev_id, uint16_t lmac,\n+\t\t\t\t  struct cnxk_bphy_cgx_msg_cpri_mode_change *mode)\n+{\n+\tstruct cnxk_bphy_cgx_msg msg = {\n+\t\t.type = CNXK_BPHY_CGX_MSG_TYPE_CPRI_MODE_CHANGE,\n+\t\t.data = mode,\n+\t};\n+\n+\treturn __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);\n+}\n+\n #ifdef __cplusplus\n }\n #endif\n",
    "prefixes": [
        "05/10"
    ]
}