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GET /api/patches/111587/?format=api
{ "id": 111587, "url": "http://patches.dpdk.org/api/patches/111587/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220523023138.3777313-4-junfeng.guo@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220523023138.3777313-4-junfeng.guo@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220523023138.3777313-4-junfeng.guo@intel.com", "date": "2022-05-23T02:31:36", "name": "[v6,2/3] net/iavf: enable Protocol Agnostic Flow Offloading FDIR", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "fa41f3954f330582b92a21b2863375b0b283d401", "submitter": { "id": 1785, "url": "http://patches.dpdk.org/api/people/1785/?format=api", "name": "Junfeng Guo", "email": "junfeng.guo@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220523023138.3777313-4-junfeng.guo@intel.com/mbox/", "series": [ { "id": 23081, "url": "http://patches.dpdk.org/api/series/23081/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=23081", "date": "2022-05-23T02:31:33", "name": "Enable Protocol Agnostic Flow Offloading in AVF", "version": 6, "mbox": "http://patches.dpdk.org/series/23081/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/111587/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/111587/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 45B29A04FD;\n\tMon, 23 May 2022 04:31:38 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id BE3DF42B6E;\n\tMon, 23 May 2022 04:31:22 +0200 (CEST)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n by mails.dpdk.org (Postfix) with ESMTP id 1B480427F0\n for <dev@dpdk.org>; Mon, 23 May 2022 04:31:19 +0200 (CEST)", "from fmsmga007.fm.intel.com ([10.253.24.52])\n by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 22 May 2022 19:31:19 -0700", "from dpdk-jf-ntb-v2.sh.intel.com ([10.67.119.111])\n by fmsmga007.fm.intel.com with ESMTP; 22 May 2022 19:31:18 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1653273080; x=1684809080;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=cGCEattwcS+JWc06mZ6AnIPjuxYcqyArSNpDDeg890M=;\n b=kWXLqPdzStagxhlrYFKWGoZipr0JoVF7I7VT+vNmbS/inetajwC/2qxZ\n dy1HVKPFQ4HIRZuoME26xDXBcfe15i01g6nJpJ/ZoJBPuFAqfu0bNv6Mg\n EmuqS81TnhsnXnjIaoFU7+9/V16G/ZlbMQpc6TVGRIbJQyfiEb5sf7htJ\n KlXrO7sVy0o+qMYtFAD/6nR3X0S1HfT7jvTfOdVkmn9uYYMPPOh5R2Wwd\n u/3p6VJc3eUkeT5Qw5IpgwDfJBtMvq6a6ykSucGNXkBQ9Rj5ff7qXBdZi\n c2n4D3Cp3ygjaajGhHITkvdoN7uerMJF3xH8R2xZyegDg+rbYcEFL4JkD Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6400,9594,10355\"; a=\"270651630\"", "E=Sophos;i=\"5.91,245,1647327600\"; d=\"scan'208\";a=\"270651630\"", "E=Sophos;i=\"5.91,245,1647327600\"; d=\"scan'208\";a=\"577169715\"" ], "X-ExtLoop1": "1", "From": "Junfeng Guo <junfeng.guo@intel.com>", "To": "qi.z.zhang@intel.com,\n\tjingjing.wu@intel.com,\n\tbeilei.xing@intel.com", "Cc": "dev@dpdk.org,\n\tting.xu@intel.com,\n\tjunfeng.guo@intel.com", "Subject": "[PATCH v6 2/3] net/iavf: enable Protocol Agnostic Flow Offloading\n FDIR", "Date": "Mon, 23 May 2022 10:31:36 +0800", "Message-Id": "<20220523023138.3777313-4-junfeng.guo@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20220523023138.3777313-1-junfeng.guo@intel.com>", "References": "<20220520091648.3524540-2-junfeng.guo@intel.com>\n <20220523023138.3777313-1-junfeng.guo@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "This patch enabled Protocol Agnostic Flow (raw flow) Offloading Flow\nDirector (FDIR) in AVF, based on the Parser Library feature and the\nexisting rte_flow `raw` API.\n\nThe input spec and mask of raw pattern are first parsed via the\nParser Library, and then passed to the kernel driver to create the\nflow rule.\n\nSimilar as PF FDIR, each raw flow requires:\n1. A byte string of raw target packet bits.\n2. A byte string contains mask of target packet.\n\nHere is an example:\nFDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3:\n\nflow create 0 ingress pattern raw \\\npattern spec \\\n00000000000000000000000008004500001400004000401000000000000001020304 \\\npattern mask \\\n000000000000000000000000000000000000000000000000000000000000ffffffff \\\n/ end actions queue index 3 / mark id 3 / end\n\nNote that mask of some key bits (e.g., 0x0800 to indicate ipv4 proto)\nis optional in our cases. To avoid redundancy, we just omit the mask\nof 0x0800 (with 0xFFFF) in the mask byte string example. The prefix\n'0x' for the spec and mask byte (hex) strings are also omitted here.\n\nSigned-off-by: Junfeng Guo <junfeng.guo@intel.com>\n---\n doc/guides/rel_notes/release_22_07.rst | 1 +\n drivers/net/iavf/iavf_fdir.c | 67 ++++++++++++++++++++++++++\n drivers/net/iavf/iavf_generic_flow.c | 6 +++\n drivers/net/iavf/iavf_generic_flow.h | 3 ++\n 4 files changed, 77 insertions(+)", "diff": "diff --git a/doc/guides/rel_notes/release_22_07.rst b/doc/guides/rel_notes/release_22_07.rst\nindex a0eb6ab61b..829fa6047e 100644\n--- a/doc/guides/rel_notes/release_22_07.rst\n+++ b/doc/guides/rel_notes/release_22_07.rst\n@@ -65,6 +65,7 @@ New Features\n * Added Tx QoS queue rate limitation support.\n * Added quanta size configuration support.\n * Added ``DEV_RX_OFFLOAD_TIMESTAMP`` support.\n+ * Added Protocol Agnostic Flow Offloading support in AVF FDIR and RSS.\n \n * **Updated Intel ice driver.**\n \ndiff --git a/drivers/net/iavf/iavf_fdir.c b/drivers/net/iavf/iavf_fdir.c\nindex e9a3566c0d..f236260502 100644\n--- a/drivers/net/iavf/iavf_fdir.c\n+++ b/drivers/net/iavf/iavf_fdir.c\n@@ -194,6 +194,7 @@\n \tIAVF_INSET_TUN_TCP_DST_PORT)\n \n static struct iavf_pattern_match_item iavf_fdir_pattern[] = {\n+\t{iavf_pattern_raw,\t\t\t IAVF_INSET_NONE,\t\tIAVF_INSET_NONE},\n \t{iavf_pattern_ethertype,\t\t IAVF_FDIR_INSET_ETH,\t\tIAVF_INSET_NONE},\n \t{iavf_pattern_eth_ipv4,\t\t\t IAVF_FDIR_INSET_ETH_IPV4,\tIAVF_INSET_NONE},\n \t{iavf_pattern_eth_ipv4_udp,\t\t IAVF_FDIR_INSET_ETH_IPV4_UDP,\tIAVF_INSET_NONE},\n@@ -720,6 +721,7 @@ iavf_fdir_parse_pattern(__rte_unused struct iavf_adapter *ad,\n \tstruct virtchnl_proto_hdrs *hdrs =\n \t\t\t&filter->add_fltr.rule_cfg.proto_hdrs;\n \tenum rte_flow_item_type l3 = RTE_FLOW_ITEM_TYPE_END;\n+\tconst struct rte_flow_item_raw *raw_spec, *raw_mask;\n \tconst struct rte_flow_item_eth *eth_spec, *eth_mask;\n \tconst struct rte_flow_item_ipv4 *ipv4_spec, *ipv4_last, *ipv4_mask;\n \tconst struct rte_flow_item_ipv6 *ipv6_spec, *ipv6_mask;\n@@ -746,6 +748,7 @@ iavf_fdir_parse_pattern(__rte_unused struct iavf_adapter *ad,\n \tenum rte_flow_item_type next_type;\n \tuint8_t tun_inner = 0;\n \tuint16_t ether_type, flags_version;\n+\tuint8_t item_num = 0;\n \tint layer = 0;\n \n \tuint8_t ipv6_addr_mask[16] = {\n@@ -763,8 +766,72 @@ iavf_fdir_parse_pattern(__rte_unused struct iavf_adapter *ad,\n \t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM, item,\n \t\t\t\t\t \"Not support range\");\n \t\t}\n+\t\titem_num++;\n \n \t\tswitch (item_type) {\n+\t\tcase RTE_FLOW_ITEM_TYPE_RAW: {\n+\t\t\traw_spec = item->spec;\n+\t\t\traw_mask = item->mask;\n+\n+\t\t\tif (item_num != 1)\n+\t\t\t\treturn -rte_errno;\n+\n+\t\t\tif (raw_spec->length != raw_mask->length)\n+\t\t\t\treturn -rte_errno;\n+\n+\t\t\tuint16_t pkt_len = 0;\n+\t\t\tuint16_t tmp_val = 0;\n+\t\t\tuint8_t tmp = 0;\n+\t\t\tint i, j;\n+\n+\t\t\tpkt_len = raw_spec->length;\n+\n+\t\t\tfor (i = 0, j = 0; i < pkt_len; i += 2, j++) {\n+\t\t\t\ttmp = raw_spec->pattern[i];\n+\t\t\t\tif (tmp >= 'a' && tmp <= 'f')\n+\t\t\t\t\ttmp_val = tmp - 'a' + 10;\n+\t\t\t\tif (tmp >= 'A' && tmp <= 'F')\n+\t\t\t\t\ttmp_val = tmp - 'A' + 10;\n+\t\t\t\tif (tmp >= '0' && tmp <= '9')\n+\t\t\t\t\ttmp_val = tmp - '0';\n+\n+\t\t\t\ttmp_val *= 16;\n+\t\t\t\ttmp = raw_spec->pattern[i + 1];\n+\t\t\t\tif (tmp >= 'a' && tmp <= 'f')\n+\t\t\t\t\ttmp_val += (tmp - 'a' + 10);\n+\t\t\t\tif (tmp >= 'A' && tmp <= 'F')\n+\t\t\t\t\ttmp_val += (tmp - 'A' + 10);\n+\t\t\t\tif (tmp >= '0' && tmp <= '9')\n+\t\t\t\t\ttmp_val += (tmp - '0');\n+\n+\t\t\t\thdrs->raw.spec[j] = tmp_val;\n+\n+\t\t\t\ttmp = raw_mask->pattern[i];\n+\t\t\t\tif (tmp >= 'a' && tmp <= 'f')\n+\t\t\t\t\ttmp_val = tmp - 'a' + 10;\n+\t\t\t\tif (tmp >= 'A' && tmp <= 'F')\n+\t\t\t\t\ttmp_val = tmp - 'A' + 10;\n+\t\t\t\tif (tmp >= '0' && tmp <= '9')\n+\t\t\t\t\ttmp_val = tmp - '0';\n+\n+\t\t\t\ttmp_val *= 16;\n+\t\t\t\ttmp = raw_mask->pattern[i + 1];\n+\t\t\t\tif (tmp >= 'a' && tmp <= 'f')\n+\t\t\t\t\ttmp_val += (tmp - 'a' + 10);\n+\t\t\t\tif (tmp >= 'A' && tmp <= 'F')\n+\t\t\t\t\ttmp_val += (tmp - 'A' + 10);\n+\t\t\t\tif (tmp >= '0' && tmp <= '9')\n+\t\t\t\t\ttmp_val += (tmp - '0');\n+\n+\t\t\t\thdrs->raw.mask[j] = tmp_val;\n+\t\t\t}\n+\n+\t\t\thdrs->raw.pkt_len = pkt_len / 2;\n+\t\t\thdrs->tunnel_level = 0;\n+\t\t\thdrs->count = 0;\n+\t\t\treturn 0;\n+\t\t}\n+\n \t\tcase RTE_FLOW_ITEM_TYPE_ETH:\n \t\t\teth_spec = item->spec;\n \t\t\teth_mask = item->mask;\ndiff --git a/drivers/net/iavf/iavf_generic_flow.c b/drivers/net/iavf/iavf_generic_flow.c\nindex ddc1fdd22b..e1a611e319 100644\n--- a/drivers/net/iavf/iavf_generic_flow.c\n+++ b/drivers/net/iavf/iavf_generic_flow.c\n@@ -48,6 +48,12 @@ const struct rte_flow_ops iavf_flow_ops = {\n \t.query = iavf_flow_query,\n };\n \n+/* raw */\n+enum rte_flow_item_type iavf_pattern_raw[] = {\n+\tRTE_FLOW_ITEM_TYPE_RAW,\n+\tRTE_FLOW_ITEM_TYPE_END,\n+};\n+\n /* empty */\n enum rte_flow_item_type iavf_pattern_empty[] = {\n \tRTE_FLOW_ITEM_TYPE_END,\ndiff --git a/drivers/net/iavf/iavf_generic_flow.h b/drivers/net/iavf/iavf_generic_flow.h\nindex f6af176073..52eb1caf29 100644\n--- a/drivers/net/iavf/iavf_generic_flow.h\n+++ b/drivers/net/iavf/iavf_generic_flow.h\n@@ -180,6 +180,9 @@\n #define IAVF_INSET_L2TPV2 \\\n \t(IAVF_PROT_L2TPV2 | IAVF_L2TPV2_SESSION_ID)\n \n+/* raw pattern */\n+extern enum rte_flow_item_type iavf_pattern_raw[];\n+\n /* empty pattern */\n extern enum rte_flow_item_type iavf_pattern_empty[];\n \n", "prefixes": [ "v6", "2/3" ] }