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{
    "id": 111061,
    "url": "http://patches.dpdk.org/api/patches/111061/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220512124527.2031321-3-gakhil@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20220512124527.2031321-3-gakhil@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20220512124527.2031321-3-gakhil@marvell.com",
    "date": "2022-05-12T12:45:22",
    "name": "[v5,2/7] crypto/cnxk: add event metadata set operation",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "f89ead918bcaff1e812e38d525b3edcfbfe5766b",
    "submitter": {
        "id": 2094,
        "url": "http://patches.dpdk.org/api/people/2094/?format=api",
        "name": "Akhil Goyal",
        "email": "gakhil@marvell.com"
    },
    "delegate": {
        "id": 6690,
        "url": "http://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220512124527.2031321-3-gakhil@marvell.com/mbox/",
    "series": [
        {
            "id": 22913,
            "url": "http://patches.dpdk.org/api/series/22913/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=22913",
            "date": "2022-05-12T12:45:20",
            "name": "Add new cryptodev op for event metadata",
            "version": 5,
            "mbox": "http://patches.dpdk.org/series/22913/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/111061/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/111061/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
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        ],
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        "From": "Akhil Goyal <gakhil@marvell.com>",
        "To": "<dev@dpdk.org>",
        "CC": "<anoobj@marvell.com>, <jerinj@marvell.com>, <abhinandan.gujjar@intel.com>,\n <jay.jayatheerthan@intel.com>, <narender.vangati@intel.com>,\n <vfialko@marvell.com>, Akhil Goyal <gakhil@marvell.com>, Fan Zhang\n <roy.fan.zhang@intel.com>, Abhinandan Gujjar <Abhinandan.gujjar@intel.com>",
        "Subject": "[PATCH v5 2/7] crypto/cnxk: add event metadata set operation",
        "Date": "Thu, 12 May 2022 18:15:22 +0530",
        "Message-ID": "<20220512124527.2031321-3-gakhil@marvell.com>",
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        "In-Reply-To": "<20220512124527.2031321-1-gakhil@marvell.com>",
        "References": "<20220501192457.3670278-1-gakhil@marvell.com>\n <20220512124527.2031321-1-gakhil@marvell.com>",
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    },
    "content": "From: Volodymyr Fialko <vfialko@marvell.com>\n\nAdded cryptodev operation for setting event crypto\nmetadata for all supported sessions - sym/asym/security.\n\nSigned-off-by: Volodymyr Fialko <vfialko@marvell.com>\nSigned-off-by: Akhil Goyal <gakhil@marvell.com>\nAcked-by: Fan Zhang <roy.fan.zhang@intel.com>\nAcked-by: Abhinandan Gujjar <Abhinandan.gujjar@intel.com>\nAcked-by: Anoob Joseph <anoobj@marvell.com>\n---\n drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 144 +++++++++++++++++++---\n drivers/crypto/cnxk/cn10k_ipsec.h         |   2 +\n drivers/crypto/cnxk/cn9k_cryptodev_ops.c  | 138 ++++++++++++++++++---\n drivers/crypto/cnxk/cn9k_ipsec.h          |   2 +\n drivers/crypto/cnxk/cnxk_ae.h             |   2 +\n drivers/crypto/cnxk/cnxk_cryptodev_ops.h  |  18 ---\n drivers/crypto/cnxk/cnxk_se.h             |   2 +\n 7 files changed, 255 insertions(+), 53 deletions(-)",
    "diff": "diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\nindex c4d5d039ec..01aa0d6870 100644\n--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n@@ -264,30 +264,136 @@ cn10k_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)\n \treturn count + i;\n }\n \n-uint16_t\n-cn10k_cpt_crypto_adapter_enqueue(uintptr_t tag_op, struct rte_crypto_op *op)\n+static int\n+cn10k_cpt_crypto_adapter_ev_mdata_set(struct rte_cryptodev *dev __rte_unused,\n+\t\t\t\t      void *sess,\n+\t\t\t\t      enum rte_crypto_op_type op_type,\n+\t\t\t\t      enum rte_crypto_op_sess_type sess_type,\n+\t\t\t\t      void *mdata)\n {\n-\tunion rte_event_crypto_metadata *ec_mdata;\n-\tstruct cpt_inflight_req *infl_req;\n+\tunion rte_event_crypto_metadata *ec_mdata = mdata;\n \tstruct rte_event *rsp_info;\n-\tuint64_t lmt_base, lmt_arg;\n-\tstruct cpt_inst_s *inst;\n \tstruct cnxk_cpt_qp *qp;\n \tuint8_t cdev_id;\n-\tuint16_t lmt_id;\n-\tuint16_t qp_id;\n-\tint ret;\n-\n-\tec_mdata = cnxk_event_crypto_mdata_get(op);\n-\tif (!ec_mdata) {\n-\t\trte_errno = EINVAL;\n-\t\treturn 0;\n-\t}\n+\tint16_t qp_id;\n+\tuint64_t w2;\n \n+\t/* Get queue pair */\n \tcdev_id = ec_mdata->request_info.cdev_id;\n \tqp_id = ec_mdata->request_info.queue_pair_id;\n \tqp = rte_cryptodevs[cdev_id].data->queue_pairs[qp_id];\n+\n+\t/* Prepare w2 */\n \trsp_info = &ec_mdata->response_info;\n+\tw2 = CNXK_CPT_INST_W2(\n+\t\t(RTE_EVENT_TYPE_CRYPTODEV << 28) | rsp_info->flow_id,\n+\t\trsp_info->sched_type, rsp_info->queue_id, 0);\n+\n+\t/* Set meta according to session type */\n+\tif (op_type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {\n+\t\tif (sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n+\t\t\tstruct cn10k_sec_session *priv;\n+\t\t\tstruct cn10k_ipsec_sa *sa;\n+\n+\t\t\tpriv = get_sec_session_private_data(sess);\n+\t\t\tsa = &priv->sa;\n+\t\t\tsa->qp = qp;\n+\t\t\tsa->inst.w2 = w2;\n+\t\t} else if (sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n+\t\t\tstruct cnxk_se_sess *priv;\n+\n+\t\t\tpriv = get_sym_session_private_data(\n+\t\t\t\tsess, cn10k_cryptodev_driver_id);\n+\t\t\tpriv->qp = qp;\n+\t\t\tpriv->cpt_inst_w2 = w2;\n+\t\t} else\n+\t\t\treturn -EINVAL;\n+\t} else if (op_type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {\n+\t\tif (sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n+\t\t\tstruct rte_cryptodev_asym_session *asym_sess = sess;\n+\t\t\tstruct cnxk_ae_sess *priv;\n+\n+\t\t\tpriv = (struct cnxk_ae_sess *)asym_sess->sess_private_data;\n+\t\t\tpriv->qp = qp;\n+\t\t\tpriv->cpt_inst_w2 = w2;\n+\t\t} else\n+\t\t\treturn -EINVAL;\n+\t} else\n+\t\treturn -EINVAL;\n+\n+\treturn 0;\n+}\n+\n+static inline int\n+cn10k_ca_meta_info_extract(struct rte_crypto_op *op,\n+\t\t\t struct cnxk_cpt_qp **qp, uint64_t *w2)\n+{\n+\tif (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {\n+\t\tif (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n+\t\t\tstruct cn10k_sec_session *priv;\n+\t\t\tstruct cn10k_ipsec_sa *sa;\n+\n+\t\t\tpriv = get_sec_session_private_data(op->sym->sec_session);\n+\t\t\tsa = &priv->sa;\n+\t\t\t*qp = sa->qp;\n+\t\t\t*w2 = sa->inst.w2;\n+\t\t} else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n+\t\t\tstruct cnxk_se_sess *priv;\n+\n+\t\t\tpriv = get_sym_session_private_data(\n+\t\t\t\top->sym->session, cn10k_cryptodev_driver_id);\n+\t\t\t*qp = priv->qp;\n+\t\t\t*w2 = priv->cpt_inst_w2;\n+\t\t} else {\n+\t\t\tunion rte_event_crypto_metadata *ec_mdata;\n+\t\t\tstruct rte_event *rsp_info;\n+\t\t\tuint8_t cdev_id;\n+\t\t\tuint16_t qp_id;\n+\n+\t\t\tec_mdata = (union rte_event_crypto_metadata *)\n+\t\t\t\t((uint8_t *)op + op->private_data_offset);\n+\t\t\tif (!ec_mdata)\n+\t\t\t\treturn -EINVAL;\n+\t\t\trsp_info = &ec_mdata->response_info;\n+\t\t\tcdev_id = ec_mdata->request_info.cdev_id;\n+\t\t\tqp_id = ec_mdata->request_info.queue_pair_id;\n+\t\t\t*qp = rte_cryptodevs[cdev_id].data->queue_pairs[qp_id];\n+\t\t\t*w2 = CNXK_CPT_INST_W2(\n+\t\t\t\t(RTE_EVENT_TYPE_CRYPTODEV << 28) | rsp_info->flow_id,\n+\t\t\t\trsp_info->sched_type, rsp_info->queue_id, 0);\n+\t\t}\n+\t} else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {\n+\t\tif (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n+\t\t\tstruct rte_cryptodev_asym_session *asym_sess;\n+\t\t\tstruct cnxk_ae_sess *priv;\n+\n+\t\t\tasym_sess = op->asym->session;\n+\t\t\tpriv = (struct cnxk_ae_sess *)asym_sess->sess_private_data;\n+\t\t\t*qp = priv->qp;\n+\t\t\t*w2 = priv->cpt_inst_w2;\n+\t\t} else\n+\t\t\treturn -EINVAL;\n+\t} else\n+\t\treturn -EINVAL;\n+\n+\treturn 0;\n+}\n+\n+uint16_t\n+cn10k_cpt_crypto_adapter_enqueue(uintptr_t tag_op, struct rte_crypto_op *op)\n+{\n+\tstruct cpt_inflight_req *infl_req;\n+\tuint64_t lmt_base, lmt_arg, w2;\n+\tstruct cpt_inst_s *inst;\n+\tstruct cnxk_cpt_qp *qp;\n+\tuint16_t lmt_id;\n+\tint ret;\n+\n+\tret = cn10k_ca_meta_info_extract(op, &qp, &w2);\n+\tif (unlikely(ret)) {\n+\t\trte_errno = EINVAL;\n+\t\treturn 0;\n+\t}\n \n \tif (unlikely(!qp->ca.enabled)) {\n \t\trte_errno = EINVAL;\n@@ -316,9 +422,7 @@ cn10k_cpt_crypto_adapter_enqueue(uintptr_t tag_op, struct rte_crypto_op *op)\n \tinfl_req->qp = qp;\n \tinst->w0.u64 = 0;\n \tinst->res_addr = (uint64_t)&infl_req->res;\n-\tinst->w2.u64 = CNXK_CPT_INST_W2(\n-\t\t(RTE_EVENT_TYPE_CRYPTODEV << 28) | rsp_info->flow_id,\n-\t\trsp_info->sched_type, rsp_info->queue_id, 0);\n+\tinst->w2.u64 = w2;\n \tinst->w3.u64 = CNXK_CPT_INST_W3(1, infl_req);\n \n \tif (roc_cpt_is_iq_full(&qp->lf)) {\n@@ -327,7 +431,7 @@ cn10k_cpt_crypto_adapter_enqueue(uintptr_t tag_op, struct rte_crypto_op *op)\n \t\treturn 0;\n \t}\n \n-\tif (!rsp_info->sched_type)\n+\tif (inst->w2.s.tt == RTE_SCHED_TYPE_ORDERED)\n \t\troc_sso_hws_head_wait(tag_op);\n \n \tlmt_arg = ROC_CN10K_CPT_LMT_ARG | (uint64_t)lmt_id;\n@@ -592,4 +696,6 @@ struct rte_cryptodev_ops cn10k_cpt_ops = {\n \t.asym_session_configure = cnxk_ae_session_cfg,\n \t.asym_session_clear = cnxk_ae_session_clear,\n \n+\t/* Event crypto ops */\n+\t.session_ev_mdata_set = cn10k_cpt_crypto_adapter_ev_mdata_set,\n };\ndiff --git a/drivers/crypto/cnxk/cn10k_ipsec.h b/drivers/crypto/cnxk/cn10k_ipsec.h\nindex 647a71cdd5..1c1d904799 100644\n--- a/drivers/crypto/cnxk/cn10k_ipsec.h\n+++ b/drivers/crypto/cnxk/cn10k_ipsec.h\n@@ -20,6 +20,8 @@ struct cn10k_ipsec_sa {\n \tuint16_t iv_offset;\n \tuint8_t iv_length;\n \tbool is_outbound;\n+\t/** Queue pair */\n+\tstruct cnxk_cpt_qp *qp;\n \n \t/**\n \t * End of SW mutable area\ndiff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\nindex d3d441cb24..98fa97ef01 100644\n--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n@@ -316,28 +316,134 @@ cn9k_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)\n \treturn count;\n }\n \n-uint16_t\n-cn9k_cpt_crypto_adapter_enqueue(uintptr_t tag_op, struct rte_crypto_op *op)\n+static int\n+cn9k_cpt_crypto_adapter_ev_mdata_set(struct rte_cryptodev *dev __rte_unused,\n+\t\t\t\t     void *sess,\n+\t\t\t\t     enum rte_crypto_op_type op_type,\n+\t\t\t\t     enum rte_crypto_op_sess_type sess_type,\n+\t\t\t\t     void *mdata)\n {\n-\tunion rte_event_crypto_metadata *ec_mdata;\n-\tstruct cpt_inflight_req *infl_req;\n+\tunion rte_event_crypto_metadata *ec_mdata = mdata;\n \tstruct rte_event *rsp_info;\n \tstruct cnxk_cpt_qp *qp;\n-\tstruct cpt_inst_s inst;\n \tuint8_t cdev_id;\n \tuint16_t qp_id;\n-\tint ret;\n-\n-\tec_mdata = cnxk_event_crypto_mdata_get(op);\n-\tif (!ec_mdata) {\n-\t\trte_errno = EINVAL;\n-\t\treturn 0;\n-\t}\n+\tuint64_t w2;\n \n+\t/* Get queue pair */\n \tcdev_id = ec_mdata->request_info.cdev_id;\n \tqp_id = ec_mdata->request_info.queue_pair_id;\n \tqp = rte_cryptodevs[cdev_id].data->queue_pairs[qp_id];\n+\n+\t/* Prepare w2 */\n \trsp_info = &ec_mdata->response_info;\n+\tw2 = CNXK_CPT_INST_W2(\n+\t\t(RTE_EVENT_TYPE_CRYPTODEV << 28) | rsp_info->flow_id,\n+\t\trsp_info->sched_type, rsp_info->queue_id, 0);\n+\n+\t/* Set meta according to session type */\n+\tif (op_type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {\n+\t\tif (sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n+\t\t\tstruct cn9k_sec_session *priv;\n+\t\t\tstruct cn9k_ipsec_sa *sa;\n+\n+\t\t\tpriv = get_sec_session_private_data(sess);\n+\t\t\tsa = &priv->sa;\n+\t\t\tsa->qp = qp;\n+\t\t\tsa->inst.w2 = w2;\n+\t\t} else if (sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n+\t\t\tstruct cnxk_se_sess *priv;\n+\n+\t\t\tpriv = get_sym_session_private_data(\n+\t\t\t\tsess, cn9k_cryptodev_driver_id);\n+\t\t\tpriv->qp = qp;\n+\t\t\tpriv->cpt_inst_w2 = w2;\n+\t\t} else\n+\t\t\treturn -EINVAL;\n+\t} else if (op_type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {\n+\t\tif (sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n+\t\t\tstruct rte_cryptodev_asym_session *asym_sess = sess;\n+\t\t\tstruct cnxk_ae_sess *priv;\n+\n+\t\t\tpriv = (struct cnxk_ae_sess *)asym_sess->sess_private_data;\n+\t\t\tpriv->qp = qp;\n+\t\t\tpriv->cpt_inst_w2 = w2;\n+\t\t} else\n+\t\t\treturn -EINVAL;\n+\t} else\n+\t\treturn -EINVAL;\n+\n+\treturn 0;\n+}\n+\n+static inline int\n+cn9k_ca_meta_info_extract(struct rte_crypto_op *op,\n+\t\t\tstruct cnxk_cpt_qp **qp, struct cpt_inst_s *inst)\n+{\n+\tif (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {\n+\t\tif (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n+\t\t\tstruct cn9k_sec_session *priv;\n+\t\t\tstruct cn9k_ipsec_sa *sa;\n+\n+\t\t\tpriv = get_sec_session_private_data(op->sym->sec_session);\n+\t\t\tsa = &priv->sa;\n+\t\t\t*qp = sa->qp;\n+\t\t\tinst->w2.u64 = sa->inst.w2;\n+\t\t} else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n+\t\t\tstruct cnxk_se_sess *priv;\n+\n+\t\t\tpriv = get_sym_session_private_data(\n+\t\t\t\top->sym->session, cn9k_cryptodev_driver_id);\n+\t\t\t*qp = priv->qp;\n+\t\t\tinst->w2.u64 = priv->cpt_inst_w2;\n+\t\t} else {\n+\t\t\tunion rte_event_crypto_metadata *ec_mdata;\n+\t\t\tstruct rte_event *rsp_info;\n+\t\t\tuint8_t cdev_id;\n+\t\t\tuint16_t qp_id;\n+\n+\t\t\tec_mdata = (union rte_event_crypto_metadata *)\n+\t\t\t\t((uint8_t *)op + op->private_data_offset);\n+\t\t\tif (!ec_mdata)\n+\t\t\t\treturn -EINVAL;\n+\t\t\trsp_info = &ec_mdata->response_info;\n+\t\t\tcdev_id = ec_mdata->request_info.cdev_id;\n+\t\t\tqp_id = ec_mdata->request_info.queue_pair_id;\n+\t\t\t*qp = rte_cryptodevs[cdev_id].data->queue_pairs[qp_id];\n+\t\t\tinst->w2.u64 = CNXK_CPT_INST_W2(\n+\t\t\t\t(RTE_EVENT_TYPE_CRYPTODEV << 28) | rsp_info->flow_id,\n+\t\t\t\trsp_info->sched_type, rsp_info->queue_id, 0);\n+\t\t}\n+\t} else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {\n+\t\tif (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n+\t\t\tstruct rte_cryptodev_asym_session *asym_sess;\n+\t\t\tstruct cnxk_ae_sess *priv;\n+\n+\t\t\tasym_sess = op->asym->session;\n+\t\t\tpriv = (struct cnxk_ae_sess *)asym_sess->sess_private_data;\n+\t\t\t*qp = priv->qp;\n+\t\t\tinst->w2.u64 = priv->cpt_inst_w2;\n+\t\t} else\n+\t\t\treturn -EINVAL;\n+\t} else\n+\t\treturn -EINVAL;\n+\n+\treturn 0;\n+}\n+\n+uint16_t\n+cn9k_cpt_crypto_adapter_enqueue(uintptr_t tag_op, struct rte_crypto_op *op)\n+{\n+\tstruct cpt_inflight_req *infl_req;\n+\tstruct cnxk_cpt_qp *qp;\n+\tstruct cpt_inst_s inst;\n+\tint ret;\n+\n+\tret = cn9k_ca_meta_info_extract(op, &qp, &inst);\n+\tif (unlikely(ret)) {\n+\t\trte_errno = EINVAL;\n+\t\treturn 0;\n+\t}\n \n \tif (unlikely(!qp->ca.enabled)) {\n \t\trte_errno = EINVAL;\n@@ -362,9 +468,6 @@ cn9k_cpt_crypto_adapter_enqueue(uintptr_t tag_op, struct rte_crypto_op *op)\n \tinfl_req->qp = qp;\n \tinst.w0.u64 = 0;\n \tinst.res_addr = (uint64_t)&infl_req->res;\n-\tinst.w2.u64 = CNXK_CPT_INST_W2(\n-\t\t(RTE_EVENT_TYPE_CRYPTODEV << 28) | rsp_info->flow_id,\n-\t\trsp_info->sched_type, rsp_info->queue_id, 0);\n \tinst.w3.u64 = CNXK_CPT_INST_W3(1, infl_req);\n \n \tif (roc_cpt_is_iq_full(&qp->lf)) {\n@@ -373,7 +476,7 @@ cn9k_cpt_crypto_adapter_enqueue(uintptr_t tag_op, struct rte_crypto_op *op)\n \t\treturn 0;\n \t}\n \n-\tif (!rsp_info->sched_type)\n+\tif (inst.w2.s.tt == RTE_SCHED_TYPE_ORDERED)\n \t\troc_sso_hws_head_wait(tag_op);\n \n \tcn9k_cpt_inst_submit(&inst, qp->lmtline.lmt_base, qp->lmtline.io_addr);\n@@ -613,4 +716,7 @@ struct rte_cryptodev_ops cn9k_cpt_ops = {\n \t.asym_session_configure = cnxk_ae_session_cfg,\n \t.asym_session_clear = cnxk_ae_session_clear,\n \n+\t/* Event crypto ops */\n+\t.session_ev_mdata_set = cn9k_cpt_crypto_adapter_ev_mdata_set,\n+\n };\ndiff --git a/drivers/crypto/cnxk/cn9k_ipsec.h b/drivers/crypto/cnxk/cn9k_ipsec.h\nindex f3acad561b..499dbc2782 100644\n--- a/drivers/crypto/cnxk/cn9k_ipsec.h\n+++ b/drivers/crypto/cnxk/cn9k_ipsec.h\n@@ -42,6 +42,8 @@ struct cn9k_ipsec_sa {\n \tstruct cnxk_on_ipsec_ar ar;\n \t/** Anti replay window size */\n \tuint32_t replay_win_sz;\n+\t/** Queue pair */\n+\tstruct cnxk_cpt_qp *qp;\n };\n \n struct cn9k_sec_session {\ndiff --git a/drivers/crypto/cnxk/cnxk_ae.h b/drivers/crypto/cnxk/cnxk_ae.h\nindex 01ccfcd334..10854c79c8 100644\n--- a/drivers/crypto/cnxk/cnxk_ae.h\n+++ b/drivers/crypto/cnxk/cnxk_ae.h\n@@ -22,6 +22,8 @@ struct cnxk_ae_sess {\n \tuint64_t *cnxk_fpm_iova;\n \tstruct roc_ae_ec_group **ec_grp;\n \tuint64_t cpt_inst_w7;\n+\tuint64_t cpt_inst_w2;\n+\tstruct cnxk_cpt_qp *qp;\n };\n \n static __rte_always_inline void\ndiff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h\nindex ab0f00ee7c..7ece0214dc 100644\n--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h\n+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h\n@@ -125,24 +125,6 @@ int cnxk_ae_session_cfg(struct rte_cryptodev *dev,\n \t\t\tstruct rte_cryptodev_asym_session *sess);\n void cnxk_cpt_dump_on_err(struct cnxk_cpt_qp *qp);\n \n-static inline union rte_event_crypto_metadata *\n-cnxk_event_crypto_mdata_get(struct rte_crypto_op *op)\n-{\n-\tunion rte_event_crypto_metadata *ec_mdata;\n-\n-\tif (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)\n-\t\tec_mdata = rte_cryptodev_sym_session_get_user_data(\n-\t\t\top->sym->session);\n-\telse if (op->sess_type == RTE_CRYPTO_OP_SESSIONLESS &&\n-\t\t op->private_data_offset)\n-\t\tec_mdata = (union rte_event_crypto_metadata\n-\t\t\t\t    *)((uint8_t *)op + op->private_data_offset);\n-\telse\n-\t\treturn NULL;\n-\n-\treturn ec_mdata;\n-}\n-\n static __rte_always_inline void\n pending_queue_advance(uint64_t *index, const uint64_t mask)\n {\ndiff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h\nindex ce7ca2eda9..a339b80a87 100644\n--- a/drivers/crypto/cnxk/cnxk_se.h\n+++ b/drivers/crypto/cnxk/cnxk_se.h\n@@ -33,6 +33,8 @@ struct cnxk_se_sess {\n \tuint16_t auth_iv_offset;\n \tuint32_t salt;\n \tuint64_t cpt_inst_w7;\n+\tuint64_t cpt_inst_w2;\n+\tstruct cnxk_cpt_qp *qp;\n \tstruct roc_se_ctx roc_se_ctx;\n } __rte_cache_aligned;\n \n",
    "prefixes": [
        "v5",
        "2/7"
    ]
}