Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/110183/?format=api
{ "id": 110183, "url": "http://patches.dpdk.org/api/patches/110183/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220424070845.87096-3-simei.su@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220424070845.87096-3-simei.su@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220424070845.87096-3-simei.su@intel.com", "date": "2022-04-24T07:08:44", "name": "[v2,2/3] net/iavf: enable Rx timestamp on Flex Descriptor", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "9f2b697d69cf390a1a9bc7c9e0d7ec0e715c8fda", "submitter": { "id": 1298, "url": "http://patches.dpdk.org/api/people/1298/?format=api", "name": "Simei Su", "email": "simei.su@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220424070845.87096-3-simei.su@intel.com/mbox/", "series": [ { "id": 22639, "url": "http://patches.dpdk.org/api/series/22639/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=22639", "date": "2022-04-24T07:08:42", "name": "net/iavf: support Rx timestamp on flex descriptor", "version": 2, "mbox": "http://patches.dpdk.org/series/22639/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/110183/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/110183/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 9C4F3A00C4;\n\tSun, 24 Apr 2022 09:16:00 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 78A544113D;\n\tSun, 24 Apr 2022 09:15:51 +0200 (CEST)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n by mails.dpdk.org (Postfix) with ESMTP id 3971940E09\n for <dev@dpdk.org>; Sun, 24 Apr 2022 09:15:49 +0200 (CEST)", "from orsmga001.jf.intel.com ([10.7.209.18])\n by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 24 Apr 2022 00:15:48 -0700", "from unknown (HELO npg-dpdk-simeisu-cvl-119d218.sh.intel.com)\n ([10.67.119.218])\n by orsmga001.jf.intel.com with ESMTP; 24 Apr 2022 00:15:46 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1650784549; x=1682320549;\n h=from:to:cc:subject:date:message-id:in-reply-to: references;\n bh=emFSHhBoOh9TwZuEuCgauaVH8ExFmnhToPhPeb06jH4=;\n b=k7T11Ya6JIZLyd5yOOuXHPyDb9VJPwKzmyBEIxXoSObS5Cur54RltkjD\n WkKDMq2X5A4mtJiyBlQUzmVihC+la9iQYZ6ozTMiRiJnJrZMEZ3uNsARl\n +ct8oFSI41CKM92p/kNAmPSHm7C4Hztaws3Fj3Kj+FQb2qTkUUHgbVbAN\n l48yRS9QhZiarePD551edR4uxxRwzBFr7fQhI/Jb/hXXLdNc0am+KpXCD\n bmGImYAe9Vtl8uVRFa0VfMZU6hgfSZg8LGS/UeU9Nz64xNHmZq3ltFSqF\n 7N+gVw3GLMBG8Q20uu4+UqkpKcbU0tttWhimNxnk1+j/EniEiHdpjxhRX w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6400,9594,10326\"; a=\"263855988\"", "E=Sophos;i=\"5.90,286,1643702400\"; d=\"scan'208\";a=\"263855988\"", "E=Sophos;i=\"5.90,286,1643702400\"; d=\"scan'208\";a=\"594773448\"" ], "X-ExtLoop1": "1", "From": "Simei Su <simei.su@intel.com>", "To": "qi.z.zhang@intel.com,\n\tqiming.yang@intel.com", "Cc": "dev@dpdk.org,\n\twenjun1.wu@intel.com,\n\tSimei Su <simei.su@intel.com>", "Subject": "[PATCH v2 2/3] net/iavf: enable Rx timestamp on Flex Descriptor", "Date": "Sun, 24 Apr 2022 15:08:44 +0800", "Message-Id": "<20220424070845.87096-3-simei.su@intel.com>", "X-Mailer": "git-send-email 2.9.5", "In-Reply-To": "<20220424070845.87096-1-simei.su@intel.com>", "References": "<20220408021307.272746-1-simei.su@intel.com>\n <20220424070845.87096-1-simei.su@intel.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Dump Rx timestamp value into dynamic mbuf field by flex descriptor.\nThis feature is turned on by dev config \"enable-rx-timestamp\".\nCurrently, it's only supported under scalar path.\n\nSigned-off-by: Simei Su <simei.su@intel.com>\n---\n doc/guides/nics/features/iavf.ini | 1 +\n doc/guides/rel_notes/release_22_07.rst | 1 +\n drivers/net/iavf/iavf.h | 5 ++\n drivers/net/iavf/iavf_ethdev.c | 26 +++++++++++\n drivers/net/iavf/iavf_rxtx.c | 58 +++++++++++++++++++++++\n drivers/net/iavf/iavf_rxtx.h | 22 +++++++++\n drivers/net/iavf/iavf_rxtx_vec_common.h | 3 ++\n drivers/net/iavf/iavf_vchnl.c | 83 ++++++++++++++++++++++++++++-----\n 8 files changed, 188 insertions(+), 11 deletions(-)", "diff": "diff --git a/doc/guides/nics/features/iavf.ini b/doc/guides/nics/features/iavf.ini\nindex 01f5142..5a0d9d8 100644\n--- a/doc/guides/nics/features/iavf.ini\n+++ b/doc/guides/nics/features/iavf.ini\n@@ -24,6 +24,7 @@ CRC offload = Y\n VLAN offload = Y\n L3 checksum offload = P\n L4 checksum offload = P\n+Timestamp offload = P\n Packet type parsing = Y\n Rx descriptor status = Y\n Tx descriptor status = Y\ndiff --git a/doc/guides/rel_notes/release_22_07.rst b/doc/guides/rel_notes/release_22_07.rst\nindex f1b4057..567f23d 100644\n--- a/doc/guides/rel_notes/release_22_07.rst\n+++ b/doc/guides/rel_notes/release_22_07.rst\n@@ -59,6 +59,7 @@ New Features\n \n * Added Tx QoS queue rate limitation support.\n * Added quanta size configuration support.\n+ * Added ``DEV_RX_OFFLOAD_TIMESTAMP`` support.\n \n Removed Items\n -------------\ndiff --git a/drivers/net/iavf/iavf.h b/drivers/net/iavf/iavf.h\nindex c0a4a47..3255c93 100644\n--- a/drivers/net/iavf/iavf.h\n+++ b/drivers/net/iavf/iavf.h\n@@ -268,6 +268,8 @@ struct iavf_info {\n \tstruct iavf_tm_conf tm_conf;\n \n \tstruct rte_eth_dev *eth_dev;\n+\n+\tuint32_t ptp_caps;\n };\n \n #define IAVF_MAX_PKT_TYPE 1024\n@@ -312,6 +314,7 @@ struct iavf_adapter {\n \tbool stopped;\n \tuint16_t fdir_ref_cnt;\n \tstruct iavf_devargs devargs;\n+\tuint64_t phc_time;\n };\n \n /* IAVF_DEV_PRIVATE_TO */\n@@ -476,4 +479,6 @@ int iavf_ipsec_crypto_request(struct iavf_adapter *adapter,\n \t\tuint8_t *msg, size_t msg_len,\n \t\tuint8_t *resp_msg, size_t resp_msg_len);\n extern const struct rte_tm_ops iavf_tm_ops;\n+int iavf_get_ptp_cap(struct iavf_adapter *adapter);\n+int iavf_get_phc_time(struct iavf_adapter *adapter);\n #endif /* _IAVF_ETHDEV_H_ */\ndiff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c\nindex 7d093bd..89e4240 100644\n--- a/drivers/net/iavf/iavf_ethdev.c\n+++ b/drivers/net/iavf/iavf_ethdev.c\n@@ -36,6 +36,9 @@\n #define IAVF_PROTO_XTR_ARG \"proto_xtr\"\n #define IAVF_QUANTA_SIZE_ARG \"quanta_size\"\n \n+uint64_t iavf_timestamp_dynflag;\n+int iavf_timestamp_dynfield_offset = -1;\n+\n static const char * const iavf_valid_args[] = {\n \tIAVF_PROTO_XTR_ARG,\n \tIAVF_QUANTA_SIZE_ARG,\n@@ -687,6 +690,7 @@ iavf_init_rxq(struct rte_eth_dev *dev, struct iavf_rx_queue *rxq)\n \tstruct rte_eth_dev_data *dev_data = dev->data;\n \tuint16_t buf_size, max_pkt_len;\n \tuint32_t frame_size = dev->data->mtu + IAVF_ETH_OVERHEAD;\n+\tenum iavf_status err;\n \n \tbuf_size = rte_pktmbuf_data_room_size(rxq->mp) - RTE_PKTMBUF_HEADROOM;\n \n@@ -705,6 +709,18 @@ iavf_init_rxq(struct rte_eth_dev *dev, struct iavf_rx_queue *rxq)\n \t\treturn -EINVAL;\n \t}\n \n+\tif (rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP) {\n+\t\t/* Register mbuf field and flag for Rx timestamp */\n+\t\terr = rte_mbuf_dyn_rx_timestamp_register(\n+\t\t\t&iavf_timestamp_dynfield_offset,\n+\t\t\t&iavf_timestamp_dynflag);\n+\t\tif (err) {\n+\t\t\tPMD_DRV_LOG(ERR,\n+\t\t\t\t \"Cannot register mbuf field/flag for timestamp\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n+\n \trxq->max_pkt_len = max_pkt_len;\n \tif ((dev_data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_SCATTER) ||\n \t rxq->max_pkt_len > buf_size) {\n@@ -947,6 +963,13 @@ iavf_dev_start(struct rte_eth_dev *dev)\n \t\t\treturn -1;\n \t\t}\n \n+\tif (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_CAP_PTP) {\n+\t\tif (iavf_get_ptp_cap(adapter)) {\n+\t\t\tPMD_INIT_LOG(ERR, \"Failed to get ptp capability\");\n+\t\t\treturn -1;\n+\t\t}\n+\t}\n+\n \tif (iavf_init_queues(dev) != 0) {\n \t\tPMD_DRV_LOG(ERR, \"failed to do Queue init\");\n \t\treturn -1;\n@@ -1092,6 +1115,9 @@ iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n \tif (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_CRC)\n \t\tdev_info->rx_offload_capa |= RTE_ETH_RX_OFFLOAD_KEEP_CRC;\n \n+\tif (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_CAP_PTP)\n+\t\tdev_info->rx_offload_capa |= RTE_ETH_RX_OFFLOAD_TIMESTAMP;\n+\n \tif (iavf_ipsec_crypto_supported(adapter)) {\n \t\tdev_info->rx_offload_capa |= RTE_ETH_RX_OFFLOAD_SECURITY;\n \t\tdev_info->tx_offload_capa |= RTE_ETH_TX_OFFLOAD_SECURITY;\ndiff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c\nindex c21f818..2d3bafd 100644\n--- a/drivers/net/iavf/iavf_rxtx.c\n+++ b/drivers/net/iavf/iavf_rxtx.c\n@@ -1422,6 +1422,11 @@ iavf_recv_pkts_flex_rxd(void *rx_queue,\n \tuint64_t dma_addr;\n \tuint64_t pkt_flags;\n \tconst uint32_t *ptype_tbl;\n+\tstruct iavf_adapter *ad = rxq->vsi->adapter;\n+\tuint64_t ts_ns;\n+\n+\tif (rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP)\n+\t\trxq->hw_register_set = 1;\n \n \tnb_rx = 0;\n \tnb_hold = 0;\n@@ -1491,6 +1496,21 @@ iavf_recv_pkts_flex_rxd(void *rx_queue,\n \t\t\t\t&rxq->stats.ipsec_crypto);\n \t\trxd_to_pkt_fields_ops[rxq->rxdid](rxq, rxm, &rxd);\n \t\tpkt_flags = iavf_flex_rxd_error_to_pkt_flags(rx_stat_err0);\n+\n+\t\tif (iavf_timestamp_dynflag > 0) {\n+\t\t\tif (rxq->hw_register_set)\n+\t\t\t\tiavf_get_phc_time(ad);\n+\n+\t\t\trxq->hw_register_set = 0;\n+\t\t\tts_ns = iavf_tstamp_convert_32b_64b(ad->phc_time,\n+\t\t\t\trte_le_to_cpu_32(rxd.wb.flex_ts.ts_high));\n+\n+\t\t\t*RTE_MBUF_DYNFIELD(rxm,\n+\t\t\t\tiavf_timestamp_dynfield_offset,\n+\t\t\t\trte_mbuf_timestamp_t *) = ts_ns;\n+\t\t\trxm->ol_flags |= iavf_timestamp_dynflag;\n+\t\t}\n+\n \t\trxm->ol_flags |= pkt_flags;\n \n \t\trx_pkts[nb_rx++] = rxm;\n@@ -1519,11 +1539,16 @@ iavf_recv_scattered_pkts_flex_rxd(void *rx_queue, struct rte_mbuf **rx_pkts,\n \tuint16_t rx_stat_err0;\n \tuint64_t dma_addr;\n \tuint64_t pkt_flags;\n+\tstruct iavf_adapter *ad = rxq->vsi->adapter;\n+\tuint64_t ts_ns;\n \n \tvolatile union iavf_rx_desc *rx_ring = rxq->rx_ring;\n \tvolatile union iavf_rx_flex_desc *rxdp;\n \tconst uint32_t *ptype_tbl = rxq->vsi->adapter->ptype_tbl;\n \n+\tif (rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP)\n+\t\trxq->hw_register_set = 1;\n+\n \twhile (nb_rx < nb_pkts) {\n \t\trxdp = (volatile union iavf_rx_flex_desc *)&rx_ring[rx_id];\n \t\trx_stat_err0 = rte_le_to_cpu_16(rxdp->wb.status_error0);\n@@ -1636,6 +1661,20 @@ iavf_recv_scattered_pkts_flex_rxd(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\trxd_to_pkt_fields_ops[rxq->rxdid](rxq, first_seg, &rxd);\n \t\tpkt_flags = iavf_flex_rxd_error_to_pkt_flags(rx_stat_err0);\n \n+\t\tif (iavf_timestamp_dynflag > 0) {\n+\t\t\tif (rxq->hw_register_set)\n+\t\t\t\tiavf_get_phc_time(ad);\n+\n+\t\t\trxq->hw_register_set = 0;\n+\t\t\tts_ns = iavf_tstamp_convert_32b_64b(ad->phc_time,\n+\t\t\t\trte_le_to_cpu_32(rxd.wb.flex_ts.ts_high));\n+\n+\t\t\t*RTE_MBUF_DYNFIELD(first_seg,\n+\t\t\t\tiavf_timestamp_dynfield_offset,\n+\t\t\t\trte_mbuf_timestamp_t *) = ts_ns;\n+\t\t\tfirst_seg->ol_flags |= iavf_timestamp_dynflag;\n+\t\t}\n+\n \t\tfirst_seg->ol_flags |= pkt_flags;\n \n \t\t/* Prefetch data of first segment, if configured to do so. */\n@@ -1831,6 +1870,8 @@ iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq,\n \tint32_t nb_staged = 0;\n \tuint64_t pkt_flags;\n \tconst uint32_t *ptype_tbl = rxq->vsi->adapter->ptype_tbl;\n+\tstruct iavf_adapter *ad = rxq->vsi->adapter;\n+\tuint64_t ts_ns;\n \n \trxdp = (volatile union iavf_rx_flex_desc *)&rxq->rx_ring[rxq->rx_tail];\n \trxep = &rxq->sw_ring[rxq->rx_tail];\n@@ -1841,6 +1882,9 @@ iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq,\n \tif (!(stat_err0 & (1 << IAVF_RX_FLEX_DESC_STATUS0_DD_S)))\n \t\treturn 0;\n \n+\tif (rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP)\n+\t\trxq->hw_register_set = 1;\n+\n \t/* Scan LOOK_AHEAD descriptors at a time to determine which\n \t * descriptors reference packets that are ready to be received.\n \t */\n@@ -1897,6 +1941,20 @@ iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq,\n \t\t\tstat_err0 = rte_le_to_cpu_16(rxdp[j].wb.status_error0);\n \t\t\tpkt_flags = iavf_flex_rxd_error_to_pkt_flags(stat_err0);\n \n+\t\t\tif (iavf_timestamp_dynflag > 0) {\n+\t\t\t\tif (rxq->hw_register_set)\n+\t\t\t\t\tiavf_get_phc_time(ad);\n+\n+\t\t\t\trxq->hw_register_set = 0;\n+\t\t\t\tts_ns = iavf_tstamp_convert_32b_64b(ad->phc_time,\n+\t\t\t\t\trte_le_to_cpu_32(rxdp[j].wb.flex_ts.ts_high));\n+\n+\t\t\t\t*RTE_MBUF_DYNFIELD(mb,\n+\t\t\t\t\tiavf_timestamp_dynfield_offset,\n+\t\t\t\t\trte_mbuf_timestamp_t *) = ts_ns;\n+\t\t\t\tmb->ol_flags |= iavf_timestamp_dynflag;\n+\t\t\t}\n+\n \t\t\tmb->ol_flags |= pkt_flags;\n \n \t\t\t/* Put up to nb_pkts directly into buffers */\ndiff --git a/drivers/net/iavf/iavf_rxtx.h b/drivers/net/iavf/iavf_rxtx.h\nindex bf8aebb..37453c4 100644\n--- a/drivers/net/iavf/iavf_rxtx.h\n+++ b/drivers/net/iavf/iavf_rxtx.h\n@@ -72,6 +72,9 @@\n #define IAVF_TX_OFFLOAD_NOTSUP_MASK \\\n \t\t(RTE_MBUF_F_TX_OFFLOAD_MASK ^ IAVF_TX_OFFLOAD_MASK)\n \n+extern uint64_t iavf_timestamp_dynflag;\n+extern int iavf_timestamp_dynfield_offset;\n+\n /**\n * Rx Flex Descriptors\n * These descriptors are used instead of the legacy version descriptors\n@@ -219,6 +222,7 @@ struct iavf_rx_queue {\n \t\t/* flexible descriptor metadata extraction offload flag */\n \tstruct iavf_rx_queue_stats stats;\n \tuint64_t offloads;\n+\tuint32_t hw_register_set;\n };\n \n struct iavf_tx_entry {\n@@ -778,6 +782,24 @@ void iavf_fdir_rx_proc_enable(struct iavf_adapter *ad, bool on)\n \t}\n }\n \n+static inline\n+uint64_t iavf_tstamp_convert_32b_64b(uint64_t time, uint32_t in_timestamp)\n+{\n+\tconst uint64_t mask = 0xFFFFFFFF;\n+\tuint32_t delta;\n+\tuint64_t ns;\n+\n+\tdelta = (in_timestamp - (uint32_t)(time & mask));\n+\tif (delta > (mask / 2)) {\n+\t\tdelta = ((uint32_t)(time & mask) - in_timestamp);\n+\t\tns = time - delta;\n+\t} else {\n+\t\tns = time + delta;\n+\t}\n+\n+\treturn ns;\n+}\n+\n #ifdef RTE_LIBRTE_IAVF_DEBUG_DUMP_DESC\n #define IAVF_DUMP_RX_DESC(rxq, desc, rx_id) \\\n \tiavf_dump_rx_descriptor(rxq, desc, rx_id)\ndiff --git a/drivers/net/iavf/iavf_rxtx_vec_common.h b/drivers/net/iavf/iavf_rxtx_vec_common.h\nindex 1fd37b7..a59cb2c 100644\n--- a/drivers/net/iavf/iavf_rxtx_vec_common.h\n+++ b/drivers/net/iavf/iavf_rxtx_vec_common.h\n@@ -231,6 +231,9 @@ iavf_rx_vec_queue_default(struct iavf_rx_queue *rxq)\n \tif (rxq->proto_xtr != IAVF_PROTO_XTR_NONE)\n \t\treturn -1;\n \n+\tif (rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP)\n+\t\treturn -1;\n+\n \tif (rxq->offloads & IAVF_RX_VECTOR_OFFLOAD)\n \t\treturn IAVF_VECTOR_OFFLOAD_PATH;\n \ndiff --git a/drivers/net/iavf/iavf_vchnl.c b/drivers/net/iavf/iavf_vchnl.c\nindex f9452d1..b654433 100644\n--- a/drivers/net/iavf/iavf_vchnl.c\n+++ b/drivers/net/iavf/iavf_vchnl.c\n@@ -502,7 +502,8 @@ iavf_get_vf_resource(struct iavf_adapter *adapter)\n \t\tVIRTCHNL_VF_OFFLOAD_VLAN_V2 |\n \t\tVIRTCHNL_VF_LARGE_NUM_QPAIRS |\n \t\tVIRTCHNL_VF_OFFLOAD_QOS |\n-\t\tVIRTCHNL_VF_OFFLOAD_INLINE_IPSEC_CRYPTO;\n+\t\tVIRTCHNL_VF_OFFLOAD_INLINE_IPSEC_CRYPTO |\n+\t\tVIRTCHNL_VF_CAP_PTP;\n \n \targs.in_args = (uint8_t *)∩︀\n \targs.in_args_size = sizeof(caps);\n@@ -1047,16 +1048,21 @@ iavf_configure_queues(struct iavf_adapter *adapter,\n \t\tvc_qp->rxq.crc_disable = rxq[i]->crc_len != 0 ? 1 : 0;\n #ifndef RTE_LIBRTE_IAVF_16BYTE_RX_DESC\n \t\tif (vf->vf_res->vf_cap_flags &\n-\t\t VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC &&\n-\t\t vf->supported_rxdid & BIT(rxq[i]->rxdid)) {\n-\t\t\tvc_qp->rxq.rxdid = rxq[i]->rxdid;\n-\t\t\tPMD_DRV_LOG(NOTICE, \"request RXDID[%d] in Queue[%d]\",\n-\t\t\t\t vc_qp->rxq.rxdid, i);\n-\t\t} else {\n-\t\t\tPMD_DRV_LOG(NOTICE, \"RXDID[%d] is not supported, \"\n-\t\t\t\t \"request default RXDID[%d] in Queue[%d]\",\n-\t\t\t\t rxq[i]->rxdid, IAVF_RXDID_LEGACY_1, i);\n-\t\t\tvc_qp->rxq.rxdid = IAVF_RXDID_LEGACY_1;\n+\t\t VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC) {\n+\t\t\tif (vf->supported_rxdid & BIT(rxq[i]->rxdid)) {\n+\t\t\t\tvc_qp->rxq.rxdid = rxq[i]->rxdid;\n+\t\t\t\tPMD_DRV_LOG(NOTICE, \"request RXDID[%d] in Queue[%d]\",\n+\t\t\t\t\t vc_qp->rxq.rxdid, i);\n+\t\t\t} else {\n+\t\t\t\tPMD_DRV_LOG(NOTICE, \"RXDID[%d] is not supported, \"\n+\t\t\t\t\t \"request default RXDID[%d] in Queue[%d]\",\n+\t\t\t\t\t rxq[i]->rxdid, IAVF_RXDID_LEGACY_1, i);\n+\t\t\t\tvc_qp->rxq.rxdid = IAVF_RXDID_LEGACY_1;\n+\t\t\t}\n+\n+\t\t\tif (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_CAP_PTP &&\n+\t\t\t vf->ptp_caps & VIRTCHNL_1588_PTP_CAP_RX_TSTAMP)\n+\t\t\t\tvc_qp->rxq.flags |= VIRTCHNL_PTP_RX_TSTAMP;\n \t\t}\n #else\n \t\tif (vf->vf_res->vf_cap_flags &\n@@ -1859,3 +1865,58 @@ iavf_set_vf_quanta_size(struct iavf_adapter *adapter, u16 start_queue_id, u16 nu\n \n \treturn 0;\n }\n+\n+int\n+iavf_get_ptp_cap(struct iavf_adapter *adapter)\n+{\n+\tstruct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter);\n+\tstruct virtchnl_ptp_caps ptp_caps;\n+\tstruct iavf_cmd_info args;\n+\tint err;\n+\n+\tptp_caps.caps = VIRTCHNL_1588_PTP_CAP_RX_TSTAMP |\n+\t\t\tVIRTCHNL_1588_PTP_CAP_READ_PHC;\n+\n+\targs.ops = VIRTCHNL_OP_1588_PTP_GET_CAPS;\n+\targs.in_args = (uint8_t *)&ptp_caps;\n+\targs.in_args_size = sizeof(ptp_caps);\n+\targs.out_buffer = vf->aq_resp;\n+\targs.out_size = IAVF_AQ_BUF_SZ;\n+\n+\terr = iavf_execute_vf_cmd(adapter, &args, 0);\n+\tif (err) {\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t \"Failed to execute command of OP_1588_PTP_GET_CAPS\");\n+\t\treturn err;\n+\t}\n+\n+\tvf->ptp_caps = ((struct virtchnl_ptp_caps *)args.out_buffer)->caps;\n+\n+\treturn 0;\n+}\n+\n+int\n+iavf_get_phc_time(struct iavf_adapter *adapter)\n+{\n+\tstruct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter);\n+\tstruct virtchnl_phc_time phc_time;\n+\tstruct iavf_cmd_info args;\n+\tint err;\n+\n+\targs.ops = VIRTCHNL_OP_1588_PTP_GET_TIME;\n+\targs.in_args = (uint8_t *)&phc_time;\n+\targs.in_args_size = sizeof(phc_time);\n+\targs.out_buffer = vf->aq_resp;\n+\targs.out_size = IAVF_AQ_BUF_SZ;\n+\n+\terr = iavf_execute_vf_cmd(adapter, &args, 0);\n+\tif (err) {\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t \"Failed to execute command of VIRTCHNL_OP_1588_PTP_GET_TIME\");\n+\t\treturn err;\n+\t}\n+\n+\tadapter->phc_time = ((struct virtchnl_phc_time *)args.out_buffer)->time;\n+\n+\treturn 0;\n+}\n", "prefixes": [ "v2", "2/3" ] }