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GET /api/patches/110074/?format=api
{ "id": 110074, "url": "http://patches.dpdk.org/api/patches/110074/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220422043857.2154566-2-kirankumark@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220422043857.2154566-2-kirankumark@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220422043857.2154566-2-kirankumark@marvell.com", "date": "2022-04-22T04:38:56", "name": "[2/3] net/cnxk: add devargs support to parse custom SA action", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "235a44286cdfc430bde43d50b6df9a659edc9e7d", "submitter": { "id": 1260, "url": "http://patches.dpdk.org/api/people/1260/?format=api", "name": "Kiran Kumar Kokkilagadda", "email": "kirankumark@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220422043857.2154566-2-kirankumark@marvell.com/mbox/", "series": [ { "id": 22608, "url": "http://patches.dpdk.org/api/series/22608/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=22608", "date": "2022-04-22T04:38:55", "name": "[1/3] common/cnxk: add ROC support to parse cnxk custom sa action", "version": 1, "mbox": "http://patches.dpdk.org/series/22608/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/110074/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/110074/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id F3946A0093;\n\tFri, 22 Apr 2022 06:39:19 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 04E44410F5;\n\tFri, 22 Apr 2022 06:39:17 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id B62A0410D5\n for <dev@dpdk.org>; Fri, 22 Apr 2022 06:39:15 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 23M1LmkR027250\n for <dev@dpdk.org>; Thu, 21 Apr 2022 21:39:14 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3fhtapn1mw-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Thu, 21 Apr 2022 21:39:14 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Thu, 21 Apr 2022 21:39:12 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Thu, 21 Apr 2022 21:39:12 -0700", "from localhost.localdomain (unknown [10.28.34.15])\n by maili.marvell.com (Postfix) with ESMTP id 25D1E3F706D;\n Thu, 21 Apr 2022 21:39:10 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=pKuv6bFf6uOxp72LG5KJpNT+IqxRXfSiM7ks3WhTNC8=;\n b=VbgWyxPt8JAld/NYsKDIJSdLON10kaXvPA8j4JLdk/C7aiYe4MEfGhkTYgzEP+HhgiPE\n aBw7eqESUAfS0XR9Ha3ZAIWdrv1jR4yk3UtNLwZ65q4dy41tcB4JMQUwDNwfy+klTkfT\n d5DBYEMn0NtnkGO+KIyydinj90xtJacKZBZLzCIY8cVJEsEFIPESzWJVt7z3AeJ4FrA/\n +V+dd5fCEkNBbC+9SRM+qMkKTlibRuUX4PynaZKfe1Xo6os1QVU5DsT880mAPO1EEZV1\n /5KD88/54DcjLvnMWXKQxj7rNEm/PKyIOuxPLiST98NjmpnUp0DHsXoYb0GdQmFnjqUJ BA==", "From": "<kirankumark@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>", "CC": "<dev@dpdk.org>", "Subject": "[dpdk-dev][PATCH 2/3] net/cnxk: add devargs support to parse custom\n SA action", "Date": "Fri, 22 Apr 2022 10:08:56 +0530", "Message-ID": "<20220422043857.2154566-2-kirankumark@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20220422043857.2154566-1-kirankumark@marvell.com>", "References": "<20220422043857.2154566-1-kirankumark@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "E6uIfkD3mgmuhs6G-GlIzMq5foWy9S_v", "X-Proofpoint-ORIG-GUID": "E6uIfkD3mgmuhs6G-GlIzMq5foWy9S_v", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514\n definitions=2022-04-22_01,2022-04-21_01,2022-02-23_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Kiran Kumar K <kirankumark@marvell.com>\n\nAdding devargs support to parse custom sa action.\nDevargs can be specified in the following way.\n-a 0002:02:00.0,custom_sa_act=1\n\nSigned-off-by: Kiran Kumar K <kirankumark@marvell.com>\n---\n doc/guides/nics/cnxk.rst | 20 ++++++++++++++++++++\n drivers/net/cnxk/cnxk_ethdev_devargs.c | 10 ++++++++--\n 2 files changed, 28 insertions(+), 2 deletions(-)", "diff": "diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst\nindex 31c801fa04..e5087343ed 100644\n--- a/doc/guides/nics/cnxk.rst\n+++ b/doc/guides/nics/cnxk.rst\n@@ -251,6 +251,26 @@ Runtime Config Options\n With the above configuration, application can enable inline IPsec processing\n for 128 outbound SAs.\n \n+- ``Enable custom SA action`` (default ``0``)\n+\n+ Custom SA action can be enabled by specifying ``custom_sa_act`` ``devargs`` parameter.\n+\n+ For example::\n+\n+ -a 0002:02:00.0,custom_sa_act=1\n+\n+ With the above configuration, application can enable custom SA action. This\n+ configuration allows the potential for a MCAM entry to match many SAs,\n+ rather than only match a single SA.\n+ For cnxk device sa_index will be calculated based on SPI value. So, it will\n+ be 1 to 1 mapping. By enabling this devargs and setting a MCAM rule, will\n+ allow application to configure the sa_index as part of session create. And\n+ later original SPI value can be updated using session update.\n+ For example, application can set sa_index as 0 using session create as SPI value\n+ and later can update the original SPI value (for example 0x10000001) using\n+ session update. And create a flow rule with security action and algorithm as\n+ RTE_PMD_CNXK_SEC_ACTION_ALG0 and sa_hi as 0x1000 and sa_lo as 0x0001.\n+\n - ``Outbound CPT LF queue size`` (default ``8200``)\n \n Size of Outbound CPT LF queue in number of descriptors can be specified by\ndiff --git a/drivers/net/cnxk/cnxk_ethdev_devargs.c b/drivers/net/cnxk/cnxk_ethdev_devargs.c\nindex 9b2beb6743..248582e1f6 100644\n--- a/drivers/net/cnxk/cnxk_ethdev_devargs.c\n+++ b/drivers/net/cnxk/cnxk_ethdev_devargs.c\n@@ -245,6 +245,7 @@ parse_sdp_channel_mask(const char *key, const char *value, void *extra_args)\n #define CNXK_OUTB_NB_CRYPTO_QS\t\"outb_nb_crypto_qs\"\n #define CNXK_SDP_CHANNEL_MASK\t\"sdp_channel_mask\"\n #define CNXK_FLOW_PRE_L2_INFO\t\"flow_pre_l2_info\"\n+#define CNXK_CUSTOM_SA_ACT\t\"custom_sa_act\"\n \n int\n cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)\n@@ -263,9 +264,10 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)\n \tstruct sdp_channel sdp_chan;\n \tuint16_t rss_tag_as_xor = 0;\n \tuint16_t scalar_enable = 0;\n-\tuint8_t lock_rx_ctx = 0;\n+\tuint16_t custom_sa_act = 0;\n \tstruct rte_kvargs *kvlist;\n \tuint16_t no_inl_dev = 0;\n+\tuint8_t lock_rx_ctx = 0;\n \n \tmemset(&sdp_chan, 0, sizeof(sdp_chan));\n \tmemset(&pre_l2_info, 0, sizeof(struct flow_pre_l2_size_info));\n@@ -307,6 +309,8 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)\n \t\t\t &parse_sdp_channel_mask, &sdp_chan);\n \trte_kvargs_process(kvlist, CNXK_FLOW_PRE_L2_INFO,\n \t\t\t &parse_pre_l2_hdr_info, &pre_l2_info);\n+\trte_kvargs_process(kvlist, CNXK_CUSTOM_SA_ACT, &parse_flag,\n+\t\t\t &custom_sa_act);\n \trte_kvargs_free(kvlist);\n \n null_devargs:\n@@ -323,6 +327,7 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)\n \tdev->nix.max_sqb_count = sqb_count;\n \tdev->nix.reta_sz = reta_sz;\n \tdev->nix.lock_rx_ctx = lock_rx_ctx;\n+\tdev->nix.custom_sa_action = custom_sa_act;\n \tdev->npc.flow_prealloc_size = flow_prealloc_size;\n \tdev->npc.flow_max_priority = flow_max_priority;\n \tdev->npc.switch_header_type = switch_header_type;\n@@ -350,4 +355,5 @@ RTE_PMD_REGISTER_PARAM_STRING(net_cnxk,\n \t\t\t CNXK_FLOW_PRE_L2_INFO \"=<0-255>/<1-255>/<0-1>\"\n \t\t\t CNXK_OUTB_NB_CRYPTO_QS \"=<1-64>\"\n \t\t\t CNXK_NO_INL_DEV \"=0\"\n-\t\t\t CNXK_SDP_CHANNEL_MASK \"=<1-4095>/<1-4095>\");\n+\t\t\t CNXK_SDP_CHANNEL_MASK \"=<1-4095>/<1-4095>\"\n+\t\t\t CNXK_CUSTOM_SA_ACT \"=1\");\n", "prefixes": [ "2/3" ] }