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GET /api/patches/108543/?format=api
{ "id": 108543, "url": "http://patches.dpdk.org/api/patches/108543/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220304180623.74893-2-cristian.dumitrescu@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220304180623.74893-2-cristian.dumitrescu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220304180623.74893-2-cristian.dumitrescu@intel.com", "date": "2022-03-04T18:06:22", "name": "[2/3] pipeline: support packet mirroring", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e7dac8d9894a011cd4be658ae3f45eafda24471e", "submitter": { "id": 19, "url": "http://patches.dpdk.org/api/people/19/?format=api", "name": "Cristian Dumitrescu", "email": "cristian.dumitrescu@intel.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220304180623.74893-2-cristian.dumitrescu@intel.com/mbox/", "series": [ { "id": 22026, "url": "http://patches.dpdk.org/api/series/22026/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=22026", "date": "2022-03-04T18:06:21", "name": "[1/3] port: support packet mirroring", "version": 1, "mbox": "http://patches.dpdk.org/series/22026/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/108543/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/108543/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 296B9A034E;\n\tFri, 4 Mar 2022 19:06:37 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id C1A73427E3;\n\tFri, 4 Mar 2022 19:06:29 +0100 (CET)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n by mails.dpdk.org (Postfix) with ESMTP id 8884F427A9\n for <dev@dpdk.org>; Fri, 4 Mar 2022 19:06:27 +0100 (CET)", "from orsmga008.jf.intel.com ([10.7.209.65])\n by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 04 Mar 2022 10:06:26 -0800", "from silpixa00400573.ir.intel.com (HELO\n silpixa00400573.ger.corp.intel.com) ([10.237.223.107])\n by orsmga008.jf.intel.com with ESMTP; 04 Mar 2022 10:06:25 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1646417187; x=1677953187;\n h=from:to:subject:date:message-id:in-reply-to:references;\n bh=+92DOQ1xX2XdcFSdDA68rDTMiZq06Pd11ESobSuKGHQ=;\n b=GK/S58FVOeq6PEHzSmVat7k4fjXVBDEtbDDQwU5L3CcGk+OC4b9zf22p\n XVSscMEuORWvpegqVTiPQT+phLI6seTWxqarF4TnDg9bYS+msPEhEVUk9\n IxnNYfaUOJWf+0y8Qz9Ml9rol8/ZxUdpLPdpZZ8AMd2rKsUCbIEEvW1JO\n o8g34YYXhYFYI1fLVu2LvDhlY8f7Rp5C3vib/SB9yNYbNV1onQqKdR3/z\n j2PMOfT3Y4DBfpcX7uDUxsUnDgSHJ1LFiu4EQVbQobnXMQR7vRauitET9\n aCybawm3Cmp81KjeWqgHqEKJtbIWwX/bvsIdYjXe6GX6Jn8vY5ykh06kO A==;", "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10276\"; a=\"251604400\"", "E=Sophos;i=\"5.90,155,1643702400\"; d=\"scan'208\";a=\"251604400\"", "E=Sophos;i=\"5.90,155,1643702400\"; d=\"scan'208\";a=\"552309338\"" ], "X-ExtLoop1": "1", "From": "Cristian Dumitrescu <cristian.dumitrescu@intel.com>", "To": "dev@dpdk.org", "Subject": "[PATCH 2/3] pipeline: support packet mirroring", "Date": "Fri, 4 Mar 2022 18:06:22 +0000", "Message-Id": "<20220304180623.74893-2-cristian.dumitrescu@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20220304180623.74893-1-cristian.dumitrescu@intel.com>", "References": "<20220304180623.74893-1-cristian.dumitrescu@intel.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "The packet mirroring is configured through slots and sessions, with\nthe number of slots and sessions set at init.\n\nThe new \"mirror\" instruction assigns one of the existing sessions to a\nspecific slot, which results in scheduling a mirror operation for the\ncurrent packet to be executed later at the time the packet is either\ntransmitted or dropped.\n\nSeveral copies of the same input packet can be mirrored to different\noutput ports by using multiple slots.\n\nSigned-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>\n---\n lib/pipeline/rte_swx_ctl.h | 36 +++++\n lib/pipeline/rte_swx_pipeline.c | 192 +++++++++++++++++++++++\n lib/pipeline/rte_swx_pipeline.h | 30 ++++\n lib/pipeline/rte_swx_pipeline_internal.h | 68 ++++++++\n lib/pipeline/version.map | 2 +\n 5 files changed, 328 insertions(+)", "diff": "diff --git a/lib/pipeline/rte_swx_ctl.h b/lib/pipeline/rte_swx_ctl.h\nindex ed752ad5eb..71dd19e16f 100644\n--- a/lib/pipeline/rte_swx_ctl.h\n+++ b/lib/pipeline/rte_swx_ctl.h\n@@ -41,6 +41,12 @@ struct rte_swx_ctl_pipeline_info {\n \t/** Number of input ports. */\n \tuint32_t n_ports_out;\n \n+\t/** Number of packet mirroring slots. */\n+\tuint32_t n_mirroring_slots;\n+\n+\t/** Number of packet mirroring sessions. */\n+\tuint32_t n_mirroring_sessions;\n+\n \t/** Number of actions. */\n \tuint32_t n_actions;\n \n@@ -655,6 +661,36 @@ rte_swx_ctl_pipeline_learner_stats_read(struct rte_swx_pipeline *p,\n \t\t\t\t const char *learner_name,\n \t\t\t\t struct rte_swx_learner_stats *stats);\n \n+/*\n+ * Packet mirroring API.\n+ */\n+\n+/** Packet mirroring session parameters. */\n+struct rte_swx_pipeline_mirroring_session_params {\n+\t/** Output port ID. */\n+\tuint32_t port_id;\n+};\n+\n+/**\n+ * Packet mirroring session set\n+ *\n+ * @param[in] p\n+ * Pipeline handle.\n+ * @param[in] session_id\n+ * Packet mirroring session ID.\n+ * @param[in] params\n+ * Packet mirroring session parameters.\n+ * @return\n+ * 0 on success or the following error codes otherwise:\n+ * -EINVAL: Invalid argument;\n+ * -EEXIST: Pipeline was already built successfully.\n+ */\n+__rte_experimental\n+int\n+rte_swx_ctl_pipeline_mirroring_session_set(struct rte_swx_pipeline *p,\n+\tuint32_t session_id,\n+\tstruct rte_swx_pipeline_mirroring_session_params *params);\n+\n /*\n * Table Update API.\n */\ndiff --git a/lib/pipeline/rte_swx_pipeline.c b/lib/pipeline/rte_swx_pipeline.c\nindex bde20c5660..7cf6dd1fb6 100644\n--- a/lib/pipeline/rte_swx_pipeline.c\n+++ b/lib/pipeline/rte_swx_pipeline.c\n@@ -556,6 +556,81 @@ port_out_free(struct rte_swx_pipeline *p)\n \t}\n }\n \n+/*\n+ * Packet mirroring.\n+ */\n+int\n+rte_swx_pipeline_mirroring_config(struct rte_swx_pipeline *p,\n+\t\t\t\t struct rte_swx_pipeline_mirroring_params *params)\n+{\n+\tCHECK(p, EINVAL);\n+\tCHECK(params, EINVAL);\n+\tCHECK(params->n_slots, EINVAL);\n+\tCHECK(params->n_sessions, EINVAL);\n+\tCHECK(!p->build_done, EEXIST);\n+\n+\tp->n_mirroring_slots = rte_align32pow2(params->n_slots);\n+\tif (p->n_mirroring_slots > 64)\n+\t\tp->n_mirroring_slots = 64;\n+\n+\tp->n_mirroring_sessions = rte_align32pow2(params->n_sessions);\n+\n+\treturn 0;\n+}\n+\n+static void\n+mirroring_build_free(struct rte_swx_pipeline *p)\n+{\n+\tuint32_t i;\n+\n+\tfor (i = 0; i < RTE_SWX_PIPELINE_THREADS_MAX; i++) {\n+\t\tstruct thread *t = &p->threads[i];\n+\n+\t\t/* mirroring_slots. */\n+\t\tfree(t->mirroring_slots);\n+\t\tt->mirroring_slots = NULL;\n+\t}\n+\n+\t/* mirroring_sessions. */\n+\tfree(p->mirroring_sessions);\n+\tp->mirroring_sessions = NULL;\n+}\n+\n+static void\n+mirroring_free(struct rte_swx_pipeline *p)\n+{\n+\tmirroring_build_free(p);\n+}\n+\n+static int\n+mirroring_build(struct rte_swx_pipeline *p)\n+{\n+\tuint32_t i;\n+\n+\tif (!p->n_mirroring_slots || !p->n_mirroring_sessions)\n+\t\treturn 0;\n+\n+\tfor (i = 0; i < RTE_SWX_PIPELINE_THREADS_MAX; i++) {\n+\t\tstruct thread *t = &p->threads[i];\n+\n+\t\t/* mirroring_slots. */\n+\t\tt->mirroring_slots = calloc(p->n_mirroring_slots, sizeof(uint32_t));\n+\t\tif (!t->mirroring_slots)\n+\t\t\tgoto error;\n+\t}\n+\n+\t/* mirroring_sessions. */\n+\tp->mirroring_sessions = calloc(p->n_mirroring_sessions, sizeof(struct mirroring_session));\n+\tif (!p->mirroring_sessions)\n+\t\tgoto error;\n+\n+\treturn 0;\n+\n+error:\n+\tmirroring_build_free(p);\n+\treturn -ENOMEM;\n+}\n+\n /*\n * Extern object.\n */\n@@ -1655,6 +1730,56 @@ instr_drop_exec(struct rte_swx_pipeline *p)\n \tinstr_rx_exec(p);\n }\n \n+/*\n+ * mirror.\n+ */\n+static int\n+instr_mirror_translate(struct rte_swx_pipeline *p,\n+\t\t struct action *action,\n+\t\t char **tokens,\n+\t\t int n_tokens,\n+\t\t struct instruction *instr,\n+\t\t struct instruction_data *data __rte_unused)\n+{\n+\tchar *dst = tokens[1], *src = tokens[2];\n+\tstruct field *fdst, *fsrc;\n+\tuint32_t dst_struct_id = 0, src_struct_id = 0;\n+\n+\tCHECK(n_tokens == 3, EINVAL);\n+\n+\tfdst = struct_field_parse(p, action, dst, &dst_struct_id);\n+\tCHECK(fdst, EINVAL);\n+\tCHECK(dst[0] != 'h', EINVAL);\n+\tCHECK(!fdst->var_size, EINVAL);\n+\n+\tfsrc = struct_field_parse(p, action, src, &src_struct_id);\n+\tCHECK(fsrc, EINVAL);\n+\tCHECK(src[0] != 'h', EINVAL);\n+\tCHECK(!fsrc->var_size, EINVAL);\n+\n+\tinstr->type = INSTR_MIRROR;\n+\tinstr->mirror.dst.struct_id = (uint8_t)dst_struct_id;\n+\tinstr->mirror.dst.n_bits = fdst->n_bits;\n+\tinstr->mirror.dst.offset = fdst->offset / 8;\n+\tinstr->mirror.src.struct_id = (uint8_t)src_struct_id;\n+\tinstr->mirror.src.n_bits = fsrc->n_bits;\n+\tinstr->mirror.src.offset = fsrc->offset / 8;\n+\n+\treturn 0;\n+}\n+\n+static inline void\n+instr_mirror_exec(struct rte_swx_pipeline *p)\n+{\n+\tstruct thread *t = &p->threads[p->thread_id];\n+\tstruct instruction *ip = t->ip;\n+\n+\t__instr_mirror_exec(p, t, ip);\n+\n+\t/* Thread. */\n+\tthread_ip_inc(p);\n+}\n+\n /*\n * extract.\n */\n@@ -5655,6 +5780,14 @@ instr_translate(struct rte_swx_pipeline *p,\n \t\t\t\t\t instr,\n \t\t\t\t\t data);\n \n+\tif (!strcmp(tokens[tpos], \"mirror\"))\n+\t\treturn instr_mirror_translate(p,\n+\t\t\t\t\t action,\n+\t\t\t\t\t &tokens[tpos],\n+\t\t\t\t\t n_tokens - tpos,\n+\t\t\t\t\t instr,\n+\t\t\t\t\t data);\n+\n \tif (!strcmp(tokens[tpos], \"extract\"))\n \t\treturn instr_hdr_extract_translate(p,\n \t\t\t\t\t\t action,\n@@ -6679,6 +6812,7 @@ static instr_exec_t instruction_table[] = {\n \t[INSTR_TX] = instr_tx_exec,\n \t[INSTR_TX_I] = instr_tx_i_exec,\n \t[INSTR_DROP] = instr_drop_exec,\n+\t[INSTR_MIRROR] = instr_mirror_exec,\n \n \t[INSTR_HDR_EXTRACT] = instr_hdr_extract_exec,\n \t[INSTR_HDR_EXTRACT2] = instr_hdr_extract2_exec,\n@@ -9028,6 +9162,7 @@ rte_swx_pipeline_free(struct rte_swx_pipeline *p)\n \theader_free(p);\n \textern_func_free(p);\n \textern_obj_free(p);\n+\tmirroring_free(p);\n \tport_out_free(p);\n \tport_in_free(p);\n \tstruct_free(p);\n@@ -9236,6 +9371,10 @@ rte_swx_pipeline_build(struct rte_swx_pipeline *p)\n \tif (status)\n \t\tgoto error;\n \n+\tstatus = mirroring_build(p);\n+\tif (status)\n+\t\tgoto error;\n+\n \tstatus = struct_build(p);\n \tif (status)\n \t\tgoto error;\n@@ -9307,6 +9446,7 @@ rte_swx_pipeline_build(struct rte_swx_pipeline *p)\n \theader_build_free(p);\n \textern_func_build_free(p);\n \textern_obj_build_free(p);\n+\tmirroring_build_free(p);\n \tport_out_build_free(p);\n \tport_in_build_free(p);\n \tstruct_build_free(p);\n@@ -9358,6 +9498,8 @@ rte_swx_ctl_pipeline_info_get(struct rte_swx_pipeline *p,\n \n \tpipeline->n_ports_in = p->n_ports_in;\n \tpipeline->n_ports_out = p->n_ports_out;\n+\tpipeline->n_mirroring_slots = p->n_mirroring_slots;\n+\tpipeline->n_mirroring_sessions = p->n_mirroring_sessions;\n \tpipeline->n_actions = n_actions;\n \tpipeline->n_tables = n_tables;\n \tpipeline->n_selectors = p->n_selectors;\n@@ -10045,6 +10187,25 @@ rte_swx_ctl_meter_stats_read(struct rte_swx_pipeline *p,\n \treturn 0;\n }\n \n+int\n+rte_swx_ctl_pipeline_mirroring_session_set(struct rte_swx_pipeline *p,\n+\t\t\t\t\t uint32_t session_id,\n+\t\t\t\t\t struct rte_swx_pipeline_mirroring_session_params *params)\n+{\n+\tstruct mirroring_session *s;\n+\n+\tCHECK(p, EINVAL);\n+\tCHECK(p->build_done, EEXIST);\n+\tCHECK(session_id < p->n_mirroring_sessions, EINVAL);\n+\tCHECK(params, EINVAL);\n+\tCHECK(params->port_id < p->n_ports_out, EINVAL);\n+\n+\ts = &p->mirroring_sessions[session_id];\n+\ts->port_id = params->port_id;\n+\n+\treturn 0;\n+}\n+\n /*\n * Pipeline compilation.\n */\n@@ -10057,6 +10218,7 @@ instr_type_to_name(struct instruction *instr)\n \tcase INSTR_TX: return \"INSTR_TX\";\n \tcase INSTR_TX_I: return \"INSTR_TX_I\";\n \tcase INSTR_DROP: return \"INSTR_DROP\";\n+\tcase INSTR_MIRROR: return \"INSTR_MIRROR\";\n \n \tcase INSTR_HDR_EXTRACT: return \"INSTR_HDR_EXTRACT\";\n \tcase INSTR_HDR_EXTRACT2: return \"INSTR_HDR_EXTRACT2\";\n@@ -10359,6 +10521,34 @@ instr_io_export(struct instruction *instr, FILE *f)\n \t\t\"\\t},\\n\");\n }\n \n+static void\n+instr_mirror_export(struct instruction *instr, FILE *f)\n+{\n+\tfprintf(f,\n+\t\t\"\\t{\\n\"\n+\t\t\"\\t\\t.type = %s,\\n\"\n+\t\t\"\\t\\t.mirror = {\\n\"\n+\t\t\"\\t\\t\\t.dst = {\\n\"\n+\t\t\"\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\"\\t\\t\\t}\\n,\"\n+\t\t\"\\t\\t\\t.src = {\\n\"\n+\t\t\"\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\"\\t\\t\\t}\\n,\"\n+\t\t\"\\t\\t},\\n\"\n+\t\t\"\\t},\\n\",\n+\t\tinstr_type_to_name(instr),\n+\t\tinstr->mirror.dst.struct_id,\n+\t\tinstr->mirror.dst.n_bits,\n+\t\tinstr->mirror.dst.offset,\n+\t\tinstr->mirror.src.struct_id,\n+\t\tinstr->mirror.src.n_bits,\n+\t\tinstr->mirror.src.offset);\n+}\n+\n static void\n instr_hdr_validate_export(struct instruction *instr, FILE *f)\n {\n@@ -10926,6 +11116,7 @@ static instruction_export_t export_table[] = {\n \t[INSTR_TX] = instr_io_export,\n \t[INSTR_TX_I] = instr_io_export,\n \t[INSTR_DROP] = instr_io_export,\n+\t[INSTR_MIRROR] = instr_mirror_export,\n \n \t[INSTR_HDR_EXTRACT] = instr_io_export,\n \t[INSTR_HDR_EXTRACT2] = instr_io_export,\n@@ -11144,6 +11335,7 @@ instr_type_to_func(struct instruction *instr)\n \tcase INSTR_TX: return \"__instr_tx_exec\";\n \tcase INSTR_TX_I: return \"__instr_tx_i_exec\";\n \tcase INSTR_DROP: return \"__instr_drop_exec\";\n+\tcase INSTR_MIRROR: return \"__instr_mirror_exec\";\n \n \tcase INSTR_HDR_EXTRACT: return \"__instr_hdr_extract_exec\";\n \tcase INSTR_HDR_EXTRACT2: return \"__instr_hdr_extract2_exec\";\ndiff --git a/lib/pipeline/rte_swx_pipeline.h b/lib/pipeline/rte_swx_pipeline.h\nindex 430e458335..1cfd1c542f 100644\n--- a/lib/pipeline/rte_swx_pipeline.h\n+++ b/lib/pipeline/rte_swx_pipeline.h\n@@ -159,6 +159,36 @@ rte_swx_pipeline_port_out_config(struct rte_swx_pipeline *p,\n \t\t\t\t uint32_t port_id,\n \t\t\t\t const char *port_type_name,\n \t\t\t\t void *args);\n+/*\n+ * Packet mirroring\n+ */\n+\n+/** Packet mirroring parameters. */\n+struct rte_swx_pipeline_mirroring_params {\n+\t/** Number of packet mirroring slots. */\n+\tuint32_t n_slots;\n+\n+\t/** Maximum number of packet mirroring sessions. */\n+\tuint32_t n_sessions;\n+};\n+\n+/**\n+ * Packet mirroring configure\n+ *\n+ * @param[in] p\n+ * Pipeline handle.\n+ * @param[in] params\n+ * Packet mirroring parameters.\n+ * @return\n+ * 0 on success or the following error codes otherwise:\n+ * -EINVAL: Invalid argument;\n+ * -ENOMEM: Not enough memory;\n+ * -EEXIST: Pipeline was already built successfully.\n+ */\n+__rte_experimental\n+int\n+rte_swx_pipeline_mirroring_config(struct rte_swx_pipeline *p,\n+\t\t\t\t struct rte_swx_pipeline_mirroring_params *params);\n \n /*\n * Extern objects and functions\ndiff --git a/lib/pipeline/rte_swx_pipeline_internal.h b/lib/pipeline/rte_swx_pipeline_internal.h\nindex 6ccd9948fa..18c7fd60f8 100644\n--- a/lib/pipeline/rte_swx_pipeline_internal.h\n+++ b/lib/pipeline/rte_swx_pipeline_internal.h\n@@ -109,6 +109,13 @@ struct port_out_runtime {\n \tvoid *obj;\n };\n \n+/*\n+ * Packet mirroring.\n+ */\n+struct mirroring_session {\n+\tuint32_t port_id;\n+};\n+\n /*\n * Extern object.\n */\n@@ -228,6 +235,13 @@ enum instruction_type {\n \tINSTR_TX_I, /* port_out = I */\n \tINSTR_DROP,\n \n+\t/*\n+\t * mirror slot_id session_id\n+\t * slot_id = MEFT\n+\t * session_id = MEFT\n+\t */\n+\tINSTR_MIRROR,\n+\n \t/* extract h.header */\n \tINSTR_HDR_EXTRACT,\n \tINSTR_HDR_EXTRACT2,\n@@ -671,6 +685,7 @@ struct instruction {\n \tenum instruction_type type;\n \tunion {\n \t\tstruct instr_io io;\n+\t\tstruct instr_dst_src mirror;\n \t\tstruct instr_hdr_validity valid;\n \t\tstruct instr_dst_src mov;\n \t\tstruct instr_regarray regarray;\n@@ -903,6 +918,8 @@ struct thread {\n \t/* Packet. */\n \tstruct rte_swx_pkt pkt;\n \tuint8_t *ptr;\n+\tuint32_t *mirroring_slots;\n+\tuint64_t mirroring_slots_mask;\n \n \t/* Structures. */\n \tuint8_t **structs;\n@@ -1400,6 +1417,7 @@ struct rte_swx_pipeline {\n \n \tstruct port_in_runtime *in;\n \tstruct port_out_runtime *out;\n+\tstruct mirroring_session *mirroring_sessions;\n \tstruct instruction **action_instructions;\n \taction_func_t *action_funcs;\n \tstruct rte_swx_table_state *table_state;\n@@ -1417,6 +1435,8 @@ struct rte_swx_pipeline {\n \tuint32_t n_structs;\n \tuint32_t n_ports_in;\n \tuint32_t n_ports_out;\n+\tuint32_t n_mirroring_slots;\n+\tuint32_t n_mirroring_sessions;\n \tuint32_t n_extern_objs;\n \tuint32_t n_extern_funcs;\n \tuint32_t n_actions;\n@@ -1512,6 +1532,8 @@ __instr_rx_exec(struct rte_swx_pipeline *p, struct thread *t, const struct instr\n \t pkt_received ? \"1 pkt\" : \"0 pkts\",\n \t p->port_id);\n \n+\tt->mirroring_slots_mask = 0;\n+\n \t/* Headers. */\n \tt->valid_headers = 0;\n \tt->n_headers_out = 0;\n@@ -1597,6 +1619,29 @@ emit_handler(struct thread *t)\n \t}\n }\n \n+static inline void\n+mirroring_handler(struct rte_swx_pipeline *p, struct thread *t, struct rte_swx_pkt *pkt)\n+{\n+\tuint64_t slots_mask = t->mirroring_slots_mask, slot_mask;\n+\tuint32_t slot_id;\n+\n+\tfor (slot_id = 0, slot_mask = 1LLU ; slots_mask; slot_id++, slot_mask <<= 1)\n+\t\tif (slot_mask & slots_mask) {\n+\t\t\tstruct port_out_runtime *port;\n+\t\t\tstruct mirroring_session *session;\n+\t\t\tuint32_t port_id, session_id;\n+\n+\t\t\tsession_id = t->mirroring_slots[slot_id];\n+\t\t\tsession = &p->mirroring_sessions[session_id];\n+\n+\t\t\tport_id = session->port_id;\n+\t\t\tport = &p->out[port_id];\n+\t\t\tport->pkt_clone_tx(port->obj, pkt);\n+\n+\t\t\tslots_mask &= ~slot_mask;\n+\t\t}\n+}\n+\n static inline void\n __instr_tx_exec(struct rte_swx_pipeline *p, struct thread *t, const struct instruction *ip)\n {\n@@ -1612,6 +1657,7 @@ __instr_tx_exec(struct rte_swx_pipeline *p, struct thread *t, const struct instr\n \temit_handler(t);\n \n \t/* Packet. */\n+\tmirroring_handler(p, t, pkt);\n \tport->pkt_tx(port->obj, pkt);\n }\n \n@@ -1630,6 +1676,7 @@ __instr_tx_i_exec(struct rte_swx_pipeline *p, struct thread *t, const struct ins\n \temit_handler(t);\n \n \t/* Packet. */\n+\tmirroring_handler(p, t, pkt);\n \tport->pkt_tx(port->obj, pkt);\n }\n \n@@ -1649,9 +1696,30 @@ __instr_drop_exec(struct rte_swx_pipeline *p,\n \temit_handler(t);\n \n \t/* Packet. */\n+\tmirroring_handler(p, t, pkt);\n \tport->pkt_tx(port->obj, pkt);\n }\n \n+static inline void\n+__instr_mirror_exec(struct rte_swx_pipeline *p,\n+\t\t struct thread *t,\n+\t\t const struct instruction *ip)\n+{\n+\tuint64_t slot_id = instr_operand_hbo(t, &ip->mirror.dst);\n+\tuint64_t session_id = instr_operand_hbo(t, &ip->mirror.src);\n+\n+\tslot_id &= p->n_mirroring_slots - 1;\n+\tsession_id &= p->n_mirroring_sessions - 1;\n+\n+\tTRACE(\"[Thread %2u]: mirror pkt (slot = %u, session = %u)\\n\",\n+\t p->thread_id,\n+\t (uint32_t)slot_id,\n+\t (uint32_t)session_id);\n+\n+\tt->mirroring_slots[slot_id] = session_id;\n+\tt->mirroring_slots_mask |= 1LLU << slot_id;\n+}\n+\n /*\n * extract.\n */\ndiff --git a/lib/pipeline/version.map b/lib/pipeline/version.map\nindex 8bc90e7cd7..44332aad26 100644\n--- a/lib/pipeline/version.map\n+++ b/lib/pipeline/version.map\n@@ -67,6 +67,7 @@ EXPERIMENTAL {\n \trte_swx_ctl_pipeline_create;\n \trte_swx_ctl_pipeline_free;\n \trte_swx_ctl_pipeline_info_get;\n+\trte_swx_ctl_pipeline_mirroring_session_set;\n \trte_swx_ctl_pipeline_numa_node_get;\n \trte_swx_ctl_pipeline_port_in_stats_read;\n \trte_swx_ctl_pipeline_port_out_stats_read;\n@@ -90,6 +91,7 @@ EXPERIMENTAL {\n \trte_swx_pipeline_flush;\n \trte_swx_pipeline_free;\n \trte_swx_pipeline_instructions_config;\n+\trte_swx_pipeline_mirroring_config;\n \trte_swx_pipeline_packet_header_register;\n \trte_swx_pipeline_packet_metadata_register;\n \trte_swx_pipeline_port_in_config;\n", "prefixes": [ "2/3" ] }