Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/106933/?format=api
{ "id": 106933, "url": "http://patches.dpdk.org/api/patches/106933/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220207072932.22409-3-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220207072932.22409-3-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220207072932.22409-3-ndabilpuram@marvell.com", "date": "2022-02-07T07:29:15", "name": "[03/20] common/cnxk: adjust shaper rates to lower boundaries", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "fbe457d2fa9253a1c1ff93cd2d00d0e49567a45e", "submitter": { "id": 1202, "url": "http://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220207072932.22409-3-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 21483, "url": "http://patches.dpdk.org/api/series/21483/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=21483", "date": "2022-02-07T07:29:13", "name": "[01/20] common/cnxk: increase resource count for bitmap alloc", "version": 1, "mbox": "http://patches.dpdk.org/series/21483/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/106933/comments/", "check": "pending", "checks": "http://patches.dpdk.org/api/patches/106933/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BA4C2A034F;\n\tMon, 7 Feb 2022 08:30:17 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 9366B410FB;\n\tMon, 7 Feb 2022 08:30:14 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 92A7B40DDA\n for <dev@dpdk.org>; Mon, 7 Feb 2022 08:30:12 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 216MmlZo020123\n for <dev@dpdk.org>; Sun, 6 Feb 2022 23:30:12 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3e1smr4p2e-2\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Sun, 06 Feb 2022 23:30:11 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Sun, 6 Feb 2022 23:29:54 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Sun, 6 Feb 2022 23:29:54 -0800", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 92BCA3F7063;\n Sun, 6 Feb 2022 23:29:52 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=67mSNz+Ah5/9ggJU/BdXjoBfURKAdTeEEmHk2yy1a0k=;\n b=Eg/Wr+Ehm1dlZ0VAKLKMC5sS9jXOPgrNWoJ0rAk5JNa9fHfwHln7cvNIQGXfoGBEmcJx\n D7U1Uk2i2SzIFLYGHpTHcqdDHdC5FhjsYo5dN6UMCif44wba51dRx61is9nSfk22XI6W\n VPZKvLqKOsdNlotZzfoKA7VOnojIHnNqzvocAFuxdosiOb6n2ZuwR0yEDbyxoqFqWabF\n 0+tviwTGxrwKv1/pbrdonSc1Wi/tyMl9PH/H6wf/70RXtRznqFNOVckt4U2erCWyBlZI\n XSu/zp4hJfRDexH4GKRU4TbWD0jHjJ+oXMkeYBC2y55I+FrMpXfDZhJZQs/7X5ZzETeI 7w==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "<jerinj@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>, \"Kiran\n Kumar K\" <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>,\n Satha Rao <skoteshwar@marvell.com>", "CC": "<dev@dpdk.org>", "Subject": "[PATCH 03/20] common/cnxk: adjust shaper rates to lower boundaries", "Date": "Mon, 7 Feb 2022 12:59:15 +0530", "Message-ID": "<20220207072932.22409-3-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20220207072932.22409-1-ndabilpuram@marvell.com>", "References": "<20220207072932.22409-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "e6HJFABoCLl6Jgy3My_Gk5825RFUV7kz", "X-Proofpoint-ORIG-GUID": "e6HJFABoCLl6Jgy3My_Gk5825RFUV7kz", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513\n definitions=2022-02-07_02,2022-02-03_01,2021-12-02_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Satha Rao <skoteshwar@marvell.com>\n\nNew api to get floor values for a requested shaper rate, which can assure\npackets should never be transmitted at a rate higher than configured.\n\nKeep the old api to get HW suggested values.\nAnd introduce new parameter to select appropriate api.\n\nSigned-off-by: Satha Rao <skoteshwar@marvell.com>\n---\n drivers/common/cnxk/roc_nix.h | 1 +\n drivers/common/cnxk/roc_nix_priv.h | 4 +-\n drivers/common/cnxk/roc_nix_tm_ops.c | 10 ++--\n drivers/common/cnxk/roc_nix_tm_utils.c | 90 ++++++++++++++++++++++++++++++++--\n 4 files changed, 96 insertions(+), 9 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h\nindex 755212c..250e1c0 100644\n--- a/drivers/common/cnxk/roc_nix.h\n+++ b/drivers/common/cnxk/roc_nix.h\n@@ -531,6 +531,7 @@ struct roc_nix_tm_shaper_profile {\n \tuint64_t peak_sz;\n \tint32_t pkt_len_adj;\n \tbool pkt_mode;\n+\tint8_t accuracy;\n \t/* Function to free this memory */\n \tvoid (*free_fn)(void *profile);\n };\ndiff --git a/drivers/common/cnxk/roc_nix_priv.h b/drivers/common/cnxk/roc_nix_priv.h\nindex 4d2a7d8..ec6f106 100644\n--- a/drivers/common/cnxk/roc_nix_priv.h\n+++ b/drivers/common/cnxk/roc_nix_priv.h\n@@ -95,6 +95,7 @@ struct nix_tm_shaper_profile {\n \tint32_t pkt_mode_adj;\n \tbool pkt_mode;\n \tuint32_t id;\n+\tint8_t accuracy;\n \tvoid (*free_fn)(void *profile);\n \n \tuint32_t ref_cnt;\n@@ -399,7 +400,8 @@ uint32_t nix_tm_check_rr(struct nix *nix, uint32_t parent_id,\n \t\t\t uint32_t *max_prio);\n uint64_t nix_tm_shaper_profile_rate_min(struct nix *nix);\n uint64_t nix_tm_shaper_rate_conv(uint64_t value, uint64_t *exponent_p,\n-\t\t\t\t uint64_t *mantissa_p, uint64_t *div_exp_p);\n+\t\t\t\t uint64_t *mantissa_p, uint64_t *div_exp_p,\n+\t\t\t\t int8_t accuracy);\n uint64_t nix_tm_shaper_burst_conv(uint64_t value, uint64_t *exponent_p,\n \t\t\t\t uint64_t *mantissa_p);\n bool nix_tm_child_res_valid(struct nix_tm_node_list *list,\ndiff --git a/drivers/common/cnxk/roc_nix_tm_ops.c b/drivers/common/cnxk/roc_nix_tm_ops.c\nindex 3d81247..a1f5f0e 100644\n--- a/drivers/common/cnxk/roc_nix_tm_ops.c\n+++ b/drivers/common/cnxk/roc_nix_tm_ops.c\n@@ -173,8 +173,8 @@ nix_tm_shaper_profile_add(struct roc_nix *roc_nix,\n \tif (commit_rate || commit_sz) {\n \t\tif (commit_sz < min_burst || commit_sz > max_burst)\n \t\t\treturn NIX_ERR_TM_INVALID_COMMIT_SZ;\n-\t\telse if (!nix_tm_shaper_rate_conv(commit_rate, NULL, NULL,\n-\t\t\t\t\t\t NULL))\n+\t\telse if (!nix_tm_shaper_rate_conv(commit_rate, NULL, NULL, NULL,\n+\t\t\t\t\t\t profile->accuracy))\n \t\t\treturn NIX_ERR_TM_INVALID_COMMIT_RATE;\n \t}\n \n@@ -182,7 +182,8 @@ nix_tm_shaper_profile_add(struct roc_nix *roc_nix,\n \tif (peak_sz || peak_rate) {\n \t\tif (peak_sz < min_burst || peak_sz > max_burst)\n \t\t\treturn NIX_ERR_TM_INVALID_PEAK_SZ;\n-\t\telse if (!nix_tm_shaper_rate_conv(peak_rate, NULL, NULL, NULL))\n+\t\telse if (!nix_tm_shaper_rate_conv(peak_rate, NULL, NULL, NULL,\n+\t\t\t\t\t\t profile->accuracy))\n \t\t\treturn NIX_ERR_TM_INVALID_PEAK_RATE;\n \t}\n \n@@ -230,6 +231,7 @@ roc_nix_tm_shaper_profile_add(struct roc_nix *roc_nix,\n \tprofile->pkt_len_adj = roc_profile->pkt_len_adj;\n \tprofile->pkt_mode = roc_profile->pkt_mode;\n \tprofile->free_fn = roc_profile->free_fn;\n+\tprofile->accuracy = roc_profile->accuracy;\n \n \treturn nix_tm_shaper_profile_add(roc_nix, profile, 0);\n }\n@@ -246,6 +248,8 @@ roc_nix_tm_shaper_profile_update(struct roc_nix *roc_nix,\n \tprofile->peak.rate = roc_profile->peak_rate;\n \tprofile->commit.size = roc_profile->commit_sz;\n \tprofile->peak.size = roc_profile->peak_sz;\n+\tprofile->pkt_len_adj = roc_profile->pkt_len_adj;\n+\tprofile->accuracy = roc_profile->accuracy;\n \n \treturn nix_tm_shaper_profile_add(roc_nix, profile, 1);\n }\ndiff --git a/drivers/common/cnxk/roc_nix_tm_utils.c b/drivers/common/cnxk/roc_nix_tm_utils.c\nindex 9e80c2a..4ba0752 100644\n--- a/drivers/common/cnxk/roc_nix_tm_utils.c\n+++ b/drivers/common/cnxk/roc_nix_tm_utils.c\n@@ -125,9 +125,72 @@ nix_tm_node_search(struct nix *nix, uint32_t node_id, enum roc_nix_tm_tree tree)\n \treturn NULL;\n }\n \n-uint64_t\n-nix_tm_shaper_rate_conv(uint64_t value, uint64_t *exponent_p,\n-\t\t\tuint64_t *mantissa_p, uint64_t *div_exp_p)\n+static uint64_t\n+nix_tm_shaper_rate_conv_floor(uint64_t value, uint64_t *exponent_p,\n+\t\t\t uint64_t *mantissa_p, uint64_t *div_exp_p)\n+{\n+\tuint64_t div_exp, exponent, mantissa;\n+\n+\t/* Boundary checks */\n+\tif (value < NIX_TM_MIN_SHAPER_RATE || value > NIX_TM_MAX_SHAPER_RATE)\n+\t\treturn 0;\n+\n+\tif (value <= NIX_TM_SHAPER_RATE(0, 0, 0)) {\n+\t\t/* Calculate rate div_exp and mantissa using\n+\t\t * the following formula:\n+\t\t *\n+\t\t * value = (2E6 * (256 + mantissa)\n+\t\t * / ((1 << div_exp) * 256))\n+\t\t */\n+\t\tdiv_exp = 0;\n+\t\texponent = 0;\n+\t\tmantissa = NIX_TM_MAX_RATE_MANTISSA;\n+\n+\t\twhile (value <= (NIX_TM_SHAPER_RATE_CONST / (1 << div_exp)))\n+\t\t\tdiv_exp += 1;\n+\n+\t\twhile (value <= ((NIX_TM_SHAPER_RATE_CONST * (256 + mantissa)) /\n+\t\t\t\t ((1 << div_exp) * 256)))\n+\t\t\tmantissa -= 1;\n+\t} else {\n+\t\t/* Calculate rate exponent and mantissa using\n+\t\t * the following formula:\n+\t\t *\n+\t\t * value = (2E6 * ((256 + mantissa) << exponent)) / 256\n+\t\t *\n+\t\t */\n+\t\tdiv_exp = 0;\n+\t\texponent = NIX_TM_MAX_RATE_EXPONENT;\n+\t\tmantissa = NIX_TM_MAX_RATE_MANTISSA;\n+\n+\t\twhile (value <= (NIX_TM_SHAPER_RATE_CONST * (1 << exponent)))\n+\t\t\texponent -= 1;\n+\n+\t\twhile (value <= ((NIX_TM_SHAPER_RATE_CONST *\n+\t\t\t\t ((256 + mantissa) << exponent)) /\n+\t\t\t\t 256))\n+\t\t\tmantissa -= 1;\n+\t}\n+\n+\tif (div_exp > NIX_TM_MAX_RATE_DIV_EXP ||\n+\t exponent > NIX_TM_MAX_RATE_EXPONENT ||\n+\t mantissa > NIX_TM_MAX_RATE_MANTISSA)\n+\t\treturn 0;\n+\n+\tif (div_exp_p)\n+\t\t*div_exp_p = div_exp;\n+\tif (exponent_p)\n+\t\t*exponent_p = exponent;\n+\tif (mantissa_p)\n+\t\t*mantissa_p = mantissa;\n+\n+\t/* Calculate real rate value */\n+\treturn NIX_TM_SHAPER_RATE(exponent, mantissa, div_exp);\n+}\n+\n+static uint64_t\n+nix_tm_shaper_rate_conv_exact(uint64_t value, uint64_t *exponent_p,\n+\t\t\t uint64_t *mantissa_p, uint64_t *div_exp_p)\n {\n \tuint64_t div_exp, exponent, mantissa;\n \n@@ -188,6 +251,23 @@ nix_tm_shaper_rate_conv(uint64_t value, uint64_t *exponent_p,\n \treturn NIX_TM_SHAPER_RATE(exponent, mantissa, div_exp);\n }\n \n+/* With zero accuracy we will tune parameters as defined by HW,\n+ * non zero accuracy will keep the parameters close to lower values\n+ * and make sure long term shaper rate will not exceed requested rate.\n+ */\n+uint64_t\n+nix_tm_shaper_rate_conv(uint64_t value, uint64_t *exponent_p,\n+\t\t\tuint64_t *mantissa_p, uint64_t *div_exp_p,\n+\t\t\tint8_t accuracy)\n+{\n+\tif (!accuracy)\n+\t\treturn nix_tm_shaper_rate_conv_exact(value, exponent_p,\n+\t\t\t\t\t\t mantissa_p, div_exp_p);\n+\n+\treturn nix_tm_shaper_rate_conv_floor(value, exponent_p, mantissa_p,\n+\t\t\t\t\t div_exp_p);\n+}\n+\n uint64_t\n nix_tm_shaper_burst_conv(uint64_t value, uint64_t *exponent_p,\n \t\t\t uint64_t *mantissa_p)\n@@ -245,13 +325,13 @@ nix_tm_shaper_conf_get(struct nix_tm_shaper_profile *profile,\n \tif (profile->commit.rate)\n \t\tcir->rate = nix_tm_shaper_rate_conv(\n \t\t\tprofile->commit.rate, &cir->exponent, &cir->mantissa,\n-\t\t\t&cir->div_exp);\n+\t\t\t&cir->div_exp, profile->accuracy);\n \n \t/* Calculate PIR exponent and mantissa */\n \tif (profile->peak.rate)\n \t\tpir->rate = nix_tm_shaper_rate_conv(\n \t\t\tprofile->peak.rate, &pir->exponent, &pir->mantissa,\n-\t\t\t&pir->div_exp);\n+\t\t\t&pir->div_exp, profile->accuracy);\n \n \t/* Calculate CIR burst exponent and mantissa */\n \tif (profile->commit.size)\n", "prefixes": [ "03/20" ] }