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GET /api/patches/106444/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 106444,
    "url": "http://patches.dpdk.org/api/patches/106444/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220124223249.67660-1-cristian.dumitrescu@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20220124223249.67660-1-cristian.dumitrescu@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20220124223249.67660-1-cristian.dumitrescu@intel.com",
    "date": "2022-01-24T22:32:49",
    "name": "pipeline: support checksum for variable size headers",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "6c727c1559c5ad55c0b29c0fbd0ce964b164dc1b",
    "submitter": {
        "id": 19,
        "url": "http://patches.dpdk.org/api/people/19/?format=api",
        "name": "Cristian Dumitrescu",
        "email": "cristian.dumitrescu@intel.com"
    },
    "delegate": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220124223249.67660-1-cristian.dumitrescu@intel.com/mbox/",
    "series": [
        {
            "id": 21336,
            "url": "http://patches.dpdk.org/api/series/21336/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=21336",
            "date": "2022-01-24T22:32:49",
            "name": "pipeline: support checksum for variable size headers",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/21336/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/106444/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/106444/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D410EA04A3;\n\tMon, 24 Jan 2022 23:32:53 +0100 (CET)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6A12941147;\n\tMon, 24 Jan 2022 23:32:53 +0100 (CET)",
            "from mga07.intel.com (mga07.intel.com [134.134.136.100])\n by mails.dpdk.org (Postfix) with ESMTP id 445E140040\n for <dev@dpdk.org>; Mon, 24 Jan 2022 23:32:52 +0100 (CET)",
            "from orsmga004.jf.intel.com ([10.7.209.38])\n by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 24 Jan 2022 14:32:51 -0800",
            "from silpixa00400573.ir.intel.com (HELO\n silpixa00400573.ger.corp.intel.com) ([10.237.223.107])\n by orsmga004.jf.intel.com with ESMTP; 24 Jan 2022 14:32:49 -0800"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1643063572; x=1674599572;\n h=from:to:cc:subject:date:message-id;\n bh=mLGPk8ESXrvWa5CQ610yaSVLvoFypMYjCctZC5Dkow0=;\n b=klgxg0r11KQqssPdWeqgzRnJ5UeaX5pCVKLtX0YlQLO6COx1NRc4Kjp7\n CSIN6rm5RyTMtp6yIOqvzB5p8p5SB19DTCvCUM3v+gVmxPjodC+XX8V6s\n POtr4gNneElwJeXIPrmc/dG4S8ZQ3CZFN6Mu5HUBcsr/m4ktN6mXfLtbp\n RfkkCjd0mRDQLGjwMkmREA9YChTVwvY3RhO87Db41OVMgvSJYX0A5B1/x\n H8s9lu+7yzgsg1Ak+3FYRI7wN/dRPOTgGmylc/1LinFfoa6FWCz6/S65i\n iVFJWD9Cg6+rl+0Zvx7f5T889wr3yufKO/NJNlxbK7wZNFpnCAnBelx/A Q==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6200,9189,10237\"; a=\"309482655\"",
            "E=Sophos;i=\"5.88,313,1635231600\"; d=\"scan'208\";a=\"309482655\"",
            "E=Sophos;i=\"5.88,313,1635231600\"; d=\"scan'208\";a=\"627674072\""
        ],
        "X-ExtLoop1": "1",
        "From": "Cristian Dumitrescu <cristian.dumitrescu@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "Yogesh Jangra <yogesh.jangra@intel.com>",
        "Subject": "[PATCH] pipeline: support checksum for variable size headers",
        "Date": "Mon, 24 Jan 2022 22:32:49 +0000",
        "Message-Id": "<20220124223249.67660-1-cristian.dumitrescu@intel.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Added checksum support for variable size headers such as IPv4 headers\nwith options.\n\nSigned-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>\nSigned-off-by: Yogesh Jangra <yogesh.jangra@intel.com>\n---\n lib/pipeline/rte_swx_pipeline.c          |  3 +--\n lib/pipeline/rte_swx_pipeline_internal.h | 21 +++++++++++----------\n 2 files changed, 12 insertions(+), 12 deletions(-)",
    "diff": "diff --git a/lib/pipeline/rte_swx_pipeline.c b/lib/pipeline/rte_swx_pipeline.c\nindex 1a50c4bb72..1e18906274 100644\n--- a/lib/pipeline/rte_swx_pipeline.c\n+++ b/lib/pipeline/rte_swx_pipeline.c\n@@ -2908,7 +2908,6 @@ instr_alu_ckadd_translate(struct rte_swx_pipeline *p,\n \t/* CKADD_STRUCT, CKADD_STRUCT20. */\n \thsrc = header_parse(p, src);\n \tCHECK(hsrc, EINVAL);\n-\tCHECK(!hsrc->st->var_size, EINVAL);\n \n \tinstr->type = INSTR_ALU_CKADD_STRUCT;\n \tif ((hsrc->st->n_bits / 8) == 20)\n@@ -2918,7 +2917,7 @@ instr_alu_ckadd_translate(struct rte_swx_pipeline *p,\n \tinstr->alu.dst.n_bits = fdst->n_bits;\n \tinstr->alu.dst.offset = fdst->offset / 8;\n \tinstr->alu.src.struct_id = (uint8_t)hsrc->struct_id;\n-\tinstr->alu.src.n_bits = hsrc->st->n_bits;\n+\tinstr->alu.src.n_bits = (uint8_t)hsrc->id; /* The src header ID is stored here. */\n \tinstr->alu.src.offset = 0; /* Unused. */\n \treturn 0;\n }\ndiff --git a/lib/pipeline/rte_swx_pipeline_internal.h b/lib/pipeline/rte_swx_pipeline_internal.h\nindex 2e86383e45..8f057deef9 100644\n--- a/lib/pipeline/rte_swx_pipeline_internal.h\n+++ b/lib/pipeline/rte_swx_pipeline_internal.h\n@@ -309,8 +309,8 @@ enum instruction_type {\n \t * dst = H, src = {H, h.header}\n \t */\n \tINSTR_ALU_CKADD_FIELD,    /* src = H */\n-\tINSTR_ALU_CKADD_STRUCT20, /* src = h.header, with sizeof(header) = 20 */\n-\tINSTR_ALU_CKADD_STRUCT,   /* src = h.hdeader, with any sizeof(header) */\n+\tINSTR_ALU_CKADD_STRUCT20, /* src = h.header, with sizeof(header) = 20 bytes. */\n+\tINSTR_ALU_CKADD_STRUCT,   /* src = h.header, with sizeof(header) any 4-byte multiple. */\n \n \t/* cksub dst src\n \t * dst = dst '- src\n@@ -2854,6 +2854,7 @@ __instr_alu_ckadd_struct_exec(struct rte_swx_pipeline *p __rte_unused,\n \t\t\t      struct thread *t,\n \t\t\t      const struct instruction *ip)\n {\n+\tuint32_t src_header_id = ip->alu.src.n_bits; /* The src header ID is stored here. */\n \tuint8_t *dst_struct, *src_struct;\n \tuint16_t *dst16_ptr;\n \tuint32_t *src32_ptr;\n@@ -2869,26 +2870,26 @@ __instr_alu_ckadd_struct_exec(struct rte_swx_pipeline *p __rte_unused,\n \tsrc_struct = t->structs[ip->alu.src.struct_id];\n \tsrc32_ptr = (uint32_t *)&src_struct[0];\n \n-\t/* The max number of 32-bit words in a 256-byte header is 8 = 2^3.\n-\t * Therefore, in the worst case scenario, a 35-bit number is added to a\n-\t * 16-bit number (the input r), so the output r is 36-bit number.\n+\t/* The max number of 32-bit words in a 32K-byte header is 2^13.\n+\t * Therefore, in the worst case scenario, a 45-bit number is added to a\n+\t * 16-bit number (the input r), so the output r is 46-bit number.\n \t */\n-\tfor (i = 0; i < ip->alu.src.n_bits / 32; i++, src32_ptr++)\n+\tfor (i = 0; i < t->headers[src_header_id].n_bytes / 4; i++, src32_ptr++)\n \t\tr += *src32_ptr;\n \n-\t/* The first input is a 16-bit number. The second input is a 20-bit\n-\t * number. Their sum is a 21-bit number.\n+\t/* The first input is a 16-bit number. The second input is a 30-bit\n+\t * number. Their sum is a 31-bit number.\n \t */\n \tr = (r & 0xFFFF) + (r >> 16);\n \n \t/* The first input is a 16-bit number (0 .. 0xFFFF). The second input is\n-\t * a 5-bit number (0 .. 31). The sum is a 17-bit number (0 .. 0x1000E).\n+\t * a 15-bit number (0 .. 0x7FFF). The sum is a 17-bit number (0 .. 0x17FFE).\n \t */\n \tr = (r & 0xFFFF) + (r >> 16);\n \n \t/* When the input r is (0 .. 0xFFFF), the output r is equal to the input\n \t * r, so the output is (0 .. 0xFFFF). When the input r is (0x10000 ..\n-\t * 0x1001E), the output r is (0 .. 31). So no carry bit can be\n+\t * 0x17FFE), the output r is (0 .. 0x7FFF). So no carry bit can be\n \t * generated, therefore the output r is always a 16-bit number.\n \t */\n \tr = (r & 0xFFFF) + (r >> 16);\n",
    "prefixes": []
}