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GET /api/patches/105196/?format=api
{ "id": 105196, "url": "http://patches.dpdk.org/api/patches/105196/?format=api", "web_url": "http://patches.dpdk.org/project/dts/patch/20211217110746.14318-1-qinx.sun@intel.com/", "project": { "id": 3, "url": "http://patches.dpdk.org/api/projects/3/?format=api", "name": "DTS", "link_name": "dts", "list_id": "dts.dpdk.org", "list_email": "dts@dpdk.org", "web_url": "", "scm_url": "git://dpdk.org/tools/dts", "webscm_url": "http://git.dpdk.org/tools/dts/", "list_archive_url": "https://inbox.dpdk.org/dts", "list_archive_url_format": "https://inbox.dpdk.org/dts/{}", "commit_url_format": "" }, "msgid": "<20211217110746.14318-1-qinx.sun@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dts/20211217110746.14318-1-qinx.sun@intel.com", "date": "2021-12-17T11:07:46", "name": "[V1] tests/cvl_pps: add 4 new cases", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "43eee9411337ebfda443829df5046dcd3bd5abad", "submitter": { "id": 1956, "url": "http://patches.dpdk.org/api/people/1956/?format=api", "name": "Sun, QinX", "email": "qinx.sun@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dts/patch/20211217110746.14318-1-qinx.sun@intel.com/mbox/", "series": [ { "id": 20959, "url": "http://patches.dpdk.org/api/series/20959/?format=api", "web_url": "http://patches.dpdk.org/project/dts/list/?series=20959", "date": "2021-12-17T11:07:46", "name": "[V1] tests/cvl_pps: add 4 new cases", "version": 1, "mbox": "http://patches.dpdk.org/series/20959/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/105196/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/105196/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dts-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3ACACA0353;\n\tFri, 17 Dec 2021 03:41:03 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 2FA8340143;\n\tFri, 17 Dec 2021 03:41:03 +0100 (CET)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by mails.dpdk.org (Postfix) with ESMTP id 305774013F\n for <dts@dpdk.org>; Fri, 17 Dec 2021 03:41:01 +0100 (CET)", "from fmsmga001.fm.intel.com ([10.253.24.23])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 16 Dec 2021 18:41:00 -0800", "from unknown (HELO localhost.localdomain) ([10.240.183.102])\n by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 16 Dec 2021 18:40:58 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1639708861; x=1671244861;\n h=from:to:cc:subject:date:message-id;\n bh=jHdYSVhPEU3zvTU/0E3IRzajsIxs9KA/ZNwPkSlWGrg=;\n b=bfBgEqCe78sj8iNB4dygqkVueGEv69i2ZODdPWorfHHo1bXM4mY6acdP\n c4iES/IV5oJa1h1XarzZ2+S60uTvXGyqVB1zrQ9REeRlSXDnHES1nvD+w\n 0laz6KqmLWWigOgJpK+jqIQh01FU6vMGjiTCxK1mC/0zRh2qWOIVifL7Y\n NaK81nzCCjvSp5bxpbvMLYfcE8Ri02JDvFgF3DT91ONNhnW83ysEzGSWu\n uY7BwOzUqDvkmHArQWUvi1SpSCuq+ap9stgwH5gkrkIUdMlumurHPuFz+\n lWUiuNaavF69DuJP3jmlzvb3Pyg/I9CGkPC85n2olBJGXPP+YfWZstcVz Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10200\"; a=\"263834386\"", "E=Sophos;i=\"5.88,213,1635231600\"; d=\"scan'208\";a=\"263834386\"", "E=Sophos;i=\"5.88,213,1635231600\"; d=\"scan'208\";a=\"662706044\"" ], "From": "Qin Sun <qinx.sun@intel.com>", "To": "dts@dpdk.org", "Cc": "qi.fu@intel.com,\n\tQin Sun <qinx.sun@intel.com>", "Subject": "[dts] [PATCH V1] tests/cvl_pps: add 4 new cases", "Date": "Fri, 17 Dec 2021 11:07:46 +0000", "Message-Id": "<20211217110746.14318-1-qinx.sun@intel.com>", "X-Mailer": "git-send-email 2.17.1", "X-BeenThere": "dts@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "test suite reviews and discussions <dts.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dts>,\n <mailto:dts-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dts/>", "List-Post": "<mailto:dts@dpdk.org>", "List-Help": "<mailto:dts-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dts>,\n <mailto:dts-request@dpdk.org?subject=subscribe>", "Errors-To": "dts-bounces@dpdk.org" }, "content": "add 4 new cases for pps according to test plan\n\nSigned-off-by: Qin Sun <qinx.sun@intel.com>\n---\n tests/TestSuite_cvl_pps.py | 126 +++++++++++++++++++++++++++++++++++++\n 1 file changed, 126 insertions(+)\n create mode 100755 tests/TestSuite_cvl_pps.py", "diff": "diff --git a/tests/TestSuite_cvl_pps.py b/tests/TestSuite_cvl_pps.py\nnew file mode 100755\nindex 00000000..960e6f6e\n--- /dev/null\n+++ b/tests/TestSuite_cvl_pps.py\n@@ -0,0 +1,126 @@\n+# BSD LICENSE\n+#\n+# Copyright(c) 2010-2021 Intel Corporation. All rights reserved.\n+# All rights reserved.\n+#\n+# Redistribution and use in source and binary forms, with or without\n+# modification, are permitted provided that the following conditions\n+# are met:\n+#\n+# * Redistributions of source code must retain the above copyright\n+# notice, this list of conditions and the following disclaimer.\n+# * Redistributions in binary form must reproduce the above copyright\n+# notice, this list of conditions and the following disclaimer in\n+# the documentation and/or other materials provided with the\n+# distribution.\n+# * Neither the name of Intel Corporation nor the names of its\n+# contributors may be used to endorse or promote products derived\n+# from this software without specific prior written permission.\n+#\n+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+# \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+\n+\n+import re\n+from framework.pmd_output import PmdOutput\n+from framework.test_case import TestCase\n+\n+\n+class TestCVLPPS(TestCase):\n+\n+ def set_up_all(self):\n+ \"\"\"\n+ Run at the start of each test suite.\n+ prerequisites.\n+ \"\"\"\n+ # Based on h/w type, chose how many ports to use\n+ dut_ports = self.dut.get_ports(self.nic)\n+ self.verify(len(dut_ports) >= 1, \"Insufficient ports for testing\")\n+ # Verify that enough threads are available\n+ self.cores = self.dut.get_core_list(\"1S/2C/1T\")\n+ self.verify(self.cores, \"Insufficient cores for speed testing\")\n+ self.pci = self.dut.ports_info[dut_ports[0]]['pci']\n+ self.pmd_output = PmdOutput(self.dut)\n+ self.GLTSYN_AUX = re.compile(r'0x00000007\\s+\\(7\\)')\n+ self.GLTSYN_CLKO = re.compile(r'0x1DCD6500\\s+\\(500000000\\)')\n+ self.pattern = re.compile('register\\s+at\\s+offset\\s+.*:\\s+(?P<hex>0x\\w+)\\s+\\(\\d+\\)')\n+\n+ def set_up(self):\n+ \"\"\"\n+ Run before each test case.\n+ \"\"\"\n+ pass\n+\n+ def read_register(self, addr, port_id=0):\n+ cmd = 'read reg {} {}'.format(port_id, addr)\n+ return self.pmd_output.execute_cmd(cmd)\n+\n+ def launch_testpmd(self, pin_id, rxq=4, txq=4):\n+ self.out = self.pmd_output.start_testpmd(cores=\"1S/2C/1T\", param=\"--rxq={} --txq={} \".format(rxq, txq),\n+ eal_param=\"-a {},pps_out='[pin:{}]'\".format(self.pci, pin_id))\n+\n+ def check_register(self, pin_id, addrs, port_id=0):\n+ self.launch_testpmd(pin_id)\n+ for i in range(len(addrs)):\n+ out = self.read_register(addrs[i], port_id=port_id)\n+ if i == 0:\n+ pattern = self.GLTSYN_AUX\n+ elif i == 1:\n+ pattern = self.GLTSYN_CLKO\n+ else:\n+ pattern = self.pattern\n+ res = pattern.search(out)\n+ self.verify(res, 'pattern:{} not found in output info: {}'.format(pattern, out))\n+ if i == 4:\n+ return res\n+ if i > 1:\n+ actual_value = int(res.group('hex'), 16)\n+ self.verify(actual_value != 0,\n+ 'check register failed, expected value is non-zero, actual value is:{}'.format(actual_value))\n+ self.logger.info('check register pass')\n+\n+ def check_value(self, hex_value, target_value):\n+ self.verify(hex_value[7] == target_value,\n+ 'check register failed, target value is {} not match expected value {}'.format(hex_value[7], target_value))\n+ bit_4th = bin(int(hex_value, 16))[2:][-5]\n+ self.verify(bit_4th == '1', 'check register failed, the 4th bit is {} not match expected value {}'.format(bit_4th, 1))\n+ self.logger.info('check register pass')\n+\n+ def test_check_register_with_pin_id_0(self):\n+ addrs = ['0x00088998', '0x000889B8', '0x00088928', '0x00088930', '0x000880C8']\n+ res = self.check_register(pin_id=0, addrs=addrs)\n+ # check GLGEN_GPIO_CTL[0][2] 0x000880C8 is 8, the 4th bit is 1\n+ self.check_value(hex_value=res.group('hex'), target_value='8')\n+\n+ def test_check_register_with_pin_id_1(self):\n+ addrs = ['0x000889A0', '0x000889C0', '0x00088938', '0x00088940', '0x000880CC']\n+ res = self.check_register(pin_id=1, addrs=addrs)\n+ # check GLGEN_GPIO_CTL[1][2] 0x000880CC is 9, the 4th bit is 1\n+ self.check_value(hex_value=res.group('hex'), target_value='9')\n+\n+ def test_check_register_with_pin_id_2(self):\n+ addrs = ['0x000889A8', '0x000889C8', '0x00088948', '0x00088950', '0x000880D0']\n+ res = self.check_register(pin_id=2, addrs=addrs)\n+ # check GLGEN_GPIO_CTL[2][2] 0x000880CC is A, the 4th bit is 1\n+ self.check_value(hex_value=res.group('hex'), target_value='A')\n+\n+ def test_check_register_with_pin_id_3(self):\n+ addrs = ['0x000889B0', '0x000889D0', '0x00088958', '0x00088960', '0x000880D4']\n+ res = self.check_register(pin_id=3, addrs=addrs)\n+ # check GLGEN_GPIO_CTL[3][2] 0x000880CC is B, the 4th bit is 1\n+ self.check_value(hex_value=res.group('hex'), target_value='B')\n+\n+ def tear_down(self):\n+ self.dut.kill_all()\n+\n+ def tear_down_all(self):\n+ self.dut.kill_all()\n", "prefixes": [ "V1" ] }