get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/105167/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 105167,
    "url": "http://patches.dpdk.org/api/patches/105167/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1639676975-1316-3-git-send-email-anoobj@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1639676975-1316-3-git-send-email-anoobj@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1639676975-1316-3-git-send-email-anoobj@marvell.com",
    "date": "2021-12-16T17:49:08",
    "name": "[v2,02/29] common/cnxk: add aes-xcbc key derive",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "fc4c53202fb644d82c7e38ceb08b52f3f999250e",
    "submitter": {
        "id": 1205,
        "url": "http://patches.dpdk.org/api/people/1205/?format=api",
        "name": "Anoob Joseph",
        "email": "anoobj@marvell.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1639676975-1316-3-git-send-email-anoobj@marvell.com/mbox/",
    "series": [
        {
            "id": 20957,
            "url": "http://patches.dpdk.org/api/series/20957/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=20957",
            "date": "2021-12-16T17:49:06",
            "name": "New features and improvements in cnxk crypto PMD",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/20957/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/105167/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/105167/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 94D7CA0032;\n\tThu, 16 Dec 2021 18:52:24 +0100 (CET)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 87E45410FA;\n\tThu, 16 Dec 2021 18:52:24 +0100 (CET)",
            "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 050994014F\n for <dev@dpdk.org>; Thu, 16 Dec 2021 18:52:22 +0100 (CET)",
            "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 1BGBde8p030189\n for <dev@dpdk.org>; Thu, 16 Dec 2021 09:52:22 -0800",
            "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3d04s71nw1-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Thu, 16 Dec 2021 09:52:22 -0800",
            "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Thu, 16 Dec 2021 09:52:20 -0800",
            "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Thu, 16 Dec 2021 09:52:20 -0800",
            "from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218])\n by maili.marvell.com (Postfix) with ESMTP id 40C605B6921;\n Thu, 16 Dec 2021 09:52:17 -0800 (PST)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=BV9THB2cBwfHhV9s1p+4pNkcO8VqGwOAsNPk0RaGRjs=;\n b=eMwfCc00Un3pwoRwDX2T3WxKimg15xLUsmT+wkb6vKtUCFiiTRVkojxREgz5lRvT+F3a\n oipxeQqY/NvvouhNYSC1MuSrDoANY1yvEE87ia96lv0LDPakRujXflvosb+Wydy/9cau\n IJeQX+8bBjp9P4FYtqC9jUgCo+Ngybs/yb0vHufi3pbbHomsChQgbYud4oX8FvW94AEz\n pnjI0khx4icfRuZFoCelIoXSOxyw6uO6tqB1uq0yAO//h/3XWOT7asKnFHRwNHFfcLO6\n 1LETvjdFyPL5AgzExgtowPIC4iwH2olW3wBZNFY54+uoZirkkD8JHGTlbJ6Tf1hFa3EP oA==",
        "From": "Anoob Joseph <anoobj@marvell.com>",
        "To": "Akhil Goyal <gakhil@marvell.com>, Jerin Jacob <jerinj@marvell.com>",
        "CC": "Anoob Joseph <anoobj@marvell.com>, Archana Muniganti\n <marchana@marvell.com>,\n Tejasree Kondoj <ktejasree@marvell.com>, <dev@dpdk.org>",
        "Subject": "[PATCH v2 02/29] common/cnxk: add aes-xcbc key derive",
        "Date": "Thu, 16 Dec 2021 23:19:08 +0530",
        "Message-ID": "<1639676975-1316-3-git-send-email-anoobj@marvell.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": "<1639676975-1316-1-git-send-email-anoobj@marvell.com>",
        "References": "<1638859858-734-1-git-send-email-anoobj@marvell.com>\n <1639676975-1316-1-git-send-email-anoobj@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-GUID": "kxsYj335ZNG5WPqFligKfUnFQo9EmvzU",
        "X-Proofpoint-ORIG-GUID": "kxsYj335ZNG5WPqFligKfUnFQo9EmvzU",
        "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513\n definitions=2021-12-16_06,2021-12-16_01,2021-12-02_01",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Add support for AES-XCBC key derivation.\n\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\n---\n drivers/common/cnxk/meson.build |   1 +\n drivers/common/cnxk/roc_aes.c   | 208 ++++++++++++++++++++++++++++++++++++++++\n drivers/common/cnxk/roc_aes.h   |  14 +++\n drivers/common/cnxk/roc_api.h   |   3 +\n drivers/common/cnxk/roc_cpt.h   |  24 ++---\n drivers/common/cnxk/version.map |   1 +\n 6 files changed, 239 insertions(+), 12 deletions(-)\n create mode 100644 drivers/common/cnxk/roc_aes.c\n create mode 100644 drivers/common/cnxk/roc_aes.h",
    "diff": "diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build\nindex 4928f7e..4995cfd 100644\n--- a/drivers/common/cnxk/meson.build\n+++ b/drivers/common/cnxk/meson.build\n@@ -12,6 +12,7 @@ config_flag_fmt = 'RTE_LIBRTE_@0@_COMMON'\n deps = ['eal', 'pci', 'bus_pci', 'mbuf', 'security']\n sources = files(\n         'roc_ae.c',\n+        'roc_aes.c',\n         'roc_ae_fpm_tables.c',\n         'roc_bphy.c',\n         'roc_bphy_cgx.c',\ndiff --git a/drivers/common/cnxk/roc_aes.c b/drivers/common/cnxk/roc_aes.c\nnew file mode 100644\nindex 0000000..f821c8b\n--- /dev/null\n+++ b/drivers/common/cnxk/roc_aes.c\n@@ -0,0 +1,208 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright (c) 2021 Marvell.\n+ */\n+\n+#include \"roc_api.h\"\n+\n+#define KEY_WORD_LEN\t (ROC_CPT_AES_XCBC_KEY_LENGTH / sizeof(uint32_t))\n+#define KEY_ROUNDS\t 10\t\t\t/* (Nr+1)*Nb */\n+#define KEY_SCHEDULE_LEN ((KEY_ROUNDS + 1) * 4) /* (Nr+1)*Nb words */\n+\n+/*\n+ * AES 128 implementation based on NIST FIPS 197 suitable for LittleEndian\n+ * https://nvlpubs.nist.gov/nistpubs/FIPS/NIST.FIPS.197.pdf\n+ */\n+\n+/* Sbox from NIST FIPS 197 */\n+static uint8_t Sbox[] = {\n+\t0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b,\n+\t0xfe, 0xd7, 0xab, 0x76, 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0,\n+\t0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0, 0xb7, 0xfd, 0x93, 0x26,\n+\t0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,\n+\t0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2,\n+\t0xeb, 0x27, 0xb2, 0x75, 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0,\n+\t0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84, 0x53, 0xd1, 0x00, 0xed,\n+\t0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,\n+\t0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f,\n+\t0x50, 0x3c, 0x9f, 0xa8, 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5,\n+\t0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2, 0xcd, 0x0c, 0x13, 0xec,\n+\t0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,\n+\t0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14,\n+\t0xde, 0x5e, 0x0b, 0xdb, 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c,\n+\t0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79, 0xe7, 0xc8, 0x37, 0x6d,\n+\t0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,\n+\t0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f,\n+\t0x4b, 0xbd, 0x8b, 0x8a, 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e,\n+\t0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e, 0xe1, 0xf8, 0x98, 0x11,\n+\t0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,\n+\t0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f,\n+\t0xb0, 0x54, 0xbb, 0x16,\n+};\n+\n+/* Substitute a byte with Sbox[byte]. Do it for a word for 4 bytes */\n+static uint32_t\n+sub_word(uint32_t word)\n+{\n+\tword = (Sbox[(word >> 24) & 0xFF] << 24) |\n+\t       (Sbox[(word >> 16) & 0xFF] << 16) |\n+\t       (Sbox[(word >> 8) & 0xFF] << 8) | Sbox[word & 0xFF];\n+\treturn word;\n+}\n+\n+/* Rotate a word by one byte */\n+static uint32_t\n+rot_word(uint32_t word)\n+{\n+\treturn ((word >> 8) & 0xFFFFFF) | (word << 24);\n+}\n+\n+/*\n+ * Multiply with power of 2 and polynomial reduce the result using AES\n+ * polynomial\n+ */\n+static uint8_t\n+Xtime(uint8_t byte, uint8_t pow)\n+{\n+\tuint32_t w = byte;\n+\n+\twhile (pow) {\n+\t\tw = w << 1;\n+\t\tif (w >> 8)\n+\t\t\tw ^= 0x11b;\n+\t\tpow--;\n+\t}\n+\n+\treturn (uint8_t)w;\n+}\n+\n+/*\n+ * Multiply a byte with another number such that the result is polynomial\n+ * reduced in the GF8 space\n+ */\n+static uint8_t\n+GF8mul(uint8_t byte, uint32_t mp)\n+{\n+\tuint8_t pow, mul = 0;\n+\n+\twhile (mp) {\n+\t\tpow = ffs(mp) - 1;\n+\t\tmul ^= Xtime(byte, pow);\n+\t\tmp ^= (1 << pow);\n+\t}\n+\treturn mul;\n+}\n+\n+static void\n+aes_key_expand(const uint8_t *key, uint32_t *ks)\n+{\n+\tunsigned int i = 4;\n+\tuint32_t temp;\n+\n+\t/* Skip key in ks */\n+\tmemcpy(ks, key, KEY_WORD_LEN * sizeof(uint32_t));\n+\n+\twhile (i < KEY_SCHEDULE_LEN) {\n+\t\ttemp = ks[i - 1];\n+\t\tif ((i & 0x3) == 0) {\n+\t\t\ttemp = rot_word(temp);\n+\t\t\ttemp = sub_word(temp);\n+\t\t\ttemp ^= (uint32_t)GF8mul(1, 1 << ((i >> 2) - 1));\n+\t\t}\n+\t\tks[i] = ks[i - 4] ^ temp;\n+\t\ti++;\n+\t}\n+}\n+\n+/* Shift Rows(columns in state in this implementation) */\n+static void\n+shift_word(uint8_t *sRc, uint8_t c, int count)\n+{\n+\t/* rotate across non-consecutive locations */\n+\twhile (count) {\n+\t\tuint8_t t = sRc[c];\n+\n+\t\tsRc[c] = sRc[0x4 + c];\n+\t\tsRc[0x4 + c] = sRc[0x8 + c];\n+\t\tsRc[0x8 + c] = sRc[0xc + c];\n+\t\tsRc[0xc + c] = t;\n+\t\tcount--;\n+\t}\n+}\n+\n+/* Mix Columns(rows in state in this implementation) */\n+static void\n+mix_columns(uint8_t *sRc)\n+{\n+\tuint8_t new_st[4];\n+\tint i;\n+\n+\tfor (i = 0; i < 4; i++)\n+\t\tnew_st[i] = GF8mul(sRc[i], 0x2) ^\n+\t\t\t    GF8mul(sRc[(i + 1) & 0x3], 0x3) ^\n+\t\t\t    sRc[(i + 2) & 0x3] ^ sRc[(i + 3) & 0x3];\n+\tfor (i = 0; i < 4; i++)\n+\t\tsRc[i] = new_st[i];\n+}\n+\n+static void\n+cipher(uint8_t *in, uint8_t *out, uint32_t *ks)\n+{\n+\tuint32_t state[KEY_WORD_LEN];\n+\tunsigned int i, round;\n+\n+\tmemcpy(state, in, sizeof(state));\n+\n+\t/* AddRoundKey(state, w[0, Nb-1]) // See Sec. 5.1.4 */\n+\tfor (i = 0; i < KEY_WORD_LEN; i++)\n+\t\tstate[i] ^= ks[i];\n+\n+\tfor (round = 1; round < KEY_ROUNDS; round++) {\n+\t\t/* SubBytes(state) // See Sec. 5.1.1 */\n+\t\tfor (i = 0; i < KEY_WORD_LEN; i++)\n+\t\t\tstate[i] = sub_word(state[i]);\n+\n+\t\t/* ShiftRows(state) // See Sec. 5.1.2 */\n+\t\tfor (i = 0; i < KEY_WORD_LEN; i++)\n+\t\t\tshift_word((uint8_t *)state, i, i);\n+\n+\t\t/* MixColumns(state) // See Sec. 5.1.3 */\n+\t\tfor (i = 0; i < KEY_WORD_LEN; i++)\n+\t\t\tmix_columns((uint8_t *)&state[i]);\n+\n+\t\t/* AddRoundKey(state, w[round*Nb, (round+1)*Nb-1]) */\n+\t\tfor (i = 0; i < KEY_WORD_LEN; i++)\n+\t\t\tstate[i] ^= ks[round * 4 + i];\n+\t}\n+\n+\t/* SubBytes(state) */\n+\tfor (i = 0; i < KEY_WORD_LEN; i++)\n+\t\tstate[i] = sub_word(state[i]);\n+\n+\t/* ShiftRows(state) */\n+\tfor (i = 0; i < KEY_WORD_LEN; i++)\n+\t\tshift_word((uint8_t *)state, i, i);\n+\n+\t/* AddRoundKey(state, w[Nr*Nb, (Nr+1)*Nb-1]) */\n+\tfor (i = 0; i < KEY_WORD_LEN; i++)\n+\t\tstate[i] ^= ks[KEY_ROUNDS * 4 + i];\n+\tmemcpy(out, state, KEY_WORD_LEN * sizeof(uint32_t));\n+}\n+\n+void\n+roc_aes_xcbc_key_derive(const uint8_t *auth_key, uint8_t *derived_key)\n+{\n+\tuint32_t aes_ks[KEY_SCHEDULE_LEN] = {0};\n+\tuint8_t k1[16] = {[0 ... 15] = 0x01};\n+\tuint8_t k2[16] = {[0 ... 15] = 0x02};\n+\tuint8_t k3[16] = {[0 ... 15] = 0x03};\n+\n+\taes_key_expand(auth_key, aes_ks);\n+\n+\tcipher(k1, derived_key, aes_ks);\n+\tderived_key += sizeof(k1);\n+\n+\tcipher(k2, derived_key, aes_ks);\n+\tderived_key += sizeof(k2);\n+\n+\tcipher(k3, derived_key, aes_ks);\n+}\ndiff --git a/drivers/common/cnxk/roc_aes.h b/drivers/common/cnxk/roc_aes.h\nnew file mode 100644\nindex 0000000..9540391\n--- /dev/null\n+++ b/drivers/common/cnxk/roc_aes.h\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright (c) 2021 Marvell.\n+ */\n+\n+#ifndef _ROC_AES_H_\n+#define _ROC_AES_H_\n+\n+/*\n+ * Derive k1, k2, k3 from 128 bit AES key\n+ */\n+void __roc_api roc_aes_xcbc_key_derive(const uint8_t *auth_key,\n+\t\t\t\t       uint8_t *derived_key);\n+\n+#endif /* _ROC_AES_H_ */\ndiff --git a/drivers/common/cnxk/roc_api.h b/drivers/common/cnxk/roc_api.h\nindex e7aaa07..cf4d487 100644\n--- a/drivers/common/cnxk/roc_api.h\n+++ b/drivers/common/cnxk/roc_api.h\n@@ -90,6 +90,9 @@\n /* DPI */\n #include \"roc_dpi.h\"\n \n+/* AES */\n+#include \"roc_aes.h\"\n+\n /* HASH computation */\n #include \"roc_hash.h\"\n \ndiff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h\nindex 12e6b81..99cb8b2 100644\n--- a/drivers/common/cnxk/roc_cpt.h\n+++ b/drivers/common/cnxk/roc_cpt.h\n@@ -49,18 +49,18 @@\n #define ROC_CPT_AES_CBC_IV_LEN\t 16\n #define ROC_CPT_SHA1_HMAC_LEN\t 12\n #define ROC_CPT_SHA2_HMAC_LEN\t 16\n-#define ROC_CPT_AUTH_KEY_LEN_MAX 64\n-\n-#define ROC_CPT_DES3_KEY_LEN\t  24\n-#define ROC_CPT_AES128_KEY_LEN\t  16\n-#define ROC_CPT_AES192_KEY_LEN\t  24\n-#define ROC_CPT_AES256_KEY_LEN\t  32\n-#define ROC_CPT_MD5_KEY_LENGTH\t  16\n-#define ROC_CPT_SHA1_KEY_LENGTH\t  20\n-#define ROC_CPT_SHA256_KEY_LENGTH 32\n-#define ROC_CPT_SHA384_KEY_LENGTH 48\n-#define ROC_CPT_SHA512_KEY_LENGTH 64\n-#define ROC_CPT_AUTH_KEY_LEN_MAX  64\n+\n+#define ROC_CPT_DES3_KEY_LEN\t    24\n+#define ROC_CPT_AES128_KEY_LEN\t    16\n+#define ROC_CPT_AES192_KEY_LEN\t    24\n+#define ROC_CPT_AES256_KEY_LEN\t    32\n+#define ROC_CPT_MD5_KEY_LENGTH\t    16\n+#define ROC_CPT_SHA1_KEY_LENGTH\t    20\n+#define ROC_CPT_SHA256_KEY_LENGTH   32\n+#define ROC_CPT_SHA384_KEY_LENGTH   48\n+#define ROC_CPT_SHA512_KEY_LENGTH   64\n+#define ROC_CPT_AES_XCBC_KEY_LENGTH 16\n+#define ROC_CPT_AUTH_KEY_LEN_MAX    64\n \n #define ROC_CPT_DES_BLOCK_LENGTH 8\n #define ROC_CPT_AES_BLOCK_LENGTH 16\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 07c6720..b31e8eb 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -26,6 +26,7 @@ INTERNAL {\n \troc_ae_ec_grp_put;\n \troc_ae_fpm_get;\n \troc_ae_fpm_put;\n+\troc_aes_xcbc_key_derive;\n \troc_bphy_cgx_dev_fini;\n \troc_bphy_cgx_dev_init;\n \troc_bphy_cgx_fec_set;\n",
    "prefixes": [
        "v2",
        "02/29"
    ]
}