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GET /api/patches/105101/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 105101,
    "url": "http://patches.dpdk.org/api/patches/105101/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20211213082226.3646-8-pbhagavatula@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20211213082226.3646-8-pbhagavatula@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20211213082226.3646-8-pbhagavatula@marvell.com",
    "date": "2021-12-13T08:22:25",
    "name": "[8/8] net/cnxk: add CN10K template Tx functions to build",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "c5801f6db9e915854d4560f67fcd56442399eaa7",
    "submitter": {
        "id": 1183,
        "url": "http://patches.dpdk.org/api/people/1183/?format=api",
        "name": "Pavan Nikhilesh Bhagavatula",
        "email": "pbhagavatula@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "http://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20211213082226.3646-8-pbhagavatula@marvell.com/mbox/",
    "series": [
        {
            "id": 20922,
            "url": "http://patches.dpdk.org/api/series/20922/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=20922",
            "date": "2021-12-13T08:22:18",
            "name": "[1/8] net/cnxk: add CN9K segregated Rx functions",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/20922/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/105101/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/105101/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4582BA00BE;\n\tMon, 13 Dec 2021 09:23:47 +0100 (CET)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id DCB7341226;\n\tMon, 13 Dec 2021 09:23:10 +0100 (CET)",
            "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id D8960411AE\n for <dev@dpdk.org>; Mon, 13 Dec 2021 09:23:08 +0100 (CET)",
            "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 1BD1ZF0T027372;\n Mon, 13 Dec 2021 00:23:08 -0800",
            "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3cwvmys3r6-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 13 Dec 2021 00:23:07 -0800",
            "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Mon, 13 Dec 2021 00:23:06 -0800",
            "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Mon, 13 Dec 2021 00:23:06 -0800",
            "from BG-LT7430.marvell.com (BG-LT7430.marvell.com [10.28.177.176])\n by maili.marvell.com (Postfix) with ESMTP id 74E4C3F7050;\n Mon, 13 Dec 2021 00:23:03 -0800 (PST)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=Gsq6TjMYJ/sE2PdyajSnxqU1QtCDagZk4ZzwbuRs/yw=;\n b=iuBxCRi7VBkkl3OJ0hjcor+Goo8Bpz8jA7zOWgflbU8SuCf9CaJzRI/hYZEXiSBqh54/\n r9g0Zrx39Mv3pWg6yOGXW+ZdxKcRivRiw9sRHy4BPpOopE1ztETT15Fq13lz6hBaB+Vu\n I5/kye9A52wVV2iI468i/3hsQIqsqrr9QrKkSoYrqLCIiMMpPCBi+hx4MXpGsn6Gxktf\n yexvxaWZtxuHLa9ONcyp5UmaLguYyL+88fn2k7mNDc5YkFWbZY8EvRu+5b7A2z+LWVNg\n Hm9B8gUfsjbw5bmqwao+Q5qywjHWqeZvciaIaiPpLtmkyFa3u+D396tGihXIjqZREkyL 1g==",
        "From": "<pbhagavatula@marvell.com>",
        "To": "<jerinj@marvell.com>, <thomas@monjalon.net>, <david.marchand@redhat.com>,\n Pavan Nikhilesh <pbhagavatula@marvell.com>, Shijith Thotton\n <sthotton@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>, \"Kiran\n Kumar K\" <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>,\n Satha Rao <skoteshwar@marvell.com>",
        "CC": "<dev@dpdk.org>",
        "Subject": "[PATCH 8/8] net/cnxk: add CN10K template Tx functions to build",
        "Date": "Mon, 13 Dec 2021 13:52:25 +0530",
        "Message-ID": "<20211213082226.3646-8-pbhagavatula@marvell.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20211213082226.3646-1-pbhagavatula@marvell.com>",
        "References": "<20211213082226.3646-1-pbhagavatula@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-GUID": "iBzoobo_MkedwpvqOACI5PdZfCDLevHa",
        "X-Proofpoint-ORIG-GUID": "iBzoobo_MkedwpvqOACI5PdZfCDLevHa",
        "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513\n definitions=2021-12-13_03,2021-12-10_01,2021-12-02_01",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nAdd CN10K segregated Tx and event Tx template functions to build,\nadd macros to make future modifications simpler.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n drivers/event/cnxk/cn10k_eventdev.c          |  19 +-\n drivers/event/cnxk/cn10k_worker.h            |  36 +-\n drivers/event/cnxk/cn10k_worker_tx_enq.c     |  23 -\n drivers/event/cnxk/cn10k_worker_tx_enq_seg.c |  23 -\n drivers/event/cnxk/meson.build               |  21 +-\n drivers/net/cnxk/cn10k_tx.c                  |  90 ----\n drivers/net/cnxk/cn10k_tx.h                  | 522 +++++++++----------\n drivers/net/cnxk/cn10k_tx_mseg.c             |  26 -\n drivers/net/cnxk/cn10k_tx_select.c           |  63 +++\n drivers/net/cnxk/cn10k_tx_vec.c              |  25 -\n drivers/net/cnxk/cn10k_tx_vec_mseg.c         |  24 -\n drivers/net/cnxk/meson.build                 |  41 +-\n 12 files changed, 413 insertions(+), 500 deletions(-)\n delete mode 100644 drivers/event/cnxk/cn10k_worker_tx_enq.c\n delete mode 100644 drivers/event/cnxk/cn10k_worker_tx_enq_seg.c\n delete mode 100644 drivers/net/cnxk/cn10k_tx.c\n delete mode 100644 drivers/net/cnxk/cn10k_tx_mseg.c\n create mode 100644 drivers/net/cnxk/cn10k_tx_select.c\n delete mode 100644 drivers/net/cnxk/cn10k_tx_vec.c\n delete mode 100644 drivers/net/cnxk/cn10k_tx_vec_mseg.c\n\n--\n2.17.1",
    "diff": "diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c\nindex 02f3d8235d..b56426960a 100644\n--- a/drivers/event/cnxk/cn10k_eventdev.c\n+++ b/drivers/event/cnxk/cn10k_eventdev.c\n@@ -10,14 +10,7 @@\n \tdeq_op = deq_ops[dev->rx_offloads & (NIX_RX_OFFLOAD_MAX - 1)]\n\n #define CN10K_SET_EVDEV_ENQ_OP(dev, enq_op, enq_ops)                           \\\n-\t(enq_op =                                                              \\\n-\t\t enq_ops[!!(dev->tx_offloads & NIX_TX_OFFLOAD_SECURITY_F)]     \\\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]       \\\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]          \\\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]    \\\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]    \\\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)] \\\n-\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)])\n+\tenq_op = enq_ops[dev->tx_offloads & (NIX_TX_OFFLOAD_MAX - 1)]\n\n static uint32_t\n cn10k_sso_gw_mode_wdata(struct cnxk_sso_evdev *dev)\n@@ -390,17 +383,15 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n\n \t/* Tx modes */\n \tconst event_tx_adapter_enqueue_t\n-\t\tsso_hws_tx_adptr_enq[2][2][2][2][2][2][2] = {\n-#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_tx_adptr_enq_##name,\n+\t\tsso_hws_tx_adptr_enq[NIX_TX_OFFLOAD_MAX] = {\n+#define T(name, sz, flags) [flags] = cn10k_sso_hws_tx_adptr_enq_##name,\n \t\t\tNIX_TX_FASTPATH_MODES\n #undef T\n \t\t};\n\n \tconst event_tx_adapter_enqueue_t\n-\t\tsso_hws_tx_adptr_enq_seg[2][2][2][2][2][2][2] = {\n-#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_tx_adptr_enq_seg_##name,\n+\t\tsso_hws_tx_adptr_enq_seg[NIX_TX_OFFLOAD_MAX] = {\n+#define T(name, sz, flags) [flags] = cn10k_sso_hws_tx_adptr_enq_seg_##name,\n \t\t\tNIX_TX_FASTPATH_MODES\n #undef T\n \t\t};\ndiff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h\nindex 160b90aa27..78d029baaa 100644\n--- a/drivers/event/cnxk/cn10k_worker.h\n+++ b/drivers/event/cnxk/cn10k_worker.h\n@@ -613,17 +613,43 @@ cn10k_sso_hws_event_tx(struct cn10k_sso_hws *ws, struct rte_event *ev,\n \treturn 1;\n }\n\n-#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n+#define T(name, sz, flags)                                                     \\\n \tuint16_t __rte_hot cn10k_sso_hws_tx_adptr_enq_##name(                  \\\n \t\tvoid *port, struct rte_event ev[], uint16_t nb_events);        \\\n \tuint16_t __rte_hot cn10k_sso_hws_tx_adptr_enq_seg_##name(              \\\n-\t\tvoid *port, struct rte_event ev[], uint16_t nb_events);        \\\n-\tuint16_t __rte_hot cn10k_sso_hws_dual_tx_adptr_enq_##name(             \\\n-\t\tvoid *port, struct rte_event ev[], uint16_t nb_events);        \\\n-\tuint16_t __rte_hot cn10k_sso_hws_dual_tx_adptr_enq_seg_##name(         \\\n \t\tvoid *port, struct rte_event ev[], uint16_t nb_events);\n\n NIX_TX_FASTPATH_MODES\n #undef T\n\n+#define SSO_TX(fn, sz, flags)                                                  \\\n+\tuint16_t __rte_hot fn(void *port, struct rte_event ev[],               \\\n+\t\t\t      uint16_t nb_events)                              \\\n+\t{                                                                      \\\n+\t\tstruct cn10k_sso_hws *ws = port;                               \\\n+\t\tuint64_t cmd[sz];                                              \\\n+                                                                               \\\n+\t\tRTE_SET_USED(nb_events);                                       \\\n+\t\treturn cn10k_sso_hws_event_tx(                                 \\\n+\t\t\tws, &ev[0], cmd,                                       \\\n+\t\t\t(const uint64_t(*)[RTE_MAX_QUEUES_PER_PORT]) &         \\\n+\t\t\t\tws->tx_adptr_data,                             \\\n+\t\t\tflags);                                                \\\n+\t}\n+\n+#define SSO_TX_SEG(fn, sz, flags)                                              \\\n+\tuint16_t __rte_hot fn(void *port, struct rte_event ev[],               \\\n+\t\t\t      uint16_t nb_events)                              \\\n+\t{                                                                      \\\n+\t\tuint64_t cmd[(sz) + CNXK_NIX_TX_MSEG_SG_DWORDS - 2];           \\\n+\t\tstruct cn10k_sso_hws *ws = port;                               \\\n+                                                                               \\\n+\t\tRTE_SET_USED(nb_events);                                       \\\n+\t\treturn cn10k_sso_hws_event_tx(                                 \\\n+\t\t\tws, &ev[0], cmd,                                       \\\n+\t\t\t(const uint64_t(*)[RTE_MAX_QUEUES_PER_PORT]) &         \\\n+\t\t\t\tws->tx_adptr_data,                             \\\n+\t\t\t(flags) | NIX_TX_MULTI_SEG_F);                         \\\n+\t}\n+\n #endif\ndiff --git a/drivers/event/cnxk/cn10k_worker_tx_enq.c b/drivers/event/cnxk/cn10k_worker_tx_enq.c\ndeleted file mode 100644\nindex f14c7fc223..0000000000\n--- a/drivers/event/cnxk/cn10k_worker_tx_enq.c\n+++ /dev/null\n@@ -1,23 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(C) 2021 Marvell.\n- */\n-\n-#include \"cn10k_worker.h\"\n-\n-#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n-\tuint16_t __rte_hot cn10k_sso_hws_tx_adptr_enq_##name(                  \\\n-\t\tvoid *port, struct rte_event ev[], uint16_t nb_events)         \\\n-\t{                                                                      \\\n-\t\tstruct cn10k_sso_hws *ws = port;                               \\\n-\t\tuint64_t cmd[sz];                                              \\\n-\t\t\t\t\t\t\t\t\t       \\\n-\t\tRTE_SET_USED(nb_events);                                       \\\n-\t\treturn cn10k_sso_hws_event_tx(                                 \\\n-\t\t\tws, &ev[0], cmd,                                       \\\n-\t\t\t(const uint64_t(*)[RTE_MAX_QUEUES_PER_PORT]) &         \\\n-\t\t\t\tws->tx_adptr_data,                             \\\n-\t\t\tflags);                                                \\\n-\t}\n-\n-NIX_TX_FASTPATH_MODES\n-#undef T\ndiff --git a/drivers/event/cnxk/cn10k_worker_tx_enq_seg.c b/drivers/event/cnxk/cn10k_worker_tx_enq_seg.c\ndeleted file mode 100644\nindex 2ea61e5d88..0000000000\n--- a/drivers/event/cnxk/cn10k_worker_tx_enq_seg.c\n+++ /dev/null\n@@ -1,23 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(C) 2021 Marvell.\n- */\n-\n-#include \"cn10k_worker.h\"\n-\n-#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n-\tuint16_t __rte_hot cn10k_sso_hws_tx_adptr_enq_seg_##name(              \\\n-\t\tvoid *port, struct rte_event ev[], uint16_t nb_events)         \\\n-\t{                                                                      \\\n-\t\tuint64_t cmd[(sz) + CNXK_NIX_TX_MSEG_SG_DWORDS - 2];           \\\n-\t\tstruct cn10k_sso_hws *ws = port;                               \\\n-\t\t\t\t\t\t\t\t\t       \\\n-\t\tRTE_SET_USED(nb_events);                                       \\\n-\t\treturn cn10k_sso_hws_event_tx(                                 \\\n-\t\t\tws, &ev[0], cmd,                                       \\\n-\t\t\t(const uint64_t(*)[RTE_MAX_QUEUES_PER_PORT]) &         \\\n-\t\t\t\tws->tx_adptr_data,                             \\\n-\t\t\t(flags) | NIX_TX_MULTI_SEG_F);                         \\\n-\t}\n-\n-NIX_TX_FASTPATH_MODES\n-#undef T\ndiff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.build\nindex ac452fe451..b27bae7b12 100644\n--- a/drivers/event/cnxk/meson.build\n+++ b/drivers/event/cnxk/meson.build\n@@ -13,8 +13,6 @@ sources = files(\n         'cn9k_worker.c',\n         'cn10k_eventdev.c',\n         'cn10k_worker.c',\n-        'cn10k_worker_tx_enq.c',\n-        'cn10k_worker_tx_enq_seg.c',\n         'cnxk_eventdev.c',\n         'cnxk_eventdev_adptr.c',\n         'cnxk_eventdev_selftest.c',\n@@ -454,6 +452,25 @@ sources += files(\n         'deq/cn10k/deq_112_127_ca_tmo_seg_burst.c',\n )\n\n+sources += files(\n+        'tx/cn10k/tx_0_15.c',\n+        'tx/cn10k/tx_16_31.c',\n+        'tx/cn10k/tx_32_47.c',\n+        'tx/cn10k/tx_48_63.c',\n+        'tx/cn10k/tx_64_79.c',\n+        'tx/cn10k/tx_80_95.c',\n+        'tx/cn10k/tx_96_111.c',\n+        'tx/cn10k/tx_112_127.c',\n+        'tx/cn10k/tx_0_15_seg.c',\n+        'tx/cn10k/tx_16_31_seg.c',\n+        'tx/cn10k/tx_32_47_seg.c',\n+        'tx/cn10k/tx_48_63_seg.c',\n+        'tx/cn10k/tx_64_79_seg.c',\n+        'tx/cn10k/tx_80_95_seg.c',\n+        'tx/cn10k/tx_96_111_seg.c',\n+        'tx/cn10k/tx_112_127_seg.c',\n+)\n+\n extra_flags = ['-flax-vector-conversions', '-Wno-strict-aliasing']\n foreach flag: extra_flags\n     if cc.has_argument(flag)\ndiff --git a/drivers/net/cnxk/cn10k_tx.c b/drivers/net/cnxk/cn10k_tx.c\ndeleted file mode 100644\nindex 5e6c5ee111..0000000000\n--- a/drivers/net/cnxk/cn10k_tx.c\n+++ /dev/null\n@@ -1,90 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(C) 2021 Marvell.\n- */\n-\n-#include \"cn10k_ethdev.h\"\n-#include \"cn10k_tx.h\"\n-\n-#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n-\tuint16_t __rte_noinline __rte_hot cn10k_nix_xmit_pkts_##name(\t       \\\n-\t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts)      \\\n-\t{                                                                      \\\n-\t\tuint64_t cmd[sz];                                              \\\n-\t\t\t\t\t\t\t\t\t       \\\n-\t\t/* For TSO inner checksum is a must */                         \\\n-\t\tif (((flags) & NIX_TX_OFFLOAD_TSO_F) &&\t\t\t       \\\n-\t\t    !((flags) & NIX_TX_OFFLOAD_L3_L4_CSUM_F))\t\t       \\\n-\t\t\treturn 0;                                              \\\n-\t\treturn cn10k_nix_xmit_pkts(tx_queue, tx_pkts, pkts, cmd,       \\\n-\t\t\t\t\t   0, flags);\t\t\t       \\\n-\t}\n-\n-NIX_TX_FASTPATH_MODES\n-#undef T\n-\n-static inline void\n-pick_tx_func(struct rte_eth_dev *eth_dev,\n-\t     const eth_tx_burst_t tx_burst[2][2][2][2][2][2][2])\n-{\n-\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n-\n-\t/* [SEC] [TSP] [TSO] [NOFF] [VLAN] [OL3_OL4_CSUM] [IL3_IL4_CSUM] */\n-\teth_dev->tx_pkt_burst = tx_burst\n-\t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_SECURITY_F)]\n-\t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_TSTAMP_F)]\n-\t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_TSO_F)]\n-\t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_MBUF_NOFF_F)]\n-\t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_VLAN_QINQ_F)]\n-\t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]\n-\t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_L3_L4_CSUM_F)];\n-}\n-\n-void\n-cn10k_eth_set_tx_function(struct rte_eth_dev *eth_dev)\n-{\n-\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n-\n-\tconst eth_tx_burst_t nix_eth_tx_burst[2][2][2][2][2][2][2] = {\n-#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_nix_xmit_pkts_##name,\n-\n-\t\tNIX_TX_FASTPATH_MODES\n-#undef T\n-\t};\n-\n-\tconst eth_tx_burst_t nix_eth_tx_burst_mseg[2][2][2][2][2][2][2] = {\n-#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_nix_xmit_pkts_mseg_##name,\n-\n-\t\tNIX_TX_FASTPATH_MODES\n-#undef T\n-\t};\n-\n-\tconst eth_tx_burst_t nix_eth_tx_vec_burst[2][2][2][2][2][2][2] = {\n-#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_nix_xmit_pkts_vec_##name,\n-\n-\t\tNIX_TX_FASTPATH_MODES\n-#undef T\n-\t};\n-\n-\tconst eth_tx_burst_t nix_eth_tx_vec_burst_mseg[2][2][2][2][2][2][2] = {\n-#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_nix_xmit_pkts_vec_mseg_##name,\n-\n-\t\tNIX_TX_FASTPATH_MODES\n-#undef T\n-\t};\n-\n-\tif (dev->scalar_ena) {\n-\t\tpick_tx_func(eth_dev, nix_eth_tx_burst);\n-\t\tif (dev->tx_offloads & RTE_ETH_TX_OFFLOAD_MULTI_SEGS)\n-\t\t\tpick_tx_func(eth_dev, nix_eth_tx_burst_mseg);\n-\t} else {\n-\t\tpick_tx_func(eth_dev, nix_eth_tx_vec_burst);\n-\t\tif (dev->tx_offloads & RTE_ETH_TX_OFFLOAD_MULTI_SEGS)\n-\t\t\tpick_tx_func(eth_dev, nix_eth_tx_vec_burst_mseg);\n-\t}\n-\n-\trte_mb();\n-}\ndiff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h\nindex 873e1871f9..6de8b18b47 100644\n--- a/drivers/net/cnxk/cn10k_tx.h\n+++ b/drivers/net/cnxk/cn10k_tx.h\n@@ -16,6 +16,7 @@\n #define NIX_TX_OFFLOAD_TSO_F\t      BIT(4)\n #define NIX_TX_OFFLOAD_TSTAMP_F\t      BIT(5)\n #define NIX_TX_OFFLOAD_SECURITY_F     BIT(6)\n+#define NIX_TX_OFFLOAD_MAX\t      (NIX_TX_OFFLOAD_SECURITY_F << 1)\n\n /* Flags to control xmit_prepare function.\n  * Defining it from backwards to denote its been\n@@ -2675,279 +2676,272 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts,\n #define T_SEC_F      NIX_TX_OFFLOAD_SECURITY_F\n\n /* [T_SEC_F] [TSP] [TSO] [NOFF] [VLAN] [OL3OL4CSUM] [L3L4CSUM] */\n-#define NIX_TX_FASTPATH_MODES\t\t\t\t\t\t\\\n-T(no_offload,\t\t\t\t0, 0, 0, 0, 0, 0, 0,\t4,\t\\\n-\t\tNIX_TX_OFFLOAD_NONE)\t\t\t\t\t\\\n-T(l3l4csum,\t\t\t\t0, 0, 0, 0, 0, 0, 1,\t4,\t\\\n-\t\tL3L4CSUM_F)\t\t\t\t\t\t\\\n-T(ol3ol4csum,\t\t\t\t0, 0, 0, 0, 0, 1, 0,\t4,\t\\\n-\t\tOL3OL4CSUM_F)\t\t\t\t\t\t\\\n-T(ol3ol4csum_l3l4csum,\t\t\t0, 0, 0, 0, 0, 1, 1,\t4,\t\\\n-\t\tOL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\t\\\n-T(vlan,\t\t\t\t\t0, 0, 0, 0, 1, 0, 0,\t6,\t\\\n-\t\tVLAN_F)\t\t\t\t\t\t\t\\\n-T(vlan_l3l4csum,\t\t\t0, 0, 0, 0, 1, 0, 1,\t6,\t\\\n-\t\tVLAN_F | L3L4CSUM_F)\t\t\t\t\t\\\n-T(vlan_ol3ol4csum,\t\t\t0, 0, 0, 0, 1, 1, 0,\t6,\t\\\n-\t\tVLAN_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n-T(vlan_ol3ol4csum_l3l4csum,\t\t0, 0, 0, 0, 1, 1, 1,\t6,\t\\\n-\t\tVLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\t\\\n-T(noff,\t\t\t\t\t0, 0, 0, 1, 0, 0, 0,\t4,\t\\\n-\t\tNOFF_F)\t\t\t\t\t\t\t\\\n-T(noff_l3l4csum,\t\t\t0, 0, 0, 1, 0, 0, 1,\t4,\t\\\n-\t\tNOFF_F | L3L4CSUM_F)\t\t\t\t\t\\\n-T(noff_ol3ol4csum,\t\t\t0, 0, 0, 1, 0, 1, 0,\t4,\t\\\n-\t\tNOFF_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n-T(noff_ol3ol4csum_l3l4csum,\t\t0, 0, 0, 1, 0, 1, 1,\t4,\t\\\n-\t\tNOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\t\\\n-T(noff_vlan,\t\t\t\t0, 0, 0, 1, 1, 0, 0,\t6,\t\\\n-\t\tNOFF_F | VLAN_F)\t\t\t\t\t\\\n-T(noff_vlan_l3l4csum,\t\t\t0, 0, 0, 1, 1, 0, 1,\t6,\t\\\n-\t\tNOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\t\\\n-T(noff_vlan_ol3ol4csum,\t\t\t0, 0, 0, 1, 1, 1, 0,\t6,\t\\\n-\t\tNOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(noff_vlan_ol3ol4csum_l3l4csum,\t0, 0, 0, 1, 1, 1, 1,\t6,\t\\\n-\t\tNOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n-T(tso,\t\t\t\t\t0, 0, 1, 0, 0, 0, 0,\t6,\t\\\n-\t\tTSO_F)\t\t\t\t\t\t\t\\\n-T(tso_l3l4csum,\t\t\t\t0, 0, 1, 0, 0, 0, 1,\t6,\t\\\n-\t\tTSO_F | L3L4CSUM_F)\t\t\t\t\t\\\n-T(tso_ol3ol4csum,\t\t\t0, 0, 1, 0, 0, 1, 0,\t6,\t\\\n-\t\tTSO_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n-T(tso_ol3ol4csum_l3l4csum,\t\t0, 0, 1, 0, 0, 1, 1,\t6,\t\\\n-\t\tTSO_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\\\n-T(tso_vlan,\t\t\t\t0, 0, 1, 0, 1, 0, 0,\t6,\t\\\n-\t\tTSO_F | VLAN_F)\t\t\t\t\t\t\\\n-T(tso_vlan_l3l4csum,\t\t\t0, 0, 1, 0, 1, 0, 1,\t6,\t\\\n-\t\tTSO_F | VLAN_F | L3L4CSUM_F)\t\t\t\t\\\n-T(tso_vlan_ol3ol4csum,\t\t\t0, 0, 1, 0, 1, 1, 0,\t6,\t\\\n-\t\tTSO_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(tso_vlan_ol3ol4csum_l3l4csum,\t\t0, 0, 1, 0, 1, 1, 1,\t6,\t\\\n-\t\tTSO_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\\\n-T(tso_noff,\t\t\t\t0, 0, 1, 1, 0, 0, 0,\t6,\t\\\n-\t\tTSO_F | NOFF_F)\t\t\t\t\t\t\\\n-T(tso_noff_l3l4csum,\t\t\t0, 0, 1, 1, 0, 0, 1,\t6,\t\\\n-\t\tTSO_F | NOFF_F | L3L4CSUM_F)\t\t\t\t\\\n-T(tso_noff_ol3ol4csum,\t\t\t0, 0, 1, 1, 0, 1, 0,\t6,\t\\\n-\t\tTSO_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(tso_noff_ol3ol4csum_l3l4csum,\t\t0, 0, 1, 1, 0, 1, 1,\t6,\t\\\n-\t\tTSO_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\\\n-T(tso_noff_vlan,\t\t\t0, 0, 1, 1, 1, 0, 0,\t6,\t\\\n-\t\tTSO_F | NOFF_F | VLAN_F)\t\t\t\t\\\n-T(tso_noff_vlan_l3l4csum,\t\t0, 0, 1, 1, 1, 0, 1,\t6,\t\\\n-\t\tTSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n-T(tso_noff_vlan_ol3ol4csum,\t\t0, 0, 1, 1, 1, 1, 0,\t6,\t\\\n-\t\tTSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\\\n-T(tso_noff_vlan_ol3ol4csum_l3l4csum,\t0, 0, 1, 1, 1, 1, 1,\t6,\t\\\n-\t\tTSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n-T(ts,\t\t\t\t\t0, 1, 0, 0, 0, 0, 0,\t8,\t\\\n-\t\tTSP_F)\t\t\t\t\t\t\t\\\n-T(ts_l3l4csum,\t\t\t\t0, 1, 0, 0, 0, 0, 1,\t8,\t\\\n-\t\tTSP_F | L3L4CSUM_F)\t\t\t\t\t\\\n-T(ts_ol3ol4csum,\t\t\t0, 1, 0, 0, 0, 1, 0,\t8,\t\\\n-\t\tTSP_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n-T(ts_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 0, 0, 1, 1,\t8,\t\\\n-\t\tTSP_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\\\n-T(ts_vlan,\t\t\t\t0, 1, 0, 0, 1, 0, 0,\t8,\t\\\n-\t\tTSP_F | VLAN_F)\t\t\t\t\t\t\\\n-T(ts_vlan_l3l4csum,\t\t\t0, 1, 0, 0, 1, 0, 1,\t8,\t\\\n-\t\tTSP_F | VLAN_F | L3L4CSUM_F)\t\t\t\t\\\n-T(ts_vlan_ol3ol4csum,\t\t\t0, 1, 0, 0, 1, 1, 0,\t8,\t\\\n-\t\tTSP_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(ts_vlan_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 0, 1, 1, 1,\t8,\t\\\n-\t\tTSP_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\\\n-T(ts_noff,\t\t\t\t0, 1, 0, 1, 0, 0, 0,\t8,\t\\\n-\t\tTSP_F | NOFF_F)\t\t\t\t\t\t\\\n-T(ts_noff_l3l4csum,\t\t\t0, 1, 0, 1, 0, 0, 1,\t8,\t\\\n-\t\tTSP_F | NOFF_F | L3L4CSUM_F)\t\t\t\t\\\n-T(ts_noff_ol3ol4csum,\t\t\t0, 1, 0, 1, 0, 1, 0,\t8,\t\\\n-\t\tTSP_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(ts_noff_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 1, 0, 1, 1,\t8,\t\\\n-\t\tTSP_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\\\n-T(ts_noff_vlan,\t\t\t\t0, 1, 0, 1, 1, 0, 0,\t8,\t\\\n-\t\tTSP_F | NOFF_F | VLAN_F)\t\t\t\t\\\n-T(ts_noff_vlan_l3l4csum,\t\t0, 1, 0, 1, 1, 0, 1,\t8,\t\\\n-\t\tTSP_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n-T(ts_noff_vlan_ol3ol4csum,\t\t0, 1, 0, 1, 1, 1, 0,\t8,\t\\\n-\t\tTSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\\\n-T(ts_noff_vlan_ol3ol4csum_l3l4csum,\t0, 1, 0, 1, 1, 1, 1,\t8,\t\\\n-\t\tTSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n-T(ts_tso,\t\t\t\t0, 1, 1, 0, 0, 0, 0,\t8,\t\\\n-\t\tTSP_F | TSO_F)\t\t\t\t\t\t\\\n-T(ts_tso_l3l4csum,\t\t\t0, 1, 1, 0, 0, 0, 1,\t8,\t\\\n-\t\tTSP_F | TSO_F | L3L4CSUM_F)\t\t\t\t\\\n-T(ts_tso_ol3ol4csum,\t\t\t0, 1, 1, 0, 0, 1, 0,\t8,\t\\\n-\t\tTSP_F | TSO_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(ts_tso_ol3ol4csum_l3l4csum,\t\t0, 1, 1, 0, 0, 1, 1,\t8,\t\\\n-\t\tTSP_F | TSO_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n-T(ts_tso_vlan,\t\t\t\t0, 1, 1, 0, 1, 0, 0,\t8,\t\\\n-\t\tTSP_F | TSO_F | VLAN_F)\t\t\t\t\t\\\n-T(ts_tso_vlan_l3l4csum,\t\t\t0, 1, 1, 0, 1, 0, 1,\t8,\t\\\n-\t\tTSP_F | TSO_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n-T(ts_tso_vlan_ol3ol4csum,\t\t0, 1, 1, 0, 1, 1, 0,\t8,\t\\\n-\t\tTSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\\\n-T(ts_tso_vlan_ol3ol4csum_l3l4csum,\t0, 1, 1, 0, 1, 1, 1,\t8,\t\\\n-\t\tTSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\\\n-T(ts_tso_noff,\t\t\t\t0, 1, 1, 1, 0, 0, 0,\t8,\t\\\n-\t\tTSP_F | TSO_F | NOFF_F)\t\t\t\t\t\\\n-T(ts_tso_noff_l3l4csum,\t\t\t0, 1, 1, 1, 0, 0, 1,\t8,\t\\\n-\t\tTSP_F | TSO_F | NOFF_F | L3L4CSUM_F)\t\t\t\\\n-T(ts_tso_noff_ol3ol4csum,\t\t0, 1, 1, 1, 0, 1, 0,\t8,\t\\\n-\t\tTSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\\\n-T(ts_tso_noff_ol3ol4csum_l3l4csum,\t0, 1, 1, 1, 0, 1, 1,\t8,\t\\\n-\t\tTSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\\\n-T(ts_tso_noff_vlan,\t\t\t0, 1, 1, 1, 1, 0, 0,\t8,\t\\\n-\t\tTSP_F | TSO_F | NOFF_F | VLAN_F)\t\t\t\\\n-T(ts_tso_noff_vlan_l3l4csum,\t\t0, 1, 1, 1, 1, 0, 1,\t8,\t\\\n-\t\tTSP_F | TSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\\\n-T(ts_tso_noff_vlan_ol3ol4csum,\t\t0, 1, 1, 1, 1, 1, 0,\t8,\t\\\n-\t\tTSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\\\n-T(ts_tso_noff_vlan_ol3ol4csum_l3l4csum,\t0, 1, 1, 1, 1, 1, 1,\t8,\t\\\n-\t\tTSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\\\n-T(sec,\t\t\t\t\t1, 0, 0, 0, 0, 0, 0,\t4,\t\\\n-\t\tT_SEC_F)\t\t\t\t\t\t\\\n-T(sec_l3l4csum,\t\t\t\t1, 0, 0, 0, 0, 0, 1,\t4,\t\\\n-\t\tT_SEC_F | L3L4CSUM_F)\t\t\t\t\t\\\n-T(sec_ol3ol4csum,\t\t\t1, 0, 0, 0, 0, 1, 0,\t4,\t\\\n-\t\tT_SEC_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n-T(sec_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 0, 0, 1, 1,\t4,\t\\\n-\t\tT_SEC_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\\\n-T(sec_vlan,\t\t\t\t1, 0, 0, 0, 1, 0, 0,\t6,\t\\\n-\t\tT_SEC_F | VLAN_F)\t\t\t\t\t\\\n-T(sec_vlan_l3l4csum,\t\t\t1, 0, 0, 0, 1, 0, 1,\t6,\t\\\n-\t\tT_SEC_F | VLAN_F | L3L4CSUM_F)\t\t\t\t\\\n-T(sec_vlan_ol3ol4csum,\t\t\t1, 0, 0, 0, 1, 1, 0,\t6,\t\\\n-\t\tT_SEC_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\\\n-T(sec_vlan_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 0, 1, 1, 1,\t6,\t\\\n-\t\tT_SEC_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\\\n-T(sec_noff,\t\t\t\t1, 0, 0, 1, 0, 0, 0,\t4,\t\\\n-\t\tT_SEC_F | NOFF_F)\t\t\t\t\t\\\n-T(sec_noff_l3l4csum,\t\t\t1, 0, 0, 1, 0, 0, 1,\t4,\t\\\n-\t\tT_SEC_F | NOFF_F | L3L4CSUM_F)\t\t\t\t\\\n-T(sec_noff_ol3ol4csum,\t\t\t1, 0, 0, 1, 0, 1, 0,\t4,\t\\\n-\t\tT_SEC_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\\\n-T(sec_noff_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 1, 0, 1, 1,\t4,\t\\\n-\t\tT_SEC_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\\\n-T(sec_noff_vlan,\t\t\t1, 0, 0, 1, 1, 0, 0,\t6,\t\\\n-\t\tT_SEC_F | NOFF_F | VLAN_F)\t\t\t\t\\\n-T(sec_noff_vlan_l3l4csum,\t\t1, 0, 0, 1, 1, 0, 1,\t6,\t\\\n-\t\tT_SEC_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n-T(sec_noff_vlan_ol3ol4csum,\t\t1, 0, 0, 1, 1, 1, 0,\t6,\t\\\n-\t\tT_SEC_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\\\n-T(sec_noff_vlan_ol3ol4csum_l3l4csum,\t1, 0, 0, 1, 1, 1, 1,\t6,\t\\\n-\t\tT_SEC_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n-T(sec_tso,\t\t\t\t1, 0, 1, 0, 0, 0, 0,\t6,\t\\\n-\t\tT_SEC_F | TSO_F)\t\t\t\t\t\\\n-T(sec_tso_l3l4csum,\t\t\t1, 0, 1, 0, 0, 0, 1,\t6,\t\\\n-\t\tT_SEC_F | TSO_F | L3L4CSUM_F)\t\t\t\t\\\n-T(sec_tso_ol3ol4csum,\t\t\t1, 0, 1, 0, 0, 1, 0,\t6,\t\\\n-\t\tT_SEC_F | TSO_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(sec_tso_ol3ol4csum_l3l4csum,\t\t1, 0, 1, 0, 0, 1, 1,\t6,\t\\\n-\t\tT_SEC_F | TSO_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n-T(sec_tso_vlan,\t\t\t\t1, 0, 1, 0, 1, 0, 0,\t6,\t\\\n-\t\tT_SEC_F | TSO_F | VLAN_F)\t\t\t\t\\\n-T(sec_tso_vlan_l3l4csum,\t\t1, 0, 1, 0, 1, 0, 1,\t6,\t\\\n-\t\tT_SEC_F | TSO_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n-T(sec_tso_vlan_ol3ol4csum,\t\t1, 0, 1, 0, 1, 1, 0,\t6,\t\\\n-\t\tT_SEC_F | TSO_F | VLAN_F | OL3OL4CSUM_F)\t\t\\\n-T(sec_tso_vlan_ol3ol4csum_l3l4csum,\t1, 0, 1, 0, 1, 1, 1,\t6,\t\\\n-\t\tT_SEC_F | TSO_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n-T(sec_tso_noff,\t\t\t\t1, 0, 1, 1, 0, 0, 0,\t6,\t\\\n-\t\tT_SEC_F | TSO_F | NOFF_F)\t\t\t\t\\\n-T(sec_tso_noff_l3l4csum,\t\t1, 0, 1, 1, 0, 0, 1,\t6,\t\\\n-\t\tT_SEC_F | TSO_F | NOFF_F | L3L4CSUM_F)\t\t\t\\\n-T(sec_tso_noff_ol3ol4csum,\t\t1, 0, 1, 1, 0, 1, 0,\t6,\t\\\n-\t\tT_SEC_F | TSO_F | NOFF_F | OL3OL4CSUM_F)\t\t\\\n-T(sec_tso_noff_ol3ol4csum_l3l4csum,\t1, 0, 1, 1, 0, 1, 1,\t6,\t\\\n-\t\tT_SEC_F | TSO_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n-T(sec_tso_noff_vlan,\t\t\t1, 0, 1, 1, 1, 0, 0,\t6,\t\\\n-\t\tT_SEC_F | TSO_F | NOFF_F | VLAN_F)\t\t\t\\\n-T(sec_tso_noff_vlan_l3l4csum,\t\t1, 0, 1, 1, 1, 0, 1,\t6,\t\\\n-\t\tT_SEC_F | TSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\\\n-T(sec_tso_noff_vlan_ol3ol4csum,\t\t1, 0, 1, 1, 1, 1, 0,\t6,\t\\\n-\t\tT_SEC_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\\\n-T(sec_tso_noff_vlan_ol3ol4csum_l3l4csum, 1, 0, 1, 1, 1, 1, 1,\t6,\t\\\n-\t\tT_SEC_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\\\n-T(sec_ts,\t\t\t\t1, 1, 0, 0, 0, 0, 0,\t8,\t\\\n-\t\tT_SEC_F | TSP_F)\t\t\t\t\t\\\n-T(sec_ts_l3l4csum,\t\t\t1, 1, 0, 0, 0, 0, 1,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | L3L4CSUM_F)\t\t\t\t\\\n-T(sec_ts_ol3ol4csum,\t\t\t1, 1, 0, 0, 0, 1, 0,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(sec_ts_ol3ol4csum_l3l4csum,\t\t1, 1, 0, 0, 0, 1, 1,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n-T(sec_ts_vlan,\t\t\t\t1, 1, 0, 0, 1, 0, 0,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | VLAN_F)\t\t\t\t\\\n-T(sec_ts_vlan_l3l4csum,\t\t\t1, 1, 0, 0, 1, 0, 1,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n-T(sec_ts_vlan_ol3ol4csum,\t\t1, 1, 0, 0, 1, 1, 0,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | VLAN_F | OL3OL4CSUM_F)\t\t\\\n-T(sec_ts_vlan_ol3ol4csum_l3l4csum,\t1, 1, 0, 0, 1, 1, 1,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n-T(sec_ts_noff,\t\t\t\t1, 1, 0, 1, 0, 0, 0,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | NOFF_F)\t\t\t\t\\\n-T(sec_ts_noff_l3l4csum,\t\t\t1, 1, 0, 1, 0, 0, 1,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | NOFF_F | L3L4CSUM_F)\t\t\t\\\n-T(sec_ts_noff_ol3ol4csum,\t\t1, 1, 0, 1, 0, 1, 0,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | NOFF_F | OL3OL4CSUM_F)\t\t\\\n-T(sec_ts_noff_ol3ol4csum_l3l4csum,\t1, 1, 0, 1, 0, 1, 1,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n-T(sec_ts_noff_vlan,\t\t\t1, 1, 0, 1, 1, 0, 0,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | NOFF_F | VLAN_F)\t\t\t\\\n-T(sec_ts_noff_vlan_l3l4csum,\t\t1, 1, 0, 1, 1, 0, 1,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\\\n-T(sec_ts_noff_vlan_ol3ol4csum,\t\t1, 1, 0, 1, 1, 1, 0,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\\\n-T(sec_ts_noff_vlan_ol3ol4csum_l3l4csum,\t1, 1, 0, 1, 1, 1, 1,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\\\n-T(sec_ts_tso,\t\t\t\t1, 1, 1, 0, 0, 0, 0,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | TSO_F)\t\t\t\t\\\n-T(sec_ts_tso_l3l4csum,\t\t\t1, 1, 1, 0, 0, 0, 1,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | TSO_F | L3L4CSUM_F)\t\t\t\\\n-T(sec_ts_tso_ol3ol4csum,\t\t1, 1, 1, 0, 0, 1, 0,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | TSO_F | OL3OL4CSUM_F)\t\t\t\\\n-T(sec_ts_tso_ol3ol4csum_l3l4csum,\t1, 1, 1, 0, 0, 1, 1,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | TSO_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n-T(sec_ts_tso_vlan,\t\t\t1, 1, 1, 0, 1, 0, 0,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | TSO_F | VLAN_F)\t\t\t\\\n-T(sec_ts_tso_vlan_l3l4csum,\t\t1, 1, 1, 0, 1, 0, 1,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | TSO_F | VLAN_F | L3L4CSUM_F)\t\t\\\n-T(sec_ts_tso_vlan_ol3ol4csum,\t\t1, 1, 1, 0, 1, 1, 0,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F)\t\\\n-T(sec_ts_tso_vlan_ol3ol4csum_l3l4csum,\t1, 1, 1, 0, 1, 1, 1,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F) \\\n-T(sec_ts_tso_noff,\t\t\t1, 1, 1, 1, 0, 0, 0,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | TSO_F | NOFF_F)\t\t\t\\\n-T(sec_ts_tso_noff_l3l4csum,\t\t1, 1, 1, 1, 0, 0, 1,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | TSO_F | NOFF_F | L3L4CSUM_F)\t\t\\\n-T(sec_ts_tso_noff_ol3ol4csum,\t\t1, 1, 1, 1, 0, 1, 0,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F)\t\\\n-T(sec_ts_tso_noff_ol3ol4csum_l3l4csum,\t1, 1, 1, 1, 0, 1, 1,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)\\\n-T(sec_ts_tso_noff_vlan,\t\t\t1, 1, 1, 1, 1, 0, 0,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | TSO_F | NOFF_F | VLAN_F)\t\t\\\n-T(sec_ts_tso_noff_vlan_l3l4csum,\t1, 1, 1, 1, 1, 0, 1,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | TSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\\\n-T(sec_ts_tso_noff_vlan_ol3ol4csum,\t1, 1, 1, 1, 1, 1, 0,\t8,\t\\\n-\t\tT_SEC_F | TSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\\\n-T(sec_ts_tso_noff_vlan_ol3ol4csum_l3l4csum, 1, 1, 1, 1, 1, 1, 1, 8,\t\\\n-\t\tT_SEC_F | TSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | \\\n-\t\tL3L4CSUM_F)\n-\n-#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n+#define NIX_TX_FASTPATH_MODES_0_15                                             \\\n+\tT(no_offload, 4, NIX_TX_OFFLOAD_NONE)                                  \\\n+\tT(l3l4csum, 4, L3L4CSUM_F)                                             \\\n+\tT(ol3ol4csum, 4, OL3OL4CSUM_F)                                         \\\n+\tT(ol3ol4csum_l3l4csum, 4, OL3OL4CSUM_F | L3L4CSUM_F)                   \\\n+\tT(vlan, 6, VLAN_F)                                                     \\\n+\tT(vlan_l3l4csum, 6, VLAN_F | L3L4CSUM_F)                               \\\n+\tT(vlan_ol3ol4csum, 6, VLAN_F | OL3OL4CSUM_F)                           \\\n+\tT(vlan_ol3ol4csum_l3l4csum, 6, VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)     \\\n+\tT(noff, 4, NOFF_F)                                                     \\\n+\tT(noff_l3l4csum, 4, NOFF_F | L3L4CSUM_F)                               \\\n+\tT(noff_ol3ol4csum, 4, NOFF_F | OL3OL4CSUM_F)                           \\\n+\tT(noff_ol3ol4csum_l3l4csum, 4, NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)     \\\n+\tT(noff_vlan, 6, NOFF_F | VLAN_F)                                       \\\n+\tT(noff_vlan_l3l4csum, 6, NOFF_F | VLAN_F | L3L4CSUM_F)                 \\\n+\tT(noff_vlan_ol3ol4csum, 6, NOFF_F | VLAN_F | OL3OL4CSUM_F)             \\\n+\tT(noff_vlan_ol3ol4csum_l3l4csum, 6,                                    \\\n+\t  NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\n+\n+#define NIX_TX_FASTPATH_MODES_16_31                                            \\\n+\tT(tso, 6, TSO_F)                                                       \\\n+\tT(tso_l3l4csum, 6, TSO_F | L3L4CSUM_F)                                 \\\n+\tT(tso_ol3ol4csum, 6, TSO_F | OL3OL4CSUM_F)                             \\\n+\tT(tso_ol3ol4csum_l3l4csum, 6, TSO_F | OL3OL4CSUM_F | L3L4CSUM_F)       \\\n+\tT(tso_vlan, 6, TSO_F | VLAN_F)                                         \\\n+\tT(tso_vlan_l3l4csum, 6, TSO_F | VLAN_F | L3L4CSUM_F)                   \\\n+\tT(tso_vlan_ol3ol4csum, 6, TSO_F | VLAN_F | OL3OL4CSUM_F)               \\\n+\tT(tso_vlan_ol3ol4csum_l3l4csum, 6,                                     \\\n+\t  TSO_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)                          \\\n+\tT(tso_noff, 6, TSO_F | NOFF_F)                                         \\\n+\tT(tso_noff_l3l4csum, 6, TSO_F | NOFF_F | L3L4CSUM_F)                   \\\n+\tT(tso_noff_ol3ol4csum, 6, TSO_F | NOFF_F | OL3OL4CSUM_F)               \\\n+\tT(tso_noff_ol3ol4csum_l3l4csum, 6,                                     \\\n+\t  TSO_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)                          \\\n+\tT(tso_noff_vlan, 6, TSO_F | NOFF_F | VLAN_F)                           \\\n+\tT(tso_noff_vlan_l3l4csum, 6, TSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)     \\\n+\tT(tso_noff_vlan_ol3ol4csum, 6, TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F) \\\n+\tT(tso_noff_vlan_ol3ol4csum_l3l4csum, 6,                                \\\n+\t  TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\n+\n+#define NIX_TX_FASTPATH_MODES_32_47                                            \\\n+\tT(ts, 8, TSP_F)                                                        \\\n+\tT(ts_l3l4csum, 8, TSP_F | L3L4CSUM_F)                                  \\\n+\tT(ts_ol3ol4csum, 8, TSP_F | OL3OL4CSUM_F)                              \\\n+\tT(ts_ol3ol4csum_l3l4csum, 8, TSP_F | OL3OL4CSUM_F | L3L4CSUM_F)        \\\n+\tT(ts_vlan, 8, TSP_F | VLAN_F)                                          \\\n+\tT(ts_vlan_l3l4csum, 8, TSP_F | VLAN_F | L3L4CSUM_F)                    \\\n+\tT(ts_vlan_ol3ol4csum, 8, TSP_F | VLAN_F | OL3OL4CSUM_F)                \\\n+\tT(ts_vlan_ol3ol4csum_l3l4csum, 8,                                      \\\n+\t  TSP_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)                          \\\n+\tT(ts_noff, 8, TSP_F | NOFF_F)                                          \\\n+\tT(ts_noff_l3l4csum, 8, TSP_F | NOFF_F | L3L4CSUM_F)                    \\\n+\tT(ts_noff_ol3ol4csum, 8, TSP_F | NOFF_F | OL3OL4CSUM_F)                \\\n+\tT(ts_noff_ol3ol4csum_l3l4csum, 8,                                      \\\n+\t  TSP_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)                          \\\n+\tT(ts_noff_vlan, 8, TSP_F | NOFF_F | VLAN_F)                            \\\n+\tT(ts_noff_vlan_l3l4csum, 8, TSP_F | NOFF_F | VLAN_F | L3L4CSUM_F)      \\\n+\tT(ts_noff_vlan_ol3ol4csum, 8, TSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)  \\\n+\tT(ts_noff_vlan_ol3ol4csum_l3l4csum, 8,                                 \\\n+\t  TSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\n+\n+#define NIX_TX_FASTPATH_MODES_48_63                                            \\\n+\tT(ts_tso, 8, TSP_F | TSO_F)                                            \\\n+\tT(ts_tso_l3l4csum, 8, TSP_F | TSO_F | L3L4CSUM_F)                      \\\n+\tT(ts_tso_ol3ol4csum, 8, TSP_F | TSO_F | OL3OL4CSUM_F)                  \\\n+\tT(ts_tso_ol3ol4csum_l3l4csum, 8,                                       \\\n+\t  TSP_F | TSO_F | OL3OL4CSUM_F | L3L4CSUM_F)                           \\\n+\tT(ts_tso_vlan, 8, TSP_F | TSO_F | VLAN_F)                              \\\n+\tT(ts_tso_vlan_l3l4csum, 8, TSP_F | TSO_F | VLAN_F | L3L4CSUM_F)        \\\n+\tT(ts_tso_vlan_ol3ol4csum, 8, TSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F)    \\\n+\tT(ts_tso_vlan_ol3ol4csum_l3l4csum, 8,                                  \\\n+\t  TSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)                  \\\n+\tT(ts_tso_noff, 8, TSP_F | TSO_F | NOFF_F)                              \\\n+\tT(ts_tso_noff_l3l4csum, 8, TSP_F | TSO_F | NOFF_F | L3L4CSUM_F)        \\\n+\tT(ts_tso_noff_ol3ol4csum, 8, TSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F)    \\\n+\tT(ts_tso_noff_ol3ol4csum_l3l4csum, 8,                                  \\\n+\t  TSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)                  \\\n+\tT(ts_tso_noff_vlan, 8, TSP_F | TSO_F | NOFF_F | VLAN_F)                \\\n+\tT(ts_tso_noff_vlan_l3l4csum, 8,                                        \\\n+\t  TSP_F | TSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)                        \\\n+\tT(ts_tso_noff_vlan_ol3ol4csum, 8,                                      \\\n+\t  TSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)                      \\\n+\tT(ts_tso_noff_vlan_ol3ol4csum_l3l4csum, 8,                             \\\n+\t  TSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\n+\n+#define NIX_TX_FASTPATH_MODES_64_79                                            \\\n+\tT(sec, 4, T_SEC_F)                                                     \\\n+\tT(sec_l3l4csum, 4, T_SEC_F | L3L4CSUM_F)                               \\\n+\tT(sec_ol3ol4csum, 4, T_SEC_F | OL3OL4CSUM_F)                           \\\n+\tT(sec_ol3ol4csum_l3l4csum, 4, T_SEC_F | OL3OL4CSUM_F | L3L4CSUM_F)     \\\n+\tT(sec_vlan, 6, T_SEC_F | VLAN_F)                                       \\\n+\tT(sec_vlan_l3l4csum, 6, T_SEC_F | VLAN_F | L3L4CSUM_F)                 \\\n+\tT(sec_vlan_ol3ol4csum, 6, T_SEC_F | VLAN_F | OL3OL4CSUM_F)             \\\n+\tT(sec_vlan_ol3ol4csum_l3l4csum, 6,                                     \\\n+\t  T_SEC_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)                        \\\n+\tT(sec_noff, 4, T_SEC_F | NOFF_F)                                       \\\n+\tT(sec_noff_l3l4csum, 4, T_SEC_F | NOFF_F | L3L4CSUM_F)                 \\\n+\tT(sec_noff_ol3ol4csum, 4, T_SEC_F | NOFF_F | OL3OL4CSUM_F)             \\\n+\tT(sec_noff_ol3ol4csum_l3l4csum, 4,                                     \\\n+\t  T_SEC_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)                        \\\n+\tT(sec_noff_vlan, 6, T_SEC_F | NOFF_F | VLAN_F)                         \\\n+\tT(sec_noff_vlan_l3l4csum, 6, T_SEC_F | NOFF_F | VLAN_F | L3L4CSUM_F)   \\\n+\tT(sec_noff_vlan_ol3ol4csum, 6,                                         \\\n+\t  T_SEC_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)                            \\\n+\tT(sec_noff_vlan_ol3ol4csum_l3l4csum, 6,                                \\\n+\t  T_SEC_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\n+\n+#define NIX_TX_FASTPATH_MODES_80_95                                            \\\n+\tT(sec_tso, 6, T_SEC_F | TSO_F)                                         \\\n+\tT(sec_tso_l3l4csum, 6, T_SEC_F | TSO_F | L3L4CSUM_F)                   \\\n+\tT(sec_tso_ol3ol4csum, 6, T_SEC_F | TSO_F | OL3OL4CSUM_F)               \\\n+\tT(sec_tso_ol3ol4csum_l3l4csum, 6,                                      \\\n+\t  T_SEC_F | TSO_F | OL3OL4CSUM_F | L3L4CSUM_F)                         \\\n+\tT(sec_tso_vlan, 6, T_SEC_F | TSO_F | VLAN_F)                           \\\n+\tT(sec_tso_vlan_l3l4csum, 6, T_SEC_F | TSO_F | VLAN_F | L3L4CSUM_F)     \\\n+\tT(sec_tso_vlan_ol3ol4csum, 6, T_SEC_F | TSO_F | VLAN_F | OL3OL4CSUM_F) \\\n+\tT(sec_tso_vlan_ol3ol4csum_l3l4csum, 6,                                 \\\n+\t  T_SEC_F | TSO_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)                \\\n+\tT(sec_tso_noff, 6, T_SEC_F | TSO_F | NOFF_F)                           \\\n+\tT(sec_tso_noff_l3l4csum, 6, T_SEC_F | TSO_F | NOFF_F | L3L4CSUM_F)     \\\n+\tT(sec_tso_noff_ol3ol4csum, 6, T_SEC_F | TSO_F | NOFF_F | OL3OL4CSUM_F) \\\n+\tT(sec_tso_noff_ol3ol4csum_l3l4csum, 6,                                 \\\n+\t  T_SEC_F | TSO_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)                \\\n+\tT(sec_tso_noff_vlan, 6, T_SEC_F | TSO_F | NOFF_F | VLAN_F)             \\\n+\tT(sec_tso_noff_vlan_l3l4csum, 6,                                       \\\n+\t  T_SEC_F | TSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)                      \\\n+\tT(sec_tso_noff_vlan_ol3ol4csum, 6,                                     \\\n+\t  T_SEC_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)                    \\\n+\tT(sec_tso_noff_vlan_ol3ol4csum_l3l4csum, 6,                            \\\n+\t  T_SEC_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\n+\n+#define NIX_TX_FASTPATH_MODES_96_111                                           \\\n+\tT(sec_ts, 8, T_SEC_F | TSP_F)                                          \\\n+\tT(sec_ts_l3l4csum, 8, T_SEC_F | TSP_F | L3L4CSUM_F)                    \\\n+\tT(sec_ts_ol3ol4csum, 8, T_SEC_F | TSP_F | OL3OL4CSUM_F)                \\\n+\tT(sec_ts_ol3ol4csum_l3l4csum, 8,                                       \\\n+\t  T_SEC_F | TSP_F | OL3OL4CSUM_F | L3L4CSUM_F)                         \\\n+\tT(sec_ts_vlan, 8, T_SEC_F | TSP_F | VLAN_F)                            \\\n+\tT(sec_ts_vlan_l3l4csum, 8, T_SEC_F | TSP_F | VLAN_F | L3L4CSUM_F)      \\\n+\tT(sec_ts_vlan_ol3ol4csum, 8, T_SEC_F | TSP_F | VLAN_F | OL3OL4CSUM_F)  \\\n+\tT(sec_ts_vlan_ol3ol4csum_l3l4csum, 8,                                  \\\n+\t  T_SEC_F | TSP_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)                \\\n+\tT(sec_ts_noff, 8, T_SEC_F | TSP_F | NOFF_F)                            \\\n+\tT(sec_ts_noff_l3l4csum, 8, T_SEC_F | TSP_F | NOFF_F | L3L4CSUM_F)      \\\n+\tT(sec_ts_noff_ol3ol4csum, 8, T_SEC_F | TSP_F | NOFF_F | OL3OL4CSUM_F)  \\\n+\tT(sec_ts_noff_ol3ol4csum_l3l4csum, 8,                                  \\\n+\t  T_SEC_F | TSP_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)                \\\n+\tT(sec_ts_noff_vlan, 8, T_SEC_F | TSP_F | NOFF_F | VLAN_F)              \\\n+\tT(sec_ts_noff_vlan_l3l4csum, 8,                                        \\\n+\t  T_SEC_F | TSP_F | NOFF_F | VLAN_F | L3L4CSUM_F)                      \\\n+\tT(sec_ts_noff_vlan_ol3ol4csum, 8,                                      \\\n+\t  T_SEC_F | TSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)                    \\\n+\tT(sec_ts_noff_vlan_ol3ol4csum_l3l4csum, 8,                             \\\n+\t  T_SEC_F | TSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\n+\n+#define NIX_TX_FASTPATH_MODES_112_127                                          \\\n+\tT(sec_ts_tso, 8, T_SEC_F | TSP_F | TSO_F)                              \\\n+\tT(sec_ts_tso_l3l4csum, 8, T_SEC_F | TSP_F | TSO_F | L3L4CSUM_F)        \\\n+\tT(sec_ts_tso_ol3ol4csum, 8, T_SEC_F | TSP_F | TSO_F | OL3OL4CSUM_F)    \\\n+\tT(sec_ts_tso_ol3ol4csum_l3l4csum, 8,                                   \\\n+\t  T_SEC_F | TSP_F | TSO_F | OL3OL4CSUM_F | L3L4CSUM_F)                 \\\n+\tT(sec_ts_tso_vlan, 8, T_SEC_F | TSP_F | TSO_F | VLAN_F)                \\\n+\tT(sec_ts_tso_vlan_l3l4csum, 8,                                         \\\n+\t  T_SEC_F | TSP_F | TSO_F | VLAN_F | L3L4CSUM_F)                       \\\n+\tT(sec_ts_tso_vlan_ol3ol4csum, 8,                                       \\\n+\t  T_SEC_F | TSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F)                     \\\n+\tT(sec_ts_tso_vlan_ol3ol4csum_l3l4csum, 8,                              \\\n+\t  T_SEC_F | TSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)        \\\n+\tT(sec_ts_tso_noff, 8, T_SEC_F | TSP_F | TSO_F | NOFF_F)                \\\n+\tT(sec_ts_tso_noff_l3l4csum, 8,                                         \\\n+\t  T_SEC_F | TSP_F | TSO_F | NOFF_F | L3L4CSUM_F)                       \\\n+\tT(sec_ts_tso_noff_ol3ol4csum, 8,                                       \\\n+\t  T_SEC_F | TSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F)                     \\\n+\tT(sec_ts_tso_noff_ol3ol4csum_l3l4csum, 8,                              \\\n+\t  T_SEC_F | TSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)        \\\n+\tT(sec_ts_tso_noff_vlan, 8, T_SEC_F | TSP_F | TSO_F | NOFF_F | VLAN_F)  \\\n+\tT(sec_ts_tso_noff_vlan_l3l4csum, 8,                                    \\\n+\t  T_SEC_F | TSP_F | TSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)              \\\n+\tT(sec_ts_tso_noff_vlan_ol3ol4csum, 8,                                  \\\n+\t  T_SEC_F | TSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)            \\\n+\tT(sec_ts_tso_noff_vlan_ol3ol4csum_l3l4csum, 8,                         \\\n+\t  T_SEC_F | TSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F |           \\\n+\t\t  L3L4CSUM_F)\n+\n+#define NIX_TX_FASTPATH_MODES                                                  \\\n+\tNIX_TX_FASTPATH_MODES_0_15                                             \\\n+\tNIX_TX_FASTPATH_MODES_16_31                                            \\\n+\tNIX_TX_FASTPATH_MODES_32_47                                            \\\n+\tNIX_TX_FASTPATH_MODES_48_63                                            \\\n+\tNIX_TX_FASTPATH_MODES_64_79                                            \\\n+\tNIX_TX_FASTPATH_MODES_80_95                                            \\\n+\tNIX_TX_FASTPATH_MODES_96_111                                           \\\n+\tNIX_TX_FASTPATH_MODES_112_127\n+\n+#define T(name, sz, flags)                                                     \\\n \tuint16_t __rte_noinline __rte_hot cn10k_nix_xmit_pkts_##name(          \\\n \t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts);     \\\n-\t\t\t\t\t\t\t\t\t       \\\n+                                                                               \\\n \tuint16_t __rte_noinline __rte_hot cn10k_nix_xmit_pkts_mseg_##name(     \\\n \t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts);     \\\n-\t\t\t\t\t\t\t\t\t       \\\n+                                                                               \\\n \tuint16_t __rte_noinline __rte_hot cn10k_nix_xmit_pkts_vec_##name(      \\\n \t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts);     \\\n-\t\t\t\t\t\t\t\t\t       \\\n+                                                                               \\\n \tuint16_t __rte_noinline __rte_hot cn10k_nix_xmit_pkts_vec_mseg_##name( \\\n-\t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts);     \\\n+\t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts);\n\n NIX_TX_FASTPATH_MODES\n #undef T\n\n+#define NIX_TX_XMIT(fn, sz, flags)                                             \\\n+\tuint16_t __rte_noinline __rte_hot fn(                                  \\\n+\t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts)      \\\n+\t{                                                                      \\\n+\t\tuint64_t cmd[sz];                                              \\\n+                                                                               \\\n+\t\t/* For TSO inner checksum is a must */                         \\\n+\t\tif (((flags) & NIX_TX_OFFLOAD_TSO_F) &&                        \\\n+\t\t    !((flags) & NIX_TX_OFFLOAD_L3_L4_CSUM_F))                  \\\n+\t\t\treturn 0;                                              \\\n+\t\treturn cn10k_nix_xmit_pkts(tx_queue, tx_pkts, pkts, cmd, 0,    \\\n+\t\t\t\t\t   flags);                             \\\n+\t}\n+\n+#define NIX_TX_XMIT_MSEG(fn, sz, flags)                                        \\\n+\tuint16_t __rte_noinline __rte_hot fn(                                  \\\n+\t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts)      \\\n+\t{                                                                      \\\n+\t\tuint64_t cmd[(sz) + CNXK_NIX_TX_MSEG_SG_DWORDS - 2];           \\\n+                                                                               \\\n+\t\t/* For TSO inner checksum is a must */                         \\\n+\t\tif (((flags) & NIX_TX_OFFLOAD_TSO_F) &&                        \\\n+\t\t    !((flags) & NIX_TX_OFFLOAD_L3_L4_CSUM_F))                  \\\n+\t\t\treturn 0;                                              \\\n+\t\treturn cn10k_nix_xmit_pkts_mseg(tx_queue, tx_pkts, pkts, cmd,  \\\n+\t\t\t\t\t\t0,                             \\\n+\t\t\t\t\t\tflags | NIX_TX_MULTI_SEG_F);   \\\n+\t}\n+\n+#define NIX_TX_XMIT_VEC(fn, sz, flags)                                         \\\n+\tuint16_t __rte_noinline __rte_hot fn(                                  \\\n+\t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts)      \\\n+\t{                                                                      \\\n+\t\tuint64_t cmd[sz];                                              \\\n+                                                                               \\\n+\t\t/* For TSO inner checksum is a must */                         \\\n+\t\tif (((flags) & NIX_TX_OFFLOAD_TSO_F) &&                        \\\n+\t\t    !((flags) & NIX_TX_OFFLOAD_L3_L4_CSUM_F))                  \\\n+\t\t\treturn 0;                                              \\\n+\t\treturn cn10k_nix_xmit_pkts_vector(tx_queue, tx_pkts, pkts,     \\\n+\t\t\t\t\t\t  cmd, 0, (flags));            \\\n+\t}\n+\n+#define NIX_TX_XMIT_VEC_MSEG(fn, sz, flags)                                    \\\n+\tuint16_t __rte_noinline __rte_hot fn(                                  \\\n+\t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts)      \\\n+\t{                                                                      \\\n+\t\tuint64_t cmd[(sz) + CNXK_NIX_TX_MSEG_SG_DWORDS - 2];           \\\n+                                                                               \\\n+\t\t/* For TSO inner checksum is a must */                         \\\n+\t\tif (((flags) & NIX_TX_OFFLOAD_TSO_F) &&                        \\\n+\t\t    !((flags) & NIX_TX_OFFLOAD_L3_L4_CSUM_F))                  \\\n+\t\t\treturn 0;                                              \\\n+\t\treturn cn10k_nix_xmit_pkts_vector(                             \\\n+\t\t\ttx_queue, tx_pkts, pkts, cmd, 0,                       \\\n+\t\t\t(flags) | NIX_TX_MULTI_SEG_F);                         \\\n+\t}\n+\n #endif /* __CN10K_TX_H__ */\ndiff --git a/drivers/net/cnxk/cn10k_tx_mseg.c b/drivers/net/cnxk/cn10k_tx_mseg.c\ndeleted file mode 100644\nindex 2b834095cf..0000000000\n--- a/drivers/net/cnxk/cn10k_tx_mseg.c\n+++ /dev/null\n@@ -1,26 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(C) 2021 Marvell.\n- */\n-\n-#include \"cn10k_ethdev.h\"\n-#include \"cn10k_tx.h\"\n-\n-#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n-\tuint16_t __rte_noinline __rte_hot\t\t\t\t       \\\n-\t\tcn10k_nix_xmit_pkts_mseg_##name(void *tx_queue,                \\\n-\t\t\t\t\t\tstruct rte_mbuf **tx_pkts,     \\\n-\t\t\t\t\t\tuint16_t pkts)                 \\\n-\t{                                                                      \\\n-\t\tuint64_t cmd[(sz)];                                            \\\n-\t\t\t\t\t\t\t\t\t       \\\n-\t\t/* For TSO inner checksum is a must */                         \\\n-\t\tif (((flags) & NIX_TX_OFFLOAD_TSO_F) &&\t\t\t       \\\n-\t\t    !((flags) & NIX_TX_OFFLOAD_L3_L4_CSUM_F))\t\t       \\\n-\t\t\treturn 0;                                              \\\n-\t\treturn cn10k_nix_xmit_pkts_mseg(tx_queue, tx_pkts, pkts, cmd,  \\\n-\t\t\t\t\t\t0, (flags)\t\t       \\\n-\t\t\t\t\t\t\t| NIX_TX_MULTI_SEG_F); \\\n-\t}\n-\n-NIX_TX_FASTPATH_MODES\n-#undef T\ndiff --git a/drivers/net/cnxk/cn10k_tx_select.c b/drivers/net/cnxk/cn10k_tx_select.c\nnew file mode 100644\nindex 0000000000..bd1fba06b9\n--- /dev/null\n+++ b/drivers/net/cnxk/cn10k_tx_select.c\n@@ -0,0 +1,63 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_tx.h\"\n+\n+static inline void\n+pick_tx_func(struct rte_eth_dev *eth_dev,\n+\t     const eth_tx_burst_t tx_burst[NIX_TX_OFFLOAD_MAX])\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\n+\t/* [SEC] [TSP] [TSO] [NOFF] [VLAN] [OL3_OL4_CSUM] [IL3_IL4_CSUM] */\n+\teth_dev->tx_pkt_burst =\n+\t\ttx_burst[dev->tx_offload_flags & (NIX_TX_OFFLOAD_MAX - 1)];\n+}\n+\n+void\n+cn10k_eth_set_tx_function(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\n+\tconst eth_tx_burst_t nix_eth_tx_burst[NIX_TX_OFFLOAD_MAX] = {\n+#define T(name, sz, flags) [flags] = cn10k_nix_xmit_pkts_##name,\n+\n+\t\tNIX_TX_FASTPATH_MODES\n+#undef T\n+\t};\n+\n+\tconst eth_tx_burst_t nix_eth_tx_burst_mseg[NIX_TX_OFFLOAD_MAX] = {\n+#define T(name, sz, flags) [flags] = cn10k_nix_xmit_pkts_mseg_##name,\n+\n+\t\tNIX_TX_FASTPATH_MODES\n+#undef T\n+\t};\n+\n+\tconst eth_tx_burst_t nix_eth_tx_vec_burst[NIX_TX_OFFLOAD_MAX] = {\n+#define T(name, sz, flags) [flags] = cn10k_nix_xmit_pkts_vec_##name,\n+\n+\t\tNIX_TX_FASTPATH_MODES\n+#undef T\n+\t};\n+\n+\tconst eth_tx_burst_t nix_eth_tx_vec_burst_mseg[NIX_TX_OFFLOAD_MAX] = {\n+#define T(name, sz, flags) [flags] = cn10k_nix_xmit_pkts_vec_mseg_##name,\n+\n+\t\tNIX_TX_FASTPATH_MODES\n+#undef T\n+\t};\n+\n+\tif (dev->scalar_ena) {\n+\t\tpick_tx_func(eth_dev, nix_eth_tx_burst);\n+\t\tif (dev->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS)\n+\t\t\tpick_tx_func(eth_dev, nix_eth_tx_burst_mseg);\n+\t} else {\n+\t\tpick_tx_func(eth_dev, nix_eth_tx_vec_burst);\n+\t\tif (dev->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS)\n+\t\t\tpick_tx_func(eth_dev, nix_eth_tx_vec_burst_mseg);\n+\t}\n+\n+\trte_mb();\n+}\ndiff --git a/drivers/net/cnxk/cn10k_tx_vec.c b/drivers/net/cnxk/cn10k_tx_vec.c\ndeleted file mode 100644\nindex 2789b13d60..0000000000\n--- a/drivers/net/cnxk/cn10k_tx_vec.c\n+++ /dev/null\n@@ -1,25 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(C) 2021 Marvell.\n- */\n-\n-#include \"cn10k_ethdev.h\"\n-#include \"cn10k_tx.h\"\n-\n-#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n-\tuint16_t __rte_noinline __rte_hot\t\t\t\t       \\\n-\t\tcn10k_nix_xmit_pkts_vec_##name(void *tx_queue,                 \\\n-\t\t\t\t\t       struct rte_mbuf **tx_pkts,      \\\n-\t\t\t\t\t       uint16_t pkts)                  \\\n-\t{                                                                      \\\n-\t\tuint64_t cmd[sz];                                              \\\n-\t\t\t\t\t\t\t\t\t       \\\n-\t\t/* For TSO inner checksum is a must */                         \\\n-\t\tif (((flags) & NIX_TX_OFFLOAD_TSO_F) &&\t\t\t       \\\n-\t\t    !((flags) & NIX_TX_OFFLOAD_L3_L4_CSUM_F))\t\t       \\\n-\t\t\treturn 0;                                              \\\n-\t\treturn cn10k_nix_xmit_pkts_vector(tx_queue, tx_pkts, pkts, cmd,\\\n-\t\t\t\t\t\t  0, (flags));                 \\\n-\t}\n-\n-NIX_TX_FASTPATH_MODES\n-#undef T\ndiff --git a/drivers/net/cnxk/cn10k_tx_vec_mseg.c b/drivers/net/cnxk/cn10k_tx_vec_mseg.c\ndeleted file mode 100644\nindex 98000df101..0000000000\n--- a/drivers/net/cnxk/cn10k_tx_vec_mseg.c\n+++ /dev/null\n@@ -1,24 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(C) 2021 Marvell.\n- */\n-\n-#include \"cn10k_ethdev.h\"\n-#include \"cn10k_tx.h\"\n-\n-#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n-\tuint16_t __rte_noinline __rte_hot cn10k_nix_xmit_pkts_vec_mseg_##name( \\\n-\t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts)      \\\n-\t{                                                                      \\\n-\t\tuint64_t cmd[sz];                                              \\\n-\t\t\t\t\t\t\t\t\t       \\\n-\t\t/* For TSO inner checksum is a must */                         \\\n-\t\tif (((flags) & NIX_TX_OFFLOAD_TSO_F) &&                        \\\n-\t\t    !((flags) & NIX_TX_OFFLOAD_L3_L4_CSUM_F))                  \\\n-\t\t\treturn 0;                                              \\\n-\t\treturn cn10k_nix_xmit_pkts_vector(                             \\\n-\t\t\ttx_queue, tx_pkts, pkts, cmd, 0,                       \\\n-\t\t\t(flags) | NIX_TX_MULTI_SEG_F);                         \\\n-\t}\n-\n-NIX_TX_FASTPATH_MODES\n-#undef T\ndiff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build\nindex 1fd388a1f0..375c75d1c7 100644\n--- a/drivers/net/cnxk/meson.build\n+++ b/drivers/net/cnxk/meson.build\n@@ -107,11 +107,8 @@ sources += files(\n         'cn10k_ethdev.c',\n         'cn10k_ethdev_sec.c',\n         'cn10k_rte_flow.c',\n-        'cn10k_tx.c',\n-        'cn10k_tx_mseg.c',\n-        'cn10k_tx_vec.c',\n-        'cn10k_tx_vec_mseg.c',\n         'cn10k_rx_select.c',\n+        'cn10k_tx_select.c',\n )\n\n sources += files(\n@@ -149,6 +146,42 @@ sources += files(\n         'rx/cn10k/rx_112_127_vec_mseg.c',\n )\n\n+sources += files(\n+        'tx/cn10k/tx_0_15.c',\n+        'tx/cn10k/tx_16_31.c',\n+        'tx/cn10k/tx_32_47.c',\n+        'tx/cn10k/tx_48_63.c',\n+        'tx/cn10k/tx_64_79.c',\n+        'tx/cn10k/tx_80_95.c',\n+        'tx/cn10k/tx_96_111.c',\n+        'tx/cn10k/tx_112_127.c',\n+        'tx/cn10k/tx_0_15_mseg.c',\n+        'tx/cn10k/tx_16_31_mseg.c',\n+        'tx/cn10k/tx_32_47_mseg.c',\n+        'tx/cn10k/tx_48_63_mseg.c',\n+        'tx/cn10k/tx_64_79_mseg.c',\n+        'tx/cn10k/tx_80_95_mseg.c',\n+        'tx/cn10k/tx_96_111_mseg.c',\n+        'tx/cn10k/tx_112_127_mseg.c',\n+        'tx/cn10k/tx_0_15_vec.c',\n+        'tx/cn10k/tx_16_31_vec.c',\n+        'tx/cn10k/tx_32_47_vec.c',\n+        'tx/cn10k/tx_48_63_vec.c',\n+        'tx/cn10k/tx_64_79_vec.c',\n+        'tx/cn10k/tx_80_95_vec.c',\n+        'tx/cn10k/tx_96_111_vec.c',\n+        'tx/cn10k/tx_112_127_vec.c',\n+        'tx/cn10k/tx_0_15_vec_mseg.c',\n+        'tx/cn10k/tx_16_31_vec_mseg.c',\n+        'tx/cn10k/tx_32_47_vec_mseg.c',\n+        'tx/cn10k/tx_48_63_vec_mseg.c',\n+        'tx/cn10k/tx_64_79_vec_mseg.c',\n+        'tx/cn10k/tx_80_95_vec_mseg.c',\n+        'tx/cn10k/tx_96_111_vec_mseg.c',\n+        'tx/cn10k/tx_112_127_vec_mseg.c',\n+)\n+\n+\n deps += ['bus_pci', 'cryptodev', 'eventdev', 'security']\n deps += ['common_cnxk', 'mempool_cnxk']\n\n",
    "prefixes": [
        "8/8"
    ]
}