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GET /api/patches/10420/?format=api
{ "id": 10420, "url": "http://patches.dpdk.org/api/patches/10420/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1454797033-24057-3-git-send-email-thomas.monjalon@6wind.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1454797033-24057-3-git-send-email-thomas.monjalon@6wind.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1454797033-24057-3-git-send-email-thomas.monjalon@6wind.com", "date": "2016-02-06T22:17:10", "name": "[dpdk-dev,v2,2/5] eal: move CPU flag functions out of headers", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "8a3949936ff2620ab8b0e5d0bca5ef5eca486553", "submitter": { "id": 1, "url": "http://patches.dpdk.org/api/people/1/?format=api", "name": "Thomas Monjalon", "email": "thomas.monjalon@6wind.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1454797033-24057-3-git-send-email-thomas.monjalon@6wind.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/10420/comments/", "check": "pending", "checks": "http://patches.dpdk.org/api/patches/10420/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id BF124A56E;\n\tSat, 6 Feb 2016 23:18:41 +0100 (CET)", "from mail-wm0-f44.google.com (mail-wm0-f44.google.com\n\t[74.125.82.44]) by dpdk.org (Postfix) with ESMTP id 3BD6595B5\n\tfor <dev@dpdk.org>; Sat, 6 Feb 2016 23:18:39 +0100 (CET)", "by mail-wm0-f44.google.com with SMTP id 128so112320833wmz.1\n\tfor <dev@dpdk.org>; Sat, 06 Feb 2016 14:18:39 -0800 (PST)", "from localhost.localdomain (136-92-190-109.dsl.ovh.fr.\n\t[109.190.92.136]) by smtp.gmail.com with ESMTPSA id\n\te9sm22167710wja.25.2016.02.06.14.18.37\n\t(version=TLSv1/SSLv3 cipher=OTHER);\n\tSat, 06 Feb 2016 14:18:38 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=6wind-com.20150623.gappssmtp.com; s=20150623;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=TI4oNmMPYzBy2NJ2xjQ329EvYcTjPhDlQx615NYy8rI=;\n\tb=JqBnFNTLx0VtJ+A8hk1n1f0VhCgy3twFfKTKo8DDmJVMEfmoWpLWcxjNb0nju9xXHk\n\t8E/ghWqsy41oX9UjyKwm7fKkLpB1WRsToms+TuaAbMtha3blNeqP5x1GkczRZ/J6jbu+\n\twn5BWgW2E1XzgZOVcEkIrRhqLC3mLvem1SNiaYcURJeaQLSxQBdbNe3zzVOmA/A8J8+L\n\tb2y3UWNIIg6hbdcP6xwD/XFbVy0uAmpCQbW23uXo3kWSvKowdFuOk1O/iR3Bb7PZmAUe\n\tshRtDOSFMo0jeoKxZvIX5KdQJhrb14pMt9IPmdPdzoS9rcekY4ahjuCkee4uY1E4NuAr\n\tlIgg==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20130820;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=TI4oNmMPYzBy2NJ2xjQ329EvYcTjPhDlQx615NYy8rI=;\n\tb=L/IMIIiEtZcnbr/L5swqRjD2n2ZLzm+z3mxBF7Xt9VnHsNB1g/QPriIPX84C/Trl8L\n\txrqFvqafdItuNicX6I68JjYV9+9jboZir+/uvjkLWtfe3UwznbrfAPNIPTvmoJ2Iq5Lb\n\teU2ARy6mhBt+24mX68v+CQqgAmnqpwZOd/wbA8fAWaetT+FieXezJaOAnnihMPURJaJM\n\tbKbz1n9J0/2N2kwvmxIUJZQnbhgIB/T8PBYkVgoc7gxWdCviQwvyyC6xr46qCYC6ql5p\n\tySrFqSI7JPImXDybkZNaJMoapy9X8UE/B2zztp6yMqZ+HxhFgv6RrVLQRZeb5kzM6YgB\n\tHsLQ==", "X-Gm-Message-State": "AG10YOTg1TqGsIW1+Wlp22Uan9tbkeZRpCtVHVu+rJIhXQ3yZ/OaprZ5p91lWP9Dt7DzxNEs", "X-Received": "by 10.194.21.163 with SMTP id w3mr20329183wje.58.1454797119120; \n\tSat, 06 Feb 2016 14:18:39 -0800 (PST)", "From": "Thomas Monjalon <thomas.monjalon@6wind.com>", "To": "david.marchand@6wind.com,\n\tferruh.yigit@intel.com", "Date": "Sat, 6 Feb 2016 23:17:10 +0100", "Message-Id": "<1454797033-24057-3-git-send-email-thomas.monjalon@6wind.com>", "X-Mailer": "git-send-email 2.7.0", "In-Reply-To": "<1454797033-24057-1-git-send-email-thomas.monjalon@6wind.com>", "References": "<1454453993-3903-1-git-send-email-thomas.monjalon@6wind.com>\n\t<1454797033-24057-1-git-send-email-thomas.monjalon@6wind.com>", "Cc": "dev@dpdk.org, viktorin@rehivetech.com", "Subject": "[dpdk-dev] [PATCH v2 2/5] eal: move CPU flag functions out of\n\theaders", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The patch c344eab3ee has moved the hardware definition of CPU flags.\nNow the functions checking these hardware flags are also moved.\nThe function rte_cpu_get_flag_enabled() is no more inline.\n\nThe benefits are:\n- remove rte_cpu_feature_table from the ABI (recently added)\n- hide hardware details from the API\n- allow to adapt structures per arch (done in next patch)\n\nSigned-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>\n---\n MAINTAINERS | 4 +\n app/test/test_hash_scaling.c | 2 +\n lib/librte_eal/bsdapp/eal/rte_eal_version.map | 1 -\n lib/librte_eal/common/arch/arm/rte_cpuflags.c | 125 ++++++++++++++++++---\n lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c | 79 +++++++++++++\n lib/librte_eal/common/arch/tile/rte_cpuflags.c | 11 ++\n lib/librte_eal/common/arch/x86/rte_cpuflags.c | 83 ++++++++++++++\n lib/librte_eal/common/eal_common_cpuflags.c | 3 +\n .../common/include/arch/arm/rte_cpuflags_32.h | 80 +------------\n .../common/include/arch/arm/rte_cpuflags_64.h | 81 +------------\n .../common/include/arch/ppc_64/rte_cpuflags.h | 66 +----------\n .../common/include/arch/tile/rte_cpuflags.h | 31 +----\n .../common/include/arch/x86/rte_cpuflags.h | 68 +----------\n .../common/include/generic/rte_cpuflags.h | 50 +--------\n lib/librte_eal/linuxapp/eal/rte_eal_version.map | 1 -\n 15 files changed, 300 insertions(+), 385 deletions(-)", "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex b90aeea..628bc05 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -131,6 +131,7 @@ F: doc/guides/sample_app_ug/multi_process.rst\n ARM v7\n M: Jan Viktorin <viktorin@rehivetech.com>\n M: Jianbo Liu <jianbo.liu@linaro.org>\n+F: lib/librte_eal/common/arch/arm/\n F: lib/librte_eal/common/include/arch/arm/\n \n ARM v8\n@@ -141,16 +142,19 @@ F: lib/librte_acl/acl_run_neon.*\n \n EZchip TILE-Gx\n M: Zhigang Lu <zlu@ezchip.com>\n+F: lib/librte_eal/common/arch/tile/\n F: lib/librte_eal/common/include/arch/tile/\n F: drivers/net/mpipe/\n \n IBM POWER\n M: Chao Zhu <chaozhu@linux.vnet.ibm.com>\n+F: lib/librte_eal/common/arch/ppc_64/\n F: lib/librte_eal/common/include/arch/ppc_64/\n \n Intel x86\n M: Bruce Richardson <bruce.richardson@intel.com>\n M: Konstantin Ananyev <konstantin.ananyev@intel.com>\n+F: lib/librte_eal/common/arch/x86/\n F: lib/librte_eal/common/include/arch/x86/\n \n Linux EAL (with overlaps)\ndiff --git a/app/test/test_hash_scaling.c b/app/test/test_hash_scaling.c\nindex 744e5e3..1c4c75d 100644\n--- a/app/test/test_hash_scaling.c\n+++ b/app/test/test_hash_scaling.c\n@@ -31,6 +31,8 @@\n * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n */\n \n+#include <stdio.h>\n+\n #include <rte_cycles.h>\n #include <rte_hash.h>\n #include <rte_hash_crc.h>\ndiff --git a/lib/librte_eal/bsdapp/eal/rte_eal_version.map b/lib/librte_eal/bsdapp/eal/rte_eal_version.map\nindex 9bea0e2..1a96203 100644\n--- a/lib/librte_eal/bsdapp/eal/rte_eal_version.map\n+++ b/lib/librte_eal/bsdapp/eal/rte_eal_version.map\n@@ -142,6 +142,5 @@ DPDK_2.3 {\n \trte_cpu_get_flag_name;\n \trte_eal_pci_map_device;\n \trte_eal_pci_unmap_device;\n-\trte_cpu_feature_table;\n \n } DPDK_2.2;\ndiff --git a/lib/librte_eal/common/arch/arm/rte_cpuflags.c b/lib/librte_eal/common/arch/arm/rte_cpuflags.c\nindex 62e0791..cd7a7b1 100644\n--- a/lib/librte_eal/common/arch/arm/rte_cpuflags.c\n+++ b/lib/librte_eal/common/arch/arm/rte_cpuflags.c\n@@ -2,6 +2,7 @@\n * BSD LICENSE\n *\n * Copyright (C) Cavium networks Ltd. 2015.\n+ * Copyright(c) 2015 RehiveTech. All rights reserved.\n *\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions\n@@ -32,19 +33,51 @@\n \n #include \"rte_cpuflags.h\"\n \n-#ifdef RTE_ARCH_64\n-const struct feature_entry rte_cpu_feature_table[] = {\n-\tFEAT_DEF(FP,\t\t0x00000001, 0, REG_HWCAP, 0)\n-\tFEAT_DEF(NEON,\t\t0x00000001, 0, REG_HWCAP, 1)\n-\tFEAT_DEF(EVTSTRM,\t0x00000001, 0, REG_HWCAP, 2)\n-\tFEAT_DEF(AES,\t\t0x00000001, 0, REG_HWCAP, 3)\n-\tFEAT_DEF(PMULL,\t\t0x00000001, 0, REG_HWCAP, 4)\n-\tFEAT_DEF(SHA1,\t\t0x00000001, 0, REG_HWCAP, 5)\n-\tFEAT_DEF(SHA2,\t\t0x00000001, 0, REG_HWCAP, 6)\n-\tFEAT_DEF(CRC32,\t\t0x00000001, 0, REG_HWCAP, 7)\n-\tFEAT_DEF(AARCH64,\t0x00000001, 0, REG_PLATFORM, 1)\n+#include <elf.h>\n+#include <fcntl.h>\n+#include <assert.h>\n+#include <unistd.h>\n+#include <string.h>\n+\n+#ifndef AT_HWCAP\n+#define AT_HWCAP 16\n+#endif\n+\n+#ifndef AT_HWCAP2\n+#define AT_HWCAP2 26\n+#endif\n+\n+#ifndef AT_PLATFORM\n+#define AT_PLATFORM 15\n+#endif\n+\n+enum cpu_register_t {\n+\tREG_HWCAP = 0,\n+\tREG_HWCAP2,\n+\tREG_PLATFORM,\n+};\n+\n+typedef uint32_t cpuid_registers_t[4];\n+\n+/**\n+ * Struct to hold a processor feature entry\n+ */\n+struct feature_entry {\n+\tuint32_t leaf;\t\t\t\t/**< cpuid leaf */\n+\tuint32_t subleaf;\t\t\t/**< cpuid subleaf */\n+\tuint32_t reg;\t\t\t\t/**< cpuid register */\n+\tuint32_t bit;\t\t\t\t/**< cpuid register bit */\n+#define CPU_FLAG_NAME_MAX_LEN 64\n+\tchar name[CPU_FLAG_NAME_MAX_LEN]; /**< String for printing */\n };\n-#else\n+\n+#define FEAT_DEF(name, leaf, subleaf, reg, bit) \\\n+\t[RTE_CPUFLAG_##name] = {leaf, subleaf, reg, bit, #name },\n+\n+#ifdef RTE_ARCH_ARMv7\n+#define PLATFORM_STR \"v7l\"\n+typedef Elf32_auxv_t _Elfx_auxv_t;\n+\n const struct feature_entry rte_cpu_feature_table[] = {\n \tFEAT_DEF(SWP, 0x00000001, 0, REG_HWCAP, 0)\n \tFEAT_DEF(HALF, 0x00000001, 0, REG_HWCAP, 1)\n@@ -75,7 +108,73 @@ const struct feature_entry rte_cpu_feature_table[] = {\n \tFEAT_DEF(CRC32, 0x00000001, 0, REG_HWCAP2, 4)\n \tFEAT_DEF(V7L, 0x00000001, 0, REG_PLATFORM, 0)\n };\n-#endif\n+\n+#elif defined RTE_ARCH_ARM64\n+#define PLATFORM_STR \"aarch64\"\n+typedef Elf64_auxv_t _Elfx_auxv_t;\n+\n+const struct feature_entry rte_cpu_feature_table[] = {\n+\tFEAT_DEF(FP,\t\t0x00000001, 0, REG_HWCAP, 0)\n+\tFEAT_DEF(NEON,\t\t0x00000001, 0, REG_HWCAP, 1)\n+\tFEAT_DEF(EVTSTRM,\t0x00000001, 0, REG_HWCAP, 2)\n+\tFEAT_DEF(AES,\t\t0x00000001, 0, REG_HWCAP, 3)\n+\tFEAT_DEF(PMULL,\t\t0x00000001, 0, REG_HWCAP, 4)\n+\tFEAT_DEF(SHA1,\t\t0x00000001, 0, REG_HWCAP, 5)\n+\tFEAT_DEF(SHA2,\t\t0x00000001, 0, REG_HWCAP, 6)\n+\tFEAT_DEF(CRC32,\t\t0x00000001, 0, REG_HWCAP, 7)\n+\tFEAT_DEF(AARCH64,\t0x00000001, 0, REG_PLATFORM, 1)\n+};\n+#endif /* RTE_ARCH */\n+\n+/*\n+ * Read AUXV software register and get cpu features for ARM\n+ */\n+static void\n+rte_cpu_get_features(__attribute__((unused)) uint32_t leaf,\n+\t__attribute__((unused)) uint32_t subleaf, cpuid_registers_t out)\n+{\n+\tint auxv_fd;\n+\t_Elfx_auxv_t auxv;\n+\n+\tauxv_fd = open(\"/proc/self/auxv\", O_RDONLY);\n+\tassert(auxv_fd);\n+\twhile (read(auxv_fd, &auxv, sizeof(auxv)) == sizeof(auxv)) {\n+\t\tif (auxv.a_type == AT_HWCAP) {\n+\t\t\tout[REG_HWCAP] = auxv.a_un.a_val;\n+\t\t} else if (auxv.a_type == AT_HWCAP2) {\n+\t\t\tout[REG_HWCAP2] = auxv.a_un.a_val;\n+\t\t} else if (auxv.a_type == AT_PLATFORM) {\n+\t\t\tif (!strcmp((const char *)auxv.a_un.a_val, PLATFORM_STR))\n+\t\t\t\tout[REG_PLATFORM] = 0x0001;\n+\t\t}\n+\t}\n+}\n+\n+/*\n+ * Checks if a particular flag is available on current machine.\n+ */\n+int\n+rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature)\n+{\n+\tconst struct feature_entry *feat;\n+\tcpuid_registers_t regs = {0};\n+\n+\tif (feature >= RTE_CPUFLAG_NUMFLAGS)\n+\t\t/* Flag does not match anything in the feature tables */\n+\t\treturn -ENOENT;\n+\n+\tfeat = &rte_cpu_feature_table[feature];\n+\n+\tif (!feat->leaf)\n+\t\t/* This entry in the table wasn't filled out! */\n+\t\treturn -EFAULT;\n+\n+\t/* get the cpuid leaf containing the desired feature */\n+\trte_cpu_get_features(feat->leaf, feat->subleaf, regs);\n+\n+\t/* check if the feature is enabled */\n+\treturn (regs[feat->reg] >> feat->bit) & 1;\n+}\n \n const char *\n rte_cpu_get_flag_name(enum rte_cpu_flag_t feature)\ndiff --git a/lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c b/lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c\nindex a270ccc..b7e0b72 100644\n--- a/lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c\n+++ b/lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c\n@@ -32,6 +32,38 @@\n \n #include \"rte_cpuflags.h\"\n \n+#include <elf.h>\n+#include <fcntl.h>\n+#include <assert.h>\n+#include <unistd.h>\n+\n+/* Symbolic values for the entries in the auxiliary table */\n+#define AT_HWCAP 16\n+#define AT_HWCAP2 26\n+\n+/* software based registers */\n+enum cpu_register_t {\n+\tREG_HWCAP = 0,\n+\tREG_HWCAP2,\n+};\n+\n+typedef uint32_t cpuid_registers_t[4];\n+\n+/**\n+ * Struct to hold a processor feature entry\n+ */\n+struct feature_entry {\n+\tuint32_t leaf;\t\t\t\t/**< cpuid leaf */\n+\tuint32_t subleaf;\t\t\t/**< cpuid subleaf */\n+\tuint32_t reg;\t\t\t\t/**< cpuid register */\n+\tuint32_t bit;\t\t\t\t/**< cpuid register bit */\n+#define CPU_FLAG_NAME_MAX_LEN 64\n+\tchar name[CPU_FLAG_NAME_MAX_LEN]; /**< String for printing */\n+};\n+\n+#define FEAT_DEF(name, leaf, subleaf, reg, bit) \\\n+\t[RTE_CPUFLAG_##name] = {leaf, subleaf, reg, bit, #name },\n+\n const struct feature_entry rte_cpu_feature_table[] = {\n \tFEAT_DEF(PPC_LE, 0x00000001, 0, REG_HWCAP, 0)\n \tFEAT_DEF(TRUE_LE, 0x00000001, 0, REG_HWCAP, 1)\n@@ -69,6 +101,53 @@ const struct feature_entry rte_cpu_feature_table[] = {\n \tFEAT_DEF(ARCH_2_07, 0x00000001, 0, REG_HWCAP2, 31)\n };\n \n+/*\n+ * Read AUXV software register and get cpu features for Power\n+ */\n+static void\n+rte_cpu_get_features(__attribute__((unused)) uint32_t leaf,\n+\t__attribute__((unused)) uint32_t subleaf, cpuid_registers_t out)\n+{\n+\tint auxv_fd;\n+\tElf64_auxv_t auxv;\n+\n+\tauxv_fd = open(\"/proc/self/auxv\", O_RDONLY);\n+\tassert(auxv_fd);\n+\twhile (read(auxv_fd, &auxv,\n+\t\tsizeof(Elf64_auxv_t)) == sizeof(Elf64_auxv_t)) {\n+\t\tif (auxv.a_type == AT_HWCAP)\n+\t\t\tout[REG_HWCAP] = auxv.a_un.a_val;\n+\t\telse if (auxv.a_type == AT_HWCAP2)\n+\t\t\tout[REG_HWCAP2] = auxv.a_un.a_val;\n+\t}\n+}\n+\n+/*\n+ * Checks if a particular flag is available on current machine.\n+ */\n+int\n+rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature)\n+{\n+\tconst struct feature_entry *feat;\n+\tcpuid_registers_t regs = {0};\n+\n+\tif (feature >= RTE_CPUFLAG_NUMFLAGS)\n+\t\t/* Flag does not match anything in the feature tables */\n+\t\treturn -ENOENT;\n+\n+\tfeat = &rte_cpu_feature_table[feature];\n+\n+\tif (!feat->leaf)\n+\t\t/* This entry in the table wasn't filled out! */\n+\t\treturn -EFAULT;\n+\n+\t/* get the cpuid leaf containing the desired feature */\n+\trte_cpu_get_features(feat->leaf, feat->subleaf, regs);\n+\n+\t/* check if the feature is enabled */\n+\treturn (regs[feat->reg] >> feat->bit) & 1;\n+}\n+\n const char *\n rte_cpu_get_flag_name(enum rte_cpu_flag_t feature)\n {\ndiff --git a/lib/librte_eal/common/arch/tile/rte_cpuflags.c b/lib/librte_eal/common/arch/tile/rte_cpuflags.c\nindex 4ca0a7b..a2b6c51 100644\n--- a/lib/librte_eal/common/arch/tile/rte_cpuflags.c\n+++ b/lib/librte_eal/common/arch/tile/rte_cpuflags.c\n@@ -32,5 +32,16 @@\n \n #include \"rte_cpuflags.h\"\n \n+#include <errno.h>\n+\n const struct feature_entry rte_cpu_feature_table[] = {\n };\n+\n+/*\n+ * Checks if a particular flag is available on current machine.\n+ */\n+int\n+rte_cpu_get_flag_enabled(__attribute__((unused)) enum rte_cpu_flag_t feature)\n+{\n+\treturn -ENOENT;\n+}\ndiff --git a/lib/librte_eal/common/arch/x86/rte_cpuflags.c b/lib/librte_eal/common/arch/x86/rte_cpuflags.c\nindex 3346fde..0138257 100644\n--- a/lib/librte_eal/common/arch/x86/rte_cpuflags.c\n+++ b/lib/librte_eal/common/arch/x86/rte_cpuflags.c\n@@ -33,6 +33,34 @@\n \n #include \"rte_cpuflags.h\"\n \n+#include <stdio.h>\n+#include <errno.h>\n+#include <stdint.h>\n+\n+enum cpu_register_t {\n+\tRTE_REG_EAX = 0,\n+\tRTE_REG_EBX,\n+\tRTE_REG_ECX,\n+\tRTE_REG_EDX,\n+};\n+\n+typedef uint32_t cpuid_registers_t[4];\n+\n+/**\n+ * Struct to hold a processor feature entry\n+ */\n+struct feature_entry {\n+\tuint32_t leaf;\t\t\t\t/**< cpuid leaf */\n+\tuint32_t subleaf;\t\t\t/**< cpuid subleaf */\n+\tuint32_t reg;\t\t\t\t/**< cpuid register */\n+\tuint32_t bit;\t\t\t\t/**< cpuid register bit */\n+#define CPU_FLAG_NAME_MAX_LEN 64\n+\tchar name[CPU_FLAG_NAME_MAX_LEN]; /**< String for printing */\n+};\n+\n+#define FEAT_DEF(name, leaf, subleaf, reg, bit) \\\n+\t[RTE_CPUFLAG_##name] = {leaf, subleaf, reg, bit, #name },\n+\n const struct feature_entry rte_cpu_feature_table[] = {\n \tFEAT_DEF(SSE3, 0x00000001, 0, RTE_REG_ECX, 0)\n \tFEAT_DEF(PCLMULQDQ, 0x00000001, 0, RTE_REG_ECX, 1)\n@@ -128,6 +156,61 @@ const struct feature_entry rte_cpu_feature_table[] = {\n \tFEAT_DEF(INVTSC, 0x80000007, 0, RTE_REG_EDX, 8)\n };\n \n+/*\n+ * Execute CPUID instruction and get contents of a specific register\n+ *\n+ * This function, when compiled with GCC, will generate architecture-neutral\n+ * code, as per GCC manual.\n+ */\n+static void\n+rte_cpu_get_features(uint32_t leaf, uint32_t subleaf, cpuid_registers_t out)\n+{\n+#if defined(__i386__) && defined(__PIC__)\n+\t/* %ebx is a forbidden register if we compile with -fPIC or -fPIE */\n+\tasm volatile(\"movl %%ebx,%0 ; cpuid ; xchgl %%ebx,%0\"\n+\t\t : \"=r\" (out[RTE_REG_EBX]),\n+\t\t \"=a\" (out[RTE_REG_EAX]),\n+\t\t \"=c\" (out[RTE_REG_ECX]),\n+\t\t \"=d\" (out[RTE_REG_EDX])\n+\t\t : \"a\" (leaf), \"c\" (subleaf));\n+#else\n+\tasm volatile(\"cpuid\"\n+\t\t : \"=a\" (out[RTE_REG_EAX]),\n+\t\t \"=b\" (out[RTE_REG_EBX]),\n+\t\t \"=c\" (out[RTE_REG_ECX]),\n+\t\t \"=d\" (out[RTE_REG_EDX])\n+\t\t : \"a\" (leaf), \"c\" (subleaf));\n+#endif\n+}\n+\n+int\n+rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature)\n+{\n+\tconst struct feature_entry *feat;\n+\tcpuid_registers_t regs;\n+\n+\tif (feature >= RTE_CPUFLAG_NUMFLAGS)\n+\t\t/* Flag does not match anything in the feature tables */\n+\t\treturn -ENOENT;\n+\n+\tfeat = &rte_cpu_feature_table[feature];\n+\n+\tif (!feat->leaf)\n+\t\t/* This entry in the table wasn't filled out! */\n+\t\treturn -EFAULT;\n+\n+\trte_cpu_get_features(feat->leaf & 0xffff0000, 0, regs);\n+\tif (((regs[RTE_REG_EAX] ^ feat->leaf) & 0xffff0000) ||\n+\t regs[RTE_REG_EAX] < feat->leaf)\n+\t\treturn 0;\n+\n+\t/* get the cpuid leaf containing the desired feature */\n+\trte_cpu_get_features(feat->leaf, feat->subleaf, regs);\n+\n+\t/* check if the feature is enabled */\n+\treturn (regs[feat->reg] >> feat->bit) & 1;\n+}\n+\n const char *\n rte_cpu_get_flag_name(enum rte_cpu_flag_t feature)\n {\ndiff --git a/lib/librte_eal/common/eal_common_cpuflags.c b/lib/librte_eal/common/eal_common_cpuflags.c\nindex 8c0576d..a4c5a29 100644\n--- a/lib/librte_eal/common/eal_common_cpuflags.c\n+++ b/lib/librte_eal/common/eal_common_cpuflags.c\n@@ -30,6 +30,9 @@\n * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n */\n+\n+#include <stdio.h>\n+\n #include <rte_common.h>\n #include <rte_cpuflags.h>\n \ndiff --git a/lib/librte_eal/common/include/arch/arm/rte_cpuflags_32.h b/lib/librte_eal/common/include/arch/arm/rte_cpuflags_32.h\nindex 2ec0c2e..eb02d9b 100644\n--- a/lib/librte_eal/common/include/arch/arm/rte_cpuflags_32.h\n+++ b/lib/librte_eal/common/include/arch/arm/rte_cpuflags_32.h\n@@ -37,35 +37,6 @@\n extern \"C\" {\n #endif\n \n-#include <elf.h>\n-#include <fcntl.h>\n-#include <assert.h>\n-#include <unistd.h>\n-#include <string.h>\n-\n-#include \"generic/rte_cpuflags.h\"\n-\n-extern const struct feature_entry rte_cpu_feature_table[];\n-\n-#ifndef AT_HWCAP\n-#define AT_HWCAP 16\n-#endif\n-\n-#ifndef AT_HWCAP2\n-#define AT_HWCAP2 26\n-#endif\n-\n-#ifndef AT_PLATFORM\n-#define AT_PLATFORM 15\n-#endif\n-\n-/* software based registers */\n-enum cpu_register_t {\n-\tREG_HWCAP = 0,\n-\tREG_HWCAP2,\n-\tREG_PLATFORM,\n-};\n-\n /**\n * Enumeration of all CPU features supported\n */\n@@ -102,56 +73,7 @@ enum rte_cpu_flag_t {\n \tRTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */\n };\n \n-/*\n- * Read AUXV software register and get cpu features for ARM\n- */\n-static inline void\n-rte_cpu_get_features(__attribute__((unused)) uint32_t leaf,\n-\t__attribute__((unused)) uint32_t subleaf, cpuid_registers_t out)\n-{\n-\tint auxv_fd;\n-\tElf32_auxv_t auxv;\n-\n-\tauxv_fd = open(\"/proc/self/auxv\", O_RDONLY);\n-\tassert(auxv_fd);\n-\twhile (read(auxv_fd, &auxv,\n-\t\tsizeof(Elf32_auxv_t)) == sizeof(Elf32_auxv_t)) {\n-\t\tif (auxv.a_type == AT_HWCAP)\n-\t\t\tout[REG_HWCAP] = auxv.a_un.a_val;\n-\t\telse if (auxv.a_type == AT_HWCAP2)\n-\t\t\tout[REG_HWCAP2] = auxv.a_un.a_val;\n-\t\telse if (auxv.a_type == AT_PLATFORM) {\n-\t\t\tif (!strcmp((const char *)auxv.a_un.a_val, \"v7l\"))\n-\t\t\t\tout[REG_PLATFORM] = 0x0001;\n-\t\t}\n-\t}\n-}\n-\n-/*\n- * Checks if a particular flag is available on current machine.\n- */\n-static inline int\n-rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature)\n-{\n-\tconst struct feature_entry *feat;\n-\tcpuid_registers_t regs = {0};\n-\n-\tif (feature >= RTE_CPUFLAG_NUMFLAGS)\n-\t\t/* Flag does not match anything in the feature tables */\n-\t\treturn -ENOENT;\n-\n-\tfeat = &rte_cpu_feature_table[feature];\n-\n-\tif (!feat->leaf)\n-\t\t/* This entry in the table wasn't filled out! */\n-\t\treturn -EFAULT;\n-\n-\t/* get the cpuid leaf containing the desired feature */\n-\trte_cpu_get_features(feat->leaf, feat->subleaf, regs);\n-\n-\t/* check if the feature is enabled */\n-\treturn (regs[feat->reg] >> feat->bit) & 1;\n-}\n+#include \"generic/rte_cpuflags.h\"\n \n #ifdef __cplusplus\n }\ndiff --git a/lib/librte_eal/common/include/arch/arm/rte_cpuflags_64.h b/lib/librte_eal/common/include/arch/arm/rte_cpuflags_64.h\nindex b36040b..810e8a0 100644\n--- a/lib/librte_eal/common/include/arch/arm/rte_cpuflags_64.h\n+++ b/lib/librte_eal/common/include/arch/arm/rte_cpuflags_64.h\n@@ -37,35 +37,6 @@\n extern \"C\" {\n #endif\n \n-#include <elf.h>\n-#include <fcntl.h>\n-#include <assert.h>\n-#include <unistd.h>\n-#include <string.h>\n-\n-#include \"generic/rte_cpuflags.h\"\n-\n-extern const struct feature_entry rte_cpu_feature_table[];\n-\n-#ifndef AT_HWCAP\n-#define AT_HWCAP 16\n-#endif\n-\n-#ifndef AT_HWCAP2\n-#define AT_HWCAP2 26\n-#endif\n-\n-#ifndef AT_PLATFORM\n-#define AT_PLATFORM 15\n-#endif\n-\n-/* software based registers */\n-enum cpu_register_t {\n-\tREG_HWCAP = 0,\n-\tREG_HWCAP2,\n-\tREG_PLATFORM,\n-};\n-\n /**\n * Enumeration of all CPU features supported\n */\n@@ -83,57 +54,7 @@ enum rte_cpu_flag_t {\n \tRTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */\n };\n \n-/*\n- * Read AUXV software register and get cpu features for ARM\n- */\n-static inline void\n-rte_cpu_get_features(__attribute__((unused)) uint32_t leaf,\n-\t\t __attribute__((unused)) uint32_t subleaf,\n-\t\t cpuid_registers_t out)\n-{\n-\tint auxv_fd;\n-\tElf64_auxv_t auxv;\n-\n-\tauxv_fd = open(\"/proc/self/auxv\", O_RDONLY);\n-\tassert(auxv_fd);\n-\twhile (read(auxv_fd, &auxv,\n-\t\t sizeof(Elf64_auxv_t)) == sizeof(Elf64_auxv_t)) {\n-\t\tif (auxv.a_type == AT_HWCAP) {\n-\t\t\tout[REG_HWCAP] = auxv.a_un.a_val;\n-\t\t} else if (auxv.a_type == AT_HWCAP2) {\n-\t\t\tout[REG_HWCAP2] = auxv.a_un.a_val;\n-\t\t} else if (auxv.a_type == AT_PLATFORM) {\n-\t\t\tif (!strcmp((const char *)auxv.a_un.a_val, \"aarch64\"))\n-\t\t\t\tout[REG_PLATFORM] = 0x0001;\n-\t\t}\n-\t}\n-}\n-\n-/*\n- * Checks if a particular flag is available on current machine.\n- */\n-static inline int\n-rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature)\n-{\n-\tconst struct feature_entry *feat;\n-\tcpuid_registers_t regs = {0};\n-\n-\tif (feature >= RTE_CPUFLAG_NUMFLAGS)\n-\t\t/* Flag does not match anything in the feature tables */\n-\t\treturn -ENOENT;\n-\n-\tfeat = &rte_cpu_feature_table[feature];\n-\n-\tif (!feat->leaf)\n-\t\t/* This entry in the table wasn't filled out! */\n-\t\treturn -EFAULT;\n-\n-\t/* get the cpuid leaf containing the desired feature */\n-\trte_cpu_get_features(feat->leaf, feat->subleaf, regs);\n-\n-\t/* check if the feature is enabled */\n-\treturn (regs[feat->reg] >> feat->bit) & 1;\n-}\n+#include \"generic/rte_cpuflags.h\"\n \n #ifdef __cplusplus\n }\ndiff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_cpuflags.h b/lib/librte_eal/common/include/arch/ppc_64/rte_cpuflags.h\nindex 85c4c1a..7cc2b3c 100644\n--- a/lib/librte_eal/common/include/arch/ppc_64/rte_cpuflags.h\n+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_cpuflags.h\n@@ -37,25 +37,6 @@\n extern \"C\" {\n #endif\n \n-#include <elf.h>\n-#include <fcntl.h>\n-#include <assert.h>\n-#include <unistd.h>\n-\n-#include \"generic/rte_cpuflags.h\"\n-\n-extern const struct feature_entry rte_cpu_feature_table[];\n-\n-/* Symbolic values for the entries in the auxiliary table */\n-#define AT_HWCAP 16\n-#define AT_HWCAP2 26\n-\n-/* software based registers */\n-enum cpu_register_t {\n-\tREG_HWCAP = 0,\n-\tREG_HWCAP2,\n-};\n-\n /**\n * Enumeration of all CPU features supported\n */\n@@ -98,52 +79,7 @@ enum rte_cpu_flag_t {\n \tRTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */\n };\n \n-/*\n- * Read AUXV software register and get cpu features for Power\n- */\n-static inline void\n-rte_cpu_get_features(__attribute__((unused)) uint32_t leaf,\n-\t__attribute__((unused)) uint32_t subleaf, cpuid_registers_t out)\n-{\n-\tint auxv_fd;\n-\tElf64_auxv_t auxv;\n-\n-\tauxv_fd = open(\"/proc/self/auxv\", O_RDONLY);\n-\tassert(auxv_fd);\n-\twhile (read(auxv_fd, &auxv,\n-\t\tsizeof(Elf64_auxv_t)) == sizeof(Elf64_auxv_t)) {\n-\t\tif (auxv.a_type == AT_HWCAP)\n-\t\t\tout[REG_HWCAP] = auxv.a_un.a_val;\n-\t\telse if (auxv.a_type == AT_HWCAP2)\n-\t\t\tout[REG_HWCAP2] = auxv.a_un.a_val;\n-\t}\n-}\n-\n-/*\n- * Checks if a particular flag is available on current machine.\n- */\n-static inline int\n-rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature)\n-{\n-\tconst struct feature_entry *feat;\n-\tcpuid_registers_t regs = {0};\n-\n-\tif (feature >= RTE_CPUFLAG_NUMFLAGS)\n-\t\t/* Flag does not match anything in the feature tables */\n-\t\treturn -ENOENT;\n-\n-\tfeat = &rte_cpu_feature_table[feature];\n-\n-\tif (!feat->leaf)\n-\t\t/* This entry in the table wasn't filled out! */\n-\t\treturn -EFAULT;\n-\n-\t/* get the cpuid leaf containing the desired feature */\n-\trte_cpu_get_features(feat->leaf, feat->subleaf, regs);\n-\n-\t/* check if the feature is enabled */\n-\treturn (regs[feat->reg] >> feat->bit) & 1;\n-}\n+#include \"generic/rte_cpuflags.h\"\n \n #ifdef __cplusplus\n }\ndiff --git a/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h b/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h\nindex a415857..1849b52 100644\n--- a/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h\n+++ b/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h\n@@ -37,18 +37,6 @@\n extern \"C\" {\n #endif\n \n-#include <elf.h>\n-#include <fcntl.h>\n-#include <assert.h>\n-#include <unistd.h>\n-\n-#include \"generic/rte_cpuflags.h\"\n-\n-/* software based registers */\n-enum cpu_register_t {\n-\tREG_DUMMY = 0\n-};\n-\n /**\n * Enumeration of all CPU features supported\n */\n@@ -56,24 +44,7 @@ enum rte_cpu_flag_t {\n \tRTE_CPUFLAG_NUMFLAGS /**< This should always be the last! */\n };\n \n-/*\n- * Read AUXV software register and get cpu features for Power\n- */\n-static inline void\n-rte_cpu_get_features(__attribute__((unused)) uint32_t leaf,\n-\t\t __attribute__((unused)) uint32_t subleaf,\n-\t\t __attribute__((unused)) cpuid_registers_t out)\n-{\n-}\n-\n-/*\n- * Checks if a particular flag is available on current machine.\n- */\n-static inline int\n-rte_cpu_get_flag_enabled(__attribute__((unused)) enum rte_cpu_flag_t feature)\n-{\n-\treturn -ENOENT;\n-}\n+#include \"generic/rte_cpuflags.h\"\n \n #ifdef __cplusplus\n }\ndiff --git a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h\nindex 120ea24..26204fa 100644\n--- a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h\n+++ b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h\n@@ -38,15 +38,6 @@\n extern \"C\" {\n #endif\n \n-#include <stdlib.h>\n-#include <stdio.h>\n-#include <errno.h>\n-#include <stdint.h>\n-\n-#include \"generic/rte_cpuflags.h\"\n-\n-extern const struct feature_entry rte_cpu_feature_table[];\n-\n enum rte_cpu_flag_t {\n \t/* (EAX 01h) ECX features*/\n \tRTE_CPUFLAG_SSE3 = 0, /**< SSE3 */\n@@ -153,64 +144,7 @@ enum rte_cpu_flag_t {\n \tRTE_CPUFLAG_NUMFLAGS, /**< This should always be the last! */\n };\n \n-enum cpu_register_t {\n-\tRTE_REG_EAX = 0,\n-\tRTE_REG_EBX,\n-\tRTE_REG_ECX,\n-\tRTE_REG_EDX,\n-};\n-\n-static inline void\n-rte_cpu_get_features(uint32_t leaf, uint32_t subleaf, cpuid_registers_t out)\n-{\n-#if defined(__i386__) && defined(__PIC__)\n- /* %ebx is a forbidden register if we compile with -fPIC or -fPIE */\n- asm volatile(\"movl %%ebx,%0 ; cpuid ; xchgl %%ebx,%0\"\n-\t\t : \"=r\" (out[RTE_REG_EBX]),\n-\t\t \"=a\" (out[RTE_REG_EAX]),\n-\t\t \"=c\" (out[RTE_REG_ECX]),\n-\t\t \"=d\" (out[RTE_REG_EDX])\n-\t\t : \"a\" (leaf), \"c\" (subleaf));\n-#else\n-\n- asm volatile(\"cpuid\"\n-\t\t : \"=a\" (out[RTE_REG_EAX]),\n-\t\t \"=b\" (out[RTE_REG_EBX]),\n-\t\t \"=c\" (out[RTE_REG_ECX]),\n-\t\t \"=d\" (out[RTE_REG_EDX])\n-\t\t : \"a\" (leaf), \"c\" (subleaf));\n-\n-#endif\n-}\n-\n-static inline int\n-rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature)\n-{\n-\tconst struct feature_entry *feat;\n-\tcpuid_registers_t regs;\n-\n-\n-\tif (feature >= RTE_CPUFLAG_NUMFLAGS)\n-\t\t/* Flag does not match anything in the feature tables */\n-\t\treturn -ENOENT;\n-\n-\tfeat = &rte_cpu_feature_table[feature];\n-\n-\tif (!feat->leaf)\n-\t\t/* This entry in the table wasn't filled out! */\n-\t\treturn -EFAULT;\n-\n-\trte_cpu_get_features(feat->leaf & 0xffff0000, 0, regs);\n-\tif (((regs[RTE_REG_EAX] ^ feat->leaf) & 0xffff0000) ||\n-\t regs[RTE_REG_EAX] < feat->leaf)\n-\t\treturn 0;\n-\n-\t/* get the cpuid leaf containing the desired feature */\n-\trte_cpu_get_features(feat->leaf, feat->subleaf, regs);\n-\n-\t/* check if the feature is enabled */\n-\treturn (regs[feat->reg] >> feat->bit) & 1;\n-}\n+#include \"generic/rte_cpuflags.h\"\n \n #ifdef __cplusplus\n }\ndiff --git a/lib/librte_eal/common/include/generic/rte_cpuflags.h b/lib/librte_eal/common/include/generic/rte_cpuflags.h\nindex 3ca2e36..c1da357 100644\n--- a/lib/librte_eal/common/include/generic/rte_cpuflags.h\n+++ b/lib/librte_eal/common/include/generic/rte_cpuflags.h\n@@ -39,10 +39,7 @@\n * Architecture specific API to determine available CPU features at runtime.\n */\n \n-#include <stdlib.h>\n-#include <stdio.h>\n #include <errno.h>\n-#include <stdint.h>\n \n /**\n * Enumeration of all CPU features supported\n@@ -50,49 +47,6 @@\n enum rte_cpu_flag_t;\n \n /**\n- * Enumeration of CPU registers\n- */\n-#ifdef __DOXYGEN__\n-enum cpu_register_t;\n-#endif\n-\n-typedef uint32_t cpuid_registers_t[4];\n-\n-#define CPU_FLAG_NAME_MAX_LEN 64\n-\n-/**\n- * Struct to hold a processor feature entry\n- */\n-struct feature_entry {\n-\tuint32_t leaf;\t\t\t\t/**< cpuid leaf */\n-\tuint32_t subleaf;\t\t\t/**< cpuid subleaf */\n-\tuint32_t reg;\t\t\t\t/**< cpuid register */\n-\tuint32_t bit;\t\t\t\t/**< cpuid register bit */\n-\tchar name[CPU_FLAG_NAME_MAX_LEN]; /**< String for printing */\n-};\n-\n-#define FEAT_DEF(name, leaf, subleaf, reg, bit) \\\n-\t[RTE_CPUFLAG_##name] = {leaf, subleaf, reg, bit, #name },\n-\n-/**\n- * An array that holds feature entries\n- *\n- * Defined in arch-specific rte_cpuflags.h.\n- */\n-#ifdef __DOXYGEN__\n-static const struct feature_entry cpu_feature_table[];\n-#endif\n-\n-/**\n- * Execute CPUID instruction and get contents of a specific register\n- *\n- * This function, when compiled with GCC, will generate architecture-neutral\n- * code, as per GCC manual.\n- */\n-static inline void\n-rte_cpu_get_features(uint32_t leaf, uint32_t subleaf, cpuid_registers_t out);\n-\n-/**\n * Get name of CPU flag\n *\n * @param feature\n@@ -114,10 +68,8 @@ rte_cpu_get_flag_name(enum rte_cpu_flag_t feature);\n * 0 if flag is not available\n * -ENOENT if flag is invalid\n */\n-#ifdef __DOXYGEN__\n-static inline int\n+int\n rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature);\n-#endif\n \n /**\n * This function checks that the currently used CPU supports the CPU features\ndiff --git a/lib/librte_eal/linuxapp/eal/rte_eal_version.map b/lib/librte_eal/linuxapp/eal/rte_eal_version.map\nindex 48e8e4f..440fac2 100644\n--- a/lib/librte_eal/linuxapp/eal/rte_eal_version.map\n+++ b/lib/librte_eal/linuxapp/eal/rte_eal_version.map\n@@ -145,6 +145,5 @@ DPDK_2.3 {\n \trte_cpu_get_flag_name;\n \trte_eal_pci_map_device;\n \trte_eal_pci_unmap_device;\n-\trte_cpu_feature_table;\n \n } DPDK_2.2;\n", "prefixes": [ "dpdk-dev", "v2", "2/5" ] }