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GET /api/patches/103803/?format=api
{ "id": 103803, "url": "http://patches.dpdk.org/api/patches/103803/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20211104215846.58672-18-ajit.khaparde@broadcom.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211104215846.58672-18-ajit.khaparde@broadcom.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211104215846.58672-18-ajit.khaparde@broadcom.com", "date": "2021-11-04T21:58:41", "name": "[v5,17/22] net/bnxt: add new TruFlow API to get SRAM resources", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "968c98988509b498b875d0d65d3ba1df26cc0866", "submitter": { "id": 501, "url": "http://patches.dpdk.org/api/people/501/?format=api", "name": "Ajit Khaparde", "email": "ajit.khaparde@broadcom.com" }, "delegate": { "id": 1766, "url": "http://patches.dpdk.org/api/users/1766/?format=api", "username": "ajitkhaparde", "first_name": "Ajit", "last_name": "Khaparde", "email": "ajit.khaparde@broadcom.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20211104215846.58672-18-ajit.khaparde@broadcom.com/mbox/", "series": [ { "id": 20322, "url": "http://patches.dpdk.org/api/series/20322/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=20322", "date": "2021-11-04T21:58:24", "name": "fixes and enhancements to Truflow", "version": 5, "mbox": "http://patches.dpdk.org/series/20322/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/103803/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/103803/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1BB86A0C5E;\n\tThu, 4 Nov 2021 23:00:58 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 091B442803;\n\tThu, 4 Nov 2021 22:59:22 +0100 (CET)", "from mail-pl1-f170.google.com (mail-pl1-f170.google.com\n [209.85.214.170])\n by mails.dpdk.org (Postfix) with ESMTP id 58F574279F\n for <dev@dpdk.org>; Thu, 4 Nov 2021 22:59:16 +0100 (CET)", "by mail-pl1-f170.google.com with SMTP id f8so9512199plo.12\n for <dev@dpdk.org>; Thu, 04 Nov 2021 14:59:16 -0700 (PDT)", "from C02GC2QQMD6T.wifi.broadcom.net ([192.19.223.252])\n by smtp.gmail.com with ESMTPSA id pg5sm8532242pjb.26.2021.11.04.14.59.14\n (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128);\n Thu, 04 Nov 2021 14:59:14 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com;\n s=google;\n h=from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version; bh=S61qCXnXkArRf7WVDjWMnL0iNcet0YU6NXM01UaI8cg=;\n b=XBXACR8Aw00TxQ2BlwqpbAZByyt6ekrpN8Kfin/FkB5oGhgf4ll2tl7jzbo6r43eb9\n 2BtrcrFkWiHh7KccB9malgQYTTpHENdim8Oo18JqZSIJJVan9X8XZ8YGqcdRhDxTeVmH\n xrqzSsEadIjgwVrjStHfT7IIGhjemlK6llqF0=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20210112;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references:mime-version;\n bh=S61qCXnXkArRf7WVDjWMnL0iNcet0YU6NXM01UaI8cg=;\n b=fXsaFqcs0NndG1RqxfWFLBV3BTU0XnP7rnFnR7olYDRkuJwJBum8GKcVzb1rx5OPhK\n /D6aQKC8087EsIeDjfvPYfyK+0OrM/XmX73Y+n6tUeSf4HIpxYsFFgw2VP4lYrVaevVc\n pj/8KoKRPzHa9cJFRWzulAS8+DKxl8sMXwW5YJhdBg0jRCIrFWNKK29pYNbGze2zH3vy\n /H7IlmrQ3TgyMvoc0CWoqPlrxmLPGQf7TqmlGpccg5xcQUh4f61OQQ0lrkbQs3//EAZH\n ARww/Cik0C+IzDTVvjI3eEH1Vw+u3YybwF74bHwDba5pXuEuIzRLMj9g/qkFjoZTUJp2\n fLbQ==", "X-Gm-Message-State": "AOAM531eQ/CR/A1X8LcVq9srSCUrDPA9ct8/rYiDsbANgM+ltt/T/mJR\n lyBSVE+abyvEommA4+lLnZuaUYqGogsidJsRiE0UuW4R8RFAbDJgu2W3qnZskVnTHQRBDfj++IX\n zPaO3IuPDdUdmlJJjm2vr8eDsVT9ZTRAoyVWzcXZBge3IRDelCRCamUbo+lTrLaI=", "X-Google-Smtp-Source": "\n ABdhPJyKezZmuC98+YZ8ZCXjOkbDyGXtDHZkkbGodfxyuZQidQAlDTn77JchBPIWtIOCVfSnRrRoWA==", "X-Received": "by 2002:a17:902:bf43:b0:142:41bb:a6f with SMTP id\n u3-20020a170902bf4300b0014241bb0a6fmr2278767pls.22.1636063155152;\n Thu, 04 Nov 2021 14:59:15 -0700 (PDT)", "From": "Ajit Khaparde <ajit.khaparde@broadcom.com>", "To": "dev@dpdk.org", "Cc": "Jay Ding <jay.ding@broadcom.com>,\n Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>,\n Farah Smith <farah.smith@broadcom.com>,\n Randy Schacher <stuart.schacher@broadcom.com>", "Date": "Thu, 4 Nov 2021 14:58:41 -0700", "Message-Id": "<20211104215846.58672-18-ajit.khaparde@broadcom.com>", "X-Mailer": "git-send-email 2.30.1 (Apple Git-130)", "In-Reply-To": "<20211104215846.58672-1-ajit.khaparde@broadcom.com>", "References": "<20211103005251.25524-1-ajit.khaparde@broadcom.com>\n <20211104215846.58672-1-ajit.khaparde@broadcom.com>", "MIME-Version": "1.0", "Content-Type": "multipart/signed; protocol=\"application/pkcs7-signature\";\n micalg=sha-256; boundary=\"00000000000039c9b505cffda3bb\"", "X-Content-Filtered-By": "Mailman/MimeDel 2.1.29", "Subject": "[dpdk-dev] [PATCH v5 17/22] net/bnxt: add new TruFlow API to get\n SRAM resources", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Jay Ding <jay.ding@broadcom.com>\n\nImplement tf_get_sram_resources to return SRAM\npartition information, including bank count and\nSRAM profile number.\n\nSigned-off-by: Jay Ding <jay.ding@broadcom.com>\nSigned-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>\nReviewed-by: Farah Smith <farah.smith@broadcom.com>\nReviewed-by: Randy Schacher <stuart.schacher@broadcom.com>\nAcked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>\n---\n drivers/net/bnxt/tf_core/tf_core.c | 86 ++++++++++++++++++++++++\n drivers/net/bnxt/tf_core/tf_core.h | 63 +++++++++++++++++\n drivers/net/bnxt/tf_core/tf_device.h | 20 ++++++\n drivers/net/bnxt/tf_core/tf_device_p4.c | 6 +-\n drivers/net/bnxt/tf_core/tf_device_p58.c | 53 ++++++++++++++-\n drivers/net/bnxt/tf_core/tf_msg.c | 28 ++------\n drivers/net/bnxt/tf_core/tf_msg.h | 6 +-\n drivers/net/bnxt/tf_core/tf_rm.c | 3 +-\n drivers/net/bnxt/tf_core/tf_sram_mgr.h | 10 ---\n 9 files changed, 237 insertions(+), 38 deletions(-)", "diff": "diff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c\nindex 86dfec0eb4..346d220c87 100644\n--- a/drivers/net/bnxt/tf_core/tf_core.c\n+++ b/drivers/net/bnxt/tf_core/tf_core.c\n@@ -1831,3 +1831,89 @@ int tf_get_version(struct tf *tfp,\n \n \treturn 0;\n }\n+\n+int tf_query_sram_resources(struct tf *tfp,\n+\t\t\t struct tf_query_sram_resources_parms *parms)\n+{\n+\tint rc;\n+\tstruct tf_dev_info dev;\n+\tuint16_t max_types;\n+\tstruct tfp_calloc_parms cparms;\n+\tstruct tf_rm_resc_req_entry *query;\n+\tenum tf_rm_resc_resv_strategy resv_strategy;\n+\n+\tTF_CHECK_PARMS2(tfp, parms);\n+\n+\t/* This function can be called before open session, filter\n+\t * out any non-supported device types on the Core side.\n+\t */\n+\tif (parms->device_type != TF_DEVICE_TYPE_THOR) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t \"Unsupported device type %d\\n\",\n+\t\t\t parms->device_type);\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\ttf_dev_bind_ops(parms->device_type, &dev);\n+\n+\tif (dev.ops->tf_dev_get_max_types == NULL) {\n+\t\trc = -EOPNOTSUPP;\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t \"%s: Operation not supported, rc:%s\\n\",\n+\t\t\t tf_dir_2_str(parms->dir),\n+\t\t\t strerror(-rc));\n+\t\treturn -EOPNOTSUPP;\n+\t}\n+\n+\t/* Need device max number of elements for the RM QCAPS */\n+\trc = dev.ops->tf_dev_get_max_types(tfp, &max_types);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t \"Get SRAM resc info failed, rc:%s\\n\",\n+\t\t\t strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\t/* Allocate memory for RM QCAPS request */\n+\tcparms.nitems = max_types;\n+\tcparms.size = sizeof(struct tf_rm_resc_req_entry);\n+\tcparms.alignment = 0;\n+\trc = tfp_calloc(&cparms);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tquery = (struct tf_rm_resc_req_entry *)cparms.mem_va;\n+\ttfp->bp = parms->bp;\n+\n+\t/* Get Firmware Capabilities */\n+\trc = tf_msg_session_resc_qcaps(tfp,\n+\t\t\t\t &dev,\n+\t\t\t\t parms->dir,\n+\t\t\t\t max_types,\n+\t\t\t\t query,\n+\t\t\t\t &resv_strategy,\n+\t\t\t\t &parms->sram_profile);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tif (dev.ops->tf_dev_get_sram_resources == NULL) {\n+\t\trc = -EOPNOTSUPP;\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t \"%s: Operation not supported, rc:%s\\n\",\n+\t\t\t tf_dir_2_str(parms->dir),\n+\t\t\t strerror(-rc));\n+\t\treturn -EOPNOTSUPP;\n+\t}\n+\n+\trc = dev.ops->tf_dev_get_sram_resources((void *)query,\n+\t\t\tparms->bank_resc_count,\n+\t\t\t&parms->dynamic_sram_capable);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t \"Get SRAM resc info failed, rc:%s\\n\",\n+\t\t\t strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\treturn 0;\n+}\ndiff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h\nindex ba9881c69d..078fd278a1 100644\n--- a/drivers/net/bnxt/tf_core/tf_core.h\n+++ b/drivers/net/bnxt/tf_core/tf_core.h\n@@ -75,6 +75,17 @@ enum tf_wc_num_slice {\n \tTF_WC_TCAM_8_SLICE_PER_ROW = 8,\n };\n \n+/**\n+ * Bank identifier\n+ */\n+enum tf_sram_bank_id {\n+\tTF_SRAM_BANK_ID_0,\t\t/**< SRAM Bank 0 id */\n+\tTF_SRAM_BANK_ID_1,\t\t/**< SRAM Bank 1 id */\n+\tTF_SRAM_BANK_ID_2,\t\t/**< SRAM Bank 2 id */\n+\tTF_SRAM_BANK_ID_3,\t\t/**< SRAM Bank 3 id */\n+\tTF_SRAM_BANK_ID_MAX\t\t/**< SRAM Bank index limit */\n+};\n+\n /**\n * EEM record AR helper\n *\n@@ -2438,4 +2449,56 @@ struct tf_get_version_parms {\n */\n int tf_get_version(struct tf *tfp,\n \t\t struct tf_get_version_parms *parms);\n+\n+/**\n+ * tf_query_sram_resources parameter definition\n+ */\n+struct tf_query_sram_resources_parms {\n+\t/**\n+\t * [in] device type\n+\t *\n+\t * Device type for the session.\n+\t */\n+\tenum tf_device_type device_type;\n+\n+\t/**\n+\t * [in] bp\n+\t * The pointer to the parent bp struct. This is only used for HWRM\n+\t * message passing within the portability layer. The type is struct\n+\t * bnxt.\n+\t */\n+\tvoid *bp;\n+\n+\t/**\n+\t * [in] Receive or transmit direction\n+\t */\n+\tenum tf_dir dir;\n+\n+\t/**\n+\t * [out] Bank resource count in 8 bytes entry\n+\t */\n+\n+\tuint32_t bank_resc_count[TF_SRAM_BANK_ID_MAX];\n+\n+\t/**\n+\t * [out] Dynamic SRAM Enable\n+\t */\n+\tbool dynamic_sram_capable;\n+\n+\t/**\n+\t * [out] SRAM profile\n+\t */\n+\tuint8_t sram_profile;\n+};\n+\n+/**\n+ * Get SRAM resources information\n+ *\n+ * Used to retrieve sram bank partition information\n+ *\n+ * Returns success or failure code.\n+ */\n+int tf_query_sram_resources(struct tf *tfp,\n+\t\t\t struct tf_query_sram_resources_parms *parms);\n+\n #endif /* _TF_CORE_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_device.h b/drivers/net/bnxt/tf_core/tf_device.h\nindex 88bd4515ff..9360eb1358 100644\n--- a/drivers/net/bnxt/tf_core/tf_device.h\n+++ b/drivers/net/bnxt/tf_core/tf_device.h\n@@ -1081,6 +1081,26 @@ struct tf_dev_ops {\n \t\t\t\t uint32_t *tcam_caps,\n \t\t\t\t uint32_t *tbl_caps,\n \t\t\t\t uint32_t *em_caps);\n+\n+\t/**\n+\t * Device specific function that retrieve the sram resource\n+\t *\n+\t * [in] query\n+\t * Point to resources query result\n+\t *\n+\t * [out] sram_bank_caps\n+\t * Pointer to SRAM bank capabilities\n+\t *\n+\t * [out] dynamic_sram_capable\n+\t * Pointer to dynamic sram capable\n+\t *\n+\t * Returns\n+\t * - (0) if successful.\n+\t * - (-EINVAL) on failure.\n+\t */\n+\tint (*tf_dev_get_sram_resources)(void *query,\n+\t\t\t\t\t uint32_t *sram_bank_caps,\n+\t\t\t\t\t bool *dynamic_sram_capable);\n };\n \n /**\ndiff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c\nindex 8089785b82..cf0e919f9f 100644\n--- a/drivers/net/bnxt/tf_core/tf_device_p4.c\n+++ b/drivers/net/bnxt/tf_core/tf_device_p4.c\n@@ -382,7 +382,8 @@ const struct tf_dev_ops tf_dev_ops_p4_init = {\n \t.tf_dev_get_global_cfg = NULL,\n \t.tf_dev_get_mailbox = tf_dev_p4_get_mailbox,\n \t.tf_dev_word_align = NULL,\n-\t.tf_dev_map_hcapi_caps = tf_dev_p4_map_hcapi_caps\n+\t.tf_dev_map_hcapi_caps = tf_dev_p4_map_hcapi_caps,\n+\t.tf_dev_get_sram_resources = NULL\n };\n \n /**\n@@ -445,5 +446,6 @@ const struct tf_dev_ops tf_dev_ops_p4 = {\n \t.tf_dev_get_mailbox = tf_dev_p4_get_mailbox,\n \t.tf_dev_word_align = tf_dev_p4_word_align,\n \t.tf_dev_cfa_key_hash = hcapi_cfa_p4_key_hash,\n-\t.tf_dev_map_hcapi_caps = tf_dev_p4_map_hcapi_caps\n+\t.tf_dev_map_hcapi_caps = tf_dev_p4_map_hcapi_caps,\n+\t.tf_dev_get_sram_resources = NULL\n };\ndiff --git a/drivers/net/bnxt/tf_core/tf_device_p58.c b/drivers/net/bnxt/tf_core/tf_device_p58.c\nindex 03e72b90f5..4687fa65dd 100644\n--- a/drivers/net/bnxt/tf_core/tf_device_p58.c\n+++ b/drivers/net/bnxt/tf_core/tf_device_p58.c\n@@ -397,6 +397,53 @@ static int tf_dev_p58_map_hcapi_caps(uint64_t hcapi_caps,\n \treturn 0;\n }\n \n+/**\n+ * Device specific function that retrieve the sram resource\n+ *\n+ * [in] query\n+ * Point to resources query result\n+ *\n+ * [out] sram_bank_caps\n+ * Pointer to SRAM bank capabilities\n+ *\n+ * [out] dynamic_sram_capable\n+ * Pointer to dynamic sram capable\n+ *\n+ * Returns\n+ * - (0) if successful.\n+ * - (-EINVAL) on failure.\n+ */\n+static int tf_dev_p58_get_sram_resources(void *q,\n+\t\t\t\t\t uint32_t *sram_bank_caps,\n+\t\t\t\t\t bool *dynamic_sram_capable)\n+{\n+\tuint32_t i;\n+\tstruct tf_rm_resc_req_entry *query = q;\n+\n+\tfor (i = 0; i < CFA_RESOURCE_TYPE_P58_LAST + 1; i++) {\n+\t\tswitch (query[i].type) {\n+\t\tcase CFA_RESOURCE_TYPE_P58_SRAM_BANK_0:\n+\t\t\tsram_bank_caps[0] = query[i].max;\n+\t\t\tbreak;\n+\t\tcase CFA_RESOURCE_TYPE_P58_SRAM_BANK_1:\n+\t\t\tsram_bank_caps[1] = query[i].max;\n+\t\t\tbreak;\n+\t\tcase CFA_RESOURCE_TYPE_P58_SRAM_BANK_2:\n+\t\t\tsram_bank_caps[2] = query[i].max;\n+\t\t\tbreak;\n+\t\tcase CFA_RESOURCE_TYPE_P58_SRAM_BANK_3:\n+\t\t\tsram_bank_caps[3] = query[i].max;\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\n+\t*dynamic_sram_capable = false;\n+\n+\treturn 0;\n+}\n+\n /**\n * Truflow P58 device specific functions\n */\n@@ -447,7 +494,8 @@ const struct tf_dev_ops tf_dev_ops_p58_init = {\n \t.tf_dev_get_global_cfg = NULL,\n \t.tf_dev_get_mailbox = tf_dev_p58_get_mailbox,\n \t.tf_dev_word_align = NULL,\n-\t.tf_dev_map_hcapi_caps = tf_dev_p58_map_hcapi_caps\n+\t.tf_dev_map_hcapi_caps = tf_dev_p58_map_hcapi_caps,\n+\t.tf_dev_get_sram_resources = tf_dev_p58_get_sram_resources\n };\n \n /**\n@@ -511,5 +559,6 @@ const struct tf_dev_ops tf_dev_ops_p58 = {\n \t.tf_dev_get_mailbox = tf_dev_p58_get_mailbox,\n \t.tf_dev_word_align = tf_dev_p58_word_align,\n \t.tf_dev_cfa_key_hash = hcapi_cfa_p58_key_hash,\n-\t.tf_dev_map_hcapi_caps = tf_dev_p58_map_hcapi_caps\n+\t.tf_dev_map_hcapi_caps = tf_dev_p58_map_hcapi_caps,\n+\t.tf_dev_get_sram_resources = tf_dev_p58_get_sram_resources\n };\ndiff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c\nindex 25bf026658..fbc96d374c 100644\n--- a/drivers/net/bnxt/tf_core/tf_msg.c\n+++ b/drivers/net/bnxt/tf_core/tf_msg.c\n@@ -380,39 +380,20 @@ tf_msg_session_resc_qcaps(struct tf *tfp,\n \t\t\t enum tf_dir dir,\n \t\t\t uint16_t size,\n \t\t\t struct tf_rm_resc_req_entry *query,\n-\t\t\t enum tf_rm_resc_resv_strategy *resv_strategy)\n+\t\t\t enum tf_rm_resc_resv_strategy *resv_strategy,\n+\t\t\t uint8_t *sram_profile)\n {\n \tint rc;\n \tint i;\n \tstruct tfp_send_msg_parms parms = { 0 };\n \tstruct hwrm_tf_session_resc_qcaps_input req = { 0 };\n \tstruct hwrm_tf_session_resc_qcaps_output resp = { 0 };\n-\tuint8_t fw_session_id;\n \tstruct tf_msg_dma_buf qcaps_buf = { 0 };\n \tstruct tf_rm_resc_req_entry *data;\n \tint dma_size;\n-\tstruct tf_session *tfs;\n-\n-\t/* Retrieve the session information */\n-\trc = tf_session_get_session_internal(tfp, &tfs);\n-\tif (rc) {\n-\t\tTFP_DRV_LOG(ERR,\n-\t\t\t \"Failed to lookup session, rc:%s\\n\",\n-\t\t\t strerror(-rc));\n-\t\treturn rc;\n-\t}\n \n \tTF_CHECK_PARMS3(tfp, query, resv_strategy);\n \n-\trc = tf_session_get_fw_session_id(tfp, &fw_session_id);\n-\tif (rc) {\n-\t\tTFP_DRV_LOG(ERR,\n-\t\t\t \"%s: Unable to lookup FW id, rc:%s\\n\",\n-\t\t\t tf_dir_2_str(dir),\n-\t\t\t strerror(-rc));\n-\t\treturn rc;\n-\t}\n-\n \t/* Prepare DMA buffer */\n \tdma_size = size * sizeof(struct tf_rm_resc_req_entry);\n \trc = tf_msg_alloc_dma_buf(&qcaps_buf, dma_size);\n@@ -420,7 +401,7 @@ tf_msg_session_resc_qcaps(struct tf *tfp,\n \t\treturn rc;\n \n \t/* Populate the request */\n-\treq.fw_session_id = tfp_cpu_to_le_32(fw_session_id);\n+\treq.fw_session_id = 0;\n \treq.flags = tfp_cpu_to_le_16(dir);\n \treq.qcaps_size = size;\n \treq.qcaps_addr = tfp_cpu_to_le_64(qcaps_buf.pa_addr);\n@@ -460,6 +441,9 @@ tf_msg_session_resc_qcaps(struct tf *tfp,\n \t*resv_strategy = resp.flags &\n \t HWRM_TF_SESSION_RESC_QCAPS_OUTPUT_FLAGS_SESS_RESV_STRATEGY_MASK;\n \n+\tif (sram_profile != NULL)\n+\t\t*sram_profile = resp.sram_profile;\n+\n cleanup:\n \ttf_msg_free_dma_buf(&qcaps_buf);\n \ndiff --git a/drivers/net/bnxt/tf_core/tf_msg.h b/drivers/net/bnxt/tf_core/tf_msg.h\nindex 08d20cdd7a..188b361d71 100644\n--- a/drivers/net/bnxt/tf_core/tf_msg.h\n+++ b/drivers/net/bnxt/tf_core/tf_msg.h\n@@ -158,6 +158,9 @@ int tf_msg_session_qcfg(struct tf *tfp);\n * [out] resv_strategy\n * Pointer to the reservation strategy\n *\n+ * [out] sram_profile\n+ * Pointer to the sram profile\n+ *\n * Returns:\n * 0 on Success else internal Truflow error\n */\n@@ -166,7 +169,8 @@ int tf_msg_session_resc_qcaps(struct tf *tfp,\n \t\t\t enum tf_dir dir,\n \t\t\t uint16_t size,\n \t\t\t struct tf_rm_resc_req_entry *query,\n-\t\t\t enum tf_rm_resc_resv_strategy *resv_strategy);\n+\t\t\t enum tf_rm_resc_resv_strategy *resv_strategy,\n+\t\t\t uint8_t *sram_profile);\n \n /**\n * Sends session HW resource allocation request to TF Firmware\ndiff --git a/drivers/net/bnxt/tf_core/tf_rm.c b/drivers/net/bnxt/tf_core/tf_rm.c\nindex dd537aaece..d2045921b9 100644\n--- a/drivers/net/bnxt/tf_core/tf_rm.c\n+++ b/drivers/net/bnxt/tf_core/tf_rm.c\n@@ -551,7 +551,8 @@ tf_rm_create_db(struct tf *tfp,\n \t\t\t\t parms->dir,\n \t\t\t\t max_types,\n \t\t\t\t query,\n-\t\t\t\t &resv_strategy);\n+\t\t\t\t &resv_strategy,\n+\t\t\t\t NULL);\n \tif (rc)\n \t\treturn rc;\n \ndiff --git a/drivers/net/bnxt/tf_core/tf_sram_mgr.h b/drivers/net/bnxt/tf_core/tf_sram_mgr.h\nindex 4abe3fb468..eb2156456a 100644\n--- a/drivers/net/bnxt/tf_core/tf_sram_mgr.h\n+++ b/drivers/net/bnxt/tf_core/tf_sram_mgr.h\n@@ -28,16 +28,6 @@\n \n #define TF_SRAM_MGR_BLOCK_SZ_BYTES 64\n #define TF_SRAM_MGR_MIN_SLICE_BYTES 8\n-/**\n- * Bank identifier\n- */\n-enum tf_sram_bank_id {\n-\tTF_SRAM_BANK_ID_0,\t\t/**< SRAM Bank 0 id */\n-\tTF_SRAM_BANK_ID_1,\t\t/**< SRAM Bank 1 id */\n-\tTF_SRAM_BANK_ID_2,\t\t/**< SRAM Bank 2 id */\n-\tTF_SRAM_BANK_ID_3,\t\t/**< SRAM Bank 3 id */\n-\tTF_SRAM_BANK_ID_MAX\t\t/**< SRAM Bank index limit */\n-};\n \n /**\n * TF slice size.\n", "prefixes": [ "v5", "17/22" ] }