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{
    "id": 103787,
    "url": "http://patches.dpdk.org/api/patches/103787/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20211104215846.58672-2-ajit.khaparde@broadcom.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20211104215846.58672-2-ajit.khaparde@broadcom.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20211104215846.58672-2-ajit.khaparde@broadcom.com",
    "date": "2021-11-04T21:58:25",
    "name": "[v5,01/22] net/bnxt: add NAT support for dest IP and port combination",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "e3abaf5520edfb3b0fd4c39892cf6e40a1cc9766",
    "submitter": {
        "id": 501,
        "url": "http://patches.dpdk.org/api/people/501/?format=api",
        "name": "Ajit Khaparde",
        "email": "ajit.khaparde@broadcom.com"
    },
    "delegate": {
        "id": 1766,
        "url": "http://patches.dpdk.org/api/users/1766/?format=api",
        "username": "ajitkhaparde",
        "first_name": "Ajit",
        "last_name": "Khaparde",
        "email": "ajit.khaparde@broadcom.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20211104215846.58672-2-ajit.khaparde@broadcom.com/mbox/",
    "series": [
        {
            "id": 20322,
            "url": "http://patches.dpdk.org/api/series/20322/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=20322",
            "date": "2021-11-04T21:58:24",
            "name": "fixes and enhancements to Truflow",
            "version": 5,
            "mbox": "http://patches.dpdk.org/series/20322/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/103787/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/103787/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
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        ],
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        "From": "Ajit Khaparde <ajit.khaparde@broadcom.com>",
        "To": "dev@dpdk.org",
        "Cc": "Kishore Padmanabha <kishore.padmanabha@broadcom.com>,\n Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>,\n Shahaji Bhosle <sbhosle@broadcom.com>,\n Mike Baucom <michael.baucom@broadcom.com>,\n Randy Schacher <stuart.schacher@broadcom.com>",
        "Date": "Thu,  4 Nov 2021 14:58:25 -0700",
        "Message-Id": "<20211104215846.58672-2-ajit.khaparde@broadcom.com>",
        "X-Mailer": "git-send-email 2.30.1 (Apple Git-130)",
        "In-Reply-To": "<20211104215846.58672-1-ajit.khaparde@broadcom.com>",
        "References": "<20211103005251.25524-1-ajit.khaparde@broadcom.com>\n <20211104215846.58672-1-ajit.khaparde@broadcom.com>",
        "MIME-Version": "1.0",
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        "X-Content-Filtered-By": "Mailman/MimeDel 2.1.29",
        "Subject": "[dpdk-dev] [PATCH v5 01/22] net/bnxt: add NAT support for dest IP\n and port combination",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\n\n* Added support for NAT action for destination IP and port\n  combination for Thor devices.\n* Consolidated the encapsulation and NAT entries for scaling flows\n  with NAT actions.\n\nSigned-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\nSigned-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>\nReviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>\nReviewed-by: Mike Baucom <michael.baucom@broadcom.com>\nReviewed-by: Randy Schacher <stuart.schacher@broadcom.com>\nAcked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>\n---\n .../generic_templates/ulp_template_db_act.c   | 376 +++++++++++-------\n .../generic_templates/ulp_template_db_enum.h  |  18 +-\n .../generic_templates/ulp_template_db_tbl.c   |  14 +-\n .../ulp_template_db_thor_class.c              |   2 +-\n .../ulp_template_db_wh_plus_act.c             |  96 +++--\n 5 files changed, 317 insertions(+), 189 deletions(-)",
    "diff": "diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_act.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_act.c\nindex 0da6070d7d..ce878d8e02 100644\n--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_act.c\n+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_act.c\n@@ -3,7 +3,7 @@\n  * All rights reserved.\n  */\n \n-/* date: Mon May 17 15:30:41 2021 */\n+/* date: Wed Aug 25 14:37:06 2021 */\n \n #include \"ulp_template_db_enum.h\"\n #include \"ulp_template_db_field.h\"\n@@ -47,59 +47,67 @@ uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = {\n \t[BNXT_ULP_ACT_HID_04bc] = 30,\n \t[BNXT_ULP_ACT_HID_00a9] = 31,\n \t[BNXT_ULP_ACT_HID_020f] = 32,\n-\t[BNXT_ULP_ACT_HID_04a9] = 33,\n-\t[BNXT_ULP_ACT_HID_01fc] = 34,\n-\t[BNXT_ULP_ACT_HID_04be] = 35,\n-\t[BNXT_ULP_ACT_HID_00ab] = 36,\n-\t[BNXT_ULP_ACT_HID_0211] = 37,\n-\t[BNXT_ULP_ACT_HID_04ab] = 38,\n-\t[BNXT_ULP_ACT_HID_01fe] = 39,\n-\t[BNXT_ULP_ACT_HID_0667] = 40,\n-\t[BNXT_ULP_ACT_HID_0254] = 41,\n-\t[BNXT_ULP_ACT_HID_03ba] = 42,\n-\t[BNXT_ULP_ACT_HID_0654] = 43,\n-\t[BNXT_ULP_ACT_HID_03a7] = 44,\n-\t[BNXT_ULP_ACT_HID_0669] = 45,\n-\t[BNXT_ULP_ACT_HID_0256] = 46,\n-\t[BNXT_ULP_ACT_HID_03bc] = 47,\n-\t[BNXT_ULP_ACT_HID_0656] = 48,\n-\t[BNXT_ULP_ACT_HID_03a9] = 49,\n-\t[BNXT_ULP_ACT_HID_021b] = 50,\n-\t[BNXT_ULP_ACT_HID_021c] = 51,\n-\t[BNXT_ULP_ACT_HID_021e] = 52,\n-\t[BNXT_ULP_ACT_HID_063f] = 53,\n-\t[BNXT_ULP_ACT_HID_0510] = 54,\n-\t[BNXT_ULP_ACT_HID_03c6] = 55,\n-\t[BNXT_ULP_ACT_HID_0082] = 56,\n-\t[BNXT_ULP_ACT_HID_06bb] = 57,\n-\t[BNXT_ULP_ACT_HID_021d] = 58,\n-\t[BNXT_ULP_ACT_HID_0641] = 59,\n-\t[BNXT_ULP_ACT_HID_0512] = 60,\n-\t[BNXT_ULP_ACT_HID_03c8] = 61,\n-\t[BNXT_ULP_ACT_HID_0084] = 62,\n-\t[BNXT_ULP_ACT_HID_06bd] = 63,\n-\t[BNXT_ULP_ACT_HID_06d7] = 64,\n-\t[BNXT_ULP_ACT_HID_02c4] = 65,\n-\t[BNXT_ULP_ACT_HID_042a] = 66,\n-\t[BNXT_ULP_ACT_HID_06c4] = 67,\n-\t[BNXT_ULP_ACT_HID_0417] = 68,\n-\t[BNXT_ULP_ACT_HID_06d9] = 69,\n-\t[BNXT_ULP_ACT_HID_02c6] = 70,\n-\t[BNXT_ULP_ACT_HID_042c] = 71,\n-\t[BNXT_ULP_ACT_HID_06c6] = 72,\n-\t[BNXT_ULP_ACT_HID_0419] = 73,\n-\t[BNXT_ULP_ACT_HID_0119] = 74,\n-\t[BNXT_ULP_ACT_HID_046f] = 75,\n-\t[BNXT_ULP_ACT_HID_05d5] = 76,\n-\t[BNXT_ULP_ACT_HID_0106] = 77,\n-\t[BNXT_ULP_ACT_HID_05c2] = 78,\n-\t[BNXT_ULP_ACT_HID_011b] = 79,\n-\t[BNXT_ULP_ACT_HID_0471] = 80,\n-\t[BNXT_ULP_ACT_HID_05d7] = 81,\n-\t[BNXT_ULP_ACT_HID_0108] = 82,\n-\t[BNXT_ULP_ACT_HID_05c4] = 83,\n-\t[BNXT_ULP_ACT_HID_00a2] = 84,\n-\t[BNXT_ULP_ACT_HID_00a4] = 85\n+\t[BNXT_ULP_ACT_HID_0153] = 33,\n+\t[BNXT_ULP_ACT_HID_04a9] = 34,\n+\t[BNXT_ULP_ACT_HID_01fc] = 35,\n+\t[BNXT_ULP_ACT_HID_04be] = 36,\n+\t[BNXT_ULP_ACT_HID_00ab] = 37,\n+\t[BNXT_ULP_ACT_HID_0211] = 38,\n+\t[BNXT_ULP_ACT_HID_0155] = 39,\n+\t[BNXT_ULP_ACT_HID_04ab] = 40,\n+\t[BNXT_ULP_ACT_HID_01fe] = 41,\n+\t[BNXT_ULP_ACT_HID_0667] = 42,\n+\t[BNXT_ULP_ACT_HID_0254] = 43,\n+\t[BNXT_ULP_ACT_HID_03ba] = 44,\n+\t[BNXT_ULP_ACT_HID_02fe] = 45,\n+\t[BNXT_ULP_ACT_HID_0654] = 46,\n+\t[BNXT_ULP_ACT_HID_03a7] = 47,\n+\t[BNXT_ULP_ACT_HID_0669] = 48,\n+\t[BNXT_ULP_ACT_HID_0256] = 49,\n+\t[BNXT_ULP_ACT_HID_03bc] = 50,\n+\t[BNXT_ULP_ACT_HID_0300] = 51,\n+\t[BNXT_ULP_ACT_HID_0656] = 52,\n+\t[BNXT_ULP_ACT_HID_03a9] = 53,\n+\t[BNXT_ULP_ACT_HID_021b] = 54,\n+\t[BNXT_ULP_ACT_HID_021c] = 55,\n+\t[BNXT_ULP_ACT_HID_021e] = 56,\n+\t[BNXT_ULP_ACT_HID_063f] = 57,\n+\t[BNXT_ULP_ACT_HID_0510] = 58,\n+\t[BNXT_ULP_ACT_HID_03c6] = 59,\n+\t[BNXT_ULP_ACT_HID_0082] = 60,\n+\t[BNXT_ULP_ACT_HID_06bb] = 61,\n+\t[BNXT_ULP_ACT_HID_021d] = 62,\n+\t[BNXT_ULP_ACT_HID_0641] = 63,\n+\t[BNXT_ULP_ACT_HID_0512] = 64,\n+\t[BNXT_ULP_ACT_HID_03c8] = 65,\n+\t[BNXT_ULP_ACT_HID_0084] = 66,\n+\t[BNXT_ULP_ACT_HID_06bd] = 67,\n+\t[BNXT_ULP_ACT_HID_06d7] = 68,\n+\t[BNXT_ULP_ACT_HID_02c4] = 69,\n+\t[BNXT_ULP_ACT_HID_042a] = 70,\n+\t[BNXT_ULP_ACT_HID_036e] = 71,\n+\t[BNXT_ULP_ACT_HID_06c4] = 72,\n+\t[BNXT_ULP_ACT_HID_0417] = 73,\n+\t[BNXT_ULP_ACT_HID_06d9] = 74,\n+\t[BNXT_ULP_ACT_HID_02c6] = 75,\n+\t[BNXT_ULP_ACT_HID_042c] = 76,\n+\t[BNXT_ULP_ACT_HID_0370] = 77,\n+\t[BNXT_ULP_ACT_HID_06c6] = 78,\n+\t[BNXT_ULP_ACT_HID_0419] = 79,\n+\t[BNXT_ULP_ACT_HID_0119] = 80,\n+\t[BNXT_ULP_ACT_HID_046f] = 81,\n+\t[BNXT_ULP_ACT_HID_05d5] = 82,\n+\t[BNXT_ULP_ACT_HID_0519] = 83,\n+\t[BNXT_ULP_ACT_HID_0106] = 84,\n+\t[BNXT_ULP_ACT_HID_05c2] = 85,\n+\t[BNXT_ULP_ACT_HID_011b] = 86,\n+\t[BNXT_ULP_ACT_HID_0471] = 87,\n+\t[BNXT_ULP_ACT_HID_05d7] = 88,\n+\t[BNXT_ULP_ACT_HID_051b] = 89,\n+\t[BNXT_ULP_ACT_HID_0108] = 90,\n+\t[BNXT_ULP_ACT_HID_05c4] = 91,\n+\t[BNXT_ULP_ACT_HID_00a2] = 92,\n+\t[BNXT_ULP_ACT_HID_00a4] = 93\n };\n \n /* Array for the act matcher list */\n@@ -429,22 +437,20 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t.act_tid = 3\n \t},\n \t[33] = {\n-\t.act_hid = BNXT_ULP_ACT_HID_04a9,\n+\t.act_hid = BNXT_ULP_ACT_HID_0153,\n \t.act_pattern_id = 3,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_SET_IPV4_DST |\n-\t\tBNXT_ULP_ACT_BIT_SET_TP_SRC |\n \t\tBNXT_ULP_ACT_BIT_SET_TP_DST |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n \t[34] = {\n-\t.act_hid = BNXT_ULP_ACT_HID_01fc,\n+\t.act_hid = BNXT_ULP_ACT_HID_04a9,\n \t.act_pattern_id = 4,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n-\t\tBNXT_ULP_ACT_BIT_SET_IPV4_SRC |\n \t\tBNXT_ULP_ACT_BIT_SET_IPV4_DST |\n \t\tBNXT_ULP_ACT_BIT_SET_TP_SRC |\n \t\tBNXT_ULP_ACT_BIT_SET_TP_DST |\n@@ -452,40 +458,63 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t.act_tid = 3\n \t},\n \t[35] = {\n-\t.act_hid = BNXT_ULP_ACT_HID_04be,\n+\t.act_hid = BNXT_ULP_ACT_HID_01fc,\n \t.act_pattern_id = 5,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n-\t\tBNXT_ULP_ACT_BIT_COUNT |\n \t\tBNXT_ULP_ACT_BIT_SET_IPV4_SRC |\n+\t\tBNXT_ULP_ACT_BIT_SET_IPV4_DST |\n+\t\tBNXT_ULP_ACT_BIT_SET_TP_SRC |\n+\t\tBNXT_ULP_ACT_BIT_SET_TP_DST |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n \t[36] = {\n-\t.act_hid = BNXT_ULP_ACT_HID_00ab,\n+\t.act_hid = BNXT_ULP_ACT_HID_04be,\n \t.act_pattern_id = 6,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_COUNT |\n \t\tBNXT_ULP_ACT_BIT_SET_IPV4_SRC |\n-\t\tBNXT_ULP_ACT_BIT_SET_TP_SRC |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n \t[37] = {\n-\t.act_hid = BNXT_ULP_ACT_HID_0211,\n+\t.act_hid = BNXT_ULP_ACT_HID_00ab,\n \t.act_pattern_id = 7,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_COUNT |\n-\t\tBNXT_ULP_ACT_BIT_SET_IPV4_DST |\n+\t\tBNXT_ULP_ACT_BIT_SET_IPV4_SRC |\n+\t\tBNXT_ULP_ACT_BIT_SET_TP_SRC |\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n \t[38] = {\n-\t.act_hid = BNXT_ULP_ACT_HID_04ab,\n+\t.act_hid = BNXT_ULP_ACT_HID_0211,\n \t.act_pattern_id = 8,\n \t.app_sig = 0,\n+\t.act_sig = { .bits =\n+\t\tBNXT_ULP_ACT_BIT_COUNT |\n+\t\tBNXT_ULP_ACT_BIT_SET_IPV4_DST |\n+\t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n+\t.act_tid = 3\n+\t},\n+\t[39] = {\n+\t.act_hid = BNXT_ULP_ACT_HID_0155,\n+\t.act_pattern_id = 9,\n+\t.app_sig = 0,\n+\t.act_sig = { .bits =\n+\t\tBNXT_ULP_ACT_BIT_COUNT |\n+\t\tBNXT_ULP_ACT_BIT_SET_IPV4_DST |\n+\t\tBNXT_ULP_ACT_BIT_SET_TP_DST |\n+\t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n+\t.act_tid = 3\n+\t},\n+\t[40] = {\n+\t.act_hid = BNXT_ULP_ACT_HID_04ab,\n+\t.act_pattern_id = 10,\n+\t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_COUNT |\n \t\tBNXT_ULP_ACT_BIT_SET_IPV4_DST |\n@@ -494,9 +523,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[39] = {\n+\t[41] = {\n \t.act_hid = BNXT_ULP_ACT_HID_01fe,\n-\t.act_pattern_id = 9,\n+\t.act_pattern_id = 11,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_COUNT |\n@@ -507,9 +536,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[40] = {\n+\t[42] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0667,\n-\t.act_pattern_id = 10,\n+\t.act_pattern_id = 12,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -517,9 +546,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[41] = {\n+\t[43] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0254,\n-\t.act_pattern_id = 11,\n+\t.act_pattern_id = 13,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -528,9 +557,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[42] = {\n+\t[44] = {\n \t.act_hid = BNXT_ULP_ACT_HID_03ba,\n-\t.act_pattern_id = 12,\n+\t.act_pattern_id = 14,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -538,9 +567,20 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[43] = {\n+\t[45] = {\n+\t.act_hid = BNXT_ULP_ACT_HID_02fe,\n+\t.act_pattern_id = 15,\n+\t.app_sig = 0,\n+\t.act_sig = { .bits =\n+\t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n+\t\tBNXT_ULP_ACT_BIT_SET_IPV4_DST |\n+\t\tBNXT_ULP_ACT_BIT_SET_TP_DST |\n+\t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n+\t.act_tid = 3\n+\t},\n+\t[46] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0654,\n-\t.act_pattern_id = 13,\n+\t.act_pattern_id = 16,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -550,9 +590,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[44] = {\n+\t[47] = {\n \t.act_hid = BNXT_ULP_ACT_HID_03a7,\n-\t.act_pattern_id = 14,\n+\t.act_pattern_id = 17,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -563,9 +603,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[45] = {\n+\t[48] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0669,\n-\t.act_pattern_id = 15,\n+\t.act_pattern_id = 18,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -574,9 +614,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[46] = {\n+\t[49] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0256,\n-\t.act_pattern_id = 16,\n+\t.act_pattern_id = 19,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -586,9 +626,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[47] = {\n+\t[50] = {\n \t.act_hid = BNXT_ULP_ACT_HID_03bc,\n-\t.act_pattern_id = 17,\n+\t.act_pattern_id = 20,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -597,9 +637,21 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[48] = {\n+\t[51] = {\n+\t.act_hid = BNXT_ULP_ACT_HID_0300,\n+\t.act_pattern_id = 21,\n+\t.app_sig = 0,\n+\t.act_sig = { .bits =\n+\t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n+\t\tBNXT_ULP_ACT_BIT_COUNT |\n+\t\tBNXT_ULP_ACT_BIT_SET_IPV4_DST |\n+\t\tBNXT_ULP_ACT_BIT_SET_TP_DST |\n+\t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n+\t.act_tid = 3\n+\t},\n+\t[52] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0656,\n-\t.act_pattern_id = 18,\n+\t.act_pattern_id = 22,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -610,9 +662,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[49] = {\n+\t[53] = {\n \t.act_hid = BNXT_ULP_ACT_HID_03a9,\n-\t.act_pattern_id = 19,\n+\t.act_pattern_id = 23,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -624,7 +676,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_ING },\n \t.act_tid = 3\n \t},\n-\t[50] = {\n+\t[54] = {\n \t.act_hid = BNXT_ULP_ACT_HID_021b,\n \t.act_pattern_id = 0,\n \t.app_sig = 0,\n@@ -632,7 +684,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 4\n \t},\n-\t[51] = {\n+\t[55] = {\n \t.act_hid = BNXT_ULP_ACT_HID_021c,\n \t.act_pattern_id = 1,\n \t.app_sig = 0,\n@@ -641,7 +693,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 4\n \t},\n-\t[52] = {\n+\t[56] = {\n \t.act_hid = BNXT_ULP_ACT_HID_021e,\n \t.act_pattern_id = 2,\n \t.app_sig = 0,\n@@ -651,7 +703,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 4\n \t},\n-\t[53] = {\n+\t[57] = {\n \t.act_hid = BNXT_ULP_ACT_HID_063f,\n \t.act_pattern_id = 3,\n \t.app_sig = 0,\n@@ -662,7 +714,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 4\n \t},\n-\t[54] = {\n+\t[58] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0510,\n \t.act_pattern_id = 4,\n \t.app_sig = 0,\n@@ -672,7 +724,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 4\n \t},\n-\t[55] = {\n+\t[59] = {\n \t.act_hid = BNXT_ULP_ACT_HID_03c6,\n \t.act_pattern_id = 5,\n \t.app_sig = 0,\n@@ -681,7 +733,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 4\n \t},\n-\t[56] = {\n+\t[60] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0082,\n \t.act_pattern_id = 6,\n \t.app_sig = 0,\n@@ -693,7 +745,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 4\n \t},\n-\t[57] = {\n+\t[61] = {\n \t.act_hid = BNXT_ULP_ACT_HID_06bb,\n \t.act_pattern_id = 7,\n \t.app_sig = 0,\n@@ -704,7 +756,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 4\n \t},\n-\t[58] = {\n+\t[62] = {\n \t.act_hid = BNXT_ULP_ACT_HID_021d,\n \t.act_pattern_id = 8,\n \t.app_sig = 0,\n@@ -713,7 +765,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 4\n \t},\n-\t[59] = {\n+\t[63] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0641,\n \t.act_pattern_id = 9,\n \t.app_sig = 0,\n@@ -725,7 +777,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 4\n \t},\n-\t[60] = {\n+\t[64] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0512,\n \t.act_pattern_id = 10,\n \t.app_sig = 0,\n@@ -736,7 +788,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 4\n \t},\n-\t[61] = {\n+\t[65] = {\n \t.act_hid = BNXT_ULP_ACT_HID_03c8,\n \t.act_pattern_id = 11,\n \t.app_sig = 0,\n@@ -746,7 +798,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 4\n \t},\n-\t[62] = {\n+\t[66] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0084,\n \t.act_pattern_id = 12,\n \t.app_sig = 0,\n@@ -759,7 +811,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 4\n \t},\n-\t[63] = {\n+\t[67] = {\n \t.act_hid = BNXT_ULP_ACT_HID_06bd,\n \t.act_pattern_id = 13,\n \t.app_sig = 0,\n@@ -771,7 +823,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 4\n \t},\n-\t[64] = {\n+\t[68] = {\n \t.act_hid = BNXT_ULP_ACT_HID_06d7,\n \t.act_pattern_id = 0,\n \t.app_sig = 0,\n@@ -780,7 +832,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[65] = {\n+\t[69] = {\n \t.act_hid = BNXT_ULP_ACT_HID_02c4,\n \t.act_pattern_id = 1,\n \t.app_sig = 0,\n@@ -790,7 +842,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[66] = {\n+\t[70] = {\n \t.act_hid = BNXT_ULP_ACT_HID_042a,\n \t.act_pattern_id = 2,\n \t.app_sig = 0,\n@@ -799,10 +851,20 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[67] = {\n-\t.act_hid = BNXT_ULP_ACT_HID_06c4,\n+\t[71] = {\n+\t.act_hid = BNXT_ULP_ACT_HID_036e,\n \t.act_pattern_id = 3,\n \t.app_sig = 0,\n+\t.act_sig = { .bits =\n+\t\tBNXT_ULP_ACT_BIT_SET_IPV4_DST |\n+\t\tBNXT_ULP_ACT_BIT_SET_TP_DST |\n+\t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n+\t.act_tid = 5\n+\t},\n+\t[72] = {\n+\t.act_hid = BNXT_ULP_ACT_HID_06c4,\n+\t.act_pattern_id = 4,\n+\t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_SET_IPV4_DST |\n \t\tBNXT_ULP_ACT_BIT_SET_TP_SRC |\n@@ -810,9 +872,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[68] = {\n+\t[73] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0417,\n-\t.act_pattern_id = 4,\n+\t.act_pattern_id = 5,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_SET_IPV4_SRC |\n@@ -822,9 +884,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[69] = {\n+\t[74] = {\n \t.act_hid = BNXT_ULP_ACT_HID_06d9,\n-\t.act_pattern_id = 5,\n+\t.act_pattern_id = 6,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_COUNT |\n@@ -832,9 +894,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[70] = {\n+\t[75] = {\n \t.act_hid = BNXT_ULP_ACT_HID_02c6,\n-\t.act_pattern_id = 6,\n+\t.act_pattern_id = 7,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_COUNT |\n@@ -843,9 +905,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[71] = {\n+\t[76] = {\n \t.act_hid = BNXT_ULP_ACT_HID_042c,\n-\t.act_pattern_id = 7,\n+\t.act_pattern_id = 8,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_COUNT |\n@@ -853,9 +915,20 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[72] = {\n+\t[77] = {\n+\t.act_hid = BNXT_ULP_ACT_HID_0370,\n+\t.act_pattern_id = 9,\n+\t.app_sig = 0,\n+\t.act_sig = { .bits =\n+\t\tBNXT_ULP_ACT_BIT_COUNT |\n+\t\tBNXT_ULP_ACT_BIT_SET_IPV4_DST |\n+\t\tBNXT_ULP_ACT_BIT_SET_TP_DST |\n+\t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n+\t.act_tid = 5\n+\t},\n+\t[78] = {\n \t.act_hid = BNXT_ULP_ACT_HID_06c6,\n-\t.act_pattern_id = 8,\n+\t.act_pattern_id = 10,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_COUNT |\n@@ -865,9 +938,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[73] = {\n+\t[79] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0419,\n-\t.act_pattern_id = 9,\n+\t.act_pattern_id = 11,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_COUNT |\n@@ -878,9 +951,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[74] = {\n+\t[80] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0119,\n-\t.act_pattern_id = 10,\n+\t.act_pattern_id = 12,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -888,9 +961,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[75] = {\n+\t[81] = {\n \t.act_hid = BNXT_ULP_ACT_HID_046f,\n-\t.act_pattern_id = 11,\n+\t.act_pattern_id = 13,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -899,9 +972,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[76] = {\n+\t[82] = {\n \t.act_hid = BNXT_ULP_ACT_HID_05d5,\n-\t.act_pattern_id = 12,\n+\t.act_pattern_id = 14,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -909,9 +982,20 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[77] = {\n+\t[83] = {\n+\t.act_hid = BNXT_ULP_ACT_HID_0519,\n+\t.act_pattern_id = 15,\n+\t.app_sig = 0,\n+\t.act_sig = { .bits =\n+\t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n+\t\tBNXT_ULP_ACT_BIT_SET_IPV4_DST |\n+\t\tBNXT_ULP_ACT_BIT_SET_TP_DST |\n+\t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n+\t.act_tid = 5\n+\t},\n+\t[84] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0106,\n-\t.act_pattern_id = 13,\n+\t.act_pattern_id = 16,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -921,9 +1005,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[78] = {\n+\t[85] = {\n \t.act_hid = BNXT_ULP_ACT_HID_05c2,\n-\t.act_pattern_id = 14,\n+\t.act_pattern_id = 17,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -934,9 +1018,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[79] = {\n+\t[86] = {\n \t.act_hid = BNXT_ULP_ACT_HID_011b,\n-\t.act_pattern_id = 15,\n+\t.act_pattern_id = 18,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -945,9 +1029,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[80] = {\n+\t[87] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0471,\n-\t.act_pattern_id = 16,\n+\t.act_pattern_id = 19,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -957,9 +1041,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[81] = {\n+\t[88] = {\n \t.act_hid = BNXT_ULP_ACT_HID_05d7,\n-\t.act_pattern_id = 17,\n+\t.act_pattern_id = 20,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -968,9 +1052,21 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[82] = {\n+\t[89] = {\n+\t.act_hid = BNXT_ULP_ACT_HID_051b,\n+\t.act_pattern_id = 21,\n+\t.app_sig = 0,\n+\t.act_sig = { .bits =\n+\t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n+\t\tBNXT_ULP_ACT_BIT_COUNT |\n+\t\tBNXT_ULP_ACT_BIT_SET_IPV4_DST |\n+\t\tBNXT_ULP_ACT_BIT_SET_TP_DST |\n+\t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n+\t.act_tid = 5\n+\t},\n+\t[90] = {\n \t.act_hid = BNXT_ULP_ACT_HID_0108,\n-\t.act_pattern_id = 18,\n+\t.act_pattern_id = 22,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -981,9 +1077,9 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[83] = {\n+\t[91] = {\n \t.act_hid = BNXT_ULP_ACT_HID_05c4,\n-\t.act_pattern_id = 19,\n+\t.act_pattern_id = 23,\n \t.app_sig = 0,\n \t.act_sig = { .bits =\n \t\tBNXT_ULP_ACT_BIT_DEC_TTL |\n@@ -995,7 +1091,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 5\n \t},\n-\t[84] = {\n+\t[92] = {\n \t.act_hid = BNXT_ULP_ACT_HID_00a2,\n \t.act_pattern_id = 0,\n \t.app_sig = 0,\n@@ -1004,7 +1100,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {\n \t\tBNXT_ULP_FLOW_DIR_BITMASK_EGR },\n \t.act_tid = 6\n \t},\n-\t[85] = {\n+\t[93] = {\n \t.act_hid = BNXT_ULP_ACT_HID_00a4,\n \t.act_pattern_id = 1,\n \t.app_sig = 0,\ndiff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h\nindex c016e1940a..fcd460e707 100644\n--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h\n+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h\n@@ -3,7 +3,7 @@\n  * All rights reserved.\n  */\n \n-/* date: Fri Aug 20 17:59:14 2021 */\n+/* date: Thu Aug 26 17:43:36 2021 */\n \n #ifndef ULP_TEMPLATE_DB_H_\n #define ULP_TEMPLATE_DB_H_\n@@ -20,7 +20,7 @@\n #define BNXT_ULP_CLASS_HID_SHFTL 28\n #define BNXT_ULP_CLASS_HID_MASK 65535\n #define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 2048\n-#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 86\n+#define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 94\n #define BNXT_ULP_ACT_HID_LOW_PRIME 7919\n #define BNXT_ULP_ACT_HID_HIGH_PRIME 3793\n #define BNXT_ULP_ACT_HID_SHFTR 27\n@@ -29,7 +29,7 @@\n #define BNXT_ULP_APP_RESOURCE_RESV_LIST_MAX_SZ 8\n #define BNXT_ULP_GLB_RESOURCE_TBL_MAX_SZ 110\n #define BNXT_ULP_APP_GLB_RESOURCE_TBL_MAX_SZ 50\n-#define BNXT_ULP_RESOURCE_RESV_LIST_MAX_SZ 278\n+#define BNXT_ULP_RESOURCE_RESV_LIST_MAX_SZ 277\n #define BNXT_ULP_APP_CAP_TBL_MAX_SZ 8\n #define BNXT_ULP_COND_GOTO_REJECT 1023\n #define BNXT_ULP_COND_GOTO_RF 0x10000\n@@ -50,11 +50,11 @@\n #define ULP_THOR_CLASS_RESULT_FIELD_LIST_SIZE 1313\n #define ULP_THOR_CLASS_COND_LIST_SIZE 55\n #define ULP_WH_PLUS_ACT_TMPL_LIST_SIZE 7\n-#define ULP_WH_PLUS_ACT_TBL_LIST_SIZE 35\n+#define ULP_WH_PLUS_ACT_TBL_LIST_SIZE 37\n #define ULP_WH_PLUS_ACT_KEY_INFO_LIST_SIZE 2\n #define ULP_WH_PLUS_ACT_IDENT_LIST_SIZE 1\n #define ULP_WH_PLUS_ACT_RESULT_FIELD_LIST_SIZE 536\n-#define ULP_WH_PLUS_ACT_COND_LIST_SIZE 39\n+#define ULP_WH_PLUS_ACT_COND_LIST_SIZE 41\n #define ULP_THOR_ACT_TMPL_LIST_SIZE 7\n #define ULP_THOR_ACT_TBL_LIST_SIZE 36\n #define ULP_THOR_ACT_KEY_INFO_LIST_SIZE 16\n@@ -2224,21 +2224,25 @@ enum bnxt_ulp_act_hid {\n \tBNXT_ULP_ACT_HID_04bc = 0x04bc,\n \tBNXT_ULP_ACT_HID_00a9 = 0x00a9,\n \tBNXT_ULP_ACT_HID_020f = 0x020f,\n+\tBNXT_ULP_ACT_HID_0153 = 0x0153,\n \tBNXT_ULP_ACT_HID_04a9 = 0x04a9,\n \tBNXT_ULP_ACT_HID_01fc = 0x01fc,\n \tBNXT_ULP_ACT_HID_04be = 0x04be,\n \tBNXT_ULP_ACT_HID_00ab = 0x00ab,\n \tBNXT_ULP_ACT_HID_0211 = 0x0211,\n+\tBNXT_ULP_ACT_HID_0155 = 0x0155,\n \tBNXT_ULP_ACT_HID_04ab = 0x04ab,\n \tBNXT_ULP_ACT_HID_01fe = 0x01fe,\n \tBNXT_ULP_ACT_HID_0667 = 0x0667,\n \tBNXT_ULP_ACT_HID_0254 = 0x0254,\n \tBNXT_ULP_ACT_HID_03ba = 0x03ba,\n+\tBNXT_ULP_ACT_HID_02fe = 0x02fe,\n \tBNXT_ULP_ACT_HID_0654 = 0x0654,\n \tBNXT_ULP_ACT_HID_03a7 = 0x03a7,\n \tBNXT_ULP_ACT_HID_0669 = 0x0669,\n \tBNXT_ULP_ACT_HID_0256 = 0x0256,\n \tBNXT_ULP_ACT_HID_03bc = 0x03bc,\n+\tBNXT_ULP_ACT_HID_0300 = 0x0300,\n \tBNXT_ULP_ACT_HID_0656 = 0x0656,\n \tBNXT_ULP_ACT_HID_03a9 = 0x03a9,\n \tBNXT_ULP_ACT_HID_021b = 0x021b,\n@@ -2258,21 +2262,25 @@ enum bnxt_ulp_act_hid {\n \tBNXT_ULP_ACT_HID_06d7 = 0x06d7,\n \tBNXT_ULP_ACT_HID_02c4 = 0x02c4,\n \tBNXT_ULP_ACT_HID_042a = 0x042a,\n+\tBNXT_ULP_ACT_HID_036e = 0x036e,\n \tBNXT_ULP_ACT_HID_06c4 = 0x06c4,\n \tBNXT_ULP_ACT_HID_0417 = 0x0417,\n \tBNXT_ULP_ACT_HID_06d9 = 0x06d9,\n \tBNXT_ULP_ACT_HID_02c6 = 0x02c6,\n \tBNXT_ULP_ACT_HID_042c = 0x042c,\n+\tBNXT_ULP_ACT_HID_0370 = 0x0370,\n \tBNXT_ULP_ACT_HID_06c6 = 0x06c6,\n \tBNXT_ULP_ACT_HID_0419 = 0x0419,\n \tBNXT_ULP_ACT_HID_0119 = 0x0119,\n \tBNXT_ULP_ACT_HID_046f = 0x046f,\n \tBNXT_ULP_ACT_HID_05d5 = 0x05d5,\n+\tBNXT_ULP_ACT_HID_0519 = 0x0519,\n \tBNXT_ULP_ACT_HID_0106 = 0x0106,\n \tBNXT_ULP_ACT_HID_05c2 = 0x05c2,\n \tBNXT_ULP_ACT_HID_011b = 0x011b,\n \tBNXT_ULP_ACT_HID_0471 = 0x0471,\n \tBNXT_ULP_ACT_HID_05d7 = 0x05d7,\n+\tBNXT_ULP_ACT_HID_051b = 0x051b,\n \tBNXT_ULP_ACT_HID_0108 = 0x0108,\n \tBNXT_ULP_ACT_HID_05c4 = 0x05c4,\n \tBNXT_ULP_ACT_HID_00a2 = 0x00a2,\ndiff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c\nindex 684fa66f48..84be09b368 100644\n--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c\n+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c\n@@ -3,7 +3,7 @@\n  * All rights reserved.\n  */\n \n-/* date: Tue Aug 17 12:16:42 2021 */\n+/* date: Thu Aug 26 17:43:36 2021 */\n \n #include \"ulp_template_db_enum.h\"\n #include \"ulp_template_db_field.h\"\n@@ -2121,7 +2121,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {\n \t.direction               = TF_DIR_RX,\n \t.resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n \t.resource_type           = TF_TBL_TYPE_ACT_ENCAP_64B,\n-\t.count                   = 64\n+\t.count                   = 2048\n \t},\n \t{\n \t.app_id                  = 0,\n@@ -2249,7 +2249,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {\n \t.direction               = TF_DIR_TX,\n \t.resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n \t.resource_type           = TF_TBL_TYPE_ACT_ENCAP_64B,\n-\t.count                   = 64\n+\t.count                   = 2048\n \t},\n \t{\n \t.app_id                  = 0,\n@@ -2263,14 +2263,6 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {\n \t.app_id                  = 0,\n \t.device_id               = BNXT_ULP_DEVICE_ID_THOR,\n \t.direction               = TF_DIR_TX,\n-\t.resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n-\t.resource_type           = TF_TBL_TYPE_ACT_MODIFY_64B,\n-\t.count                   = 32\n-\t},\n-\t{\n-\t.app_id                  = 0,\n-\t.device_id               = BNXT_ULP_DEVICE_ID_THOR,\n-\t.direction               = TF_DIR_TX,\n \t.resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n \t.resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,\n \t.count                   = 272\ndiff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c\nindex 68c1e292b2..95205a2421 100644\n--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c\n+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c\n@@ -3,7 +3,7 @@\n  * All rights reserved.\n  */\n \n-/* date: Fri Aug 20 18:05:25 2021 */\n+/* date: Wed Aug 25 16:41:37 2021 */\n \n #include \"ulp_template_db_enum.h\"\n #include \"ulp_template_db_field.h\"\ndiff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_act.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_act.c\nindex 578ede8bba..4a2d201c2d 100644\n--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_act.c\n+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_act.c\n@@ -3,7 +3,7 @@\n  * All rights reserved.\n  */\n \n-/* date: Tue Jun  1 16:05:30 2021 */\n+/* date: Wed Aug 25 14:37:06 2021 */\n \n #include \"ulp_template_db_enum.h\"\n #include \"ulp_template_db_field.h\"\n@@ -35,7 +35,7 @@ struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_act_tmpl_list[] = {\n \t/* act_tid: 3, ingress */\n \t[3] = {\n \t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n-\t.num_tbls = 6,\n+\t.num_tbls = 7,\n \t.start_tbl_idx = 12,\n \t.reject_info = {\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,\n@@ -46,30 +46,30 @@ struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_act_tmpl_list[] = {\n \t[4] = {\n \t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n \t.num_tbls = 5,\n-\t.start_tbl_idx = 18,\n+\t.start_tbl_idx = 19,\n \t.reject_info = {\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,\n-\t\t.cond_start_idx = 20,\n+\t\t.cond_start_idx = 21,\n \t\t.cond_nums = 0 }\n \t},\n \t/* act_tid: 5, egress */\n \t[5] = {\n \t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n-\t.num_tbls = 6,\n-\t.start_tbl_idx = 23,\n+\t.num_tbls = 7,\n+\t.start_tbl_idx = 24,\n \t.reject_info = {\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,\n-\t\t.cond_start_idx = 28,\n+\t\t.cond_start_idx = 29,\n \t\t.cond_nums = 0 }\n \t},\n \t/* act_tid: 6, egress */\n \t[6] = {\n \t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\n \t.num_tbls = 6,\n-\t.start_tbl_idx = 29,\n+\t.start_tbl_idx = 31,\n \t.reject_info = {\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,\n-\t\t.cond_start_idx = 33,\n+\t\t.cond_start_idx = 35,\n \t\t.cond_nums = 0 }\n \t}\n };\n@@ -322,6 +322,17 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.result_bit_size = 34,\n \t.result_num_fields = 2\n \t},\n+\t{ /* act_tid: 3, , table: control.0 */\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,\n+\t.direction = TF_DIR_RX,\n+\t.execute_info = {\n+\t\t.cond_true_goto  = 1023,\n+\t\t.cond_false_goto = 1,\n+\t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n+\t\t.cond_start_idx = 15,\n+\t\t.cond_nums = 1 },\n+\t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP\n+\t},\n \t{ /* act_tid: 3, , table: int_flow_counter_tbl.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n \t.resource_type = TF_TBL_TYPE_ACT_STATS_64,\n@@ -332,7 +343,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 15,\n+\t\t.cond_start_idx = 16,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,\n@@ -351,7 +362,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 16,\n+\t\t.cond_start_idx = 17,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0,\n@@ -370,7 +381,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 17,\n+\t\t.cond_start_idx = 18,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0,\n@@ -389,7 +400,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,\n-\t\t.cond_start_idx = 18,\n+\t\t.cond_start_idx = 19,\n \t\t.cond_nums = 0 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,\n \t.tbl_operand = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR,\n@@ -410,7 +421,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 18,\n+\t\t.cond_start_idx = 19,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n@@ -429,7 +440,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 0,\n \t\t.cond_false_goto = 0,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 19,\n+\t\t.cond_start_idx = 20,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n@@ -449,7 +460,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 20,\n+\t\t.cond_start_idx = 21,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,\n@@ -468,7 +479,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 21,\n+\t\t.cond_start_idx = 22,\n \t\t.cond_nums = 2 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,\n@@ -489,7 +500,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 23,\n+\t\t.cond_start_idx = 24,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n@@ -508,7 +519,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 24,\n+\t\t.cond_start_idx = 25,\n \t\t.cond_nums = 2 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n@@ -528,7 +539,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 0,\n \t\t.cond_false_goto = 0,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 26,\n+\t\t.cond_start_idx = 27,\n \t\t.cond_nums = 2 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n@@ -538,6 +549,17 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.result_num_fields = 26,\n \t.encap_num_fields = 11\n \t},\n+\t{ /* act_tid: 5, , table: control.0 */\n+\t.resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,\n+\t.direction = TF_DIR_TX,\n+\t.execute_info = {\n+\t\t.cond_true_goto  = 1023,\n+\t\t.cond_false_goto = 1,\n+\t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n+\t\t.cond_start_idx = 29,\n+\t\t.cond_nums = 1 },\n+\t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP\n+\t},\n \t{ /* act_tid: 5, , table: int_flow_counter_tbl.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n \t.resource_type = TF_TBL_TYPE_ACT_STATS_64,\n@@ -548,7 +570,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 28,\n+\t\t.cond_start_idx = 30,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,\n@@ -567,7 +589,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 29,\n+\t\t.cond_start_idx = 31,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0,\n@@ -586,7 +608,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 30,\n+\t\t.cond_start_idx = 32,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0,\n@@ -605,7 +627,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,\n-\t\t.cond_start_idx = 31,\n+\t\t.cond_start_idx = 33,\n \t\t.cond_nums = 0 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,\n \t.tbl_operand = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR,\n@@ -626,7 +648,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 31,\n+\t\t.cond_start_idx = 33,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n@@ -645,7 +667,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 0,\n \t\t.cond_false_goto = 0,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 32,\n+\t\t.cond_start_idx = 34,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n@@ -665,7 +687,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 33,\n+\t\t.cond_start_idx = 35,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,\n@@ -684,7 +706,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 34,\n+\t\t.cond_start_idx = 36,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR,\n@@ -705,7 +727,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 35,\n+\t\t.cond_start_idx = 37,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR,\n@@ -726,7 +748,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 36,\n+\t\t.cond_start_idx = 38,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,\n@@ -747,7 +769,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 1,\n \t\t.cond_false_goto = 1,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 37,\n+\t\t.cond_start_idx = 39,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n@@ -766,7 +788,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_true_goto  = 0,\n \t\t.cond_false_goto = 0,\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n-\t\t.cond_start_idx = 38,\n+\t\t.cond_start_idx = 40,\n \t\t.cond_nums = 1 },\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n@@ -844,6 +866,11 @@ struct bnxt_ulp_mapper_cond_info ulp_wh_plus_act_cond_list[] = {\n \t.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,\n \t.cond_operand = BNXT_ULP_ACT_BIT_COUNT\n \t},\n+\t/* cond_execute: act_tid: 3, control.0 */\n+\t{\n+\t.cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET,\n+\t.cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS\n+\t},\n \t/* cond_execute: act_tid: 3, int_flow_counter_tbl.0 */\n \t{\n \t.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,\n@@ -900,6 +927,11 @@ struct bnxt_ulp_mapper_cond_info ulp_wh_plus_act_cond_list[] = {\n \t.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,\n \t.cond_operand = BNXT_ULP_ACT_BIT_PUSH_VLAN\n \t},\n+\t/* cond_execute: act_tid: 5, control.0 */\n+\t{\n+\t.cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET,\n+\t.cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS\n+\t},\n \t/* cond_execute: act_tid: 5, int_flow_counter_tbl.0 */\n \t{\n \t.cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,\n",
    "prefixes": [
        "v5",
        "01/22"
    ]
}