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GET /api/patches/102780/?format=api
{ "id": 102780, "url": "http://patches.dpdk.org/api/patches/102780/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20211025133456.26850-7-david.marchand@redhat.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211025133456.26850-7-david.marchand@redhat.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211025133456.26850-7-david.marchand@redhat.com", "date": "2021-10-25T13:34:52", "name": "[v7,6/9] drivers: remove direct access to interrupt handle", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "5062990ec5c8974a8520505ad6a496bf96d5b360", "submitter": { "id": 1173, "url": "http://patches.dpdk.org/api/people/1173/?format=api", "name": "David Marchand", "email": "david.marchand@redhat.com" }, "delegate": { "id": 24651, "url": "http://patches.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20211025133456.26850-7-david.marchand@redhat.com/mbox/", "series": [ { "id": 19958, "url": "http://patches.dpdk.org/api/series/19958/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=19958", "date": "2021-10-25T13:34:46", "name": "make rte_intr_handle internal", "version": 7, "mbox": "http://patches.dpdk.org/series/19958/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/102780/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/102780/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 75A0FA0C4C;\n\tMon, 25 Oct 2021 15:38:06 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 5BAEB40E32;\n\tMon, 25 Oct 2021 15:38:06 +0200 (CEST)", "from us-smtp-delivery-124.mimecast.com\n (us-smtp-delivery-124.mimecast.com [216.205.24.124])\n by mails.dpdk.org (Postfix) with ESMTP id 2388B4003E\n for <dev@dpdk.org>; Mon, 25 Oct 2021 15:38:04 +0200 (CEST)", "from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com\n [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id\n us-mta-349-eiT3m9grNYmQNACLerNNaA-1; Mon, 25 Oct 2021 09:37:46 -0400", "from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com\n [10.5.11.14])\n (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n (No client certificate requested)\n by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 807C96A2B2;\n Mon, 25 Oct 2021 13:37:38 +0000 (UTC)", "from dmarchan.remote.csb (unknown [10.40.192.64])\n by smtp.corp.redhat.com (Postfix) with ESMTP id 0BCBE5D9D5;\n Mon, 25 Oct 2021 13:36:59 +0000 (UTC)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;\n s=mimecast20190719; t=1635169083;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:content-type:content-type:\n content-transfer-encoding:content-transfer-encoding:\n in-reply-to:in-reply-to:references:references;\n bh=ha90Iabu4kRbeQZUmc5lxYHil9h67JpWFwjcvYWqAes=;\n b=d5XZSaivfgbyfqVv91ymFQCXG/yDt1H7o5hr2zgxPg6xm/zzHqYac3s5cTKOyHodLnZEfc\n 0lCyM0K37HUqT+dOfg+vKRGeAC3WxAIXQYtFlm3cR0cb6r3biZFNP+e6j8Bbk6ls0XBmbM\n grWypqsCbJixoc44SEhDqd6j6dxZ/cg=", "X-MC-Unique": "eiT3m9grNYmQNACLerNNaA-1", "From": "David Marchand <david.marchand@redhat.com>", "To": "hkalra@marvell.com,\n\tdev@dpdk.org", "Cc": "dmitry.kozliuk@gmail.com, rasland@nvidia.com, thomas@monjalon.net,\n Hyong Youb Kim <hyonkim@cisco.com>,\n Nicolas Chautru <nicolas.chautru@intel.com>,\n Parav Pandit <parav@nvidia.com>, Xueming Li <xuemingl@nvidia.com>,\n Hemant Agrawal <hemant.agrawal@nxp.com>,\n Sachin Saxena <sachin.saxena@oss.nxp.com>, Rosen Xu <rosen.xu@intel.com>,\n Ferruh Yigit <ferruh.yigit@intel.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>,\n Stephen Hemminger <sthemmin@microsoft.com>, Long Li <longli@microsoft.com>,\n Nithin Dabilpuram <ndabilpuram@marvell.com>,\n Kiran Kumar K <kirankumark@marvell.com>,\n Sunil Kumar Kori <skori@marvell.com>, Satha Rao <skoteshwar@marvell.com>,\n Jerin Jacob <jerinj@marvell.com>, Ankur Dwivedi <adwivedi@marvell.com>,\n Anoob Joseph <anoobj@marvell.com>,\n Pavan Nikhilesh <pbhagavatula@marvell.com>,\n Igor Russkikh <irusskikh@marvell.com>,\n Steven Webster <steven.webster@windriver.com>,\n Matt Peters <matt.peters@windriver.com>,\n Chandubabu Namburu <chandu@amd.com>, Rasesh Mody <rmody@marvell.com>,\n Shahed Shaikh <shshaikh@marvell.com>,\n Ajit Khaparde <ajit.khaparde@broadcom.com>,\n Somnath Kotur <somnath.kotur@broadcom.com>,\n Haiyue Wang <haiyue.wang@intel.com>, Marcin Wojtas <mw@semihalf.com>,\n Michal Krawczyk <mk@semihalf.com>, Shai Brandes <shaibran@amazon.com>,\n Evgeny Schemeilin <evgenys@amazon.com>, Igor Chauskin <igorch@amazon.com>,\n John Daley <johndale@cisco.com>, Gaetan Rivet <grive@u256.net>,\n Qi Zhang <qi.z.zhang@intel.com>, Xiao Wang <xiao.w.wang@intel.com>,\n Ziyang Xuan <xuanziyang2@huawei.com>,\n Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>,\n Guoyang Zhou <zhouguoyang@huawei.com>,\n \"Min Hu (Connor)\" <humin29@huawei.com>,\n Yisen Zhuang <yisen.zhuang@huawei.com>, Lijun Ou <oulijun@huawei.com>,\n Beilei Xing <beilei.xing@intel.com>, Jingjing Wu <jingjing.wu@intel.com>,\n Qiming Yang <qiming.yang@intel.com>, Andrew Boyer <aboyer@pensando.io>,\n Jakub Grajciar <jgrajcia@cisco.com>, Matan Azrad <matan@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Heinrich Kuhn <heinrich.kuhn@corigine.com>,\n Jiawen Wu <jiawenwu@trustnetic.com>,\n Devendra Singh Rawat <dsinghrawat@marvell.com>,\n Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Keith Wiles <keith.wiles@intel.com>, Maciej Czekaj <mczekaj@marvell.com>,\n Jian Wang <jianwang@trustnetic.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>,\n Chenbo Xia <chenbo.xia@intel.com>, Yong Wang <yongwang@vmware.com>,\n Tianfei zhang <tianfei.zhang@intel.com>, Xiaoyun Li <xiaoyun.li@intel.com>,\n Guy Kaneti <guyk@marvell.com>", "Date": "Mon, 25 Oct 2021 15:34:52 +0200", "Message-Id": "<20211025133456.26850-7-david.marchand@redhat.com>", "In-Reply-To": "<20211025133456.26850-1-david.marchand@redhat.com>", "References": "<20211022204934.132186-1-hkalra@marvell.com>\n <20211025133456.26850-1-david.marchand@redhat.com>", "MIME-Version": "1.0", "X-Scanned-By": "MIMEDefang 2.79 on 10.5.11.14", "Authentication-Results": "relay.mimecast.com;\n auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=david.marchand@redhat.com", "X-Mimecast-Spam-Score": "0", "X-Mimecast-Originator": "redhat.com", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain; charset=\"US-ASCII\"", "Subject": "[dpdk-dev] [PATCH v7 6/9] drivers: remove direct access to\n interrupt handle", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Harman Kalra <hkalra@marvell.com>\n\nRemoving direct access to interrupt handle structure fields,\nrather use respective get set APIs for the same.\nMaking changes to all the drivers access the interrupt handle fields.\n\nSigned-off-by: Harman Kalra <hkalra@marvell.com>\nAcked-by: Hyong Youb Kim <hyonkim@cisco.com>\nSigned-off-by: David Marchand <david.marchand@redhat.com>\n---\nChanges since v6:\n- fixed interrupt handle allocation for drivers without\n RTE_PCI_DRV_NEED_MAPPING,\n\nChanges since v5:\n- moved instance allocation to probing for auxiliary,\n- fixed dev_irq_register() return value sign on error for\n drivers/common/cnxk/roc_irq.c,\n\n---\n drivers/baseband/acc100/rte_acc100_pmd.c | 14 +--\n .../fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 24 ++--\n drivers/baseband/fpga_lte_fec/fpga_lte_fec.c | 24 ++--\n drivers/bus/auxiliary/auxiliary_common.c | 17 ++-\n drivers/bus/auxiliary/rte_bus_auxiliary.h | 2 +-\n drivers/bus/dpaa/dpaa_bus.c | 28 ++++-\n drivers/bus/dpaa/rte_dpaa_bus.h | 2 +-\n drivers/bus/fslmc/fslmc_bus.c | 14 ++-\n drivers/bus/fslmc/fslmc_vfio.c | 30 +++--\n drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 18 ++-\n drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 2 +-\n drivers/bus/fslmc/rte_fslmc.h | 2 +-\n drivers/bus/ifpga/ifpga_bus.c | 13 +-\n drivers/bus/ifpga/rte_bus_ifpga.h | 2 +-\n drivers/bus/pci/bsd/pci.c | 20 +--\n drivers/bus/pci/linux/pci.c | 4 +-\n drivers/bus/pci/linux/pci_uio.c | 69 +++++++----\n drivers/bus/pci/linux/pci_vfio.c | 102 +++++++++------\n drivers/bus/pci/pci_common.c | 47 +++++--\n drivers/bus/pci/pci_common_uio.c | 21 ++--\n drivers/bus/pci/rte_bus_pci.h | 4 +-\n drivers/bus/vmbus/linux/vmbus_bus.c | 6 +\n drivers/bus/vmbus/linux/vmbus_uio.c | 35 ++++--\n drivers/bus/vmbus/rte_bus_vmbus.h | 2 +-\n drivers/bus/vmbus/vmbus_common_uio.c | 23 ++--\n drivers/common/cnxk/roc_cpt.c | 8 +-\n drivers/common/cnxk/roc_dev.c | 14 +--\n drivers/common/cnxk/roc_irq.c | 107 +++++++++-------\n drivers/common/cnxk/roc_nix_inl_dev_irq.c | 8 +-\n drivers/common/cnxk/roc_nix_irq.c | 36 +++---\n drivers/common/cnxk/roc_npa.c | 2 +-\n drivers/common/cnxk/roc_platform.h | 48 +++++--\n drivers/common/cnxk/roc_sso.c | 4 +-\n drivers/common/cnxk/roc_tim.c | 4 +-\n drivers/common/octeontx2/otx2_dev.c | 14 +--\n drivers/common/octeontx2/otx2_irq.c | 117 ++++++++++--------\n .../octeontx2/otx2_cryptodev_hw_access.c | 4 +-\n drivers/event/octeontx2/otx2_evdev_irq.c | 12 +-\n drivers/mempool/octeontx2/otx2_mempool.c | 2 +-\n drivers/net/atlantic/atl_ethdev.c | 20 ++-\n drivers/net/avp/avp_ethdev.c | 8 +-\n drivers/net/axgbe/axgbe_ethdev.c | 12 +-\n drivers/net/axgbe/axgbe_mdio.c | 6 +-\n drivers/net/bnx2x/bnx2x_ethdev.c | 10 +-\n drivers/net/bnxt/bnxt_ethdev.c | 33 +++--\n drivers/net/bnxt/bnxt_irq.c | 4 +-\n drivers/net/dpaa/dpaa_ethdev.c | 48 ++++---\n drivers/net/dpaa2/dpaa2_ethdev.c | 10 +-\n drivers/net/e1000/em_ethdev.c | 23 ++--\n drivers/net/e1000/igb_ethdev.c | 79 ++++++------\n drivers/net/ena/ena_ethdev.c | 35 +++---\n drivers/net/enic/enic_main.c | 26 ++--\n drivers/net/failsafe/failsafe.c | 21 +++-\n drivers/net/failsafe/failsafe_intr.c | 43 ++++---\n drivers/net/failsafe/failsafe_ops.c | 19 ++-\n drivers/net/failsafe/failsafe_private.h | 2 +-\n drivers/net/fm10k/fm10k_ethdev.c | 32 ++---\n drivers/net/hinic/hinic_pmd_ethdev.c | 10 +-\n drivers/net/hns3/hns3_ethdev.c | 57 ++++-----\n drivers/net/hns3/hns3_ethdev_vf.c | 64 +++++-----\n drivers/net/hns3/hns3_rxtx.c | 2 +-\n drivers/net/i40e/i40e_ethdev.c | 53 ++++----\n drivers/net/iavf/iavf_ethdev.c | 42 +++----\n drivers/net/iavf/iavf_vchnl.c | 4 +-\n drivers/net/ice/ice_dcf.c | 10 +-\n drivers/net/ice/ice_dcf_ethdev.c | 21 ++--\n drivers/net/ice/ice_ethdev.c | 49 ++++----\n drivers/net/igc/igc_ethdev.c | 45 ++++---\n drivers/net/ionic/ionic_ethdev.c | 17 +--\n drivers/net/ixgbe/ixgbe_ethdev.c | 66 +++++-----\n drivers/net/memif/memif_socket.c | 108 +++++++++++-----\n drivers/net/memif/memif_socket.h | 4 +-\n drivers/net/memif/rte_eth_memif.c | 56 +++++++--\n drivers/net/memif/rte_eth_memif.h | 2 +-\n drivers/net/mlx4/mlx4.c | 19 ++-\n drivers/net/mlx4/mlx4.h | 2 +-\n drivers/net/mlx4/mlx4_intr.c | 47 ++++---\n drivers/net/mlx5/linux/mlx5_os.c | 55 +++++---\n drivers/net/mlx5/linux/mlx5_socket.c | 25 ++--\n drivers/net/mlx5/mlx5.h | 6 +-\n drivers/net/mlx5/mlx5_rxq.c | 43 ++++---\n drivers/net/mlx5/mlx5_trigger.c | 4 +-\n drivers/net/mlx5/mlx5_txpp.c | 25 ++--\n drivers/net/netvsc/hn_ethdev.c | 4 +-\n drivers/net/nfp/nfp_common.c | 34 ++---\n drivers/net/nfp/nfp_ethdev.c | 13 +-\n drivers/net/nfp/nfp_ethdev_vf.c | 13 +-\n drivers/net/ngbe/ngbe_ethdev.c | 29 ++---\n drivers/net/octeontx2/otx2_ethdev_irq.c | 35 +++---\n drivers/net/qede/qede_ethdev.c | 16 +--\n drivers/net/sfc/sfc_intr.c | 30 ++---\n drivers/net/tap/rte_eth_tap.c | 33 +++--\n drivers/net/tap/rte_eth_tap.h | 2 +-\n drivers/net/tap/tap_intr.c | 33 ++---\n drivers/net/thunderx/nicvf_ethdev.c | 10 ++\n drivers/net/thunderx/nicvf_struct.h | 2 +-\n drivers/net/txgbe/txgbe_ethdev.c | 38 +++---\n drivers/net/txgbe/txgbe_ethdev_vf.c | 33 +++--\n drivers/net/vhost/rte_eth_vhost.c | 80 ++++++------\n drivers/net/virtio/virtio_ethdev.c | 21 ++--\n .../net/virtio/virtio_user/virtio_user_dev.c | 56 +++++----\n drivers/net/vmxnet3/vmxnet3_ethdev.c | 43 ++++---\n drivers/raw/ifpga/ifpga_rawdev.c | 62 +++++++---\n drivers/raw/ntb/ntb.c | 9 +-\n .../regex/octeontx2/otx2_regexdev_hw_access.c | 4 +-\n drivers/vdpa/ifc/ifcvf_vdpa.c | 5 +-\n drivers/vdpa/mlx5/mlx5_vdpa.c | 8 ++\n drivers/vdpa/mlx5/mlx5_vdpa.h | 4 +-\n drivers/vdpa/mlx5/mlx5_vdpa_event.c | 21 ++--\n drivers/vdpa/mlx5/mlx5_vdpa_virtq.c | 44 ++++---\n lib/ethdev/ethdev_pci.h | 2 +-\n 111 files changed, 1673 insertions(+), 1183 deletions(-)", "diff": "diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c\nindex 05fe6f8b6f..1c6080f2f8 100644\n--- a/drivers/baseband/acc100/rte_acc100_pmd.c\n+++ b/drivers/baseband/acc100/rte_acc100_pmd.c\n@@ -720,8 +720,8 @@ acc100_intr_enable(struct rte_bbdev *dev)\n \tstruct acc100_device *d = dev->data->dev_private;\n \n \t/* Only MSI are currently supported */\n-\tif (dev->intr_handle->type == RTE_INTR_HANDLE_VFIO_MSI ||\n-\t\t\tdev->intr_handle->type == RTE_INTR_HANDLE_UIO) {\n+\tif (rte_intr_type_get(dev->intr_handle) == RTE_INTR_HANDLE_VFIO_MSI ||\n+\t\t\trte_intr_type_get(dev->intr_handle) == RTE_INTR_HANDLE_UIO) {\n \n \t\tret = allocate_info_ring(dev);\n \t\tif (ret < 0) {\n@@ -1098,8 +1098,8 @@ acc100_queue_intr_enable(struct rte_bbdev *dev, uint16_t queue_id)\n {\n \tstruct acc100_queue *q = dev->data->queues[queue_id].queue_private;\n \n-\tif (dev->intr_handle->type != RTE_INTR_HANDLE_VFIO_MSI &&\n-\t\t\tdev->intr_handle->type != RTE_INTR_HANDLE_UIO)\n+\tif (rte_intr_type_get(dev->intr_handle) != RTE_INTR_HANDLE_VFIO_MSI &&\n+\t\t\trte_intr_type_get(dev->intr_handle) != RTE_INTR_HANDLE_UIO)\n \t\treturn -ENOTSUP;\n \n \tq->irq_enable = 1;\n@@ -1111,8 +1111,8 @@ acc100_queue_intr_disable(struct rte_bbdev *dev, uint16_t queue_id)\n {\n \tstruct acc100_queue *q = dev->data->queues[queue_id].queue_private;\n \n-\tif (dev->intr_handle->type != RTE_INTR_HANDLE_VFIO_MSI &&\n-\t\t\tdev->intr_handle->type != RTE_INTR_HANDLE_UIO)\n+\tif (rte_intr_type_get(dev->intr_handle) != RTE_INTR_HANDLE_VFIO_MSI &&\n+\t\t\trte_intr_type_get(dev->intr_handle) != RTE_INTR_HANDLE_UIO)\n \t\treturn -ENOTSUP;\n \n \tq->irq_enable = 0;\n@@ -4185,7 +4185,7 @@ static int acc100_pci_probe(struct rte_pci_driver *pci_drv,\n \n \t/* Fill HW specific part of device structure */\n \tbbdev->device = &pci_dev->device;\n-\tbbdev->intr_handle = &pci_dev->intr_handle;\n+\tbbdev->intr_handle = pci_dev->intr_handle;\n \tbbdev->data->socket_id = pci_dev->device.numa_node;\n \n \t/* Invoke ACC100 device initialization function */\ndiff --git a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c\nindex ee457f3071..15d23d6269 100644\n--- a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c\n+++ b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c\n@@ -743,17 +743,17 @@ fpga_intr_enable(struct rte_bbdev *dev)\n \t * It ensures that callback function assigned to that descriptor will\n \t * invoked when any FPGA queue issues interrupt.\n \t */\n-\tfor (i = 0; i < FPGA_NUM_INTR_VEC; ++i)\n-\t\tdev->intr_handle->efds[i] = dev->intr_handle->fd;\n-\n-\tif (!dev->intr_handle->intr_vec) {\n-\t\tdev->intr_handle->intr_vec = rte_zmalloc(\"intr_vec\",\n-\t\t\t\tdev->data->num_queues * sizeof(int), 0);\n-\t\tif (!dev->intr_handle->intr_vec) {\n-\t\t\trte_bbdev_log(ERR, \"Failed to allocate %u vectors\",\n-\t\t\t\t\tdev->data->num_queues);\n-\t\t\treturn -ENOMEM;\n-\t\t}\n+\tfor (i = 0; i < FPGA_NUM_INTR_VEC; ++i) {\n+\t\tif (rte_intr_efds_index_set(dev->intr_handle, i,\n+\t\t\t\trte_intr_fd_get(dev->intr_handle)))\n+\t\t\treturn -rte_errno;\n+\t}\n+\n+\tif (rte_intr_vec_list_alloc(dev->intr_handle, \"intr_vec\",\n+\t\t\tdev->data->num_queues)) {\n+\t\trte_bbdev_log(ERR, \"Failed to allocate %u vectors\",\n+\t\t\t\tdev->data->num_queues);\n+\t\treturn -ENOMEM;\n \t}\n \n \tret = rte_intr_enable(dev->intr_handle);\n@@ -1880,7 +1880,7 @@ fpga_5gnr_fec_probe(struct rte_pci_driver *pci_drv,\n \n \t/* Fill HW specific part of device structure */\n \tbbdev->device = &pci_dev->device;\n-\tbbdev->intr_handle = &pci_dev->intr_handle;\n+\tbbdev->intr_handle = pci_dev->intr_handle;\n \tbbdev->data->socket_id = pci_dev->device.numa_node;\n \n \t/* Invoke FEC FPGA device initialization function */\ndiff --git a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c\nindex 703bb611a0..92decc3e05 100644\n--- a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c\n+++ b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c\n@@ -1014,17 +1014,17 @@ fpga_intr_enable(struct rte_bbdev *dev)\n \t * It ensures that callback function assigned to that descriptor will\n \t * invoked when any FPGA queue issues interrupt.\n \t */\n-\tfor (i = 0; i < FPGA_NUM_INTR_VEC; ++i)\n-\t\tdev->intr_handle->efds[i] = dev->intr_handle->fd;\n-\n-\tif (!dev->intr_handle->intr_vec) {\n-\t\tdev->intr_handle->intr_vec = rte_zmalloc(\"intr_vec\",\n-\t\t\t\tdev->data->num_queues * sizeof(int), 0);\n-\t\tif (!dev->intr_handle->intr_vec) {\n-\t\t\trte_bbdev_log(ERR, \"Failed to allocate %u vectors\",\n-\t\t\t\t\tdev->data->num_queues);\n-\t\t\treturn -ENOMEM;\n-\t\t}\n+\tfor (i = 0; i < FPGA_NUM_INTR_VEC; ++i) {\n+\t\tif (rte_intr_efds_index_set(dev->intr_handle, i,\n+\t\t\t\trte_intr_fd_get(dev->intr_handle)))\n+\t\t\treturn -rte_errno;\n+\t}\n+\n+\tif (rte_intr_vec_list_alloc(dev->intr_handle, \"intr_vec\",\n+\t\t\tdev->data->num_queues)) {\n+\t\trte_bbdev_log(ERR, \"Failed to allocate %u vectors\",\n+\t\t\t\tdev->data->num_queues);\n+\t\treturn -ENOMEM;\n \t}\n \n \tret = rte_intr_enable(dev->intr_handle);\n@@ -2370,7 +2370,7 @@ fpga_lte_fec_probe(struct rte_pci_driver *pci_drv,\n \n \t/* Fill HW specific part of device structure */\n \tbbdev->device = &pci_dev->device;\n-\tbbdev->intr_handle = &pci_dev->intr_handle;\n+\tbbdev->intr_handle = pci_dev->intr_handle;\n \tbbdev->data->socket_id = pci_dev->device.numa_node;\n \n \t/* Invoke FEC FPGA device initialization function */\ndiff --git a/drivers/bus/auxiliary/auxiliary_common.c b/drivers/bus/auxiliary/auxiliary_common.c\nindex 603b6fdc02..2cf8fe672d 100644\n--- a/drivers/bus/auxiliary/auxiliary_common.c\n+++ b/drivers/bus/auxiliary/auxiliary_common.c\n@@ -121,15 +121,27 @@ rte_auxiliary_probe_one_driver(struct rte_auxiliary_driver *drv,\n \t\treturn -EINVAL;\n \t}\n \n+\t/* Allocate interrupt instance */\n+\tdev->intr_handle =\n+\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);\n+\tif (dev->intr_handle == NULL) {\n+\t\tAUXILIARY_LOG(ERR, \"Could not allocate interrupt instance for device %s\",\n+\t\t\tdev->name);\n+\t\treturn -ENOMEM;\n+\t}\n+\n \tdev->driver = drv;\n \n \tAUXILIARY_LOG(INFO, \"Probe auxiliary driver: %s device: %s (NUMA node %i)\",\n \t\t drv->driver.name, dev->name, dev->device.numa_node);\n \tret = drv->probe(drv, dev);\n-\tif (ret != 0)\n+\tif (ret != 0) {\n \t\tdev->driver = NULL;\n-\telse\n+\t\trte_intr_instance_free(dev->intr_handle);\n+\t\tdev->intr_handle = NULL;\n+\t} else {\n \t\tdev->device.driver = &drv->driver;\n+\t}\n \n \treturn ret;\n }\n@@ -320,6 +332,7 @@ auxiliary_unplug(struct rte_device *dev)\n \tif (ret == 0) {\n \t\trte_auxiliary_remove_device(adev);\n \t\trte_devargs_remove(dev->devargs);\n+\t\trte_intr_instance_free(adev->intr_handle);\n \t\tfree(adev);\n \t}\n \treturn ret;\ndiff --git a/drivers/bus/auxiliary/rte_bus_auxiliary.h b/drivers/bus/auxiliary/rte_bus_auxiliary.h\nindex b1f5610404..93b266daf7 100644\n--- a/drivers/bus/auxiliary/rte_bus_auxiliary.h\n+++ b/drivers/bus/auxiliary/rte_bus_auxiliary.h\n@@ -115,7 +115,7 @@ struct rte_auxiliary_device {\n \tRTE_TAILQ_ENTRY(rte_auxiliary_device) next; /**< Next probed device. */\n \tstruct rte_device device; /**< Inherit core device */\n \tchar name[RTE_DEV_NAME_MAX_LEN + 1]; /**< ASCII device name */\n-\tstruct rte_intr_handle intr_handle; /**< Interrupt handle */\n+\tstruct rte_intr_handle *intr_handle; /**< Interrupt handle */\n \tstruct rte_auxiliary_driver *driver; /**< Device driver */\n };\n \ndiff --git a/drivers/bus/dpaa/dpaa_bus.c b/drivers/bus/dpaa/dpaa_bus.c\nindex 6cab2ae760..9a53fdc1fb 100644\n--- a/drivers/bus/dpaa/dpaa_bus.c\n+++ b/drivers/bus/dpaa/dpaa_bus.c\n@@ -172,6 +172,15 @@ dpaa_create_device_list(void)\n \n \t\tdev->device.bus = &rte_dpaa_bus.bus;\n \n+\t\t/* Allocate interrupt handle instance */\n+\t\tdev->intr_handle =\n+\t\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);\n+\t\tif (dev->intr_handle == NULL) {\n+\t\t\tDPAA_BUS_LOG(ERR, \"Failed to allocate intr handle\");\n+\t\t\tret = -ENOMEM;\n+\t\t\tgoto cleanup;\n+\t\t}\n+\n \t\tcfg = &dpaa_netcfg->port_cfg[i];\n \t\tfman_intf = cfg->fman_if;\n \n@@ -214,6 +223,15 @@ dpaa_create_device_list(void)\n \t\t\tgoto cleanup;\n \t\t}\n \n+\t\t/* Allocate interrupt handle instance */\n+\t\tdev->intr_handle =\n+\t\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);\n+\t\tif (dev->intr_handle == NULL) {\n+\t\t\tDPAA_BUS_LOG(ERR, \"Failed to allocate intr handle\");\n+\t\t\tret = -ENOMEM;\n+\t\t\tgoto cleanup;\n+\t\t}\n+\n \t\tdev->device_type = FSL_DPAA_CRYPTO;\n \t\tdev->id.dev_id = rte_dpaa_bus.device_count + i;\n \n@@ -247,6 +265,7 @@ dpaa_clean_device_list(void)\n \n \tRTE_TAILQ_FOREACH_SAFE(dev, &rte_dpaa_bus.device_list, next, tdev) {\n \t\tTAILQ_REMOVE(&rte_dpaa_bus.device_list, dev, next);\n+\t\trte_intr_instance_free(dev->intr_handle);\n \t\tfree(dev);\n \t\tdev = NULL;\n \t}\n@@ -559,8 +578,11 @@ static int rte_dpaa_setup_intr(struct rte_intr_handle *intr_handle)\n \t\treturn errno;\n \t}\n \n-\tintr_handle->fd = fd;\n-\tintr_handle->type = RTE_INTR_HANDLE_EXT;\n+\tif (rte_intr_fd_set(intr_handle, fd))\n+\t\treturn rte_errno;\n+\n+\tif (rte_intr_type_set(intr_handle, RTE_INTR_HANDLE_EXT))\n+\t\treturn rte_errno;\n \n \treturn 0;\n }\n@@ -612,7 +634,7 @@ rte_dpaa_bus_probe(void)\n \n \tTAILQ_FOREACH(dev, &rte_dpaa_bus.device_list, next) {\n \t\tif (dev->device_type == FSL_DPAA_ETH) {\n-\t\t\tret = rte_dpaa_setup_intr(&dev->intr_handle);\n+\t\t\tret = rte_dpaa_setup_intr(dev->intr_handle);\n \t\t\tif (ret)\n \t\t\t\tDPAA_BUS_ERR(\"Error setting up interrupt.\\n\");\n \t\t}\ndiff --git a/drivers/bus/dpaa/rte_dpaa_bus.h b/drivers/bus/dpaa/rte_dpaa_bus.h\nindex ecc66387f6..97d189f9b0 100644\n--- a/drivers/bus/dpaa/rte_dpaa_bus.h\n+++ b/drivers/bus/dpaa/rte_dpaa_bus.h\n@@ -98,7 +98,7 @@ struct rte_dpaa_device {\n \t};\n \tstruct rte_dpaa_driver *driver;\n \tstruct dpaa_device_id id;\n-\tstruct rte_intr_handle intr_handle;\n+\tstruct rte_intr_handle *intr_handle;\n \tenum rte_dpaa_type device_type; /**< Ethernet or crypto type device */\n \tchar name[RTE_ETH_NAME_MAX_LEN];\n };\ndiff --git a/drivers/bus/fslmc/fslmc_bus.c b/drivers/bus/fslmc/fslmc_bus.c\nindex 8c8f8a298d..ac3cb4aa5a 100644\n--- a/drivers/bus/fslmc/fslmc_bus.c\n+++ b/drivers/bus/fslmc/fslmc_bus.c\n@@ -47,6 +47,7 @@ cleanup_fslmc_device_list(void)\n \n \tRTE_TAILQ_FOREACH_SAFE(dev, &rte_fslmc_bus.device_list, next, t_dev) {\n \t\tTAILQ_REMOVE(&rte_fslmc_bus.device_list, dev, next);\n+\t\trte_intr_instance_free(dev->intr_handle);\n \t\tfree(dev);\n \t\tdev = NULL;\n \t}\n@@ -160,6 +161,15 @@ scan_one_fslmc_device(char *dev_name)\n \n \tdev->device.bus = &rte_fslmc_bus.bus;\n \n+\t/* Allocate interrupt instance */\n+\tdev->intr_handle =\n+\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);\n+\tif (dev->intr_handle == NULL) {\n+\t\tDPAA2_BUS_ERR(\"Failed to allocate intr handle\");\n+\t\tret = -ENOMEM;\n+\t\tgoto cleanup;\n+\t}\n+\n \t/* Parse the device name and ID */\n \tt_ptr = strtok(dup_dev_name, \".\");\n \tif (!t_ptr) {\n@@ -220,8 +230,10 @@ scan_one_fslmc_device(char *dev_name)\n cleanup:\n \tif (dup_dev_name)\n \t\tfree(dup_dev_name);\n-\tif (dev)\n+\tif (dev) {\n+\t\trte_intr_instance_free(dev->intr_handle);\n \t\tfree(dev);\n+\t}\n \treturn ret;\n }\n \ndiff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c\nindex 852fcfc4dd..b4704eeae4 100644\n--- a/drivers/bus/fslmc/fslmc_vfio.c\n+++ b/drivers/bus/fslmc/fslmc_vfio.c\n@@ -599,7 +599,7 @@ int rte_dpaa2_intr_enable(struct rte_intr_handle *intr_handle, int index)\n \tint len, ret;\n \tchar irq_set_buf[IRQ_SET_BUF_LEN];\n \tstruct vfio_irq_set *irq_set;\n-\tint *fd_ptr;\n+\tint *fd_ptr, vfio_dev_fd;\n \n \tlen = sizeof(irq_set_buf);\n \n@@ -611,12 +611,14 @@ int rte_dpaa2_intr_enable(struct rte_intr_handle *intr_handle, int index)\n \tirq_set->index = index;\n \tirq_set->start = 0;\n \tfd_ptr = (int *)&irq_set->data;\n-\t*fd_ptr = intr_handle->fd;\n+\t*fd_ptr = rte_intr_fd_get(intr_handle);\n \n-\tret = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n+\tvfio_dev_fd = rte_intr_dev_fd_get(intr_handle);\n+\tret = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n \tif (ret) {\n \t\tDPAA2_BUS_ERR(\"Error:dpaa2 SET IRQs fd=%d, err = %d(%s)\",\n-\t\t\t intr_handle->fd, errno, strerror(errno));\n+\t\t\t rte_intr_fd_get(intr_handle), errno,\n+\t\t\t strerror(errno));\n \t\treturn ret;\n \t}\n \n@@ -627,7 +629,7 @@ int rte_dpaa2_intr_disable(struct rte_intr_handle *intr_handle, int index)\n {\n \tstruct vfio_irq_set *irq_set;\n \tchar irq_set_buf[IRQ_SET_BUF_LEN];\n-\tint len, ret;\n+\tint len, ret, vfio_dev_fd;\n \n \tlen = sizeof(struct vfio_irq_set);\n \n@@ -638,11 +640,12 @@ int rte_dpaa2_intr_disable(struct rte_intr_handle *intr_handle, int index)\n \tirq_set->start = 0;\n \tirq_set->count = 0;\n \n-\tret = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n+\tvfio_dev_fd = rte_intr_dev_fd_get(intr_handle);\n+\tret = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n \tif (ret)\n \t\tDPAA2_BUS_ERR(\n \t\t\t\"Error disabling dpaa2 interrupts for fd %d\",\n-\t\t\tintr_handle->fd);\n+\t\t\trte_intr_fd_get(intr_handle));\n \n \treturn ret;\n }\n@@ -684,9 +687,14 @@ rte_dpaa2_vfio_setup_intr(struct rte_intr_handle *intr_handle,\n \t\t\treturn -1;\n \t\t}\n \n-\t\tintr_handle->fd = fd;\n-\t\tintr_handle->type = RTE_INTR_HANDLE_VFIO_MSI;\n-\t\tintr_handle->vfio_dev_fd = vfio_dev_fd;\n+\t\tif (rte_intr_fd_set(intr_handle, fd))\n+\t\t\treturn -rte_errno;\n+\n+\t\tif (rte_intr_type_set(intr_handle, RTE_INTR_HANDLE_VFIO_MSI))\n+\t\t\treturn -rte_errno;\n+\n+\t\tif (rte_intr_dev_fd_set(intr_handle, vfio_dev_fd))\n+\t\t\treturn -rte_errno;\n \n \t\treturn 0;\n \t}\n@@ -711,7 +719,7 @@ fslmc_process_iodevices(struct rte_dpaa2_device *dev)\n \n \tswitch (dev->dev_type) {\n \tcase DPAA2_ETH:\n-\t\trte_dpaa2_vfio_setup_intr(&dev->intr_handle, dev_fd,\n+\t\trte_dpaa2_vfio_setup_intr(dev->intr_handle, dev_fd,\n \t\t\t\t\t device_info.num_irqs);\n \t\tbreak;\n \tcase DPAA2_CON:\ndiff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c\nindex 1a1e437ed1..2210a0fa4a 100644\n--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c\n+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c\n@@ -176,7 +176,7 @@ static int dpaa2_dpio_intr_init(struct dpaa2_dpio_dev *dpio_dev)\n \tint threshold = 0x3, timeout = 0xFF;\n \n \tdpio_epoll_fd = epoll_create(1);\n-\tret = rte_dpaa2_intr_enable(&dpio_dev->intr_handle, 0);\n+\tret = rte_dpaa2_intr_enable(dpio_dev->intr_handle, 0);\n \tif (ret) {\n \t\tDPAA2_BUS_ERR(\"Interrupt registeration failed\");\n \t\treturn -1;\n@@ -195,7 +195,7 @@ static int dpaa2_dpio_intr_init(struct dpaa2_dpio_dev *dpio_dev)\n \tqbman_swp_dqrr_thrshld_write(dpio_dev->sw_portal, threshold);\n \tqbman_swp_intr_timeout_write(dpio_dev->sw_portal, timeout);\n \n-\teventfd = dpio_dev->intr_handle.fd;\n+\teventfd = rte_intr_fd_get(dpio_dev->intr_handle);\n \tepoll_ev.events = EPOLLIN | EPOLLPRI | EPOLLET;\n \tepoll_ev.data.fd = eventfd;\n \n@@ -213,7 +213,7 @@ static void dpaa2_dpio_intr_deinit(struct dpaa2_dpio_dev *dpio_dev)\n {\n \tint ret;\n \n-\tret = rte_dpaa2_intr_disable(&dpio_dev->intr_handle, 0);\n+\tret = rte_dpaa2_intr_disable(dpio_dev->intr_handle, 0);\n \tif (ret)\n \t\tDPAA2_BUS_ERR(\"DPIO interrupt disable failed\");\n \n@@ -388,6 +388,14 @@ dpaa2_create_dpio_device(int vdev_fd,\n \t/* Using single portal for all devices */\n \tdpio_dev->mc_portal = dpaa2_get_mcp_ptr(MC_PORTAL_INDEX);\n \n+\t/* Allocate interrupt instance */\n+\tdpio_dev->intr_handle =\n+\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);\n+\tif (!dpio_dev->intr_handle) {\n+\t\tDPAA2_BUS_ERR(\"Failed to allocate intr handle\");\n+\t\tgoto err;\n+\t}\n+\n \tdpio_dev->dpio = rte_zmalloc(NULL, sizeof(struct fsl_mc_io),\n \t\t\t\t RTE_CACHE_LINE_SIZE);\n \tif (!dpio_dev->dpio) {\n@@ -490,7 +498,7 @@ dpaa2_create_dpio_device(int vdev_fd,\n \tio_space_count++;\n \tdpio_dev->index = io_space_count;\n \n-\tif (rte_dpaa2_vfio_setup_intr(&dpio_dev->intr_handle, vdev_fd, 1)) {\n+\tif (rte_dpaa2_vfio_setup_intr(dpio_dev->intr_handle, vdev_fd, 1)) {\n \t\tDPAA2_BUS_ERR(\"Fail to setup interrupt for %d\",\n \t\t\t dpio_dev->hw_id);\n \t\tgoto err;\n@@ -538,6 +546,7 @@ dpaa2_create_dpio_device(int vdev_fd,\n \t\trte_free(dpio_dev->dpio);\n \t}\n \n+\trte_intr_instance_free(dpio_dev->intr_handle);\n \trte_free(dpio_dev);\n \n \t/* For each element in the list, cleanup */\n@@ -549,6 +558,7 @@ dpaa2_create_dpio_device(int vdev_fd,\n \t\t\t\tdpio_dev->token);\n \t\t\trte_free(dpio_dev->dpio);\n \t\t}\n+\t\trte_intr_instance_free(dpio_dev->intr_handle);\n \t\trte_free(dpio_dev);\n \t}\n \ndiff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h\nindex 037c841ef5..b1bba1ac36 100644\n--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h\n+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h\n@@ -116,7 +116,7 @@ struct dpaa2_dpio_dev {\n \tuintptr_t qbman_portal_ci_paddr;\n \t\t/**< Physical address of Cache Inhibit Area */\n \tuintptr_t ci_size; /**< Size of the CI region */\n-\tstruct rte_intr_handle intr_handle; /* Interrupt related info */\n+\tstruct rte_intr_handle *intr_handle; /* Interrupt related info */\n \tint32_t\tepoll_fd; /**< File descriptor created for interrupt polling */\n \tint32_t hw_id; /**< An unique ID of this DPIO device instance */\n \tstruct dpaa2_portal_dqrr dpaa2_held_bufs;\ndiff --git a/drivers/bus/fslmc/rte_fslmc.h b/drivers/bus/fslmc/rte_fslmc.h\nindex a71cac7a9f..729f360646 100644\n--- a/drivers/bus/fslmc/rte_fslmc.h\n+++ b/drivers/bus/fslmc/rte_fslmc.h\n@@ -122,7 +122,7 @@ struct rte_dpaa2_device {\n \t};\n \tenum rte_dpaa2_dev_type dev_type; /**< Device Type */\n \tuint16_t object_id; /**< DPAA2 Object ID */\n-\tstruct rte_intr_handle intr_handle; /**< Interrupt handle */\n+\tstruct rte_intr_handle *intr_handle; /**< Interrupt handle */\n \tstruct rte_dpaa2_driver *driver; /**< Associated driver */\n \tchar name[FSLMC_OBJECT_MAX_LEN]; /**< DPAA2 Object name*/\n };\ndiff --git a/drivers/bus/ifpga/ifpga_bus.c b/drivers/bus/ifpga/ifpga_bus.c\nindex 62887da2d8..cbc6809284 100644\n--- a/drivers/bus/ifpga/ifpga_bus.c\n+++ b/drivers/bus/ifpga/ifpga_bus.c\n@@ -161,6 +161,14 @@ ifpga_scan_one(struct rte_rawdev *rawdev,\n \tafu_dev->id.uuid.uuid_high = 0;\n \tafu_dev->id.port = afu_pr_conf.afu_id.port;\n \n+\t/* Allocate interrupt instance */\n+\tafu_dev->intr_handle =\n+\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);\n+\tif (afu_dev->intr_handle == NULL) {\n+\t\tIFPGA_BUS_ERR(\"Failed to allocate intr handle\");\n+\t\tgoto end;\n+\t}\n+\n \tif (rawdev->dev_ops && rawdev->dev_ops->dev_info_get)\n \t\trawdev->dev_ops->dev_info_get(rawdev, afu_dev, sizeof(*afu_dev));\n \n@@ -189,8 +197,10 @@ ifpga_scan_one(struct rte_rawdev *rawdev,\n \t\trte_kvargs_free(kvlist);\n \tif (path)\n \t\tfree(path);\n-\tif (afu_dev)\n+\tif (afu_dev) {\n+\t\trte_intr_instance_free(afu_dev->intr_handle);\n \t\tfree(afu_dev);\n+\t}\n \n \treturn NULL;\n }\n@@ -396,6 +406,7 @@ ifpga_unplug(struct rte_device *dev)\n \tTAILQ_REMOVE(&ifpga_afu_dev_list, afu_dev, next);\n \n \trte_devargs_remove(dev->devargs);\n+\trte_intr_instance_free(afu_dev->intr_handle);\n \tfree(afu_dev);\n \treturn 0;\n \ndiff --git a/drivers/bus/ifpga/rte_bus_ifpga.h b/drivers/bus/ifpga/rte_bus_ifpga.h\nindex a85e90d384..007ad19875 100644\n--- a/drivers/bus/ifpga/rte_bus_ifpga.h\n+++ b/drivers/bus/ifpga/rte_bus_ifpga.h\n@@ -79,7 +79,7 @@ struct rte_afu_device {\n \tstruct rte_mem_resource mem_resource[PCI_MAX_RESOURCE];\n \t\t\t\t\t\t/**< AFU Memory Resource */\n \tstruct rte_afu_shared shared;\n-\tstruct rte_intr_handle intr_handle; /**< Interrupt handle */\n+\tstruct rte_intr_handle *intr_handle; /**< Interrupt handle */\n \tstruct rte_afu_driver *driver; /**< Associated driver */\n \tchar path[IFPGA_BUS_BITSTREAM_PATH_MAX_LEN];\n } __rte_packed;\ndiff --git a/drivers/bus/pci/bsd/pci.c b/drivers/bus/pci/bsd/pci.c\nindex d189bff311..9a11f99ae3 100644\n--- a/drivers/bus/pci/bsd/pci.c\n+++ b/drivers/bus/pci/bsd/pci.c\n@@ -95,10 +95,10 @@ pci_uio_free_resource(struct rte_pci_device *dev,\n {\n \trte_free(uio_res);\n \n-\tif (dev->intr_handle.fd) {\n-\t\tclose(dev->intr_handle.fd);\n-\t\tdev->intr_handle.fd = -1;\n-\t\tdev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;\n+\tif (rte_intr_fd_get(dev->intr_handle)) {\n+\t\tclose(rte_intr_fd_get(dev->intr_handle));\n+\t\trte_intr_fd_set(dev->intr_handle, -1);\n+\t\trte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UNKNOWN);\n \t}\n }\n \n@@ -121,13 +121,19 @@ pci_uio_alloc_resource(struct rte_pci_device *dev,\n \t}\n \n \t/* save fd if in primary process */\n-\tdev->intr_handle.fd = open(devname, O_RDWR);\n-\tif (dev->intr_handle.fd < 0) {\n+\tif (rte_intr_fd_set(dev->intr_handle, open(devname, O_RDWR))) {\n+\t\tRTE_LOG(WARNING, EAL, \"Failed to save fd\");\n+\t\tgoto error;\n+\t}\n+\n+\tif (rte_intr_fd_get(dev->intr_handle) < 0) {\n \t\tRTE_LOG(ERR, EAL, \"Cannot open %s: %s\\n\",\n \t\t\tdevname, strerror(errno));\n \t\tgoto error;\n \t}\n-\tdev->intr_handle.type = RTE_INTR_HANDLE_UIO;\n+\n+\tif (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UIO))\n+\t\tgoto error;\n \n \t/* allocate the mapping details for secondary processes*/\n \t*uio_res = rte_zmalloc(\"UIO_RES\", sizeof(**uio_res), 0);\ndiff --git a/drivers/bus/pci/linux/pci.c b/drivers/bus/pci/linux/pci.c\nindex 4d261b55ee..e521459870 100644\n--- a/drivers/bus/pci/linux/pci.c\n+++ b/drivers/bus/pci/linux/pci.c\n@@ -645,7 +645,7 @@ int rte_pci_read_config(const struct rte_pci_device *device,\n \t\tvoid *buf, size_t len, off_t offset)\n {\n \tchar devname[RTE_DEV_NAME_MAX_LEN] = \"\";\n-\tconst struct rte_intr_handle *intr_handle = &device->intr_handle;\n+\tconst struct rte_intr_handle *intr_handle = device->intr_handle;\n \n \tswitch (device->kdrv) {\n \tcase RTE_PCI_KDRV_IGB_UIO:\n@@ -669,7 +669,7 @@ int rte_pci_write_config(const struct rte_pci_device *device,\n \t\tconst void *buf, size_t len, off_t offset)\n {\n \tchar devname[RTE_DEV_NAME_MAX_LEN] = \"\";\n-\tconst struct rte_intr_handle *intr_handle = &device->intr_handle;\n+\tconst struct rte_intr_handle *intr_handle = device->intr_handle;\n \n \tswitch (device->kdrv) {\n \tcase RTE_PCI_KDRV_IGB_UIO:\ndiff --git a/drivers/bus/pci/linux/pci_uio.c b/drivers/bus/pci/linux/pci_uio.c\nindex 39ebeac2a0..2ee5d04672 100644\n--- a/drivers/bus/pci/linux/pci_uio.c\n+++ b/drivers/bus/pci/linux/pci_uio.c\n@@ -35,14 +35,18 @@ int\n pci_uio_read_config(const struct rte_intr_handle *intr_handle,\n \t\t void *buf, size_t len, off_t offset)\n {\n-\treturn pread(intr_handle->uio_cfg_fd, buf, len, offset);\n+\tint uio_cfg_fd = rte_intr_dev_fd_get(intr_handle);\n+\n+\treturn pread(uio_cfg_fd, buf, len, offset);\n }\n \n int\n pci_uio_write_config(const struct rte_intr_handle *intr_handle,\n \t\t const void *buf, size_t len, off_t offset)\n {\n-\treturn pwrite(intr_handle->uio_cfg_fd, buf, len, offset);\n+\tint uio_cfg_fd = rte_intr_dev_fd_get(intr_handle);\n+\n+\treturn pwrite(uio_cfg_fd, buf, len, offset);\n }\n \n static int\n@@ -198,16 +202,19 @@ void\n pci_uio_free_resource(struct rte_pci_device *dev,\n \t\tstruct mapped_pci_resource *uio_res)\n {\n+\tint uio_cfg_fd = rte_intr_dev_fd_get(dev->intr_handle);\n+\n \trte_free(uio_res);\n \n-\tif (dev->intr_handle.uio_cfg_fd >= 0) {\n-\t\tclose(dev->intr_handle.uio_cfg_fd);\n-\t\tdev->intr_handle.uio_cfg_fd = -1;\n+\tif (uio_cfg_fd >= 0) {\n+\t\tclose(uio_cfg_fd);\n+\t\trte_intr_dev_fd_set(dev->intr_handle, -1);\n \t}\n-\tif (dev->intr_handle.fd >= 0) {\n-\t\tclose(dev->intr_handle.fd);\n-\t\tdev->intr_handle.fd = -1;\n-\t\tdev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;\n+\n+\tif (rte_intr_fd_get(dev->intr_handle) >= 0) {\n+\t\tclose(rte_intr_fd_get(dev->intr_handle));\n+\t\trte_intr_fd_set(dev->intr_handle, -1);\n+\t\trte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UNKNOWN);\n \t}\n }\n \n@@ -218,7 +225,7 @@ pci_uio_alloc_resource(struct rte_pci_device *dev,\n \tchar dirname[PATH_MAX];\n \tchar cfgname[PATH_MAX];\n \tchar devname[PATH_MAX]; /* contains the /dev/uioX */\n-\tint uio_num;\n+\tint uio_num, fd, uio_cfg_fd;\n \tstruct rte_pci_addr *loc;\n \n \tloc = &dev->addr;\n@@ -233,29 +240,38 @@ pci_uio_alloc_resource(struct rte_pci_device *dev,\n \tsnprintf(devname, sizeof(devname), \"/dev/uio%u\", uio_num);\n \n \t/* save fd if in primary process */\n-\tdev->intr_handle.fd = open(devname, O_RDWR);\n-\tif (dev->intr_handle.fd < 0) {\n+\tfd = open(devname, O_RDWR);\n+\tif (fd < 0) {\n \t\tRTE_LOG(ERR, EAL, \"Cannot open %s: %s\\n\",\n \t\t\tdevname, strerror(errno));\n \t\tgoto error;\n \t}\n \n+\tif (rte_intr_fd_set(dev->intr_handle, fd))\n+\t\tgoto error;\n+\n \tsnprintf(cfgname, sizeof(cfgname),\n \t\t\t\"/sys/class/uio/uio%u/device/config\", uio_num);\n-\tdev->intr_handle.uio_cfg_fd = open(cfgname, O_RDWR);\n-\tif (dev->intr_handle.uio_cfg_fd < 0) {\n+\n+\tuio_cfg_fd = open(cfgname, O_RDWR);\n+\tif (uio_cfg_fd < 0) {\n \t\tRTE_LOG(ERR, EAL, \"Cannot open %s: %s\\n\",\n \t\t\tcfgname, strerror(errno));\n \t\tgoto error;\n \t}\n \n-\tif (dev->kdrv == RTE_PCI_KDRV_IGB_UIO)\n-\t\tdev->intr_handle.type = RTE_INTR_HANDLE_UIO;\n-\telse {\n-\t\tdev->intr_handle.type = RTE_INTR_HANDLE_UIO_INTX;\n+\tif (rte_intr_dev_fd_set(dev->intr_handle, uio_cfg_fd))\n+\t\tgoto error;\n+\n+\tif (dev->kdrv == RTE_PCI_KDRV_IGB_UIO) {\n+\t\tif (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UIO))\n+\t\t\tgoto error;\n+\t} else {\n+\t\tif (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UIO_INTX))\n+\t\t\tgoto error;\n \n \t\t/* set bus master that is not done by uio_pci_generic */\n-\t\tif (pci_uio_set_bus_master(dev->intr_handle.uio_cfg_fd)) {\n+\t\tif (pci_uio_set_bus_master(uio_cfg_fd)) {\n \t\t\tRTE_LOG(ERR, EAL, \"Cannot set up bus mastering!\\n\");\n \t\t\tgoto error;\n \t\t}\n@@ -381,7 +397,7 @@ pci_uio_ioport_map(struct rte_pci_device *dev, int bar,\n \tchar buf[BUFSIZ];\n \tuint64_t phys_addr, end_addr, flags;\n \tunsigned long base;\n-\tint i;\n+\tint i, fd;\n \n \t/* open and read addresses of the corresponding resource in sysfs */\n \tsnprintf(filename, sizeof(filename), \"%s/\" PCI_PRI_FMT \"/resource\",\n@@ -427,7 +443,8 @@ pci_uio_ioport_map(struct rte_pci_device *dev, int bar,\n \t}\n \n \t/* FIXME only for primary process ? */\n-\tif (dev->intr_handle.type == RTE_INTR_HANDLE_UNKNOWN) {\n+\tif (rte_intr_type_get(dev->intr_handle) ==\n+\t\t\t\t\tRTE_INTR_HANDLE_UNKNOWN) {\n \t\tint uio_num = pci_get_uio_dev(dev, dirname, sizeof(dirname), 0);\n \t\tif (uio_num < 0) {\n \t\t\tRTE_LOG(ERR, EAL, \"cannot open %s: %s\\n\",\n@@ -436,13 +453,17 @@ pci_uio_ioport_map(struct rte_pci_device *dev, int bar,\n \t\t}\n \n \t\tsnprintf(filename, sizeof(filename), \"/dev/uio%u\", uio_num);\n-\t\tdev->intr_handle.fd = open(filename, O_RDWR);\n-\t\tif (dev->intr_handle.fd < 0) {\n+\t\tfd = open(filename, O_RDWR);\n+\t\tif (fd < 0) {\n \t\t\tRTE_LOG(ERR, EAL, \"Cannot open %s: %s\\n\",\n \t\t\t\tfilename, strerror(errno));\n \t\t\tgoto error;\n \t\t}\n-\t\tdev->intr_handle.type = RTE_INTR_HANDLE_UIO;\n+\t\tif (rte_intr_fd_set(dev->intr_handle, fd))\n+\t\t\tgoto error;\n+\n+\t\tif (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UIO))\n+\t\t\tgoto error;\n \t}\n \n \tRTE_LOG(DEBUG, EAL, \"PCI Port IO found start=0x%lx\\n\", base);\ndiff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c\nindex a024269140..7b2f8296c5 100644\n--- a/drivers/bus/pci/linux/pci_vfio.c\n+++ b/drivers/bus/pci/linux/pci_vfio.c\n@@ -47,7 +47,9 @@ int\n pci_vfio_read_config(const struct rte_intr_handle *intr_handle,\n \t\t void *buf, size_t len, off_t offs)\n {\n-\treturn pread64(intr_handle->vfio_dev_fd, buf, len,\n+\tint vfio_dev_fd = rte_intr_dev_fd_get(intr_handle);\n+\n+\treturn pread64(vfio_dev_fd, buf, len,\n \t VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);\n }\n \n@@ -55,7 +57,9 @@ int\n pci_vfio_write_config(const struct rte_intr_handle *intr_handle,\n \t\t const void *buf, size_t len, off_t offs)\n {\n-\treturn pwrite64(intr_handle->vfio_dev_fd, buf, len,\n+\tint vfio_dev_fd = rte_intr_dev_fd_get(intr_handle);\n+\n+\treturn pwrite64(vfio_dev_fd, buf, len,\n \t VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);\n }\n \n@@ -281,21 +285,27 @@ pci_vfio_setup_interrupts(struct rte_pci_device *dev, int vfio_dev_fd)\n \t\t\treturn -1;\n \t\t}\n \n-\t\tdev->intr_handle.fd = fd;\n-\t\tdev->intr_handle.vfio_dev_fd = vfio_dev_fd;\n+\t\tif (rte_intr_fd_set(dev->intr_handle, fd))\n+\t\t\treturn -1;\n+\n+\t\tif (rte_intr_dev_fd_set(dev->intr_handle, vfio_dev_fd))\n+\t\t\treturn -1;\n \n \t\tswitch (i) {\n \t\tcase VFIO_PCI_MSIX_IRQ_INDEX:\n \t\t\tintr_mode = RTE_INTR_MODE_MSIX;\n-\t\t\tdev->intr_handle.type = RTE_INTR_HANDLE_VFIO_MSIX;\n+\t\t\trte_intr_type_set(dev->intr_handle,\n+\t\t\t\t\t\t RTE_INTR_HANDLE_VFIO_MSIX);\n \t\t\tbreak;\n \t\tcase VFIO_PCI_MSI_IRQ_INDEX:\n \t\t\tintr_mode = RTE_INTR_MODE_MSI;\n-\t\t\tdev->intr_handle.type = RTE_INTR_HANDLE_VFIO_MSI;\n+\t\t\trte_intr_type_set(dev->intr_handle,\n+\t\t\t\t\t\t RTE_INTR_HANDLE_VFIO_MSI);\n \t\t\tbreak;\n \t\tcase VFIO_PCI_INTX_IRQ_INDEX:\n \t\t\tintr_mode = RTE_INTR_MODE_LEGACY;\n-\t\t\tdev->intr_handle.type = RTE_INTR_HANDLE_VFIO_LEGACY;\n+\t\t\trte_intr_type_set(dev->intr_handle,\n+\t\t\t\t\t\t RTE_INTR_HANDLE_VFIO_LEGACY);\n \t\t\tbreak;\n \t\tdefault:\n \t\t\tRTE_LOG(ERR, EAL, \"Unknown interrupt type!\\n\");\n@@ -362,11 +372,16 @@ pci_vfio_enable_notifier(struct rte_pci_device *dev, int vfio_dev_fd)\n \t\treturn -1;\n \t}\n \n-\tdev->vfio_req_intr_handle.fd = fd;\n-\tdev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_VFIO_REQ;\n-\tdev->vfio_req_intr_handle.vfio_dev_fd = vfio_dev_fd;\n+\tif (rte_intr_fd_set(dev->vfio_req_intr_handle, fd))\n+\t\treturn -1;\n+\n+\tif (rte_intr_type_set(dev->vfio_req_intr_handle, RTE_INTR_HANDLE_VFIO_REQ))\n+\t\treturn -1;\n+\n+\tif (rte_intr_dev_fd_set(dev->vfio_req_intr_handle, vfio_dev_fd))\n+\t\treturn -1;\n \n-\tret = rte_intr_callback_register(&dev->vfio_req_intr_handle,\n+\tret = rte_intr_callback_register(dev->vfio_req_intr_handle,\n \t\t\t\t\t pci_vfio_req_handler,\n \t\t\t\t\t (void *)&dev->device);\n \tif (ret) {\n@@ -374,10 +389,10 @@ pci_vfio_enable_notifier(struct rte_pci_device *dev, int vfio_dev_fd)\n \t\tgoto error;\n \t}\n \n-\tret = rte_intr_enable(&dev->vfio_req_intr_handle);\n+\tret = rte_intr_enable(dev->vfio_req_intr_handle);\n \tif (ret) {\n \t\tRTE_LOG(ERR, EAL, \"Fail to enable req notifier.\\n\");\n-\t\tret = rte_intr_callback_unregister(&dev->vfio_req_intr_handle,\n+\t\tret = rte_intr_callback_unregister(dev->vfio_req_intr_handle,\n \t\t\t\t\t\t pci_vfio_req_handler,\n \t\t\t\t\t\t (void *)&dev->device);\n \t\tif (ret < 0)\n@@ -390,9 +405,9 @@ pci_vfio_enable_notifier(struct rte_pci_device *dev, int vfio_dev_fd)\n error:\n \tclose(fd);\n \n-\tdev->vfio_req_intr_handle.fd = -1;\n-\tdev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;\n-\tdev->vfio_req_intr_handle.vfio_dev_fd = -1;\n+\trte_intr_fd_set(dev->vfio_req_intr_handle, -1);\n+\trte_intr_type_set(dev->vfio_req_intr_handle, RTE_INTR_HANDLE_UNKNOWN);\n+\trte_intr_dev_fd_set(dev->vfio_req_intr_handle, -1);\n \n \treturn -1;\n }\n@@ -403,13 +418,13 @@ pci_vfio_disable_notifier(struct rte_pci_device *dev)\n {\n \tint ret;\n \n-\tret = rte_intr_disable(&dev->vfio_req_intr_handle);\n+\tret = rte_intr_disable(dev->vfio_req_intr_handle);\n \tif (ret) {\n \t\tRTE_LOG(ERR, EAL, \"fail to disable req notifier.\\n\");\n \t\treturn -1;\n \t}\n \n-\tret = rte_intr_callback_unregister_sync(&dev->vfio_req_intr_handle,\n+\tret = rte_intr_callback_unregister_sync(dev->vfio_req_intr_handle,\n \t\t\t\t\t pci_vfio_req_handler,\n \t\t\t\t\t (void *)&dev->device);\n \tif (ret < 0) {\n@@ -418,11 +433,11 @@ pci_vfio_disable_notifier(struct rte_pci_device *dev)\n \t\treturn -1;\n \t}\n \n-\tclose(dev->vfio_req_intr_handle.fd);\n+\tclose(rte_intr_fd_get(dev->vfio_req_intr_handle));\n \n-\tdev->vfio_req_intr_handle.fd = -1;\n-\tdev->vfio_req_intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;\n-\tdev->vfio_req_intr_handle.vfio_dev_fd = -1;\n+\trte_intr_fd_set(dev->vfio_req_intr_handle, -1);\n+\trte_intr_type_set(dev->vfio_req_intr_handle, RTE_INTR_HANDLE_UNKNOWN);\n+\trte_intr_dev_fd_set(dev->vfio_req_intr_handle, -1);\n \n \treturn 0;\n }\n@@ -705,9 +720,12 @@ pci_vfio_map_resource_primary(struct rte_pci_device *dev)\n \n \tstruct pci_map *maps;\n \n-\tdev->intr_handle.fd = -1;\n+\tif (rte_intr_fd_set(dev->intr_handle, -1))\n+\t\treturn -1;\n+\n #ifdef HAVE_VFIO_DEV_REQ_INTERFACE\n-\tdev->vfio_req_intr_handle.fd = -1;\n+\tif (rte_intr_fd_set(dev->vfio_req_intr_handle, -1))\n+\t\treturn -1;\n #endif\n \n \t/* store PCI address string */\n@@ -854,9 +872,11 @@ pci_vfio_map_resource_secondary(struct rte_pci_device *dev)\n \n \tstruct pci_map *maps;\n \n-\tdev->intr_handle.fd = -1;\n+\tif (rte_intr_fd_set(dev->intr_handle, -1))\n+\t\treturn -1;\n #ifdef HAVE_VFIO_DEV_REQ_INTERFACE\n-\tdev->vfio_req_intr_handle.fd = -1;\n+\tif (rte_intr_fd_set(dev->vfio_req_intr_handle, -1))\n+\t\treturn -1;\n #endif\n \n \t/* store PCI address string */\n@@ -897,9 +917,11 @@ pci_vfio_map_resource_secondary(struct rte_pci_device *dev)\n \t}\n \n \t/* we need save vfio_dev_fd, so it can be used during release */\n-\tdev->intr_handle.vfio_dev_fd = vfio_dev_fd;\n+\tif (rte_intr_dev_fd_set(dev->intr_handle, vfio_dev_fd))\n+\t\tgoto err_vfio_dev_fd;\n #ifdef HAVE_VFIO_DEV_REQ_INTERFACE\n-\tdev->vfio_req_intr_handle.vfio_dev_fd = vfio_dev_fd;\n+\tif (rte_intr_dev_fd_set(dev->vfio_req_intr_handle, vfio_dev_fd))\n+\t\tgoto err_vfio_dev_fd;\n #endif\n \n \treturn 0;\n@@ -968,7 +990,7 @@ pci_vfio_unmap_resource_primary(struct rte_pci_device *dev)\n \tstruct rte_pci_addr *loc = &dev->addr;\n \tstruct mapped_pci_resource *vfio_res = NULL;\n \tstruct mapped_pci_res_list *vfio_res_list;\n-\tint ret;\n+\tint ret, vfio_dev_fd;\n \n \t/* store PCI address string */\n \tsnprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,\n@@ -982,20 +1004,21 @@ pci_vfio_unmap_resource_primary(struct rte_pci_device *dev)\n \t}\n \n #endif\n-\tif (close(dev->intr_handle.fd) < 0) {\n+\tif (close(rte_intr_fd_get(dev->intr_handle)) < 0) {\n \t\tRTE_LOG(INFO, EAL, \"Error when closing eventfd file descriptor for %s\\n\",\n \t\t\tpci_addr);\n \t\treturn -1;\n \t}\n \n-\tif (pci_vfio_set_bus_master(dev->intr_handle.vfio_dev_fd, false)) {\n+\tvfio_dev_fd = rte_intr_dev_fd_get(dev->intr_handle);\n+\tif (pci_vfio_set_bus_master(vfio_dev_fd, false)) {\n \t\tRTE_LOG(ERR, EAL, \"%s cannot unset bus mastering for PCI device!\\n\",\n \t\t\t\tpci_addr);\n \t\treturn -1;\n \t}\n \n \tret = rte_vfio_release_device(rte_pci_get_sysfs_path(), pci_addr,\n-\t\t\t\t dev->intr_handle.vfio_dev_fd);\n+\t\t\t\t vfio_dev_fd);\n \tif (ret < 0) {\n \t\tRTE_LOG(ERR, EAL, \"Cannot release VFIO device\\n\");\n \t\treturn ret;\n@@ -1024,14 +1047,15 @@ pci_vfio_unmap_resource_secondary(struct rte_pci_device *dev)\n \tstruct rte_pci_addr *loc = &dev->addr;\n \tstruct mapped_pci_resource *vfio_res = NULL;\n \tstruct mapped_pci_res_list *vfio_res_list;\n-\tint ret;\n+\tint ret, vfio_dev_fd;\n \n \t/* store PCI address string */\n \tsnprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,\n \t\t\tloc->domain, loc->bus, loc->devid, loc->function);\n \n+\tvfio_dev_fd = rte_intr_dev_fd_get(dev->intr_handle);\n \tret = rte_vfio_release_device(rte_pci_get_sysfs_path(), pci_addr,\n-\t\t\t\t dev->intr_handle.vfio_dev_fd);\n+\t\t\t\t vfio_dev_fd);\n \tif (ret < 0) {\n \t\tRTE_LOG(ERR, EAL, \"Cannot release VFIO device\\n\");\n \t\treturn ret;\n@@ -1079,9 +1103,10 @@ void\n pci_vfio_ioport_read(struct rte_pci_ioport *p,\n \t\t void *data, size_t len, off_t offset)\n {\n-\tconst struct rte_intr_handle *intr_handle = &p->dev->intr_handle;\n+\tconst struct rte_intr_handle *intr_handle = p->dev->intr_handle;\n+\tint vfio_dev_fd = rte_intr_dev_fd_get(intr_handle);\n \n-\tif (pread64(intr_handle->vfio_dev_fd, data,\n+\tif (pread64(vfio_dev_fd, data,\n \t\t len, p->base + offset) <= 0)\n \t\tRTE_LOG(ERR, EAL,\n \t\t\t\"Can't read from PCI bar (%\" PRIu64 \") : offset (%x)\\n\",\n@@ -1092,9 +1117,10 @@ void\n pci_vfio_ioport_write(struct rte_pci_ioport *p,\n \t\t const void *data, size_t len, off_t offset)\n {\n-\tconst struct rte_intr_handle *intr_handle = &p->dev->intr_handle;\n+\tconst struct rte_intr_handle *intr_handle = p->dev->intr_handle;\n+\tint vfio_dev_fd = rte_intr_dev_fd_get(intr_handle);\n \n-\tif (pwrite64(intr_handle->vfio_dev_fd, data,\n+\tif (pwrite64(vfio_dev_fd, data,\n \t\t len, p->base + offset) <= 0)\n \t\tRTE_LOG(ERR, EAL,\n \t\t\t\"Can't write to PCI bar (%\" PRIu64 \") : offset (%x)\\n\",\ndiff --git a/drivers/bus/pci/pci_common.c b/drivers/bus/pci/pci_common.c\nindex 3406e03b29..f8fff2c98e 100644\n--- a/drivers/bus/pci/pci_common.c\n+++ b/drivers/bus/pci/pci_common.c\n@@ -226,16 +226,39 @@ rte_pci_probe_one_driver(struct rte_pci_driver *dr,\n \t\t\treturn -EINVAL;\n \t\t}\n \n-\t\tdev->driver = dr;\n-\t}\n+\t\t/* Allocate interrupt instance for pci device */\n+\t\tdev->intr_handle =\n+\t\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);\n+\t\tif (dev->intr_handle == NULL) {\n+\t\t\tRTE_LOG(ERR, EAL,\n+\t\t\t\t\"Failed to create interrupt instance for %s\\n\",\n+\t\t\t\tdev->device.name);\n+\t\t\treturn -ENOMEM;\n+\t\t}\n \n-\tif (!already_probed && (dr->drv_flags & RTE_PCI_DRV_NEED_MAPPING)) {\n-\t\t/* map resources for devices that use igb_uio */\n-\t\tret = rte_pci_map_device(dev);\n-\t\tif (ret != 0) {\n-\t\t\tdev->driver = NULL;\n-\t\t\treturn ret;\n+\t\tdev->vfio_req_intr_handle =\n+\t\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);\n+\t\tif (dev->vfio_req_intr_handle == NULL) {\n+\t\t\trte_intr_instance_free(dev->intr_handle);\n+\t\t\tdev->intr_handle = NULL;\n+\t\t\tRTE_LOG(ERR, EAL,\n+\t\t\t\t\"Failed to create vfio req interrupt instance for %s\\n\",\n+\t\t\t\tdev->device.name);\n+\t\t\treturn -ENOMEM;\n+\t\t}\n+\n+\t\tif (dr->drv_flags & RTE_PCI_DRV_NEED_MAPPING) {\n+\t\t\tret = rte_pci_map_device(dev);\n+\t\t\tif (ret != 0) {\n+\t\t\t\trte_intr_instance_free(dev->vfio_req_intr_handle);\n+\t\t\t\tdev->vfio_req_intr_handle = NULL;\n+\t\t\t\trte_intr_instance_free(dev->intr_handle);\n+\t\t\t\tdev->intr_handle = NULL;\n+\t\t\t\treturn ret;\n+\t\t\t}\n \t\t}\n+\n+\t\tdev->driver = dr;\n \t}\n \n \tRTE_LOG(INFO, EAL, \"Probe PCI driver: %s (%x:%x) device: \"PCI_PRI_FMT\" (socket %i)\\n\",\n@@ -248,6 +271,10 @@ rte_pci_probe_one_driver(struct rte_pci_driver *dr,\n \t\treturn ret; /* no rollback if already succeeded earlier */\n \tif (ret) {\n \t\tdev->driver = NULL;\n+\t\trte_intr_instance_free(dev->vfio_req_intr_handle);\n+\t\tdev->vfio_req_intr_handle = NULL;\n+\t\trte_intr_instance_free(dev->intr_handle);\n+\t\tdev->intr_handle = NULL;\n \t\tif ((dr->drv_flags & RTE_PCI_DRV_NEED_MAPPING) &&\n \t\t\t/* Don't unmap if device is unsupported and\n \t\t\t * driver needs mapped resources.\n@@ -295,6 +322,10 @@ rte_pci_detach_dev(struct rte_pci_device *dev)\n \t/* clear driver structure */\n \tdev->driver = NULL;\n \tdev->device.driver = NULL;\n+\trte_intr_instance_free(dev->intr_handle);\n+\tdev->intr_handle = NULL;\n+\trte_intr_instance_free(dev->vfio_req_intr_handle);\n+\tdev->vfio_req_intr_handle = NULL;\n \n \tif (dr->drv_flags & RTE_PCI_DRV_NEED_MAPPING)\n \t\t/* unmap resources for devices that use igb_uio */\ndiff --git a/drivers/bus/pci/pci_common_uio.c b/drivers/bus/pci/pci_common_uio.c\nindex 318f9a1d55..244c9a8940 100644\n--- a/drivers/bus/pci/pci_common_uio.c\n+++ b/drivers/bus/pci/pci_common_uio.c\n@@ -90,8 +90,11 @@ pci_uio_map_resource(struct rte_pci_device *dev)\n \tstruct mapped_pci_res_list *uio_res_list =\n \t\tRTE_TAILQ_CAST(rte_uio_tailq.head, mapped_pci_res_list);\n \n-\tdev->intr_handle.fd = -1;\n-\tdev->intr_handle.uio_cfg_fd = -1;\n+\tif (rte_intr_fd_set(dev->intr_handle, -1))\n+\t\treturn -1;\n+\n+\tif (rte_intr_dev_fd_set(dev->intr_handle, -1))\n+\t\treturn -1;\n \n \t/* secondary processes - use already recorded details */\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n@@ -207,6 +210,7 @@ pci_uio_unmap_resource(struct rte_pci_device *dev)\n \tstruct mapped_pci_resource *uio_res;\n \tstruct mapped_pci_res_list *uio_res_list =\n \t\t\tRTE_TAILQ_CAST(rte_uio_tailq.head, mapped_pci_res_list);\n+\tint uio_cfg_fd;\n \n \tif (dev == NULL)\n \t\treturn;\n@@ -229,12 +233,13 @@ pci_uio_unmap_resource(struct rte_pci_device *dev)\n \trte_free(uio_res);\n \n \t/* close fd if in primary process */\n-\tclose(dev->intr_handle.fd);\n-\tif (dev->intr_handle.uio_cfg_fd >= 0) {\n-\t\tclose(dev->intr_handle.uio_cfg_fd);\n-\t\tdev->intr_handle.uio_cfg_fd = -1;\n+\tclose(rte_intr_fd_get(dev->intr_handle));\n+\tuio_cfg_fd = rte_intr_dev_fd_get(dev->intr_handle);\n+\tif (uio_cfg_fd >= 0) {\n+\t\tclose(uio_cfg_fd);\n+\t\trte_intr_dev_fd_set(dev->intr_handle, -1);\n \t}\n \n-\tdev->intr_handle.fd = -1;\n-\tdev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;\n+\trte_intr_fd_set(dev->intr_handle, -1);\n+\trte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UNKNOWN);\n }\ndiff --git a/drivers/bus/pci/rte_bus_pci.h b/drivers/bus/pci/rte_bus_pci.h\nindex 673a2850c1..1c6a8fdd7b 100644\n--- a/drivers/bus/pci/rte_bus_pci.h\n+++ b/drivers/bus/pci/rte_bus_pci.h\n@@ -69,12 +69,12 @@ struct rte_pci_device {\n \tstruct rte_pci_id id; /**< PCI ID. */\n \tstruct rte_mem_resource mem_resource[PCI_MAX_RESOURCE];\n \t\t\t\t\t /**< PCI Memory Resource */\n-\tstruct rte_intr_handle intr_handle; /**< Interrupt handle */\n+\tstruct rte_intr_handle *intr_handle; /**< Interrupt handle */\n \tstruct rte_pci_driver *driver; /**< PCI driver used in probing */\n \tuint16_t max_vfs; /**< sriov enable if not zero */\n \tenum rte_pci_kernel_driver kdrv; /**< Kernel driver passthrough */\n \tchar name[PCI_PRI_STR_SIZE+1]; /**< PCI location (ASCII) */\n-\tstruct rte_intr_handle vfio_req_intr_handle;\n+\tstruct rte_intr_handle *vfio_req_intr_handle;\n \t\t\t\t/**< Handler of VFIO request interrupt */\n };\n \ndiff --git a/drivers/bus/vmbus/linux/vmbus_bus.c b/drivers/bus/vmbus/linux/vmbus_bus.c\nindex 68f6cc5742..f502783f7a 100644\n--- a/drivers/bus/vmbus/linux/vmbus_bus.c\n+++ b/drivers/bus/vmbus/linux/vmbus_bus.c\n@@ -299,6 +299,12 @@ vmbus_scan_one(const char *name)\n \n \tdev->device.devargs = vmbus_devargs_lookup(dev);\n \n+\t/* Allocate interrupt handle instance */\n+\tdev->intr_handle =\n+\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);\n+\tif (dev->intr_handle == NULL)\n+\t\tgoto error;\n+\n \t/* device is valid, add in list (sorted) */\n \tVMBUS_LOG(DEBUG, \"Adding vmbus device %s\", name);\n \ndiff --git a/drivers/bus/vmbus/linux/vmbus_uio.c b/drivers/bus/vmbus/linux/vmbus_uio.c\nindex 70b0d098e0..9c5c1aeca3 100644\n--- a/drivers/bus/vmbus/linux/vmbus_uio.c\n+++ b/drivers/bus/vmbus/linux/vmbus_uio.c\n@@ -30,9 +30,11 @@ static void *vmbus_map_addr;\n /* Control interrupts */\n void vmbus_uio_irq_control(struct rte_vmbus_device *dev, int32_t onoff)\n {\n-\tif (write(dev->intr_handle.fd, &onoff, sizeof(onoff)) < 0) {\n+\tif (write(rte_intr_fd_get(dev->intr_handle), &onoff,\n+\t\t sizeof(onoff)) < 0) {\n \t\tVMBUS_LOG(ERR, \"cannot write to %d:%s\",\n-\t\t\tdev->intr_handle.fd, strerror(errno));\n+\t\t\t rte_intr_fd_get(dev->intr_handle),\n+\t\t\t strerror(errno));\n \t}\n }\n \n@@ -41,7 +43,8 @@ int vmbus_uio_irq_read(struct rte_vmbus_device *dev)\n \tint32_t count;\n \tint cc;\n \n-\tcc = read(dev->intr_handle.fd, &count, sizeof(count));\n+\tcc = read(rte_intr_fd_get(dev->intr_handle), &count,\n+\t\t sizeof(count));\n \tif (cc < (int)sizeof(count)) {\n \t\tif (cc < 0) {\n \t\t\tVMBUS_LOG(ERR, \"IRQ read failed %s\",\n@@ -61,15 +64,15 @@ vmbus_uio_free_resource(struct rte_vmbus_device *dev,\n {\n \trte_free(uio_res);\n \n-\tif (dev->intr_handle.uio_cfg_fd >= 0) {\n-\t\tclose(dev->intr_handle.uio_cfg_fd);\n-\t\tdev->intr_handle.uio_cfg_fd = -1;\n+\tif (rte_intr_dev_fd_get(dev->intr_handle) >= 0) {\n+\t\tclose(rte_intr_dev_fd_get(dev->intr_handle));\n+\t\trte_intr_dev_fd_set(dev->intr_handle, -1);\n \t}\n \n-\tif (dev->intr_handle.fd >= 0) {\n-\t\tclose(dev->intr_handle.fd);\n-\t\tdev->intr_handle.fd = -1;\n-\t\tdev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;\n+\tif (rte_intr_fd_get(dev->intr_handle) >= 0) {\n+\t\tclose(rte_intr_fd_get(dev->intr_handle));\n+\t\trte_intr_fd_set(dev->intr_handle, -1);\n+\t\trte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UNKNOWN);\n \t}\n }\n \n@@ -78,16 +81,22 @@ vmbus_uio_alloc_resource(struct rte_vmbus_device *dev,\n \t\t\t struct mapped_vmbus_resource **uio_res)\n {\n \tchar devname[PATH_MAX]; /* contains the /dev/uioX */\n+\tint fd;\n \n \t/* save fd if in primary process */\n \tsnprintf(devname, sizeof(devname), \"/dev/uio%u\", dev->uio_num);\n-\tdev->intr_handle.fd = open(devname, O_RDWR);\n-\tif (dev->intr_handle.fd < 0) {\n+\tfd = open(devname, O_RDWR);\n+\tif (fd < 0) {\n \t\tVMBUS_LOG(ERR, \"Cannot open %s: %s\",\n \t\t\tdevname, strerror(errno));\n \t\tgoto error;\n \t}\n-\tdev->intr_handle.type = RTE_INTR_HANDLE_UIO_INTX;\n+\n+\tif (rte_intr_fd_set(dev->intr_handle, fd))\n+\t\tgoto error;\n+\n+\tif (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UIO_INTX))\n+\t\tgoto error;\n \n \t/* allocate the mapping details for secondary processes*/\n \t*uio_res = rte_zmalloc(\"UIO_RES\", sizeof(**uio_res), 0);\ndiff --git a/drivers/bus/vmbus/rte_bus_vmbus.h b/drivers/bus/vmbus/rte_bus_vmbus.h\nindex 6bcff66468..466d42d277 100644\n--- a/drivers/bus/vmbus/rte_bus_vmbus.h\n+++ b/drivers/bus/vmbus/rte_bus_vmbus.h\n@@ -73,7 +73,7 @@ struct rte_vmbus_device {\n \tstruct vmbus_channel *primary;\t /**< VMBUS primary channel */\n \tstruct vmbus_mon_page *monitor_page; /**< VMBUS monitor page */\n \n-\tstruct rte_intr_handle intr_handle; /**< Interrupt handle */\n+\tstruct rte_intr_handle *intr_handle; /**< Interrupt handle */\n \tstruct rte_mem_resource resource[VMBUS_MAX_RESOURCE];\n };\n \ndiff --git a/drivers/bus/vmbus/vmbus_common_uio.c b/drivers/bus/vmbus/vmbus_common_uio.c\nindex 041712fe75..336296d6a8 100644\n--- a/drivers/bus/vmbus/vmbus_common_uio.c\n+++ b/drivers/bus/vmbus/vmbus_common_uio.c\n@@ -171,9 +171,14 @@ vmbus_uio_map_resource(struct rte_vmbus_device *dev)\n \tint ret;\n \n \t/* TODO: handle rescind */\n-\tdev->intr_handle.fd = -1;\n-\tdev->intr_handle.uio_cfg_fd = -1;\n-\tdev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;\n+\tif (rte_intr_fd_set(dev->intr_handle, -1))\n+\t\treturn -1;\n+\n+\tif (rte_intr_dev_fd_set(dev->intr_handle, -1))\n+\t\treturn -1;\n+\n+\tif (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UNKNOWN))\n+\t\treturn -1;\n \n \t/* secondary processes - use already recorded details */\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n@@ -253,12 +258,12 @@ vmbus_uio_unmap_resource(struct rte_vmbus_device *dev)\n \trte_free(uio_res);\n \n \t/* close fd if in primary process */\n-\tclose(dev->intr_handle.fd);\n-\tif (dev->intr_handle.uio_cfg_fd >= 0) {\n-\t\tclose(dev->intr_handle.uio_cfg_fd);\n-\t\tdev->intr_handle.uio_cfg_fd = -1;\n+\tclose(rte_intr_fd_get(dev->intr_handle));\n+\tif (rte_intr_dev_fd_get(dev->intr_handle) >= 0) {\n+\t\tclose(rte_intr_dev_fd_get(dev->intr_handle));\n+\t\trte_intr_dev_fd_set(dev->intr_handle, -1);\n \t}\n \n-\tdev->intr_handle.fd = -1;\n-\tdev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;\n+\trte_intr_fd_set(dev->intr_handle, -1);\n+\trte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UNKNOWN);\n }\ndiff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c\nindex 56744184ae..f0e52ae18f 100644\n--- a/drivers/common/cnxk/roc_cpt.c\n+++ b/drivers/common/cnxk/roc_cpt.c\n@@ -65,7 +65,7 @@ cpt_lf_register_misc_irq(struct roc_cpt_lf *lf)\n \tstruct plt_intr_handle *handle;\n \tint rc, vec;\n \n-\thandle = &pci_dev->intr_handle;\n+\thandle = pci_dev->intr_handle;\n \n \tvec = lf->msixoff + CPT_LF_INT_VEC_MISC;\n \t/* Clear err interrupt */\n@@ -85,7 +85,7 @@ cpt_lf_unregister_misc_irq(struct roc_cpt_lf *lf)\n \tstruct plt_intr_handle *handle;\n \tint vec;\n \n-\thandle = &pci_dev->intr_handle;\n+\thandle = pci_dev->intr_handle;\n \n \tvec = lf->msixoff + CPT_LF_INT_VEC_MISC;\n \t/* Clear err interrupt */\n@@ -129,7 +129,7 @@ cpt_lf_register_done_irq(struct roc_cpt_lf *lf)\n \tstruct plt_intr_handle *handle;\n \tint rc, vec;\n \n-\thandle = &pci_dev->intr_handle;\n+\thandle = pci_dev->intr_handle;\n \n \tvec = lf->msixoff + CPT_LF_INT_VEC_DONE;\n \n@@ -152,7 +152,7 @@ cpt_lf_unregister_done_irq(struct roc_cpt_lf *lf)\n \tstruct plt_intr_handle *handle;\n \tint vec;\n \n-\thandle = &pci_dev->intr_handle;\n+\thandle = pci_dev->intr_handle;\n \n \tvec = lf->msixoff + CPT_LF_INT_VEC_DONE;\n \ndiff --git a/drivers/common/cnxk/roc_dev.c b/drivers/common/cnxk/roc_dev.c\nindex ce6980cbe4..926a916e44 100644\n--- a/drivers/common/cnxk/roc_dev.c\n+++ b/drivers/common/cnxk/roc_dev.c\n@@ -641,7 +641,7 @@ roc_af_pf_mbox_irq(void *param)\n static int\n mbox_register_pf_irq(struct plt_pci_device *pci_dev, struct dev *dev)\n {\n-\tstruct plt_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct plt_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint i, rc;\n \n \t/* HW clear irq */\n@@ -691,7 +691,7 @@ mbox_register_pf_irq(struct plt_pci_device *pci_dev, struct dev *dev)\n static int\n mbox_register_vf_irq(struct plt_pci_device *pci_dev, struct dev *dev)\n {\n-\tstruct plt_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct plt_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint rc;\n \n \t/* Clear irq */\n@@ -724,7 +724,7 @@ mbox_register_irq(struct plt_pci_device *pci_dev, struct dev *dev)\n static void\n mbox_unregister_pf_irq(struct plt_pci_device *pci_dev, struct dev *dev)\n {\n-\tstruct plt_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct plt_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint i;\n \n \t/* HW clear irq */\n@@ -755,7 +755,7 @@ mbox_unregister_pf_irq(struct plt_pci_device *pci_dev, struct dev *dev)\n static void\n mbox_unregister_vf_irq(struct plt_pci_device *pci_dev, struct dev *dev)\n {\n-\tstruct plt_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct plt_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \t/* Clear irq */\n \tplt_write64(~0ull, dev->bar2 + RVU_VF_INT_ENA_W1C);\n@@ -839,7 +839,7 @@ roc_pf_vf_flr_irq(void *param)\n static int\n vf_flr_unregister_irqs(struct plt_pci_device *pci_dev, struct dev *dev)\n {\n-\tstruct plt_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct plt_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint i;\n \n \tplt_base_dbg(\"Unregister VF FLR interrupts for %s\", pci_dev->name);\n@@ -860,7 +860,7 @@ vf_flr_unregister_irqs(struct plt_pci_device *pci_dev, struct dev *dev)\n static int\n vf_flr_register_irqs(struct plt_pci_device *pci_dev, struct dev *dev)\n {\n-\tstruct plt_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct plt_intr_handle *handle = pci_dev->intr_handle;\n \tint i, rc;\n \n \tplt_base_dbg(\"Register VF FLR interrupts for %s\", pci_dev->name);\n@@ -1211,7 +1211,7 @@ dev_init(struct dev *dev, struct plt_pci_device *pci_dev)\n int\n dev_fini(struct dev *dev, struct plt_pci_device *pci_dev)\n {\n-\tstruct plt_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct plt_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct mbox *mbox;\n \n \t/* Check if this dev hosts npalf and has 1+ refs */\ndiff --git a/drivers/common/cnxk/roc_irq.c b/drivers/common/cnxk/roc_irq.c\nindex 28fe691932..3b34467b96 100644\n--- a/drivers/common/cnxk/roc_irq.c\n+++ b/drivers/common/cnxk/roc_irq.c\n@@ -20,11 +20,12 @@ static int\n irq_get_info(struct plt_intr_handle *intr_handle)\n {\n \tstruct vfio_irq_info irq = {.argsz = sizeof(irq)};\n-\tint rc;\n+\tint rc, vfio_dev_fd;\n \n \tirq.index = VFIO_PCI_MSIX_IRQ_INDEX;\n \n-\trc = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);\n+\tvfio_dev_fd = plt_intr_dev_fd_get(intr_handle);\n+\trc = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);\n \tif (rc < 0) {\n \t\tplt_err(\"Failed to get IRQ info rc=%d errno=%d\", rc, errno);\n \t\treturn rc;\n@@ -36,9 +37,10 @@ irq_get_info(struct plt_intr_handle *intr_handle)\n \tif (irq.count > PLT_MAX_RXTX_INTR_VEC_ID) {\n \t\tplt_err(\"HW max=%d > PLT_MAX_RXTX_INTR_VEC_ID: %d\", irq.count,\n \t\t\tPLT_MAX_RXTX_INTR_VEC_ID);\n-\t\tintr_handle->max_intr = PLT_MAX_RXTX_INTR_VEC_ID;\n+\t\tplt_intr_max_intr_set(intr_handle, PLT_MAX_RXTX_INTR_VEC_ID);\n \t} else {\n-\t\tintr_handle->max_intr = irq.count;\n+\t\tif (plt_intr_max_intr_set(intr_handle, irq.count))\n+\t\t\treturn -1;\n \t}\n \n \treturn 0;\n@@ -49,12 +51,12 @@ irq_config(struct plt_intr_handle *intr_handle, unsigned int vec)\n {\n \tchar irq_set_buf[MSIX_IRQ_SET_BUF_LEN];\n \tstruct vfio_irq_set *irq_set;\n+\tint len, rc, vfio_dev_fd;\n \tint32_t *fd_ptr;\n-\tint len, rc;\n \n-\tif (vec > intr_handle->max_intr) {\n+\tif (vec > (uint32_t)plt_intr_max_intr_get(intr_handle)) {\n \t\tplt_err(\"vector=%d greater than max_intr=%d\", vec,\n-\t\t\tintr_handle->max_intr);\n+\t\t\tplt_intr_max_intr_get(intr_handle));\n \t\treturn -EINVAL;\n \t}\n \n@@ -71,9 +73,10 @@ irq_config(struct plt_intr_handle *intr_handle, unsigned int vec)\n \n \t/* Use vec fd to set interrupt vectors */\n \tfd_ptr = (int32_t *)&irq_set->data[0];\n-\tfd_ptr[0] = intr_handle->efds[vec];\n+\tfd_ptr[0] = plt_intr_efds_index_get(intr_handle, vec);\n \n-\trc = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n+\tvfio_dev_fd = plt_intr_dev_fd_get(intr_handle);\n+\trc = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n \tif (rc)\n \t\tplt_err(\"Failed to set_irqs vector=0x%x rc=%d\", vec, rc);\n \n@@ -85,23 +88,25 @@ irq_init(struct plt_intr_handle *intr_handle)\n {\n \tchar irq_set_buf[MSIX_IRQ_SET_BUF_LEN];\n \tstruct vfio_irq_set *irq_set;\n+\tint len, rc, vfio_dev_fd;\n \tint32_t *fd_ptr;\n-\tint len, rc;\n \tuint32_t i;\n \n-\tif (intr_handle->max_intr > PLT_MAX_RXTX_INTR_VEC_ID) {\n+\tif (plt_intr_max_intr_get(intr_handle) >\n+\t\t\t\t\t\tPLT_MAX_RXTX_INTR_VEC_ID) {\n \t\tplt_err(\"Max_intr=%d greater than PLT_MAX_RXTX_INTR_VEC_ID=%d\",\n-\t\t\tintr_handle->max_intr, PLT_MAX_RXTX_INTR_VEC_ID);\n+\t\t\tplt_intr_max_intr_get(intr_handle),\n+\t\t\tPLT_MAX_RXTX_INTR_VEC_ID);\n \t\treturn -ERANGE;\n \t}\n \n \tlen = sizeof(struct vfio_irq_set) +\n-\t sizeof(int32_t) * intr_handle->max_intr;\n+\t sizeof(int32_t) * plt_intr_max_intr_get(intr_handle);\n \n \tirq_set = (struct vfio_irq_set *)irq_set_buf;\n \tirq_set->argsz = len;\n \tirq_set->start = 0;\n-\tirq_set->count = intr_handle->max_intr;\n+\tirq_set->count = plt_intr_max_intr_get(intr_handle);\n \tirq_set->flags =\n \t\tVFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;\n \tirq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;\n@@ -110,7 +115,8 @@ irq_init(struct plt_intr_handle *intr_handle)\n \tfor (i = 0; i < irq_set->count; i++)\n \t\tfd_ptr[i] = -1;\n \n-\trc = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n+\tvfio_dev_fd = plt_intr_dev_fd_get(intr_handle);\n+\trc = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n \tif (rc)\n \t\tplt_err(\"Failed to set irqs vector rc=%d\", rc);\n \n@@ -121,7 +127,7 @@ int\n dev_irqs_disable(struct plt_intr_handle *intr_handle)\n {\n \t/* Clear max_intr to indicate re-init next time */\n-\tintr_handle->max_intr = 0;\n+\tplt_intr_max_intr_set(intr_handle, 0);\n \treturn plt_intr_disable(intr_handle);\n }\n \n@@ -129,43 +135,49 @@ int\n dev_irq_register(struct plt_intr_handle *intr_handle, plt_intr_callback_fn cb,\n \t\t void *data, unsigned int vec)\n {\n-\tstruct plt_intr_handle tmp_handle;\n-\tint rc;\n+\tstruct plt_intr_handle *tmp_handle;\n+\tuint32_t nb_efd, tmp_nb_efd;\n+\tint rc, fd;\n \n \t/* If no max_intr read from VFIO */\n-\tif (intr_handle->max_intr == 0) {\n+\tif (plt_intr_max_intr_get(intr_handle) == 0) {\n \t\tirq_get_info(intr_handle);\n \t\tirq_init(intr_handle);\n \t}\n \n-\tif (vec > intr_handle->max_intr || vec >= PLT_DIM(intr_handle->efds)) {\n-\t\tplt_err(\"Vector=%d greater than max_intr=%d or \"\n-\t\t\t\"max_efd=%\" PRIu64,\n-\t\t\tvec, intr_handle->max_intr, PLT_DIM(intr_handle->efds));\n+\tif (vec > (uint32_t)plt_intr_max_intr_get(intr_handle)) {\n+\t\tplt_err(\"Vector=%d greater than max_intr=%d or \",\n+\t\t\tvec, plt_intr_max_intr_get(intr_handle));\n \t\treturn -EINVAL;\n \t}\n \n-\ttmp_handle = *intr_handle;\n+\ttmp_handle = intr_handle;\n \t/* Create new eventfd for interrupt vector */\n-\ttmp_handle.fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);\n-\tif (tmp_handle.fd == -1)\n+\tfd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);\n+\tif (fd == -1)\n \t\treturn -ENODEV;\n \n+\tif (plt_intr_fd_set(tmp_handle, fd))\n+\t\treturn -errno;\n+\n \t/* Register vector interrupt callback */\n-\trc = plt_intr_callback_register(&tmp_handle, cb, data);\n+\trc = plt_intr_callback_register(tmp_handle, cb, data);\n \tif (rc) {\n \t\tplt_err(\"Failed to register vector:0x%x irq callback.\", vec);\n \t\treturn rc;\n \t}\n \n-\tintr_handle->efds[vec] = tmp_handle.fd;\n-\tintr_handle->nb_efd =\n-\t\t(vec > intr_handle->nb_efd) ? vec : intr_handle->nb_efd;\n-\tif ((intr_handle->nb_efd + 1) > intr_handle->max_intr)\n-\t\tintr_handle->max_intr = intr_handle->nb_efd + 1;\n+\tplt_intr_efds_index_set(intr_handle, vec, fd);\n+\tnb_efd = (vec > (uint32_t)plt_intr_nb_efd_get(intr_handle)) ?\n+\t\tvec : (uint32_t)plt_intr_nb_efd_get(intr_handle);\n+\tplt_intr_nb_efd_set(intr_handle, nb_efd);\n \n+\ttmp_nb_efd = plt_intr_nb_efd_get(intr_handle) + 1;\n+\tif (tmp_nb_efd > (uint32_t)plt_intr_max_intr_get(intr_handle))\n+\t\tplt_intr_max_intr_set(intr_handle, tmp_nb_efd);\n \tplt_base_dbg(\"Enable vector:0x%x for vfio (efds: %d, max:%d)\", vec,\n-\t\t intr_handle->nb_efd, intr_handle->max_intr);\n+\t\t plt_intr_nb_efd_get(intr_handle),\n+\t\t plt_intr_max_intr_get(intr_handle));\n \n \t/* Enable MSIX vectors to VFIO */\n \treturn irq_config(intr_handle, vec);\n@@ -175,24 +187,27 @@ void\n dev_irq_unregister(struct plt_intr_handle *intr_handle, plt_intr_callback_fn cb,\n \t\t void *data, unsigned int vec)\n {\n-\tstruct plt_intr_handle tmp_handle;\n+\tstruct plt_intr_handle *tmp_handle;\n \tuint8_t retries = 5; /* 5 ms */\n-\tint rc;\n+\tint rc, fd;\n \n-\tif (vec > intr_handle->max_intr) {\n+\tif (vec > (uint32_t)plt_intr_max_intr_get(intr_handle)) {\n \t\tplt_err(\"Error unregistering MSI-X interrupts vec:%d > %d\", vec,\n-\t\t\tintr_handle->max_intr);\n+\t\t\tplt_intr_max_intr_get(intr_handle));\n \t\treturn;\n \t}\n \n-\ttmp_handle = *intr_handle;\n-\ttmp_handle.fd = intr_handle->efds[vec];\n-\tif (tmp_handle.fd == -1)\n+\ttmp_handle = intr_handle;\n+\tfd = plt_intr_efds_index_get(intr_handle, vec);\n+\tif (fd == -1)\n+\t\treturn;\n+\n+\tif (plt_intr_fd_set(tmp_handle, fd))\n \t\treturn;\n \n \tdo {\n \t\t/* Un-register callback func from platform lib */\n-\t\trc = plt_intr_callback_unregister(&tmp_handle, cb, data);\n+\t\trc = plt_intr_callback_unregister(tmp_handle, cb, data);\n \t\t/* Retry only if -EAGAIN */\n \t\tif (rc != -EAGAIN)\n \t\t\tbreak;\n@@ -206,12 +221,14 @@ dev_irq_unregister(struct plt_intr_handle *intr_handle, plt_intr_callback_fn cb,\n \t}\n \n \tplt_base_dbg(\"Disable vector:0x%x for vfio (efds: %d, max:%d)\", vec,\n-\t\t intr_handle->nb_efd, intr_handle->max_intr);\n+\t\t plt_intr_nb_efd_get(intr_handle),\n+\t\t plt_intr_max_intr_get(intr_handle));\n \n-\tif (intr_handle->efds[vec] != -1)\n-\t\tclose(intr_handle->efds[vec]);\n+\tif (plt_intr_efds_index_get(intr_handle, vec) != -1)\n+\t\tclose(plt_intr_efds_index_get(intr_handle, vec));\n \t/* Disable MSIX vectors from VFIO */\n-\tintr_handle->efds[vec] = -1;\n+\tplt_intr_efds_index_set(intr_handle, vec, -1);\n+\n \tirq_config(intr_handle, vec);\n }\n \ndiff --git a/drivers/common/cnxk/roc_nix_inl_dev_irq.c b/drivers/common/cnxk/roc_nix_inl_dev_irq.c\nindex 25ed42f875..848523b010 100644\n--- a/drivers/common/cnxk/roc_nix_inl_dev_irq.c\n+++ b/drivers/common/cnxk/roc_nix_inl_dev_irq.c\n@@ -99,7 +99,7 @@ nix_inl_sso_hws_irq(void *param)\n int\n nix_inl_sso_register_irqs(struct nix_inl_dev *inl_dev)\n {\n-\tstruct plt_intr_handle *handle = &inl_dev->pci_dev->intr_handle;\n+\tstruct plt_intr_handle *handle = inl_dev->pci_dev->intr_handle;\n \tuintptr_t ssow_base = inl_dev->ssow_base;\n \tuintptr_t sso_base = inl_dev->sso_base;\n \tuint16_t sso_msixoff, ssow_msixoff;\n@@ -147,7 +147,7 @@ nix_inl_sso_register_irqs(struct nix_inl_dev *inl_dev)\n void\n nix_inl_sso_unregister_irqs(struct nix_inl_dev *inl_dev)\n {\n-\tstruct plt_intr_handle *handle = &inl_dev->pci_dev->intr_handle;\n+\tstruct plt_intr_handle *handle = inl_dev->pci_dev->intr_handle;\n \tuintptr_t ssow_base = inl_dev->ssow_base;\n \tuintptr_t sso_base = inl_dev->sso_base;\n \tuint16_t sso_msixoff, ssow_msixoff;\n@@ -282,7 +282,7 @@ nix_inl_nix_err_irq(void *param)\n int\n nix_inl_nix_register_irqs(struct nix_inl_dev *inl_dev)\n {\n-\tstruct plt_intr_handle *handle = &inl_dev->pci_dev->intr_handle;\n+\tstruct plt_intr_handle *handle = inl_dev->pci_dev->intr_handle;\n \tuintptr_t nix_base = inl_dev->nix_base;\n \tuint16_t msixoff;\n \tint rc;\n@@ -331,7 +331,7 @@ nix_inl_nix_register_irqs(struct nix_inl_dev *inl_dev)\n void\n nix_inl_nix_unregister_irqs(struct nix_inl_dev *inl_dev)\n {\n-\tstruct plt_intr_handle *handle = &inl_dev->pci_dev->intr_handle;\n+\tstruct plt_intr_handle *handle = inl_dev->pci_dev->intr_handle;\n \tuintptr_t nix_base = inl_dev->nix_base;\n \tuint16_t msixoff;\n \ndiff --git a/drivers/common/cnxk/roc_nix_irq.c b/drivers/common/cnxk/roc_nix_irq.c\nindex 32be64a9d7..e9aa620abd 100644\n--- a/drivers/common/cnxk/roc_nix_irq.c\n+++ b/drivers/common/cnxk/roc_nix_irq.c\n@@ -82,7 +82,7 @@ nix_lf_err_irq(void *param)\n static int\n nix_lf_register_err_irq(struct nix *nix)\n {\n-\tstruct plt_intr_handle *handle = &nix->pci_dev->intr_handle;\n+\tstruct plt_intr_handle *handle = nix->pci_dev->intr_handle;\n \tint rc, vec;\n \n \tvec = nix->msixoff + NIX_LF_INT_VEC_ERR_INT;\n@@ -99,7 +99,7 @@ nix_lf_register_err_irq(struct nix *nix)\n static void\n nix_lf_unregister_err_irq(struct nix *nix)\n {\n-\tstruct plt_intr_handle *handle = &nix->pci_dev->intr_handle;\n+\tstruct plt_intr_handle *handle = nix->pci_dev->intr_handle;\n \tint vec;\n \n \tvec = nix->msixoff + NIX_LF_INT_VEC_ERR_INT;\n@@ -131,7 +131,7 @@ nix_lf_ras_irq(void *param)\n static int\n nix_lf_register_ras_irq(struct nix *nix)\n {\n-\tstruct plt_intr_handle *handle = &nix->pci_dev->intr_handle;\n+\tstruct plt_intr_handle *handle = nix->pci_dev->intr_handle;\n \tint rc, vec;\n \n \tvec = nix->msixoff + NIX_LF_INT_VEC_POISON;\n@@ -148,7 +148,7 @@ nix_lf_register_ras_irq(struct nix *nix)\n static void\n nix_lf_unregister_ras_irq(struct nix *nix)\n {\n-\tstruct plt_intr_handle *handle = &nix->pci_dev->intr_handle;\n+\tstruct plt_intr_handle *handle = nix->pci_dev->intr_handle;\n \tint vec;\n \n \tvec = nix->msixoff + NIX_LF_INT_VEC_POISON;\n@@ -300,7 +300,7 @@ roc_nix_register_queue_irqs(struct roc_nix *roc_nix)\n \tstruct nix *nix;\n \n \tnix = roc_nix_to_nix_priv(roc_nix);\n-\thandle = &nix->pci_dev->intr_handle;\n+\thandle = nix->pci_dev->intr_handle;\n \n \t/* Figure out max qintx required */\n \trqs = PLT_MIN(nix->qints, nix->nb_rx_queues);\n@@ -352,7 +352,7 @@ roc_nix_unregister_queue_irqs(struct roc_nix *roc_nix)\n \tint vec, q;\n \n \tnix = roc_nix_to_nix_priv(roc_nix);\n-\thandle = &nix->pci_dev->intr_handle;\n+\thandle = nix->pci_dev->intr_handle;\n \n \tfor (q = 0; q < nix->configured_qints; q++) {\n \t\tvec = nix->msixoff + NIX_LF_INT_VEC_QINT_START + q;\n@@ -382,7 +382,7 @@ roc_nix_register_cq_irqs(struct roc_nix *roc_nix)\n \tstruct nix *nix;\n \n \tnix = roc_nix_to_nix_priv(roc_nix);\n-\thandle = &nix->pci_dev->intr_handle;\n+\thandle = nix->pci_dev->intr_handle;\n \n \tnix->configured_cints = PLT_MIN(nix->cints, nix->nb_rx_queues);\n \n@@ -414,19 +414,19 @@ roc_nix_register_cq_irqs(struct roc_nix *roc_nix)\n \t\t\treturn rc;\n \t\t}\n \n-\t\tif (!handle->intr_vec) {\n-\t\t\thandle->intr_vec = plt_zmalloc(\n-\t\t\t\tnix->configured_cints * sizeof(int), 0);\n-\t\t\tif (!handle->intr_vec) {\n-\t\t\t\tplt_err(\"Failed to allocate %d rx intr_vec\",\n-\t\t\t\t\tnix->configured_cints);\n-\t\t\t\treturn -ENOMEM;\n-\t\t\t}\n+\t\trc = plt_intr_vec_list_alloc(handle, \"cnxk\",\n+\t\t\t\t\t nix->configured_cints);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Fail to allocate intr vec list, rc=%d\",\n+\t\t\t\trc);\n+\t\t\treturn rc;\n \t\t}\n \t\t/* VFIO vector zero is resereved for misc interrupt so\n \t\t * doing required adjustment. (b13bfab4cd)\n \t\t */\n-\t\thandle->intr_vec[q] = PLT_INTR_VEC_RXTX_OFFSET + vec;\n+\t\tif (plt_intr_vec_list_index_set(handle, q,\n+\t\t\t\t\t\tPLT_INTR_VEC_RXTX_OFFSET + vec))\n+\t\t\treturn -1;\n \n \t\t/* Configure CQE interrupt coalescing parameters */\n \t\tplt_write64(((CQ_CQE_THRESH_DEFAULT) |\n@@ -450,7 +450,7 @@ roc_nix_unregister_cq_irqs(struct roc_nix *roc_nix)\n \tint vec, q;\n \n \tnix = roc_nix_to_nix_priv(roc_nix);\n-\thandle = &nix->pci_dev->intr_handle;\n+\thandle = nix->pci_dev->intr_handle;\n \n \tfor (q = 0; q < nix->configured_cints; q++) {\n \t\tvec = nix->msixoff + NIX_LF_INT_VEC_CINT_START + q;\n@@ -465,6 +465,8 @@ roc_nix_unregister_cq_irqs(struct roc_nix *roc_nix)\n \t\tdev_irq_unregister(handle, nix_lf_cq_irq, &nix->cints_mem[q],\n \t\t\t\t vec);\n \t}\n+\n+\tplt_intr_vec_list_free(handle);\n \tplt_free(nix->cints_mem);\n }\n \ndiff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.c\nindex a0d2cc8f19..664240ab42 100644\n--- a/drivers/common/cnxk/roc_npa.c\n+++ b/drivers/common/cnxk/roc_npa.c\n@@ -710,7 +710,7 @@ npa_lf_init(struct dev *dev, struct plt_pci_device *pci_dev)\n \n \tlf->pf_func = dev->pf_func;\n \tlf->npa_msixoff = npa_msixoff;\n-\tlf->intr_handle = &pci_dev->intr_handle;\n+\tlf->intr_handle = pci_dev->intr_handle;\n \tlf->pci_dev = pci_dev;\n \n \tidev->npa_pf_func = dev->pf_func;\ndiff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h\nindex a0f01797f1..60227b72d0 100644\n--- a/drivers/common/cnxk/roc_platform.h\n+++ b/drivers/common/cnxk/roc_platform.h\n@@ -106,6 +106,32 @@\n #define plt_thread_is_intr\t rte_thread_is_intr\n #define plt_intr_callback_fn\t rte_intr_callback_fn\n \n+#define plt_intr_efd_counter_size_get\trte_intr_efd_counter_size_get\n+#define plt_intr_efd_counter_size_set\trte_intr_efd_counter_size_set\n+#define plt_intr_vec_list_index_get\trte_intr_vec_list_index_get\n+#define plt_intr_vec_list_index_set\trte_intr_vec_list_index_set\n+#define plt_intr_vec_list_alloc\t\trte_intr_vec_list_alloc\n+#define plt_intr_vec_list_free\t\trte_intr_vec_list_free\n+#define plt_intr_fd_set\t\t\trte_intr_fd_set\n+#define plt_intr_fd_get\t\t\trte_intr_fd_get\n+#define plt_intr_dev_fd_get\t\trte_intr_dev_fd_get\n+#define plt_intr_dev_fd_set\t\trte_intr_dev_fd_set\n+#define plt_intr_type_get\t\trte_intr_type_get\n+#define plt_intr_type_set\t\trte_intr_type_set\n+#define plt_intr_instance_alloc\t\trte_intr_instance_alloc\n+#define plt_intr_instance_dup\t\trte_intr_instance_dup\n+#define plt_intr_instance_free\t\trte_intr_instance_free\n+#define plt_intr_max_intr_get\t\trte_intr_max_intr_get\n+#define plt_intr_max_intr_set\t\trte_intr_max_intr_set\n+#define plt_intr_nb_efd_get\t\trte_intr_nb_efd_get\n+#define plt_intr_nb_efd_set\t\trte_intr_nb_efd_set\n+#define plt_intr_nb_intr_get\t\trte_intr_nb_intr_get\n+#define plt_intr_nb_intr_set\t\trte_intr_nb_intr_set\n+#define plt_intr_efds_index_get\t\trte_intr_efds_index_get\n+#define plt_intr_efds_index_set\t\trte_intr_efds_index_set\n+#define plt_intr_elist_index_get\trte_intr_elist_index_get\n+#define plt_intr_elist_index_set\trte_intr_elist_index_set\n+\n #define plt_alarm_set\t rte_eal_alarm_set\n #define plt_alarm_cancel rte_eal_alarm_cancel\n \n@@ -183,7 +209,7 @@ extern int cnxk_logtype_tm;\n #define plt_dbg(subsystem, fmt, args...) \\\n \trte_log(RTE_LOG_DEBUG, cnxk_logtype_##subsystem, \\\n \t\t\"[%s] %s():%u \" fmt \"\\n\", #subsystem, __func__, __LINE__, \\\n-\t\t##args)\n+##args)\n \n #define plt_base_dbg(fmt, ...)\tplt_dbg(base, fmt, ##__VA_ARGS__)\n #define plt_cpt_dbg(fmt, ...)\tplt_dbg(cpt, fmt, ##__VA_ARGS__)\n@@ -203,18 +229,18 @@ extern int cnxk_logtype_tm;\n \n #ifdef __cplusplus\n #define CNXK_PCI_ID(subsystem_dev, dev) \\\n-\t{ \\\n-\t\tRTE_CLASS_ANY_ID, PCI_VENDOR_ID_CAVIUM, (dev), RTE_PCI_ANY_ID, \\\n-\t\t\t(subsystem_dev), \\\n-\t}\n+{ \\\n+\tRTE_CLASS_ANY_ID, PCI_VENDOR_ID_CAVIUM, (dev), RTE_PCI_ANY_ID, \\\n+\t(subsystem_dev), \\\n+}\n #else\n #define CNXK_PCI_ID(subsystem_dev, dev) \\\n-\t{ \\\n-\t\t.class_id = RTE_CLASS_ANY_ID, \\\n-\t\t.vendor_id = PCI_VENDOR_ID_CAVIUM, .device_id = (dev), \\\n-\t\t.subsystem_vendor_id = RTE_PCI_ANY_ID, \\\n-\t\t.subsystem_device_id = (subsystem_dev), \\\n-\t}\n+{ \\\n+\t.class_id = RTE_CLASS_ANY_ID, \\\n+\t.vendor_id = PCI_VENDOR_ID_CAVIUM, .device_id = (dev), \\\n+\t.subsystem_vendor_id = RTE_PCI_ANY_ID, \\\n+\t.subsystem_device_id = (subsystem_dev), \\\n+}\n #endif\n \n __rte_internal\ndiff --git a/drivers/common/cnxk/roc_sso.c b/drivers/common/cnxk/roc_sso.c\nindex bdf973fc2a..762893f3dc 100644\n--- a/drivers/common/cnxk/roc_sso.c\n+++ b/drivers/common/cnxk/roc_sso.c\n@@ -505,7 +505,7 @@ roc_sso_rsrc_init(struct roc_sso *roc_sso, uint8_t nb_hws, uint16_t nb_hwgrp)\n \t\tgoto sso_msix_fail;\n \t}\n \n-\trc = sso_register_irqs_priv(roc_sso, &sso->pci_dev->intr_handle, nb_hws,\n+\trc = sso_register_irqs_priv(roc_sso, sso->pci_dev->intr_handle, nb_hws,\n \t\t\t\t nb_hwgrp);\n \tif (rc < 0) {\n \t\tplt_err(\"Failed to register SSO LF IRQs\");\n@@ -535,7 +535,7 @@ roc_sso_rsrc_fini(struct roc_sso *roc_sso)\n \tif (!roc_sso->nb_hws && !roc_sso->nb_hwgrp)\n \t\treturn;\n \n-\tsso_unregister_irqs_priv(roc_sso, &sso->pci_dev->intr_handle,\n+\tsso_unregister_irqs_priv(roc_sso, sso->pci_dev->intr_handle,\n \t\t\t\t roc_sso->nb_hws, roc_sso->nb_hwgrp);\n \tsso_lf_free(&sso->dev, SSO_LF_TYPE_HWS, roc_sso->nb_hws);\n \tsso_lf_free(&sso->dev, SSO_LF_TYPE_HWGRP, roc_sso->nb_hwgrp);\ndiff --git a/drivers/common/cnxk/roc_tim.c b/drivers/common/cnxk/roc_tim.c\nindex 387164bb1d..534b697bee 100644\n--- a/drivers/common/cnxk/roc_tim.c\n+++ b/drivers/common/cnxk/roc_tim.c\n@@ -200,7 +200,7 @@ roc_tim_lf_alloc(struct roc_tim *roc_tim, uint8_t ring_id, uint64_t *clk)\n \tif (clk)\n \t\t*clk = rsp->tenns_clk;\n \n-\trc = tim_register_irq_priv(roc_tim, &sso->pci_dev->intr_handle, ring_id,\n+\trc = tim_register_irq_priv(roc_tim, sso->pci_dev->intr_handle, ring_id,\n \t\t\t\t tim->tim_msix_offsets[ring_id]);\n \tif (rc < 0) {\n \t\tplt_tim_dbg(\"Failed to register Ring[%d] IRQ\", ring_id);\n@@ -223,7 +223,7 @@ roc_tim_lf_free(struct roc_tim *roc_tim, uint8_t ring_id)\n \tstruct tim_ring_req *req;\n \tint rc = -ENOSPC;\n \n-\ttim_unregister_irq_priv(roc_tim, &sso->pci_dev->intr_handle, ring_id,\n+\ttim_unregister_irq_priv(roc_tim, sso->pci_dev->intr_handle, ring_id,\n \t\t\t\ttim->tim_msix_offsets[ring_id]);\n \n \treq = mbox_alloc_msg_tim_lf_free(dev->mbox);\ndiff --git a/drivers/common/octeontx2/otx2_dev.c b/drivers/common/octeontx2/otx2_dev.c\nindex ce4f0e7ca9..08dca87848 100644\n--- a/drivers/common/octeontx2/otx2_dev.c\n+++ b/drivers/common/octeontx2/otx2_dev.c\n@@ -643,7 +643,7 @@ otx2_af_pf_mbox_irq(void *param)\n static int\n mbox_register_pf_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev)\n {\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint i, rc;\n \n \t/* HW clear irq */\n@@ -693,7 +693,7 @@ mbox_register_pf_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev)\n static int\n mbox_register_vf_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev)\n {\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint rc;\n \n \t/* Clear irq */\n@@ -726,7 +726,7 @@ mbox_register_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev)\n static void\n mbox_unregister_pf_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev)\n {\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint i;\n \n \t/* HW clear irq */\n@@ -758,7 +758,7 @@ mbox_unregister_pf_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev)\n static void\n mbox_unregister_vf_irq(struct rte_pci_device *pci_dev, struct otx2_dev *dev)\n {\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \t/* Clear irq */\n \totx2_write64(~0ull, dev->bar2 + RVU_VF_INT_ENA_W1C);\n@@ -841,7 +841,7 @@ otx2_pf_vf_flr_irq(void *param)\n static int\n vf_flr_unregister_irqs(struct rte_pci_device *pci_dev, struct otx2_dev *dev)\n {\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint i;\n \n \totx2_base_dbg(\"Unregister VF FLR interrupts for %s\", pci_dev->name);\n@@ -862,7 +862,7 @@ vf_flr_unregister_irqs(struct rte_pci_device *pci_dev, struct otx2_dev *dev)\n static int\n vf_flr_register_irqs(struct rte_pci_device *pci_dev, struct otx2_dev *dev)\n {\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \tint i, rc;\n \n \totx2_base_dbg(\"Register VF FLR interrupts for %s\", pci_dev->name);\n@@ -1039,7 +1039,7 @@ otx2_dev_priv_init(struct rte_pci_device *pci_dev, void *otx2_dev)\n void\n otx2_dev_fini(struct rte_pci_device *pci_dev, void *otx2_dev)\n {\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct otx2_dev *dev = otx2_dev;\n \tstruct otx2_idev_cfg *idev;\n \tstruct otx2_mbox *mbox;\ndiff --git a/drivers/common/octeontx2/otx2_irq.c b/drivers/common/octeontx2/otx2_irq.c\nindex c0137ff36d..93fc95c0e1 100644\n--- a/drivers/common/octeontx2/otx2_irq.c\n+++ b/drivers/common/octeontx2/otx2_irq.c\n@@ -26,11 +26,12 @@ static int\n irq_get_info(struct rte_intr_handle *intr_handle)\n {\n \tstruct vfio_irq_info irq = { .argsz = sizeof(irq) };\n-\tint rc;\n+\tint rc, vfio_dev_fd;\n \n \tirq.index = VFIO_PCI_MSIX_IRQ_INDEX;\n \n-\trc = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);\n+\tvfio_dev_fd = rte_intr_dev_fd_get(intr_handle);\n+\trc = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);\n \tif (rc < 0) {\n \t\totx2_err(\"Failed to get IRQ info rc=%d errno=%d\", rc, errno);\n \t\treturn rc;\n@@ -41,10 +42,13 @@ irq_get_info(struct rte_intr_handle *intr_handle)\n \n \tif (irq.count > MAX_INTR_VEC_ID) {\n \t\totx2_err(\"HW max=%d > MAX_INTR_VEC_ID: %d\",\n-\t\t\t intr_handle->max_intr, MAX_INTR_VEC_ID);\n-\t\tintr_handle->max_intr = MAX_INTR_VEC_ID;\n+\t\t\t rte_intr_max_intr_get(intr_handle),\n+\t\t\t MAX_INTR_VEC_ID);\n+\t\tif (rte_intr_max_intr_set(intr_handle, MAX_INTR_VEC_ID))\n+\t\t\treturn -1;\n \t} else {\n-\t\tintr_handle->max_intr = irq.count;\n+\t\tif (rte_intr_max_intr_set(intr_handle, irq.count))\n+\t\t\treturn -1;\n \t}\n \n \treturn 0;\n@@ -55,12 +59,12 @@ irq_config(struct rte_intr_handle *intr_handle, unsigned int vec)\n {\n \tchar irq_set_buf[MSIX_IRQ_SET_BUF_LEN];\n \tstruct vfio_irq_set *irq_set;\n+\tint len, rc, vfio_dev_fd;\n \tint32_t *fd_ptr;\n-\tint len, rc;\n \n-\tif (vec > intr_handle->max_intr) {\n+\tif (vec > (uint32_t)rte_intr_max_intr_get(intr_handle)) {\n \t\totx2_err(\"vector=%d greater than max_intr=%d\", vec,\n-\t\t\t\tintr_handle->max_intr);\n+\t\t\t rte_intr_max_intr_get(intr_handle));\n \t\treturn -EINVAL;\n \t}\n \n@@ -77,9 +81,10 @@ irq_config(struct rte_intr_handle *intr_handle, unsigned int vec)\n \n \t/* Use vec fd to set interrupt vectors */\n \tfd_ptr = (int32_t *)&irq_set->data[0];\n-\tfd_ptr[0] = intr_handle->efds[vec];\n+\tfd_ptr[0] = rte_intr_efds_index_get(intr_handle, vec);\n \n-\trc = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n+\tvfio_dev_fd = rte_intr_dev_fd_get(intr_handle);\n+\trc = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n \tif (rc)\n \t\totx2_err(\"Failed to set_irqs vector=0x%x rc=%d\", vec, rc);\n \n@@ -91,23 +96,24 @@ irq_init(struct rte_intr_handle *intr_handle)\n {\n \tchar irq_set_buf[MSIX_IRQ_SET_BUF_LEN];\n \tstruct vfio_irq_set *irq_set;\n+\tint len, rc, vfio_dev_fd;\n \tint32_t *fd_ptr;\n-\tint len, rc;\n \tuint32_t i;\n \n-\tif (intr_handle->max_intr > MAX_INTR_VEC_ID) {\n+\tif (rte_intr_max_intr_get(intr_handle) > MAX_INTR_VEC_ID) {\n \t\totx2_err(\"Max_intr=%d greater than MAX_INTR_VEC_ID=%d\",\n-\t\t\t\tintr_handle->max_intr, MAX_INTR_VEC_ID);\n+\t\t\t rte_intr_max_intr_get(intr_handle),\n+\t\t\t MAX_INTR_VEC_ID);\n \t\treturn -ERANGE;\n \t}\n \n \tlen = sizeof(struct vfio_irq_set) +\n-\t\tsizeof(int32_t) * intr_handle->max_intr;\n+\t\tsizeof(int32_t) * rte_intr_max_intr_get(intr_handle);\n \n \tirq_set = (struct vfio_irq_set *)irq_set_buf;\n \tirq_set->argsz = len;\n \tirq_set->start = 0;\n-\tirq_set->count = intr_handle->max_intr;\n+\tirq_set->count = rte_intr_max_intr_get(intr_handle);\n \tirq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |\n \t\t\tVFIO_IRQ_SET_ACTION_TRIGGER;\n \tirq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;\n@@ -116,7 +122,8 @@ irq_init(struct rte_intr_handle *intr_handle)\n \tfor (i = 0; i < irq_set->count; i++)\n \t\tfd_ptr[i] = -1;\n \n-\trc = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n+\tvfio_dev_fd = rte_intr_dev_fd_get(intr_handle);\n+\trc = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n \tif (rc)\n \t\totx2_err(\"Failed to set irqs vector rc=%d\", rc);\n \n@@ -131,7 +138,8 @@ int\n otx2_disable_irqs(struct rte_intr_handle *intr_handle)\n {\n \t/* Clear max_intr to indicate re-init next time */\n-\tintr_handle->max_intr = 0;\n+\tif (rte_intr_max_intr_set(intr_handle, 0))\n+\t\treturn -1;\n \treturn rte_intr_disable(intr_handle);\n }\n \n@@ -143,42 +151,50 @@ int\n otx2_register_irq(struct rte_intr_handle *intr_handle,\n \t\t rte_intr_callback_fn cb, void *data, unsigned int vec)\n {\n-\tstruct rte_intr_handle tmp_handle;\n-\tint rc;\n+\tstruct rte_intr_handle *tmp_handle;\n+\tuint32_t nb_efd, tmp_nb_efd;\n+\tint rc, fd;\n \n \t/* If no max_intr read from VFIO */\n-\tif (intr_handle->max_intr == 0) {\n+\tif (rte_intr_max_intr_get(intr_handle) == 0) {\n \t\tirq_get_info(intr_handle);\n \t\tirq_init(intr_handle);\n \t}\n \n-\tif (vec > intr_handle->max_intr) {\n+\tif (vec > (uint32_t)rte_intr_max_intr_get(intr_handle)) {\n \t\totx2_err(\"Vector=%d greater than max_intr=%d\", vec,\n-\t\t\t\t intr_handle->max_intr);\n+\t\t\trte_intr_max_intr_get(intr_handle));\n \t\treturn -EINVAL;\n \t}\n \n-\ttmp_handle = *intr_handle;\n+\ttmp_handle = intr_handle;\n \t/* Create new eventfd for interrupt vector */\n-\ttmp_handle.fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);\n-\tif (tmp_handle.fd == -1)\n+\tfd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);\n+\tif (fd == -1)\n \t\treturn -ENODEV;\n \n+\tif (rte_intr_fd_set(tmp_handle, fd))\n+\t\treturn errno;\n+\n \t/* Register vector interrupt callback */\n-\trc = rte_intr_callback_register(&tmp_handle, cb, data);\n+\trc = rte_intr_callback_register(tmp_handle, cb, data);\n \tif (rc) {\n \t\totx2_err(\"Failed to register vector:0x%x irq callback.\", vec);\n \t\treturn rc;\n \t}\n \n-\tintr_handle->efds[vec] = tmp_handle.fd;\n-\tintr_handle->nb_efd = (vec > intr_handle->nb_efd) ?\n-\t\t\tvec : intr_handle->nb_efd;\n-\tif ((intr_handle->nb_efd + 1) > intr_handle->max_intr)\n-\t\tintr_handle->max_intr = intr_handle->nb_efd + 1;\n+\trte_intr_efds_index_set(intr_handle, vec, fd);\n+\tnb_efd = (vec > (uint32_t)rte_intr_nb_efd_get(intr_handle)) ?\n+\t\tvec : (uint32_t)rte_intr_nb_efd_get(intr_handle);\n+\trte_intr_nb_efd_set(intr_handle, nb_efd);\n+\n+\ttmp_nb_efd = rte_intr_nb_efd_get(intr_handle) + 1;\n+\tif (tmp_nb_efd > (uint32_t)rte_intr_max_intr_get(intr_handle))\n+\t\trte_intr_max_intr_set(intr_handle, tmp_nb_efd);\n \n-\totx2_base_dbg(\"Enable vector:0x%x for vfio (efds: %d, max:%d)\",\n-\t\tvec, intr_handle->nb_efd, intr_handle->max_intr);\n+\totx2_base_dbg(\"Enable vector:0x%x for vfio (efds: %d, max:%d)\", vec,\n+\t\t rte_intr_nb_efd_get(intr_handle),\n+\t\t rte_intr_max_intr_get(intr_handle));\n \n \t/* Enable MSIX vectors to VFIO */\n \treturn irq_config(intr_handle, vec);\n@@ -192,24 +208,27 @@ void\n otx2_unregister_irq(struct rte_intr_handle *intr_handle,\n \t\t rte_intr_callback_fn cb, void *data, unsigned int vec)\n {\n-\tstruct rte_intr_handle tmp_handle;\n+\tstruct rte_intr_handle *tmp_handle;\n \tuint8_t retries = 5; /* 5 ms */\n-\tint rc;\n+\tint rc, fd;\n \n-\tif (vec > intr_handle->max_intr) {\n+\tif (vec > (uint32_t)rte_intr_max_intr_get(intr_handle)) {\n \t\totx2_err(\"Error unregistering MSI-X interrupts vec:%d > %d\",\n-\t\t\tvec, intr_handle->max_intr);\n+\t\t\t vec, rte_intr_max_intr_get(intr_handle));\n \t\treturn;\n \t}\n \n-\ttmp_handle = *intr_handle;\n-\ttmp_handle.fd = intr_handle->efds[vec];\n-\tif (tmp_handle.fd == -1)\n+\ttmp_handle = intr_handle;\n+\tfd = rte_intr_efds_index_get(intr_handle, vec);\n+\tif (fd == -1)\n+\t\treturn;\n+\n+\tif (rte_intr_fd_set(tmp_handle, fd))\n \t\treturn;\n \n \tdo {\n-\t\t/* Un-register callback func from eal lib */\n-\t\trc = rte_intr_callback_unregister(&tmp_handle, cb, data);\n+\t\t/* Un-register callback func from platform lib */\n+\t\trc = rte_intr_callback_unregister(tmp_handle, cb, data);\n \t\t/* Retry only if -EAGAIN */\n \t\tif (rc != -EAGAIN)\n \t\t\tbreak;\n@@ -218,18 +237,18 @@ otx2_unregister_irq(struct rte_intr_handle *intr_handle,\n \t} while (retries);\n \n \tif (rc < 0) {\n-\t\totx2_err(\"Error unregistering MSI-X intr vec %d cb, rc=%d\",\n-\t\t\t vec, rc);\n+\t\totx2_err(\"Error unregistering MSI-X vec %d cb, rc=%d\", vec, rc);\n \t\treturn;\n \t}\n \n-\totx2_base_dbg(\"Disable vector:0x%x for vfio (efds: %d, max:%d)\",\n-\t\t\tvec, intr_handle->nb_efd, intr_handle->max_intr);\n+\totx2_base_dbg(\"Disable vector:0x%x for vfio (efds: %d, max:%d)\", vec,\n+\t\t rte_intr_nb_efd_get(intr_handle),\n+\t\t rte_intr_max_intr_get(intr_handle));\n \n-\tif (intr_handle->efds[vec] != -1)\n-\t\tclose(intr_handle->efds[vec]);\n+\tif (rte_intr_efds_index_get(intr_handle, vec) != -1)\n+\t\tclose(rte_intr_efds_index_get(intr_handle, vec));\n \t/* Disable MSIX vectors from VFIO */\n-\tintr_handle->efds[vec] = -1;\n+\trte_intr_efds_index_set(intr_handle, vec, -1);\n \tirq_config(intr_handle, vec);\n }\n \ndiff --git a/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.c b/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.c\nindex bf90d095fe..d5d6b5bad7 100644\n--- a/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.c\n+++ b/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.c\n@@ -36,7 +36,7 @@ otx2_cpt_lf_err_intr_unregister(const struct rte_cryptodev *dev,\n \t\t\t\tuint16_t msix_off, uintptr_t base)\n {\n \tstruct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \n \t/* Disable error interrupts */\n \totx2_write64(~0ull, base + OTX2_CPT_LF_MISC_INT_ENA_W1C);\n@@ -65,7 +65,7 @@ otx2_cpt_lf_err_intr_register(const struct rte_cryptodev *dev,\n \t\t\t uint16_t msix_off, uintptr_t base)\n {\n \tstruct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \tint ret;\n \n \t/* Disable error interrupts */\ndiff --git a/drivers/event/octeontx2/otx2_evdev_irq.c b/drivers/event/octeontx2/otx2_evdev_irq.c\nindex a2033646e6..9b7ad27b04 100644\n--- a/drivers/event/octeontx2/otx2_evdev_irq.c\n+++ b/drivers/event/octeontx2/otx2_evdev_irq.c\n@@ -29,7 +29,7 @@ sso_lf_register_irq(const struct rte_eventdev *event_dev, uint16_t ggrp_msixoff,\n \t\t uintptr_t base)\n {\n \tstruct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(event_dev->dev);\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \tint rc, vec;\n \n \tvec = ggrp_msixoff + SSO_LF_INT_VEC_GRP;\n@@ -66,7 +66,7 @@ ssow_lf_register_irq(const struct rte_eventdev *event_dev, uint16_t gws_msixoff,\n \t\t uintptr_t base)\n {\n \tstruct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(event_dev->dev);\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \tint rc, vec;\n \n \tvec = gws_msixoff + SSOW_LF_INT_VEC_IOP;\n@@ -86,7 +86,7 @@ sso_lf_unregister_irq(const struct rte_eventdev *event_dev,\n \t\t uint16_t ggrp_msixoff, uintptr_t base)\n {\n \tstruct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(event_dev->dev);\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \tint vec;\n \n \tvec = ggrp_msixoff + SSO_LF_INT_VEC_GRP;\n@@ -101,7 +101,7 @@ ssow_lf_unregister_irq(const struct rte_eventdev *event_dev,\n \t\t uint16_t gws_msixoff, uintptr_t base)\n {\n \tstruct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(event_dev->dev);\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \tint vec;\n \n \tvec = gws_msixoff + SSOW_LF_INT_VEC_IOP;\n@@ -198,7 +198,7 @@ static int\n tim_lf_register_irq(struct rte_pci_device *pci_dev, uint16_t tim_msixoff,\n \t\t uintptr_t base)\n {\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \tint rc, vec;\n \n \tvec = tim_msixoff + TIM_LF_INT_VEC_NRSPERR_INT;\n@@ -226,7 +226,7 @@ static void\n tim_lf_unregister_irq(struct rte_pci_device *pci_dev, uint16_t tim_msixoff,\n \t\t uintptr_t base)\n {\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \tint vec;\n \n \tvec = tim_msixoff + TIM_LF_INT_VEC_NRSPERR_INT;\ndiff --git a/drivers/mempool/octeontx2/otx2_mempool.c b/drivers/mempool/octeontx2/otx2_mempool.c\nindex fb630fecf8..f63dc06ef2 100644\n--- a/drivers/mempool/octeontx2/otx2_mempool.c\n+++ b/drivers/mempool/octeontx2/otx2_mempool.c\n@@ -301,7 +301,7 @@ otx2_npa_lf_init(struct rte_pci_device *pci_dev, void *otx2_dev)\n \n \t\tlf->pf_func = dev->pf_func;\n \t\tlf->npa_msixoff = npa_msixoff;\n-\t\tlf->intr_handle = &pci_dev->intr_handle;\n+\t\tlf->intr_handle = pci_dev->intr_handle;\n \t\tlf->pci_dev = pci_dev;\n \n \t\tidev->npa_pf_func = dev->pf_func;\ndiff --git a/drivers/net/atlantic/atl_ethdev.c b/drivers/net/atlantic/atl_ethdev.c\nindex f7bfac796c..1c03e8bfa1 100644\n--- a/drivers/net/atlantic/atl_ethdev.c\n+++ b/drivers/net/atlantic/atl_ethdev.c\n@@ -359,7 +359,7 @@ eth_atl_dev_init(struct rte_eth_dev *eth_dev)\n {\n \tstruct atl_adapter *adapter = eth_dev->data->dev_private;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);\n \tint err = 0;\n \n@@ -478,7 +478,7 @@ atl_dev_start(struct rte_eth_dev *dev)\n {\n \tstruct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint32_t intr_vector = 0;\n \tint status;\n \tint err;\n@@ -524,10 +524,9 @@ atl_dev_start(struct rte_eth_dev *dev)\n \t\t}\n \t}\n \n-\tif (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {\n-\t\tintr_handle->intr_vec = rte_zmalloc(\"intr_vec\",\n-\t\t\t\t dev->data->nb_rx_queues * sizeof(int), 0);\n-\t\tif (intr_handle->intr_vec == NULL) {\n+\tif (rte_intr_dp_is_en(intr_handle)) {\n+\t\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t\t\t dev->data->nb_rx_queues)) {\n \t\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %d rx_queues\"\n \t\t\t\t \" intr_vec\", dev->data->nb_rx_queues);\n \t\t\treturn -ENOMEM;\n@@ -607,7 +606,7 @@ atl_dev_stop(struct rte_eth_dev *dev)\n \tstruct aq_hw_s *hw =\n \t\tATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \tPMD_INIT_FUNC_TRACE();\n \tdev->data->dev_started = 0;\n@@ -637,10 +636,7 @@ atl_dev_stop(struct rte_eth_dev *dev)\n \n \t/* Clean datapath event and queue/vec mapping */\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec != NULL) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\trte_intr_vec_list_free(intr_handle);\n \n \treturn 0;\n }\n@@ -691,7 +687,7 @@ static int\n atl_dev_close(struct rte_eth_dev *dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct aq_hw_s *hw;\n \tint ret;\n \ndiff --git a/drivers/net/avp/avp_ethdev.c b/drivers/net/avp/avp_ethdev.c\nindex 9eabdf0901..7ac55584ff 100644\n--- a/drivers/net/avp/avp_ethdev.c\n+++ b/drivers/net/avp/avp_ethdev.c\n@@ -711,7 +711,7 @@ avp_dev_interrupt_handler(void *data)\n \t\t\t status);\n \n \t/* re-enable UIO interrupt handling */\n-\tret = rte_intr_ack(&pci_dev->intr_handle);\n+\tret = rte_intr_ack(pci_dev->intr_handle);\n \tif (ret < 0) {\n \t\tPMD_DRV_LOG(ERR, \"Failed to re-enable UIO interrupts, ret=%d\\n\",\n \t\t\t ret);\n@@ -730,7 +730,7 @@ avp_dev_enable_interrupts(struct rte_eth_dev *eth_dev)\n \t\treturn -EINVAL;\n \n \t/* enable UIO interrupt handling */\n-\tret = rte_intr_enable(&pci_dev->intr_handle);\n+\tret = rte_intr_enable(pci_dev->intr_handle);\n \tif (ret < 0) {\n \t\tPMD_DRV_LOG(ERR, \"Failed to enable UIO interrupts, ret=%d\\n\",\n \t\t\t ret);\n@@ -759,7 +759,7 @@ avp_dev_disable_interrupts(struct rte_eth_dev *eth_dev)\n \t\t RTE_PTR_ADD(registers, RTE_AVP_INTERRUPT_MASK_OFFSET));\n \n \t/* enable UIO interrupt handling */\n-\tret = rte_intr_disable(&pci_dev->intr_handle);\n+\tret = rte_intr_disable(pci_dev->intr_handle);\n \tif (ret < 0) {\n \t\tPMD_DRV_LOG(ERR, \"Failed to disable UIO interrupts, ret=%d\\n\",\n \t\t\t ret);\n@@ -776,7 +776,7 @@ avp_dev_setup_interrupts(struct rte_eth_dev *eth_dev)\n \tint ret;\n \n \t/* register a callback handler with UIO for interrupt notifications */\n-\tret = rte_intr_callback_register(&pci_dev->intr_handle,\n+\tret = rte_intr_callback_register(pci_dev->intr_handle,\n \t\t\t\t\t avp_dev_interrupt_handler,\n \t\t\t\t\t (void *)eth_dev);\n \tif (ret < 0) {\ndiff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c\nindex dab0c6775d..7d40c18a86 100644\n--- a/drivers/net/axgbe/axgbe_ethdev.c\n+++ b/drivers/net/axgbe/axgbe_ethdev.c\n@@ -313,7 +313,7 @@ axgbe_dev_interrupt_handler(void *param)\n \t\t}\n \t}\n \t/* Unmask interrupts since disabled after generation */\n-\trte_intr_ack(&pdata->pci_dev->intr_handle);\n+\trte_intr_ack(pdata->pci_dev->intr_handle);\n }\n \n /*\n@@ -374,7 +374,7 @@ axgbe_dev_start(struct rte_eth_dev *dev)\n \t}\n \n \t/* enable uio/vfio intr/eventfd mapping */\n-\trte_intr_enable(&pdata->pci_dev->intr_handle);\n+\trte_intr_enable(pdata->pci_dev->intr_handle);\n \n \t/* phy start*/\n \tpdata->phy_if.phy_start(pdata);\n@@ -406,7 +406,7 @@ axgbe_dev_stop(struct rte_eth_dev *dev)\n \n \tPMD_INIT_FUNC_TRACE();\n \n-\trte_intr_disable(&pdata->pci_dev->intr_handle);\n+\trte_intr_disable(pdata->pci_dev->intr_handle);\n \n \tif (rte_bit_relaxed_get32(AXGBE_STOPPED, &pdata->dev_state))\n \t\treturn 0;\n@@ -2311,7 +2311,7 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)\n \t\treturn ret;\n \t}\n \n-\trte_intr_callback_register(&pci_dev->intr_handle,\n+\trte_intr_callback_register(pci_dev->intr_handle,\n \t\t\t\t axgbe_dev_interrupt_handler,\n \t\t\t\t (void *)eth_dev);\n \tPMD_INIT_LOG(DEBUG, \"port %d vendorID=0x%x deviceID=0x%x\",\n@@ -2335,8 +2335,8 @@ axgbe_dev_close(struct rte_eth_dev *eth_dev)\n \taxgbe_dev_clear_queues(eth_dev);\n \n \t/* disable uio intr before callback unregister */\n-\trte_intr_disable(&pci_dev->intr_handle);\n-\trte_intr_callback_unregister(&pci_dev->intr_handle,\n+\trte_intr_disable(pci_dev->intr_handle);\n+\trte_intr_callback_unregister(pci_dev->intr_handle,\n \t\t\t\t axgbe_dev_interrupt_handler,\n \t\t\t\t (void *)eth_dev);\n \ndiff --git a/drivers/net/axgbe/axgbe_mdio.c b/drivers/net/axgbe/axgbe_mdio.c\nindex 59fa9175ad..32d8c666f9 100644\n--- a/drivers/net/axgbe/axgbe_mdio.c\n+++ b/drivers/net/axgbe/axgbe_mdio.c\n@@ -933,7 +933,7 @@ static int __axgbe_phy_config_aneg(struct axgbe_port *pdata)\n \t}\n \n \t/* Disable auto-negotiation interrupt */\n-\trte_intr_disable(&pdata->pci_dev->intr_handle);\n+\trte_intr_disable(pdata->pci_dev->intr_handle);\n \n \t/* Start auto-negotiation in a supported mode */\n \tif (axgbe_use_mode(pdata, AXGBE_MODE_KR)) {\n@@ -951,7 +951,7 @@ static int __axgbe_phy_config_aneg(struct axgbe_port *pdata)\n \t} else if (axgbe_use_mode(pdata, AXGBE_MODE_SGMII_100)) {\n \t\taxgbe_set_mode(pdata, AXGBE_MODE_SGMII_100);\n \t} else {\n-\t\trte_intr_enable(&pdata->pci_dev->intr_handle);\n+\t\trte_intr_enable(pdata->pci_dev->intr_handle);\n \t\treturn -EINVAL;\n \t}\n \n@@ -964,7 +964,7 @@ static int __axgbe_phy_config_aneg(struct axgbe_port *pdata)\n \tpdata->kx_state = AXGBE_RX_BPA;\n \n \t/* Re-enable auto-negotiation interrupt */\n-\trte_intr_enable(&pdata->pci_dev->intr_handle);\n+\trte_intr_enable(pdata->pci_dev->intr_handle);\n \taxgbe_an37_enable_interrupts(pdata);\n \n \taxgbe_an_init(pdata);\ndiff --git a/drivers/net/bnx2x/bnx2x_ethdev.c b/drivers/net/bnx2x/bnx2x_ethdev.c\nindex 78fc717ec4..f36ad30e17 100644\n--- a/drivers/net/bnx2x/bnx2x_ethdev.c\n+++ b/drivers/net/bnx2x/bnx2x_ethdev.c\n@@ -134,7 +134,7 @@ bnx2x_interrupt_handler(void *param)\n \tPMD_DEBUG_PERIODIC_LOG(INFO, sc, \"Interrupt handled\");\n \n \tbnx2x_interrupt_action(dev, 1);\n-\trte_intr_ack(&sc->pci_dev->intr_handle);\n+\trte_intr_ack(sc->pci_dev->intr_handle);\n }\n \n static void bnx2x_periodic_start(void *param)\n@@ -230,10 +230,10 @@ bnx2x_dev_start(struct rte_eth_dev *dev)\n \t}\n \n \tif (IS_PF(sc)) {\n-\t\trte_intr_callback_register(&sc->pci_dev->intr_handle,\n+\t\trte_intr_callback_register(sc->pci_dev->intr_handle,\n \t\t\t\tbnx2x_interrupt_handler, (void *)dev);\n \n-\t\tif (rte_intr_enable(&sc->pci_dev->intr_handle))\n+\t\tif (rte_intr_enable(sc->pci_dev->intr_handle))\n \t\t\tPMD_DRV_LOG(ERR, sc, \"rte_intr_enable failed\");\n \t}\n \n@@ -258,8 +258,8 @@ bnx2x_dev_stop(struct rte_eth_dev *dev)\n \tbnx2x_dev_rxtx_init_dummy(dev);\n \n \tif (IS_PF(sc)) {\n-\t\trte_intr_disable(&sc->pci_dev->intr_handle);\n-\t\trte_intr_callback_unregister(&sc->pci_dev->intr_handle,\n+\t\trte_intr_disable(sc->pci_dev->intr_handle);\n+\t\trte_intr_callback_unregister(sc->pci_dev->intr_handle,\n \t\t\t\tbnx2x_interrupt_handler, (void *)dev);\n \n \t\t/* stop the periodic callout */\ndiff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c\nindex 2791a5c62d..5a34bb96d0 100644\n--- a/drivers/net/bnxt/bnxt_ethdev.c\n+++ b/drivers/net/bnxt/bnxt_ethdev.c\n@@ -729,7 +729,7 @@ static int bnxt_alloc_prev_ring_stats(struct bnxt *bp)\n static int bnxt_start_nic(struct bnxt *bp)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(bp->eth_dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint32_t intr_vector = 0;\n \tuint32_t queue_id, base = BNXT_MISC_VEC_ID;\n \tuint32_t vec = BNXT_MISC_VEC_ID;\n@@ -846,26 +846,24 @@ static int bnxt_start_nic(struct bnxt *bp)\n \t\t\treturn rc;\n \t}\n \n-\tif (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {\n-\t\tintr_handle->intr_vec =\n-\t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t bp->eth_dev->data->nb_rx_queues *\n-\t\t\t\t sizeof(int), 0);\n-\t\tif (intr_handle->intr_vec == NULL) {\n+\tif (rte_intr_dp_is_en(intr_handle)) {\n+\t\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t\tbp->eth_dev->data->nb_rx_queues)) {\n \t\t\tPMD_DRV_LOG(ERR, \"Failed to allocate %d rx_queues\"\n \t\t\t\t\" intr_vec\", bp->eth_dev->data->nb_rx_queues);\n \t\t\trc = -ENOMEM;\n \t\t\tgoto err_out;\n \t\t}\n-\t\tPMD_DRV_LOG(DEBUG, \"intr_handle->intr_vec = %p \"\n-\t\t\t\"intr_handle->nb_efd = %d intr_handle->max_intr = %d\\n\",\n-\t\t\t intr_handle->intr_vec, intr_handle->nb_efd,\n-\t\t\tintr_handle->max_intr);\n+\t\tPMD_DRV_LOG(DEBUG, \"intr_handle->nb_efd = %d \"\n+\t\t\t \"intr_handle->max_intr = %d\\n\",\n+\t\t\t rte_intr_nb_efd_get(intr_handle),\n+\t\t\t rte_intr_max_intr_get(intr_handle));\n \t\tfor (queue_id = 0; queue_id < bp->eth_dev->data->nb_rx_queues;\n \t\t queue_id++) {\n-\t\t\tintr_handle->intr_vec[queue_id] =\n-\t\t\t\t\t\t\tvec + BNXT_RX_VEC_START;\n-\t\t\tif (vec < base + intr_handle->nb_efd - 1)\n+\t\t\trte_intr_vec_list_index_set(intr_handle,\n+\t\t\t\t\tqueue_id, vec + BNXT_RX_VEC_START);\n+\t\t\tif (vec < base + rte_intr_nb_efd_get(intr_handle)\n+\t\t\t - 1)\n \t\t\t\tvec++;\n \t\t}\n \t}\n@@ -1473,7 +1471,7 @@ static int bnxt_dev_stop(struct rte_eth_dev *eth_dev)\n {\n \tstruct bnxt *bp = eth_dev->data->dev_private;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct rte_eth_link link;\n \tint ret;\n \n@@ -1515,10 +1513,7 @@ static int bnxt_dev_stop(struct rte_eth_dev *eth_dev)\n \n \t/* Clean queue intr-vector mapping */\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec != NULL) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\trte_intr_vec_list_free(intr_handle);\n \n \tbnxt_hwrm_port_clr_stats(bp);\n \tbnxt_free_tx_mbufs(bp);\ndiff --git a/drivers/net/bnxt/bnxt_irq.c b/drivers/net/bnxt/bnxt_irq.c\nindex 122a1f9908..508abfc844 100644\n--- a/drivers/net/bnxt/bnxt_irq.c\n+++ b/drivers/net/bnxt/bnxt_irq.c\n@@ -67,7 +67,7 @@ void bnxt_int_handler(void *param)\n \n int bnxt_free_int(struct bnxt *bp)\n {\n-\tstruct rte_intr_handle *intr_handle = &bp->pdev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = bp->pdev->intr_handle;\n \tstruct bnxt_irq *irq = bp->irq_tbl;\n \tint rc = 0;\n \n@@ -170,7 +170,7 @@ int bnxt_setup_int(struct bnxt *bp)\n \n int bnxt_request_int(struct bnxt *bp)\n {\n-\tstruct rte_intr_handle *intr_handle = &bp->pdev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = bp->pdev->intr_handle;\n \tstruct bnxt_irq *irq = bp->irq_tbl;\n \tint rc = 0;\n \ndiff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c\nindex 89ea7dd47c..b9bf9d2966 100644\n--- a/drivers/net/dpaa/dpaa_ethdev.c\n+++ b/drivers/net/dpaa/dpaa_ethdev.c\n@@ -208,7 +208,7 @@ dpaa_eth_dev_configure(struct rte_eth_dev *dev)\n \tPMD_INIT_FUNC_TRACE();\n \n \tdpaa_dev = container_of(rdev, struct rte_dpaa_device, device);\n-\tintr_handle = &dpaa_dev->intr_handle;\n+\tintr_handle = dpaa_dev->intr_handle;\n \t__fif = container_of(fif, struct __fman_if, __if);\n \n \t/* Rx offloads which are enabled by default */\n@@ -255,13 +255,14 @@ dpaa_eth_dev_configure(struct rte_eth_dev *dev)\n \t}\n \n \t/* if the interrupts were configured on this devices*/\n-\tif (intr_handle && intr_handle->fd) {\n+\tif (intr_handle && rte_intr_fd_get(intr_handle)) {\n \t\tif (dev->data->dev_conf.intr_conf.lsc != 0)\n \t\t\trte_intr_callback_register(intr_handle,\n \t\t\t\t\t dpaa_interrupt_handler,\n \t\t\t\t\t (void *)dev);\n \n-\t\tret = dpaa_intr_enable(__fif->node_name, intr_handle->fd);\n+\t\tret = dpaa_intr_enable(__fif->node_name,\n+\t\t\t\t rte_intr_fd_get(intr_handle));\n \t\tif (ret) {\n \t\t\tif (dev->data->dev_conf.intr_conf.lsc != 0) {\n \t\t\t\trte_intr_callback_unregister(intr_handle,\n@@ -368,9 +369,10 @@ static void dpaa_interrupt_handler(void *param)\n \tint bytes_read;\n \n \tdpaa_dev = container_of(rdev, struct rte_dpaa_device, device);\n-\tintr_handle = &dpaa_dev->intr_handle;\n+\tintr_handle = dpaa_dev->intr_handle;\n \n-\tbytes_read = read(intr_handle->fd, &buf, sizeof(uint64_t));\n+\tbytes_read = read(rte_intr_fd_get(intr_handle), &buf,\n+\t\t\t sizeof(uint64_t));\n \tif (bytes_read < 0)\n \t\tDPAA_PMD_ERR(\"Error reading eventfd\\n\");\n \tdpaa_eth_link_update(dev, 0);\n@@ -440,7 +442,7 @@ static int dpaa_eth_dev_close(struct rte_eth_dev *dev)\n \t}\n \n \tdpaa_dev = container_of(rdev, struct rte_dpaa_device, device);\n-\tintr_handle = &dpaa_dev->intr_handle;\n+\tintr_handle = dpaa_dev->intr_handle;\n \t__fif = container_of(fif, struct __fman_if, __if);\n \n \tret = dpaa_eth_dev_stop(dev);\n@@ -449,7 +451,7 @@ static int dpaa_eth_dev_close(struct rte_eth_dev *dev)\n \tif (link->link_status && !link->link_autoneg)\n \t\tdpaa_restart_link_autoneg(__fif->node_name);\n \n-\tif (intr_handle && intr_handle->fd &&\n+\tif (intr_handle && rte_intr_fd_get(intr_handle) &&\n \t dev->data->dev_conf.intr_conf.lsc != 0) {\n \t\tdpaa_intr_disable(__fif->node_name);\n \t\trte_intr_callback_unregister(intr_handle,\n@@ -1072,26 +1074,38 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n \t\trxq->qp = qp;\n \n \t\t/* Set up the device interrupt handler */\n-\t\tif (!dev->intr_handle) {\n+\t\tif (dev->intr_handle == NULL) {\n \t\t\tstruct rte_dpaa_device *dpaa_dev;\n \t\t\tstruct rte_device *rdev = dev->device;\n \n \t\t\tdpaa_dev = container_of(rdev, struct rte_dpaa_device,\n \t\t\t\t\t\tdevice);\n-\t\t\tdev->intr_handle = &dpaa_dev->intr_handle;\n-\t\t\tdev->intr_handle->intr_vec = rte_zmalloc(NULL,\n-\t\t\t\t\tdpaa_push_mode_max_queue, 0);\n-\t\t\tif (!dev->intr_handle->intr_vec) {\n+\t\t\tdev->intr_handle = dpaa_dev->intr_handle;\n+\t\t\tif (rte_intr_vec_list_alloc(dev->intr_handle,\n+\t\t\t\t\tNULL, dpaa_push_mode_max_queue)) {\n \t\t\t\tDPAA_PMD_ERR(\"intr_vec alloc failed\");\n \t\t\t\treturn -ENOMEM;\n \t\t\t}\n-\t\t\tdev->intr_handle->nb_efd = dpaa_push_mode_max_queue;\n-\t\t\tdev->intr_handle->max_intr = dpaa_push_mode_max_queue;\n+\t\t\tif (rte_intr_nb_efd_set(dev->intr_handle,\n+\t\t\t\t\tdpaa_push_mode_max_queue))\n+\t\t\t\treturn -rte_errno;\n+\n+\t\t\tif (rte_intr_max_intr_set(dev->intr_handle,\n+\t\t\t\t\tdpaa_push_mode_max_queue))\n+\t\t\t\treturn -rte_errno;\n \t\t}\n \n-\t\tdev->intr_handle->type = RTE_INTR_HANDLE_EXT;\n-\t\tdev->intr_handle->intr_vec[queue_idx] = queue_idx + 1;\n-\t\tdev->intr_handle->efds[queue_idx] = q_fd;\n+\t\tif (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_EXT))\n+\t\t\treturn -rte_errno;\n+\n+\t\tif (rte_intr_vec_list_index_set(dev->intr_handle,\n+\t\t\t\t\t\tqueue_idx, queue_idx + 1))\n+\t\t\treturn -rte_errno;\n+\n+\t\tif (rte_intr_efds_index_set(dev->intr_handle, queue_idx,\n+\t\t\t\t\t\t q_fd))\n+\t\t\treturn -rte_errno;\n+\n \t\trxq->q_fd = q_fd;\n \t}\n \trxq->bp_array = rte_dpaa_bpid_info;\ndiff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c\nindex 59e728577f..73d17f7b3c 100644\n--- a/drivers/net/dpaa2/dpaa2_ethdev.c\n+++ b/drivers/net/dpaa2/dpaa2_ethdev.c\n@@ -1145,7 +1145,7 @@ dpaa2_dev_start(struct rte_eth_dev *dev)\n \tstruct rte_intr_handle *intr_handle;\n \n \tdpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);\n-\tintr_handle = &dpaa2_dev->intr_handle;\n+\tintr_handle = dpaa2_dev->intr_handle;\n \n \tPMD_INIT_FUNC_TRACE();\n \n@@ -1216,8 +1216,8 @@ dpaa2_dev_start(struct rte_eth_dev *dev)\n \t}\n \n \t/* if the interrupts were configured on this devices*/\n-\tif (intr_handle && (intr_handle->fd) &&\n-\t (dev->data->dev_conf.intr_conf.lsc != 0)) {\n+\tif (intr_handle && rte_intr_fd_get(intr_handle) &&\n+\t dev->data->dev_conf.intr_conf.lsc != 0) {\n \t\t/* Registering LSC interrupt handler */\n \t\trte_intr_callback_register(intr_handle,\n \t\t\t\t\t dpaa2_interrupt_handler,\n@@ -1256,8 +1256,8 @@ dpaa2_dev_stop(struct rte_eth_dev *dev)\n \tPMD_INIT_FUNC_TRACE();\n \n \t/* reset interrupt callback */\n-\tif (intr_handle && (intr_handle->fd) &&\n-\t (dev->data->dev_conf.intr_conf.lsc != 0)) {\n+\tif (intr_handle && rte_intr_fd_get(intr_handle) &&\n+\t dev->data->dev_conf.intr_conf.lsc != 0) {\n \t\t/*disable dpni irqs */\n \t\tdpaa2_eth_setup_irqs(dev, 0);\n \ndiff --git a/drivers/net/e1000/em_ethdev.c b/drivers/net/e1000/em_ethdev.c\nindex 9da477e59d..18fea4e0ac 100644\n--- a/drivers/net/e1000/em_ethdev.c\n+++ b/drivers/net/e1000/em_ethdev.c\n@@ -237,7 +237,7 @@ static int\n eth_em_dev_init(struct rte_eth_dev *eth_dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct e1000_adapter *adapter =\n \t\tE1000_DEV_PRIVATE(eth_dev->data->dev_private);\n \tstruct e1000_hw *hw =\n@@ -523,7 +523,7 @@ eth_em_start(struct rte_eth_dev *dev)\n \tstruct e1000_hw *hw =\n \t\tE1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint ret, mask;\n \tuint32_t intr_vector = 0;\n \tuint32_t *speeds;\n@@ -573,12 +573,10 @@ eth_em_start(struct rte_eth_dev *dev)\n \t}\n \n \tif (rte_intr_dp_is_en(intr_handle)) {\n-\t\tintr_handle->intr_vec =\n-\t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t\tdev->data->nb_rx_queues * sizeof(int), 0);\n-\t\tif (intr_handle->intr_vec == NULL) {\n+\t\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t\t\t dev->data->nb_rx_queues)) {\n \t\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %d rx_queues\"\n-\t\t\t\t\t\t\" intr_vec\", dev->data->nb_rx_queues);\n+\t\t\t\t \" intr_vec\", dev->data->nb_rx_queues);\n \t\t\treturn -ENOMEM;\n \t\t}\n \n@@ -716,7 +714,7 @@ eth_em_stop(struct rte_eth_dev *dev)\n \tstruct rte_eth_link link;\n \tstruct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \tdev->data->dev_started = 0;\n \n@@ -750,10 +748,7 @@ eth_em_stop(struct rte_eth_dev *dev)\n \n \t/* Clean datapath event and queue/vec mapping */\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec != NULL) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\trte_intr_vec_list_free(intr_handle);\n \n \treturn 0;\n }\n@@ -765,7 +760,7 @@ eth_em_close(struct rte_eth_dev *dev)\n \tstruct e1000_adapter *adapter =\n \t\tE1000_DEV_PRIVATE(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint ret;\n \n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n@@ -1006,7 +1001,7 @@ eth_em_rx_queue_intr_enable(struct rte_eth_dev *dev, __rte_unused uint16_t queue\n {\n \tstruct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \tem_rxq_intr_enable(hw);\n \trte_intr_ack(intr_handle);\ndiff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c\nindex ae3bc4a9c2..ff06575f03 100644\n--- a/drivers/net/e1000/igb_ethdev.c\n+++ b/drivers/net/e1000/igb_ethdev.c\n@@ -515,7 +515,7 @@ igb_intr_enable(struct rte_eth_dev *dev)\n \tstruct e1000_hw *hw =\n \t\tE1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \tif (rte_intr_allow_others(intr_handle) &&\n \t\tdev->data->dev_conf.intr_conf.lsc != 0) {\n@@ -532,7 +532,7 @@ igb_intr_disable(struct rte_eth_dev *dev)\n \tstruct e1000_hw *hw =\n \t\tE1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \tif (rte_intr_allow_others(intr_handle) &&\n \t\tdev->data->dev_conf.intr_conf.lsc != 0) {\n@@ -851,12 +851,12 @@ eth_igb_dev_init(struct rte_eth_dev *eth_dev)\n \t\t eth_dev->data->port_id, pci_dev->id.vendor_id,\n \t\t pci_dev->id.device_id);\n \n-\trte_intr_callback_register(&pci_dev->intr_handle,\n+\trte_intr_callback_register(pci_dev->intr_handle,\n \t\t\t\t eth_igb_interrupt_handler,\n \t\t\t\t (void *)eth_dev);\n \n \t/* enable uio/vfio intr/eventfd mapping */\n-\trte_intr_enable(&pci_dev->intr_handle);\n+\trte_intr_enable(pci_dev->intr_handle);\n \n \t/* enable support intr */\n \tigb_intr_enable(eth_dev);\n@@ -992,7 +992,7 @@ eth_igbvf_dev_init(struct rte_eth_dev *eth_dev)\n \t\t eth_dev->data->port_id, pci_dev->id.vendor_id,\n \t\t pci_dev->id.device_id, \"igb_mac_82576_vf\");\n \n-\tintr_handle = &pci_dev->intr_handle;\n+\tintr_handle = pci_dev->intr_handle;\n \trte_intr_callback_register(intr_handle,\n \t\t\t\t eth_igbvf_interrupt_handler, eth_dev);\n \n@@ -1196,7 +1196,7 @@ eth_igb_start(struct rte_eth_dev *dev)\n \tstruct e1000_adapter *adapter =\n \t\tE1000_DEV_PRIVATE(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint ret, mask;\n \tuint32_t intr_vector = 0;\n \tuint32_t ctrl_ext;\n@@ -1255,11 +1255,10 @@ eth_igb_start(struct rte_eth_dev *dev)\n \t\t\treturn -1;\n \t}\n \n-\tif (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {\n-\t\tintr_handle->intr_vec =\n-\t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t dev->data->nb_rx_queues * sizeof(int), 0);\n-\t\tif (intr_handle->intr_vec == NULL) {\n+\t/* Allocate the vector list */\n+\tif (rte_intr_dp_is_en(intr_handle)) {\n+\t\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t\t\t dev->data->nb_rx_queues)) {\n \t\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %d rx_queues\"\n \t\t\t\t \" intr_vec\", dev->data->nb_rx_queues);\n \t\t\treturn -ENOMEM;\n@@ -1418,7 +1417,7 @@ eth_igb_stop(struct rte_eth_dev *dev)\n \tstruct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n \tstruct rte_eth_link link;\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct e1000_adapter *adapter =\n \t\tE1000_DEV_PRIVATE(dev->data->dev_private);\n \n@@ -1462,10 +1461,7 @@ eth_igb_stop(struct rte_eth_dev *dev)\n \n \t/* Clean datapath event and queue/vec mapping */\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec != NULL) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\trte_intr_vec_list_free(intr_handle);\n \n \tadapter->stopped = true;\n \tdev->data->dev_started = 0;\n@@ -1505,7 +1501,7 @@ eth_igb_close(struct rte_eth_dev *dev)\n \tstruct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_eth_link link;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct e1000_filter_info *filter_info =\n \t\tE1000_DEV_PRIVATE_TO_FILTER_INFO(dev->data->dev_private);\n \tint ret;\n@@ -1531,10 +1527,8 @@ eth_igb_close(struct rte_eth_dev *dev)\n \n \tigb_dev_free_queues(dev);\n \n-\tif (intr_handle->intr_vec) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\t/* Cleanup vector list */\n+\trte_intr_vec_list_free(intr_handle);\n \n \tmemset(&link, 0, sizeof(link));\n \trte_eth_linkstatus_set(dev, &link);\n@@ -2771,7 +2765,7 @@ static int eth_igb_rxq_interrupt_setup(struct rte_eth_dev *dev)\n \tstruct e1000_hw *hw =\n \t\tE1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint misc_shift = rte_intr_allow_others(intr_handle) ? 1 : 0;\n \tstruct rte_eth_dev_info dev_info;\n \n@@ -3288,7 +3282,7 @@ igbvf_dev_start(struct rte_eth_dev *dev)\n \tstruct e1000_adapter *adapter =\n \t\tE1000_DEV_PRIVATE(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint ret;\n \tuint32_t intr_vector = 0;\n \n@@ -3319,11 +3313,10 @@ igbvf_dev_start(struct rte_eth_dev *dev)\n \t\t\treturn ret;\n \t}\n \n-\tif (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {\n-\t\tintr_handle->intr_vec =\n-\t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t dev->data->nb_rx_queues * sizeof(int), 0);\n-\t\tif (!intr_handle->intr_vec) {\n+\t/* Allocate the vector list */\n+\tif (rte_intr_dp_is_en(intr_handle)) {\n+\t\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t\t\t dev->data->nb_rx_queues)) {\n \t\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %d rx_queues\"\n \t\t\t\t \" intr_vec\", dev->data->nb_rx_queues);\n \t\t\treturn -ENOMEM;\n@@ -3345,7 +3338,7 @@ static int\n igbvf_dev_stop(struct rte_eth_dev *dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct e1000_adapter *adapter =\n \t\tE1000_DEV_PRIVATE(dev->data->dev_private);\n \n@@ -3369,10 +3362,9 @@ igbvf_dev_stop(struct rte_eth_dev *dev)\n \n \t/* Clean datapath event and queue/vec mapping */\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\n+\t/* Clean vector list */\n+\trte_intr_vec_list_free(intr_handle);\n \n \tadapter->stopped = true;\n \tdev->data->dev_started = 0;\n@@ -3410,7 +3402,7 @@ igbvf_dev_close(struct rte_eth_dev *dev)\n \tmemset(&addr, 0, sizeof(addr));\n \tigbvf_default_mac_addr_set(dev, &addr);\n \n-\trte_intr_callback_unregister(&pci_dev->intr_handle,\n+\trte_intr_callback_unregister(pci_dev->intr_handle,\n \t\t\t\t eth_igbvf_interrupt_handler,\n \t\t\t\t (void *)dev);\n \n@@ -5112,7 +5104,7 @@ eth_igb_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)\n \tstruct e1000_hw *hw =\n \t\tE1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint32_t vec = E1000_MISC_VEC_ID;\n \n \tif (rte_intr_allow_others(intr_handle))\n@@ -5132,7 +5124,7 @@ eth_igb_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n \tstruct e1000_hw *hw =\n \t\tE1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint32_t vec = E1000_MISC_VEC_ID;\n \n \tif (rte_intr_allow_others(intr_handle))\n@@ -5210,7 +5202,7 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev)\n \tuint32_t base = E1000_MISC_VEC_ID;\n \tuint32_t misc_shift = 0;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \t/* won't configure msix register if no mapping is done\n \t * between intr vector and event fd\n@@ -5251,8 +5243,9 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev)\n \t\tE1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |\n \t\t\t\t\tE1000_GPIE_PBA | E1000_GPIE_EIAME |\n \t\t\t\t\tE1000_GPIE_NSICR);\n-\t\tintr_mask = RTE_LEN2MASK(intr_handle->nb_efd, uint32_t) <<\n-\t\t\tmisc_shift;\n+\t\tintr_mask =\n+\t\t\tRTE_LEN2MASK(rte_intr_nb_efd_get(intr_handle),\n+\t\t\t\t uint32_t) << misc_shift;\n \n \t\tif (dev->data->dev_conf.intr_conf.lsc != 0)\n \t\t\tintr_mask |= (1 << IGB_MSIX_OTHER_INTR_VEC);\n@@ -5270,8 +5263,8 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev)\n \t/* use EIAM to auto-mask when MSI-X interrupt\n \t * is asserted, this saves a register write for every interrupt\n \t */\n-\tintr_mask = RTE_LEN2MASK(intr_handle->nb_efd, uint32_t) <<\n-\t\tmisc_shift;\n+\tintr_mask = RTE_LEN2MASK(rte_intr_nb_efd_get(intr_handle),\n+\t\t\t\t uint32_t) << misc_shift;\n \n \tif (dev->data->dev_conf.intr_conf.lsc != 0)\n \t\tintr_mask |= (1 << IGB_MSIX_OTHER_INTR_VEC);\n@@ -5281,8 +5274,8 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev)\n \n \tfor (queue_id = 0; queue_id < dev->data->nb_rx_queues; queue_id++) {\n \t\teth_igb_assign_msix_vector(hw, 0, queue_id, vec);\n-\t\tintr_handle->intr_vec[queue_id] = vec;\n-\t\tif (vec < base + intr_handle->nb_efd - 1)\n+\t\trte_intr_vec_list_index_set(intr_handle, queue_id, vec);\n+\t\tif (vec < base + rte_intr_nb_efd_get(intr_handle) - 1)\n \t\t\tvec++;\n \t}\n \ndiff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c\nindex 572d7c20f9..634c97acf6 100644\n--- a/drivers/net/ena/ena_ethdev.c\n+++ b/drivers/net/ena/ena_ethdev.c\n@@ -494,7 +494,7 @@ static void ena_config_debug_area(struct ena_adapter *adapter)\n static int ena_close(struct rte_eth_dev *dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct ena_adapter *adapter = dev->data->dev_private;\n \tint ret = 0;\n \n@@ -954,7 +954,7 @@ static int ena_stop(struct rte_eth_dev *dev)\n \tstruct ena_adapter *adapter = dev->data->dev_private;\n \tstruct ena_com_dev *ena_dev = &adapter->ena_dev;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint rc;\n \n \t/* Cannot free memory in secondary process */\n@@ -976,10 +976,9 @@ static int ena_stop(struct rte_eth_dev *dev)\n \trte_intr_disable(intr_handle);\n \n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec != NULL) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\n+\t/* Cleanup vector list */\n+\trte_intr_vec_list_free(intr_handle);\n \n \trte_intr_enable(intr_handle);\n \n@@ -995,7 +994,7 @@ static int ena_create_io_queue(struct rte_eth_dev *dev, struct ena_ring *ring)\n \tstruct ena_adapter *adapter = ring->adapter;\n \tstruct ena_com_dev *ena_dev = &adapter->ena_dev;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct ena_com_create_io_ctx ctx =\n \t\t/* policy set to _HOST just to satisfy icc compiler */\n \t\t{ ENA_ADMIN_PLACEMENT_POLICY_HOST,\n@@ -1015,7 +1014,10 @@ static int ena_create_io_queue(struct rte_eth_dev *dev, struct ena_ring *ring)\n \t\tena_qid = ENA_IO_RXQ_IDX(ring->id);\n \t\tctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;\n \t\tif (rte_intr_dp_is_en(intr_handle))\n-\t\t\tctx.msix_vector = intr_handle->intr_vec[ring->id];\n+\t\t\tctx.msix_vector =\n+\t\t\t\trte_intr_vec_list_index_get(intr_handle,\n+\t\t\t\t\t\t\t\t ring->id);\n+\n \t\tfor (i = 0; i < ring->ring_size; i++)\n \t\t\tring->empty_rx_reqs[i] = i;\n \t}\n@@ -1824,7 +1826,7 @@ static int eth_ena_dev_init(struct rte_eth_dev *eth_dev)\n \t\t pci_dev->addr.devid,\n \t\t pci_dev->addr.function);\n \n-\tintr_handle = &pci_dev->intr_handle;\n+\tintr_handle = pci_dev->intr_handle;\n \n \tadapter->regs = pci_dev->mem_resource[ENA_REGS_BAR].addr;\n \tadapter->dev_mem_base = pci_dev->mem_resource[ENA_MEM_BAR].addr;\n@@ -3112,7 +3114,7 @@ static int ena_parse_devargs(struct ena_adapter *adapter,\n static int ena_setup_rx_intr(struct rte_eth_dev *dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint rc;\n \tuint16_t vectors_nb, i;\n \tbool rx_intr_requested = dev->data->dev_conf.intr_conf.rxq;\n@@ -3139,9 +3141,9 @@ static int ena_setup_rx_intr(struct rte_eth_dev *dev)\n \t\tgoto enable_intr;\n \t}\n \n-\tintr_handle->intr_vec =\trte_zmalloc(\"intr_vec\",\n-\t\tdev->data->nb_rx_queues * sizeof(*intr_handle->intr_vec), 0);\n-\tif (intr_handle->intr_vec == NULL) {\n+\t/* Allocate the vector list */\n+\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t\t dev->data->nb_rx_queues)) {\n \t\tPMD_DRV_LOG(ERR,\n \t\t\t\"Failed to allocate interrupt vector for %d queues\\n\",\n \t\t\tdev->data->nb_rx_queues);\n@@ -3160,7 +3162,9 @@ static int ena_setup_rx_intr(struct rte_eth_dev *dev)\n \t}\n \n \tfor (i = 0; i < vectors_nb; ++i)\n-\t\tintr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + i;\n+\t\tif (rte_intr_vec_list_index_set(intr_handle, i,\n+\t\t\t\t\t RTE_INTR_VEC_RXTX_OFFSET + i))\n+\t\t\tgoto disable_intr_efd;\n \n \trte_intr_enable(intr_handle);\n \treturn 0;\n@@ -3168,8 +3172,7 @@ static int ena_setup_rx_intr(struct rte_eth_dev *dev)\n disable_intr_efd:\n \trte_intr_efd_disable(intr_handle);\n free_intr_vec:\n-\trte_free(intr_handle->intr_vec);\n-\tintr_handle->intr_vec = NULL;\n+\trte_intr_vec_list_free(intr_handle);\n enable_intr:\n \trte_intr_enable(intr_handle);\n \treturn rc;\ndiff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c\nindex f7ae84767f..5cc6d9f017 100644\n--- a/drivers/net/enic/enic_main.c\n+++ b/drivers/net/enic/enic_main.c\n@@ -448,7 +448,7 @@ enic_intr_handler(void *arg)\n \trte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);\n \tenic_log_q_error(enic);\n \t/* Re-enable irq in case of INTx */\n-\trte_intr_ack(&enic->pdev->intr_handle);\n+\trte_intr_ack(enic->pdev->intr_handle);\n }\n \n static int enic_rxq_intr_init(struct enic *enic)\n@@ -477,14 +477,16 @@ static int enic_rxq_intr_init(struct enic *enic)\n \t\t\t\" interrupts\\n\");\n \t\treturn err;\n \t}\n-\tintr_handle->intr_vec = rte_zmalloc(\"enic_intr_vec\",\n-\t\t\t\t\t rxq_intr_count * sizeof(int), 0);\n-\tif (intr_handle->intr_vec == NULL) {\n+\n+\tif (rte_intr_vec_list_alloc(intr_handle, \"enic_intr_vec\",\n+\t\t\t\t\t rxq_intr_count)) {\n \t\tdev_err(enic, \"Failed to allocate intr_vec\\n\");\n \t\treturn -ENOMEM;\n \t}\n \tfor (i = 0; i < rxq_intr_count; i++)\n-\t\tintr_handle->intr_vec[i] = i + ENICPMD_RXQ_INTR_OFFSET;\n+\t\tif (rte_intr_vec_list_index_set(intr_handle, i,\n+\t\t\t\t\t\t i + ENICPMD_RXQ_INTR_OFFSET))\n+\t\t\treturn -rte_errno;\n \treturn 0;\n }\n \n@@ -494,10 +496,8 @@ static void enic_rxq_intr_deinit(struct enic *enic)\n \n \tintr_handle = enic->rte_dev->intr_handle;\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec != NULL) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\n+\trte_intr_vec_list_free(intr_handle);\n }\n \n static void enic_prep_wq_for_simple_tx(struct enic *enic, uint16_t queue_idx)\n@@ -667,10 +667,10 @@ int enic_enable(struct enic *enic)\n \tvnic_dev_enable_wait(enic->vdev);\n \n \t/* Register and enable error interrupt */\n-\trte_intr_callback_register(&(enic->pdev->intr_handle),\n+\trte_intr_callback_register(enic->pdev->intr_handle,\n \t\tenic_intr_handler, (void *)enic->rte_dev);\n \n-\trte_intr_enable(&(enic->pdev->intr_handle));\n+\trte_intr_enable(enic->pdev->intr_handle);\n \t/* Unmask LSC interrupt */\n \tvnic_intr_unmask(&enic->intr[ENICPMD_LSC_INTR_OFFSET]);\n \n@@ -1111,8 +1111,8 @@ int enic_disable(struct enic *enic)\n \t\t(void)vnic_intr_masked(&enic->intr[i]); /* flush write */\n \t}\n \tenic_rxq_intr_deinit(enic);\n-\trte_intr_disable(&enic->pdev->intr_handle);\n-\trte_intr_callback_unregister(&enic->pdev->intr_handle,\n+\trte_intr_disable(enic->pdev->intr_handle);\n+\trte_intr_callback_unregister(enic->pdev->intr_handle,\n \t\t\t\t enic_intr_handler,\n \t\t\t\t (void *)enic->rte_dev);\n \ndiff --git a/drivers/net/failsafe/failsafe.c b/drivers/net/failsafe/failsafe.c\nindex 82d595b1d1..ad6b43538e 100644\n--- a/drivers/net/failsafe/failsafe.c\n+++ b/drivers/net/failsafe/failsafe.c\n@@ -264,11 +264,23 @@ fs_eth_dev_create(struct rte_vdev_device *vdev)\n \t\tRTE_ETHER_ADDR_BYTES(mac));\n \tdev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC |\n \t\t\t\tRTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;\n-\tPRIV(dev)->intr_handle = (struct rte_intr_handle){\n-\t\t.fd = -1,\n-\t\t.type = RTE_INTR_HANDLE_EXT,\n-\t};\n+\n+\t/* Allocate interrupt instance */\n+\tPRIV(dev)->intr_handle =\n+\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);\n+\tif (PRIV(dev)->intr_handle == NULL) {\n+\t\tERROR(\"Failed to allocate intr handle\");\n+\t\tgoto cancel_alarm;\n+\t}\n+\n+\tif (rte_intr_fd_set(PRIV(dev)->intr_handle, -1))\n+\t\tgoto cancel_alarm;\n+\n+\tif (rte_intr_type_set(PRIV(dev)->intr_handle, RTE_INTR_HANDLE_EXT))\n+\t\tgoto cancel_alarm;\n+\n \trte_eth_dev_probing_finish(dev);\n+\n \treturn 0;\n cancel_alarm:\n \tfailsafe_hotplug_alarm_cancel(dev);\n@@ -297,6 +309,7 @@ fs_rte_eth_free(const char *name)\n \t\treturn 0; /* port already released */\n \tret = failsafe_eth_dev_close(dev);\n \trte_eth_dev_release_port(dev);\n+\trte_intr_instance_free(PRIV(dev)->intr_handle);\n \treturn ret;\n }\n \ndiff --git a/drivers/net/failsafe/failsafe_intr.c b/drivers/net/failsafe/failsafe_intr.c\nindex 5f4810051d..14b87a54ab 100644\n--- a/drivers/net/failsafe/failsafe_intr.c\n+++ b/drivers/net/failsafe/failsafe_intr.c\n@@ -410,12 +410,10 @@ fs_rx_intr_vec_uninstall(struct fs_priv *priv)\n {\n \tstruct rte_intr_handle *intr_handle;\n \n-\tintr_handle = &priv->intr_handle;\n-\tif (intr_handle->intr_vec != NULL) {\n-\t\tfree(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n-\tintr_handle->nb_efd = 0;\n+\tintr_handle = priv->intr_handle;\n+\trte_intr_vec_list_free(intr_handle);\n+\n+\trte_intr_nb_efd_set(intr_handle, 0);\n }\n \n /**\n@@ -439,11 +437,9 @@ fs_rx_intr_vec_install(struct fs_priv *priv)\n \trxqs_n = priv->data->nb_rx_queues;\n \tn = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);\n \tcount = 0;\n-\tintr_handle = &priv->intr_handle;\n-\tRTE_ASSERT(intr_handle->intr_vec == NULL);\n+\tintr_handle = priv->intr_handle;\n \t/* Allocate the interrupt vector of the failsafe Rx proxy interrupts */\n-\tintr_handle->intr_vec = malloc(n * sizeof(intr_handle->intr_vec[0]));\n-\tif (intr_handle->intr_vec == NULL) {\n+\tif (rte_intr_vec_list_alloc(intr_handle, NULL, n)) {\n \t\tfs_rx_intr_vec_uninstall(priv);\n \t\trte_errno = ENOMEM;\n \t\tERROR(\"Failed to allocate memory for interrupt vector,\"\n@@ -456,9 +452,9 @@ fs_rx_intr_vec_install(struct fs_priv *priv)\n \t\t/* Skip queues that cannot request interrupts. */\n \t\tif (rxq == NULL || rxq->event_fd < 0) {\n \t\t\t/* Use invalid intr_vec[] index to disable entry. */\n-\t\t\tintr_handle->intr_vec[i] =\n-\t\t\t\tRTE_INTR_VEC_RXTX_OFFSET +\n-\t\t\t\tRTE_MAX_RXTX_INTR_VEC_ID;\n+\t\t\tif (rte_intr_vec_list_index_set(intr_handle, i,\n+\t\t\tRTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID))\n+\t\t\t\treturn -rte_errno;\n \t\t\tcontinue;\n \t\t}\n \t\tif (count >= RTE_MAX_RXTX_INTR_VEC_ID) {\n@@ -469,15 +465,24 @@ fs_rx_intr_vec_install(struct fs_priv *priv)\n \t\t\tfs_rx_intr_vec_uninstall(priv);\n \t\t\treturn -rte_errno;\n \t\t}\n-\t\tintr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;\n-\t\tintr_handle->efds[count] = rxq->event_fd;\n+\t\tif (rte_intr_vec_list_index_set(intr_handle, i,\n+\t\t\t\t\tRTE_INTR_VEC_RXTX_OFFSET + count))\n+\t\t\treturn -rte_errno;\n+\n+\t\tif (rte_intr_efds_index_set(intr_handle, count,\n+\t\t\t\t\t\t rxq->event_fd))\n+\t\t\treturn -rte_errno;\n \t\tcount++;\n \t}\n \tif (count == 0) {\n \t\tfs_rx_intr_vec_uninstall(priv);\n \t} else {\n-\t\tintr_handle->nb_efd = count;\n-\t\tintr_handle->efd_counter_size = sizeof(uint64_t);\n+\t\tif (rte_intr_nb_efd_set(intr_handle, count))\n+\t\t\treturn -rte_errno;\n+\n+\t\tif (rte_intr_efd_counter_size_set(intr_handle,\n+\t\t\t\tsizeof(uint64_t)))\n+\t\t\treturn -rte_errno;\n \t}\n \treturn 0;\n }\n@@ -499,7 +504,7 @@ failsafe_rx_intr_uninstall(struct rte_eth_dev *dev)\n \tstruct rte_intr_handle *intr_handle;\n \n \tpriv = PRIV(dev);\n-\tintr_handle = &priv->intr_handle;\n+\tintr_handle = priv->intr_handle;\n \trte_intr_free_epoll_fd(intr_handle);\n \tfs_rx_event_proxy_uninstall(priv);\n \tfs_rx_intr_vec_uninstall(priv);\n@@ -530,6 +535,6 @@ failsafe_rx_intr_install(struct rte_eth_dev *dev)\n \t\tfs_rx_intr_vec_uninstall(priv);\n \t\treturn -rte_errno;\n \t}\n-\tdev->intr_handle = &priv->intr_handle;\n+\tdev->intr_handle = priv->intr_handle;\n \treturn 0;\n }\ndiff --git a/drivers/net/failsafe/failsafe_ops.c b/drivers/net/failsafe/failsafe_ops.c\nindex a3a8a1c82e..822883bc2f 100644\n--- a/drivers/net/failsafe/failsafe_ops.c\n+++ b/drivers/net/failsafe/failsafe_ops.c\n@@ -393,15 +393,22 @@ fs_rx_queue_setup(struct rte_eth_dev *dev,\n \t * For the time being, fake as if we are using MSIX interrupts,\n \t * this will cause rte_intr_efd_enable to allocate an eventfd for us.\n \t */\n-\tstruct rte_intr_handle intr_handle = {\n-\t\t.type = RTE_INTR_HANDLE_VFIO_MSIX,\n-\t\t.efds = { -1, },\n-\t};\n+\tstruct rte_intr_handle *intr_handle;\n \tstruct sub_device *sdev;\n \tstruct rxq *rxq;\n \tuint8_t i;\n \tint ret;\n \n+\tintr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);\n+\tif (intr_handle == NULL)\n+\t\treturn -ENOMEM;\n+\n+\tif (rte_intr_type_set(intr_handle, RTE_INTR_HANDLE_VFIO_MSIX))\n+\t\treturn -rte_errno;\n+\n+\tif (rte_intr_efds_index_set(intr_handle, 0, -1))\n+\t\treturn -rte_errno;\n+\n \tfs_lock(dev, 0);\n \tif (rx_conf->rx_deferred_start) {\n \t\tFOREACH_SUBDEV_STATE(sdev, i, dev, DEV_PROBED) {\n@@ -435,12 +442,12 @@ fs_rx_queue_setup(struct rte_eth_dev *dev,\n \trxq->info.nb_desc = nb_rx_desc;\n \trxq->priv = PRIV(dev);\n \trxq->sdev = PRIV(dev)->subs;\n-\tret = rte_intr_efd_enable(&intr_handle, 1);\n+\tret = rte_intr_efd_enable(intr_handle, 1);\n \tif (ret < 0) {\n \t\tfs_unlock(dev, 0);\n \t\treturn ret;\n \t}\n-\trxq->event_fd = intr_handle.efds[0];\n+\trxq->event_fd = rte_intr_efds_index_get(intr_handle, 0);\n \tdev->data->rx_queues[rx_queue_id] = rxq;\n \tFOREACH_SUBDEV_STATE(sdev, i, dev, DEV_ACTIVE) {\n \t\tret = rte_eth_rx_queue_setup(PORT_ID(sdev),\ndiff --git a/drivers/net/failsafe/failsafe_private.h b/drivers/net/failsafe/failsafe_private.h\nindex cd39d103c6..a80f5e2caf 100644\n--- a/drivers/net/failsafe/failsafe_private.h\n+++ b/drivers/net/failsafe/failsafe_private.h\n@@ -166,7 +166,7 @@ struct fs_priv {\n \tstruct rte_ether_addr *mcast_addrs;\n \t/* current capabilities */\n \tstruct rte_eth_dev_owner my_owner; /* Unique owner. */\n-\tstruct rte_intr_handle intr_handle; /* Port interrupt handle. */\n+\tstruct rte_intr_handle *intr_handle; /* Port interrupt handle. */\n \t/*\n \t * Fail-safe state machine.\n \t * This level will be tracking state of the EAL and eth\ndiff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c\nindex d256334bfd..c25c323140 100644\n--- a/drivers/net/fm10k/fm10k_ethdev.c\n+++ b/drivers/net/fm10k/fm10k_ethdev.c\n@@ -32,7 +32,8 @@\n #define BIT_MASK_PER_UINT32 ((1 << CHARS_PER_UINT32) - 1)\n \n /* default 1:1 map from queue ID to interrupt vector ID */\n-#define Q2V(pci_dev, queue_id) ((pci_dev)->intr_handle.intr_vec[queue_id])\n+#define Q2V(pci_dev, queue_id)\t\t\t\t\t\t \\\n+\t(rte_intr_vec_list_index_get((pci_dev)->intr_handle, queue_id))\n \n /* First 64 Logical ports for PF/VMDQ, second 64 for Flow director */\n #define MAX_LPORT_NUM 128\n@@ -690,7 +691,7 @@ fm10k_dev_rx_init(struct rte_eth_dev *dev)\n \tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct fm10k_macvlan_filter_info *macvlan;\n \tstruct rte_pci_device *pdev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pdev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pdev->intr_handle;\n \tint i, ret;\n \tstruct fm10k_rx_queue *rxq;\n \tuint64_t base_addr;\n@@ -1158,7 +1159,7 @@ fm10k_dev_stop(struct rte_eth_dev *dev)\n {\n \tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pdev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pdev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pdev->intr_handle;\n \tint i;\n \n \tPMD_INIT_FUNC_TRACE();\n@@ -1187,8 +1188,7 @@ fm10k_dev_stop(struct rte_eth_dev *dev)\n \t}\n \t/* Clean datapath event and queue/vec mapping */\n \trte_intr_efd_disable(intr_handle);\n-\trte_free(intr_handle->intr_vec);\n-\tintr_handle->intr_vec = NULL;\n+\trte_intr_vec_list_free(intr_handle);\n \n \treturn 0;\n }\n@@ -2367,7 +2367,7 @@ fm10k_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n \telse\n \t\tFM10K_WRITE_REG(hw, FM10K_VFITR(Q2V(pdev, queue_id)),\n \t\t\tFM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR);\n-\trte_intr_ack(&pdev->intr_handle);\n+\trte_intr_ack(pdev->intr_handle);\n \treturn 0;\n }\n \n@@ -2392,7 +2392,7 @@ fm10k_dev_rxq_interrupt_setup(struct rte_eth_dev *dev)\n {\n \tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pdev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pdev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pdev->intr_handle;\n \tuint32_t intr_vector, vec;\n \tuint16_t queue_id;\n \tint result = 0;\n@@ -2420,15 +2420,17 @@ fm10k_dev_rxq_interrupt_setup(struct rte_eth_dev *dev)\n \t}\n \n \tif (rte_intr_dp_is_en(intr_handle) && !result) {\n-\t\tintr_handle->intr_vec =\trte_zmalloc(\"intr_vec\",\n-\t\t\tdev->data->nb_rx_queues * sizeof(int), 0);\n-\t\tif (intr_handle->intr_vec) {\n+\t\tif (!rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t\t\t dev->data->nb_rx_queues)) {\n \t\t\tfor (queue_id = 0, vec = FM10K_RX_VEC_START;\n \t\t\t\t\tqueue_id < dev->data->nb_rx_queues;\n \t\t\t\t\tqueue_id++) {\n-\t\t\t\tintr_handle->intr_vec[queue_id] = vec;\n-\t\t\t\tif (vec < intr_handle->nb_efd - 1\n-\t\t\t\t\t\t+ FM10K_RX_VEC_START)\n+\t\t\t\trte_intr_vec_list_index_set(intr_handle,\n+\t\t\t\t\t\t\t\tqueue_id, vec);\n+\t\t\t\tint nb_efd =\n+\t\t\t\t\trte_intr_nb_efd_get(intr_handle);\n+\t\t\t\tif (vec < (uint32_t)nb_efd - 1 +\n+\t\t\t\t\t\t\tFM10K_RX_VEC_START)\n \t\t\t\t\tvec++;\n \t\t\t}\n \t\t} else {\n@@ -2787,7 +2789,7 @@ fm10k_dev_close(struct rte_eth_dev *dev)\n {\n \tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pdev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pdev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pdev->intr_handle;\n \tint ret;\n \n \tPMD_INIT_FUNC_TRACE();\n@@ -3053,7 +3055,7 @@ eth_fm10k_dev_init(struct rte_eth_dev *dev)\n {\n \tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pdev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pdev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pdev->intr_handle;\n \tint diag, i;\n \tstruct fm10k_macvlan_filter_info *macvlan;\n \ndiff --git a/drivers/net/hinic/hinic_pmd_ethdev.c b/drivers/net/hinic/hinic_pmd_ethdev.c\nindex 4cd5a85d5f..9cabd3e0c1 100644\n--- a/drivers/net/hinic/hinic_pmd_ethdev.c\n+++ b/drivers/net/hinic/hinic_pmd_ethdev.c\n@@ -1228,13 +1228,13 @@ static void hinic_disable_interrupt(struct rte_eth_dev *dev)\n \thinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);\n \n \t/* disable rte interrupt */\n-\tret = rte_intr_disable(&pci_dev->intr_handle);\n+\tret = rte_intr_disable(pci_dev->intr_handle);\n \tif (ret)\n \t\tPMD_DRV_LOG(ERR, \"Disable intr failed: %d\", ret);\n \n \tdo {\n \t\tret =\n-\t\trte_intr_callback_unregister(&pci_dev->intr_handle,\n+\t\trte_intr_callback_unregister(pci_dev->intr_handle,\n \t\t\t\t\t hinic_dev_interrupt_handler, dev);\n \t\tif (ret >= 0) {\n \t\t\tbreak;\n@@ -3118,7 +3118,7 @@ static int hinic_func_init(struct rte_eth_dev *eth_dev)\n \t}\n \n \t/* register callback func to eal lib */\n-\trc = rte_intr_callback_register(&pci_dev->intr_handle,\n+\trc = rte_intr_callback_register(pci_dev->intr_handle,\n \t\t\t\t\thinic_dev_interrupt_handler,\n \t\t\t\t\t(void *)eth_dev);\n \tif (rc) {\n@@ -3128,7 +3128,7 @@ static int hinic_func_init(struct rte_eth_dev *eth_dev)\n \t}\n \n \t/* enable uio/vfio intr/eventfd mapping */\n-\trc = rte_intr_enable(&pci_dev->intr_handle);\n+\trc = rte_intr_enable(pci_dev->intr_handle);\n \tif (rc) {\n \t\tPMD_DRV_LOG(ERR, \"Enable rte interrupt failed, dev_name: %s\",\n \t\t\t eth_dev->data->name);\n@@ -3158,7 +3158,7 @@ static int hinic_func_init(struct rte_eth_dev *eth_dev)\n \treturn 0;\n \n enable_intr_fail:\n-\t(void)rte_intr_callback_unregister(&pci_dev->intr_handle,\n+\t(void)rte_intr_callback_unregister(pci_dev->intr_handle,\n \t\t\t\t\t hinic_dev_interrupt_handler,\n \t\t\t\t\t (void *)eth_dev);\n \ndiff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c\nindex 9881659ceb..1437a07372 100644\n--- a/drivers/net/hns3/hns3_ethdev.c\n+++ b/drivers/net/hns3/hns3_ethdev.c\n@@ -5224,7 +5224,7 @@ hns3_init_pf(struct rte_eth_dev *eth_dev)\n \n \thns3_config_all_msix_error(hw, true);\n \n-\tret = rte_intr_callback_register(&pci_dev->intr_handle,\n+\tret = rte_intr_callback_register(pci_dev->intr_handle,\n \t\t\t\t\t hns3_interrupt_handler,\n \t\t\t\t\t eth_dev);\n \tif (ret) {\n@@ -5237,7 +5237,7 @@ hns3_init_pf(struct rte_eth_dev *eth_dev)\n \t\tgoto err_get_config;\n \n \t/* Enable interrupt */\n-\trte_intr_enable(&pci_dev->intr_handle);\n+\trte_intr_enable(pci_dev->intr_handle);\n \thns3_pf_enable_irq0(hw);\n \n \t/* Get configuration */\n@@ -5296,8 +5296,8 @@ hns3_init_pf(struct rte_eth_dev *eth_dev)\n \thns3_tqp_stats_uninit(hw);\n err_get_config:\n \thns3_pf_disable_irq0(hw);\n-\trte_intr_disable(&pci_dev->intr_handle);\n-\thns3_intr_unregister(&pci_dev->intr_handle, hns3_interrupt_handler,\n+\trte_intr_disable(pci_dev->intr_handle);\n+\thns3_intr_unregister(pci_dev->intr_handle, hns3_interrupt_handler,\n \t\t\t eth_dev);\n err_intr_callback_register:\n err_cmd_init:\n@@ -5330,8 +5330,8 @@ hns3_uninit_pf(struct rte_eth_dev *eth_dev)\n \thns3_tqp_stats_uninit(hw);\n \thns3_config_mac_tnl_int(hw, false);\n \thns3_pf_disable_irq0(hw);\n-\trte_intr_disable(&pci_dev->intr_handle);\n-\thns3_intr_unregister(&pci_dev->intr_handle, hns3_interrupt_handler,\n+\trte_intr_disable(pci_dev->intr_handle);\n+\thns3_intr_unregister(pci_dev->intr_handle, hns3_interrupt_handler,\n \t\t\t eth_dev);\n \thns3_config_all_msix_error(hw, false);\n \thns3_cmd_uninit(hw);\n@@ -5665,7 +5665,7 @@ static int\n hns3_map_rx_interrupt(struct rte_eth_dev *dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint16_t base = RTE_INTR_VEC_ZERO_OFFSET;\n \tuint16_t vec = RTE_INTR_VEC_ZERO_OFFSET;\n@@ -5688,16 +5688,13 @@ hns3_map_rx_interrupt(struct rte_eth_dev *dev)\n \tif (rte_intr_efd_enable(intr_handle, intr_vector))\n \t\treturn -EINVAL;\n \n-\tif (intr_handle->intr_vec == NULL) {\n-\t\tintr_handle->intr_vec =\n-\t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t hw->used_rx_queues * sizeof(int), 0);\n-\t\tif (intr_handle->intr_vec == NULL) {\n-\t\t\thns3_err(hw, \"failed to allocate %u rx_queues intr_vec\",\n-\t\t\t\t\thw->used_rx_queues);\n-\t\t\tret = -ENOMEM;\n-\t\t\tgoto alloc_intr_vec_error;\n-\t\t}\n+\t/* Allocate vector list */\n+\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t hw->used_rx_queues)) {\n+\t\thns3_err(hw, \"failed to allocate %u rx_queues intr_vec\",\n+\t\t\t hw->used_rx_queues);\n+\t\tret = -ENOMEM;\n+\t\tgoto alloc_intr_vec_error;\n \t}\n \n \tif (rte_intr_allow_others(intr_handle)) {\n@@ -5710,20 +5707,21 @@ hns3_map_rx_interrupt(struct rte_eth_dev *dev)\n \t\t\t\t\t\t HNS3_RING_TYPE_RX, q_id);\n \t\tif (ret)\n \t\t\tgoto bind_vector_error;\n-\t\tintr_handle->intr_vec[q_id] = vec;\n+\n+\t\tif (rte_intr_vec_list_index_set(intr_handle, q_id, vec))\n+\t\t\tgoto bind_vector_error;\n \t\t/*\n \t\t * If there are not enough efds (e.g. not enough interrupt),\n \t\t * remaining queues will be bond to the last interrupt.\n \t\t */\n-\t\tif (vec < base + intr_handle->nb_efd - 1)\n+\t\tif (vec < base + rte_intr_nb_efd_get(intr_handle) - 1)\n \t\t\tvec++;\n \t}\n \trte_intr_enable(intr_handle);\n \treturn 0;\n \n bind_vector_error:\n-\trte_free(intr_handle->intr_vec);\n-\tintr_handle->intr_vec = NULL;\n+\trte_intr_vec_list_free(intr_handle);\n alloc_intr_vec_error:\n \trte_intr_efd_disable(intr_handle);\n \treturn ret;\n@@ -5734,7 +5732,7 @@ hns3_restore_rx_interrupt(struct hns3_hw *hw)\n {\n \tstruct rte_eth_dev *dev = &rte_eth_devices[hw->data->port_id];\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint16_t q_id;\n \tint ret;\n \n@@ -5744,8 +5742,9 @@ hns3_restore_rx_interrupt(struct hns3_hw *hw)\n \tif (rte_intr_dp_is_en(intr_handle)) {\n \t\tfor (q_id = 0; q_id < hw->used_rx_queues; q_id++) {\n \t\t\tret = hns3_bind_ring_with_vector(hw,\n-\t\t\t\t\tintr_handle->intr_vec[q_id], true,\n-\t\t\t\t\tHNS3_RING_TYPE_RX, q_id);\n+\t\t\t\trte_intr_vec_list_index_get(intr_handle,\n+\t\t\t\t\t\t\t\t q_id),\n+\t\t\t\ttrue, HNS3_RING_TYPE_RX, q_id);\n \t\t\tif (ret)\n \t\t\t\treturn ret;\n \t\t}\n@@ -5888,7 +5887,7 @@ static void\n hns3_unmap_rx_interrupt(struct rte_eth_dev *dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct hns3_adapter *hns = dev->data->dev_private;\n \tstruct hns3_hw *hw = &hns->hw;\n \tuint8_t base = RTE_INTR_VEC_ZERO_OFFSET;\n@@ -5908,16 +5907,14 @@ hns3_unmap_rx_interrupt(struct rte_eth_dev *dev)\n \t\t\t(void)hns3_bind_ring_with_vector(hw, vec, false,\n \t\t\t\t\t\t\t HNS3_RING_TYPE_RX,\n \t\t\t\t\t\t\t q_id);\n-\t\t\tif (vec < base + intr_handle->nb_efd - 1)\n+\t\t\tif (vec < base + rte_intr_nb_efd_get(intr_handle)\n+\t\t\t\t\t\t\t\t\t- 1)\n \t\t\t\tvec++;\n \t\t}\n \t}\n \t/* Clean datapath event and queue/vec mapping */\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\trte_intr_vec_list_free(intr_handle);\n }\n \n static int\ndiff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c\nindex c0c1f1c4c1..873924927c 100644\n--- a/drivers/net/hns3/hns3_ethdev_vf.c\n+++ b/drivers/net/hns3/hns3_ethdev_vf.c\n@@ -1956,7 +1956,7 @@ hns3vf_init_vf(struct rte_eth_dev *eth_dev)\n \n \thns3vf_clear_event_cause(hw, 0);\n \n-\tret = rte_intr_callback_register(&pci_dev->intr_handle,\n+\tret = rte_intr_callback_register(pci_dev->intr_handle,\n \t\t\t\t\t hns3vf_interrupt_handler, eth_dev);\n \tif (ret) {\n \t\tPMD_INIT_LOG(ERR, \"Failed to register intr: %d\", ret);\n@@ -1964,7 +1964,7 @@ hns3vf_init_vf(struct rte_eth_dev *eth_dev)\n \t}\n \n \t/* Enable interrupt */\n-\trte_intr_enable(&pci_dev->intr_handle);\n+\trte_intr_enable(pci_dev->intr_handle);\n \thns3vf_enable_irq0(hw);\n \n \t/* Get configuration from PF */\n@@ -2016,8 +2016,8 @@ hns3vf_init_vf(struct rte_eth_dev *eth_dev)\n \n err_get_config:\n \thns3vf_disable_irq0(hw);\n-\trte_intr_disable(&pci_dev->intr_handle);\n-\thns3_intr_unregister(&pci_dev->intr_handle, hns3vf_interrupt_handler,\n+\trte_intr_disable(pci_dev->intr_handle);\n+\thns3_intr_unregister(pci_dev->intr_handle, hns3vf_interrupt_handler,\n \t\t\t eth_dev);\n err_intr_callback_register:\n err_cmd_init:\n@@ -2045,8 +2045,8 @@ hns3vf_uninit_vf(struct rte_eth_dev *eth_dev)\n \thns3_flow_uninit(eth_dev);\n \thns3_tqp_stats_uninit(hw);\n \thns3vf_disable_irq0(hw);\n-\trte_intr_disable(&pci_dev->intr_handle);\n-\thns3_intr_unregister(&pci_dev->intr_handle, hns3vf_interrupt_handler,\n+\trte_intr_disable(pci_dev->intr_handle);\n+\thns3_intr_unregister(pci_dev->intr_handle, hns3vf_interrupt_handler,\n \t\t\t eth_dev);\n \thns3_cmd_uninit(hw);\n \thns3_cmd_destroy_queue(hw);\n@@ -2089,7 +2089,7 @@ hns3vf_unmap_rx_interrupt(struct rte_eth_dev *dev)\n {\n \tstruct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint8_t base = RTE_INTR_VEC_ZERO_OFFSET;\n \tuint8_t vec = RTE_INTR_VEC_ZERO_OFFSET;\n \tuint16_t q_id;\n@@ -2107,16 +2107,16 @@ hns3vf_unmap_rx_interrupt(struct rte_eth_dev *dev)\n \t\t\t(void)hns3vf_bind_ring_with_vector(hw, vec, false,\n \t\t\t\t\t\t\t HNS3_RING_TYPE_RX,\n \t\t\t\t\t\t\t q_id);\n-\t\t\tif (vec < base + intr_handle->nb_efd - 1)\n+\t\t\tif (vec < base + rte_intr_nb_efd_get(intr_handle)\n+\t\t\t - 1)\n \t\t\t\tvec++;\n \t\t}\n \t}\n \t/* Clean datapath event and queue/vec mapping */\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\n+\t/* Cleanup vector list */\n+\trte_intr_vec_list_free(intr_handle);\n }\n \n static int\n@@ -2272,7 +2272,7 @@ static int\n hns3vf_map_rx_interrupt(struct rte_eth_dev *dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint8_t base = RTE_INTR_VEC_ZERO_OFFSET;\n \tuint8_t vec = RTE_INTR_VEC_ZERO_OFFSET;\n@@ -2295,16 +2295,13 @@ hns3vf_map_rx_interrupt(struct rte_eth_dev *dev)\n \tif (rte_intr_efd_enable(intr_handle, intr_vector))\n \t\treturn -EINVAL;\n \n-\tif (intr_handle->intr_vec == NULL) {\n-\t\tintr_handle->intr_vec =\n-\t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t hw->used_rx_queues * sizeof(int), 0);\n-\t\tif (intr_handle->intr_vec == NULL) {\n-\t\t\thns3_err(hw, \"Failed to allocate %u rx_queues\"\n-\t\t\t\t \" intr_vec\", hw->used_rx_queues);\n-\t\t\tret = -ENOMEM;\n-\t\t\tgoto vf_alloc_intr_vec_error;\n-\t\t}\n+\t/* Allocate vector list */\n+\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t hw->used_rx_queues)) {\n+\t\thns3_err(hw, \"Failed to allocate %u rx_queues\"\n+\t\t\t \" intr_vec\", hw->used_rx_queues);\n+\t\tret = -ENOMEM;\n+\t\tgoto vf_alloc_intr_vec_error;\n \t}\n \n \tif (rte_intr_allow_others(intr_handle)) {\n@@ -2317,20 +2314,22 @@ hns3vf_map_rx_interrupt(struct rte_eth_dev *dev)\n \t\t\t\t\t\t HNS3_RING_TYPE_RX, q_id);\n \t\tif (ret)\n \t\t\tgoto vf_bind_vector_error;\n-\t\tintr_handle->intr_vec[q_id] = vec;\n+\n+\t\tif (rte_intr_vec_list_index_set(intr_handle, q_id, vec))\n+\t\t\tgoto vf_bind_vector_error;\n+\n \t\t/*\n \t\t * If there are not enough efds (e.g. not enough interrupt),\n \t\t * remaining queues will be bond to the last interrupt.\n \t\t */\n-\t\tif (vec < base + intr_handle->nb_efd - 1)\n+\t\tif (vec < base + rte_intr_nb_efd_get(intr_handle) - 1)\n \t\t\tvec++;\n \t}\n \trte_intr_enable(intr_handle);\n \treturn 0;\n \n vf_bind_vector_error:\n-\trte_free(intr_handle->intr_vec);\n-\tintr_handle->intr_vec = NULL;\n+\trte_intr_vec_list_free(intr_handle);\n vf_alloc_intr_vec_error:\n \trte_intr_efd_disable(intr_handle);\n \treturn ret;\n@@ -2341,7 +2340,7 @@ hns3vf_restore_rx_interrupt(struct hns3_hw *hw)\n {\n \tstruct rte_eth_dev *dev = &rte_eth_devices[hw->data->port_id];\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint16_t q_id;\n \tint ret;\n \n@@ -2351,8 +2350,9 @@ hns3vf_restore_rx_interrupt(struct hns3_hw *hw)\n \tif (rte_intr_dp_is_en(intr_handle)) {\n \t\tfor (q_id = 0; q_id < hw->used_rx_queues; q_id++) {\n \t\t\tret = hns3vf_bind_ring_with_vector(hw,\n-\t\t\t\t\tintr_handle->intr_vec[q_id], true,\n-\t\t\t\t\tHNS3_RING_TYPE_RX, q_id);\n+\t\t\t\trte_intr_vec_list_index_get(intr_handle,\n+\t\t\t\t\t\t\t\t q_id),\n+\t\t\t\ttrue, HNS3_RING_TYPE_RX, q_id);\n \t\t\tif (ret)\n \t\t\t\treturn ret;\n \t\t}\n@@ -2816,7 +2816,7 @@ hns3vf_reinit_dev(struct hns3_adapter *hns)\n \tint ret;\n \n \tif (hw->reset.level == HNS3_VF_FULL_RESET) {\n-\t\trte_intr_disable(&pci_dev->intr_handle);\n+\t\trte_intr_disable(pci_dev->intr_handle);\n \t\tret = hns3vf_set_bus_master(pci_dev, true);\n \t\tif (ret < 0) {\n \t\t\thns3_err(hw, \"failed to set pci bus, ret = %d\", ret);\n@@ -2842,7 +2842,7 @@ hns3vf_reinit_dev(struct hns3_adapter *hns)\n \t\t\t\thns3_err(hw, \"Failed to enable msix\");\n \t\t}\n \n-\t\trte_intr_enable(&pci_dev->intr_handle);\n+\t\trte_intr_enable(pci_dev->intr_handle);\n \t}\n \n \tret = hns3_reset_all_tqps(hns);\ndiff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c\nindex b633aabb14..ceb98025f8 100644\n--- a/drivers/net/hns3/hns3_rxtx.c\n+++ b/drivers/net/hns3/hns3_rxtx.c\n@@ -1050,7 +1050,7 @@ int\n hns3_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \n \tif (dev->data->dev_conf.intr_conf.rxq == 0)\ndiff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 293df887bf..62e374d19e 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -1440,7 +1440,7 @@ eth_i40e_dev_init(struct rte_eth_dev *dev, void *init_params __rte_unused)\n \t}\n \ti40e_set_default_ptype_table(dev);\n \tpci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tintr_handle = &pci_dev->intr_handle;\n+\tintr_handle = pci_dev->intr_handle;\n \n \trte_eth_copy_pci_info(dev, pci_dev);\n \n@@ -1972,7 +1972,7 @@ i40e_vsi_queues_unbind_intr(struct i40e_vsi *vsi)\n {\n \tstruct rte_eth_dev *dev = I40E_VSI_TO_ETH_DEV(vsi);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct i40e_hw *hw = I40E_VSI_TO_HW(vsi);\n \tuint16_t msix_vect = vsi->msix_intr;\n \tuint16_t i;\n@@ -2088,10 +2088,11 @@ i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t itr_idx)\n {\n \tstruct rte_eth_dev *dev = I40E_VSI_TO_ETH_DEV(vsi);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct i40e_hw *hw = I40E_VSI_TO_HW(vsi);\n \tuint16_t msix_vect = vsi->msix_intr;\n-\tuint16_t nb_msix = RTE_MIN(vsi->nb_msix, intr_handle->nb_efd);\n+\tuint16_t nb_msix = RTE_MIN(vsi->nb_msix,\n+\t\t\t\t rte_intr_nb_efd_get(intr_handle));\n \tuint16_t queue_idx = 0;\n \tint record = 0;\n \tint i;\n@@ -2141,8 +2142,8 @@ i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t itr_idx)\n \t\t\t\t\t vsi->nb_used_qps - i,\n \t\t\t\t\t itr_idx);\n \t\t\tfor (; !!record && i < vsi->nb_used_qps; i++)\n-\t\t\t\tintr_handle->intr_vec[queue_idx + i] =\n-\t\t\t\t\tmsix_vect;\n+\t\t\t\trte_intr_vec_list_index_set(intr_handle,\n+\t\t\t\t\t\tqueue_idx + i, msix_vect);\n \t\t\tbreak;\n \t\t}\n \t\t/* 1:1 queue/msix_vect mapping */\n@@ -2150,7 +2151,9 @@ i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t itr_idx)\n \t\t\t\t vsi->base_queue + i, 1,\n \t\t\t\t itr_idx);\n \t\tif (!!record)\n-\t\t\tintr_handle->intr_vec[queue_idx + i] = msix_vect;\n+\t\t\tif (rte_intr_vec_list_index_set(intr_handle,\n+\t\t\t\t\t\tqueue_idx + i, msix_vect))\n+\t\t\t\treturn -rte_errno;\n \n \t\tmsix_vect++;\n \t\tnb_msix--;\n@@ -2164,7 +2167,7 @@ i40e_vsi_enable_queues_intr(struct i40e_vsi *vsi)\n {\n \tstruct rte_eth_dev *dev = I40E_VSI_TO_ETH_DEV(vsi);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct i40e_hw *hw = I40E_VSI_TO_HW(vsi);\n \tstruct i40e_pf *pf = I40E_VSI_TO_PF(vsi);\n \tuint16_t msix_intr, i;\n@@ -2191,7 +2194,7 @@ i40e_vsi_disable_queues_intr(struct i40e_vsi *vsi)\n {\n \tstruct rte_eth_dev *dev = I40E_VSI_TO_ETH_DEV(vsi);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct i40e_hw *hw = I40E_VSI_TO_HW(vsi);\n \tstruct i40e_pf *pf = I40E_VSI_TO_PF(vsi);\n \tuint16_t msix_intr, i;\n@@ -2357,7 +2360,7 @@ i40e_dev_start(struct rte_eth_dev *dev)\n \tstruct i40e_vsi *main_vsi = pf->main_vsi;\n \tint ret, i;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint32_t intr_vector = 0;\n \tstruct i40e_vsi *vsi;\n \tuint16_t nb_rxq, nb_txq;\n@@ -2375,12 +2378,9 @@ i40e_dev_start(struct rte_eth_dev *dev)\n \t\t\treturn ret;\n \t}\n \n-\tif (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {\n-\t\tintr_handle->intr_vec =\n-\t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t dev->data->nb_rx_queues * sizeof(int),\n-\t\t\t\t 0);\n-\t\tif (!intr_handle->intr_vec) {\n+\tif (rte_intr_dp_is_en(intr_handle)) {\n+\t\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t\t\t dev->data->nb_rx_queues)) {\n \t\t\tPMD_INIT_LOG(ERR,\n \t\t\t\t\"Failed to allocate %d rx_queues intr_vec\",\n \t\t\t\tdev->data->nb_rx_queues);\n@@ -2521,7 +2521,7 @@ i40e_dev_stop(struct rte_eth_dev *dev)\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct i40e_vsi *main_vsi = pf->main_vsi;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint i;\n \n \tif (hw->adapter_stopped == 1)\n@@ -2562,10 +2562,9 @@ i40e_dev_stop(struct rte_eth_dev *dev)\n \n \t/* Clean datapath event and queue/vec mapping */\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\n+\t/* Cleanup vector list */\n+\trte_intr_vec_list_free(intr_handle);\n \n \t/* reset hierarchy commit */\n \tpf->tm_conf.committed = false;\n@@ -2584,7 +2583,7 @@ i40e_dev_close(struct rte_eth_dev *dev)\n \tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct i40e_filter_control_settings settings;\n \tstruct rte_flow *p_flow;\n \tuint32_t reg;\n@@ -11068,11 +11067,11 @@ static int\n i40e_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint16_t msix_intr;\n \n-\tmsix_intr = intr_handle->intr_vec[queue_id];\n+\tmsix_intr = rte_intr_vec_list_index_get(intr_handle, queue_id);\n \tif (msix_intr == I40E_MISC_VEC_ID)\n \t\tI40E_WRITE_REG(hw, I40E_PFINT_DYN_CTL0,\n \t\t\t I40E_PFINT_DYN_CTL0_INTENA_MASK |\n@@ -11087,7 +11086,7 @@ i40e_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n \t\t\t I40E_PFINT_DYN_CTLN_ITR_INDX_MASK);\n \n \tI40E_WRITE_FLUSH(hw);\n-\trte_intr_ack(&pci_dev->intr_handle);\n+\trte_intr_ack(pci_dev->intr_handle);\n \n \treturn 0;\n }\n@@ -11096,11 +11095,11 @@ static int\n i40e_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint16_t msix_intr;\n \n-\tmsix_intr = intr_handle->intr_vec[queue_id];\n+\tmsix_intr = rte_intr_vec_list_index_get(intr_handle, queue_id);\n \tif (msix_intr == I40E_MISC_VEC_ID)\n \t\tI40E_WRITE_REG(hw, I40E_PFINT_DYN_CTL0,\n \t\t\t I40E_PFINT_DYN_CTL0_ITR_INDX_MASK);\ndiff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c\nindex b2b413c247..f892306f18 100644\n--- a/drivers/net/iavf/iavf_ethdev.c\n+++ b/drivers/net/iavf/iavf_ethdev.c\n@@ -646,17 +646,16 @@ static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev,\n \t\t\treturn -1;\n \t}\n \n-\tif (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {\n-\t\tintr_handle->intr_vec =\n-\t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t dev->data->nb_rx_queues * sizeof(int), 0);\n-\t\tif (!intr_handle->intr_vec) {\n+\tif (rte_intr_dp_is_en(intr_handle)) {\n+\t\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t\t\t dev->data->nb_rx_queues)) {\n \t\t\tPMD_DRV_LOG(ERR, \"Failed to allocate %d rx intr_vec\",\n \t\t\t\t dev->data->nb_rx_queues);\n \t\t\treturn -1;\n \t\t}\n \t}\n \n+\n \tqv_map = rte_zmalloc(\"qv_map\",\n \t\tdev->data->nb_rx_queues * sizeof(struct iavf_qv_map), 0);\n \tif (!qv_map) {\n@@ -716,7 +715,8 @@ static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev,\n \t\t\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n \t\t\t\tqv_map[i].queue_id = i;\n \t\t\t\tqv_map[i].vector_id = vf->msix_base;\n-\t\t\t\tintr_handle->intr_vec[i] = IAVF_MISC_VEC_ID;\n+\t\t\t\trte_intr_vec_list_index_set(intr_handle,\n+\t\t\t\t\t\t\ti, IAVF_MISC_VEC_ID);\n \t\t\t}\n \t\t\tvf->qv_map = qv_map;\n \t\t\tPMD_DRV_LOG(DEBUG,\n@@ -726,14 +726,16 @@ static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev,\n \t\t\t/* If Rx interrupt is reuquired, and we can use\n \t\t\t * multi interrupts, then the vec is from 1\n \t\t\t */\n-\t\t\tvf->nb_msix = RTE_MIN(intr_handle->nb_efd,\n-\t\t\t\t (uint16_t)(vf->vf_res->max_vectors - 1));\n+\t\t\tvf->nb_msix =\n+\t\t\t\tRTE_MIN(rte_intr_nb_efd_get(intr_handle),\n+\t\t\t\t(uint16_t)(vf->vf_res->max_vectors - 1));\n \t\t\tvf->msix_base = IAVF_RX_VEC_START;\n \t\t\tvec = IAVF_RX_VEC_START;\n \t\t\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n \t\t\t\tqv_map[i].queue_id = i;\n \t\t\t\tqv_map[i].vector_id = vec;\n-\t\t\t\tintr_handle->intr_vec[i] = vec++;\n+\t\t\t\trte_intr_vec_list_index_set(intr_handle,\n+\t\t\t\t\t\t\t\t i, vec++);\n \t\t\t\tif (vec >= vf->nb_msix + IAVF_RX_VEC_START)\n \t\t\t\t\tvec = IAVF_RX_VEC_START;\n \t\t\t}\n@@ -775,8 +777,7 @@ static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev,\n \tvf->qv_map = NULL;\n \n qv_map_alloc_err:\n-\trte_free(intr_handle->intr_vec);\n-\tintr_handle->intr_vec = NULL;\n+\trte_intr_vec_list_free(intr_handle);\n \n \treturn -1;\n }\n@@ -912,10 +913,7 @@ iavf_dev_stop(struct rte_eth_dev *dev)\n \t/* Disable the interrupt for Rx */\n \trte_intr_efd_disable(intr_handle);\n \t/* Rx interrupt vector mapping free */\n-\tif (intr_handle->intr_vec) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\trte_intr_vec_list_free(intr_handle);\n \n \t/* remove all mac addrs */\n \tiavf_add_del_all_mac_addr(adapter, false);\n@@ -1639,7 +1637,8 @@ iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n \tstruct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter);\n \tuint16_t msix_intr;\n \n-\tmsix_intr = pci_dev->intr_handle.intr_vec[queue_id];\n+\tmsix_intr = rte_intr_vec_list_index_get(pci_dev->intr_handle,\n+\t\t\t\t\t\t queue_id);\n \tif (msix_intr == IAVF_MISC_VEC_ID) {\n \t\tPMD_DRV_LOG(INFO, \"MISC is also enabled for control\");\n \t\tIAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01,\n@@ -1658,7 +1657,7 @@ iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n \tIAVF_WRITE_FLUSH(hw);\n \n \tif (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)\n-\t\trte_intr_ack(&pci_dev->intr_handle);\n+\t\trte_intr_ack(pci_dev->intr_handle);\n \n \treturn 0;\n }\n@@ -1670,7 +1669,8 @@ iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)\n \tstruct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint16_t msix_intr;\n \n-\tmsix_intr = pci_dev->intr_handle.intr_vec[queue_id];\n+\tmsix_intr = rte_intr_vec_list_index_get(pci_dev->intr_handle,\n+\t\t\t\t\t\t queue_id);\n \tif (msix_intr == IAVF_MISC_VEC_ID) {\n \t\tPMD_DRV_LOG(ERR, \"MISC is used for control, cannot disable it\");\n \t\treturn -EIO;\n@@ -2355,12 +2355,12 @@ iavf_dev_init(struct rte_eth_dev *eth_dev)\n \n \tif (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) {\n \t\t/* register callback func to eal lib */\n-\t\trte_intr_callback_register(&pci_dev->intr_handle,\n+\t\trte_intr_callback_register(pci_dev->intr_handle,\n \t\t\t\t\t iavf_dev_interrupt_handler,\n \t\t\t\t\t (void *)eth_dev);\n \n \t\t/* enable uio intr after callback register */\n-\t\trte_intr_enable(&pci_dev->intr_handle);\n+\t\trte_intr_enable(pci_dev->intr_handle);\n \t} else {\n \t\trte_eal_alarm_set(IAVF_ALARM_INTERVAL,\n \t\t\t\t iavf_dev_alarm_handler, eth_dev);\n@@ -2394,7 +2394,7 @@ iavf_dev_close(struct rte_eth_dev *dev)\n {\n \tstruct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct iavf_adapter *adapter =\n \t\tIAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n \tstruct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);\ndiff --git a/drivers/net/iavf/iavf_vchnl.c b/drivers/net/iavf/iavf_vchnl.c\nindex 0f4dd21d44..bb65dbf04f 100644\n--- a/drivers/net/iavf/iavf_vchnl.c\n+++ b/drivers/net/iavf/iavf_vchnl.c\n@@ -1685,9 +1685,9 @@ iavf_request_queues(struct rte_eth_dev *dev, uint16_t num)\n \t\t/* disable interrupt to avoid the admin queue message to be read\n \t\t * before iavf_read_msg_from_pf.\n \t\t */\n-\t\trte_intr_disable(&pci_dev->intr_handle);\n+\t\trte_intr_disable(pci_dev->intr_handle);\n \t\terr = iavf_execute_vf_cmd(adapter, &args);\n-\t\trte_intr_enable(&pci_dev->intr_handle);\n+\t\trte_intr_enable(pci_dev->intr_handle);\n \t} else {\n \t\trte_eal_alarm_cancel(iavf_dev_alarm_handler, dev);\n \t\terr = iavf_execute_vf_cmd(adapter, &args);\ndiff --git a/drivers/net/ice/ice_dcf.c b/drivers/net/ice/ice_dcf.c\nindex 7b7df5eebb..084f7a53db 100644\n--- a/drivers/net/ice/ice_dcf.c\n+++ b/drivers/net/ice/ice_dcf.c\n@@ -539,7 +539,7 @@ ice_dcf_handle_vsi_update_event(struct ice_dcf_hw *hw)\n \n \trte_spinlock_lock(&hw->vc_cmd_send_lock);\n \n-\trte_intr_disable(&pci_dev->intr_handle);\n+\trte_intr_disable(pci_dev->intr_handle);\n \tice_dcf_disable_irq0(hw);\n \n \tfor (;;) {\n@@ -555,7 +555,7 @@ ice_dcf_handle_vsi_update_event(struct ice_dcf_hw *hw)\n \t\trte_delay_ms(ICE_DCF_ARQ_CHECK_TIME);\n \t}\n \n-\trte_intr_enable(&pci_dev->intr_handle);\n+\trte_intr_enable(pci_dev->intr_handle);\n \tice_dcf_enable_irq0(hw);\n \n \trte_spinlock_unlock(&hw->vc_cmd_send_lock);\n@@ -694,9 +694,9 @@ ice_dcf_init_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw)\n \t}\n \n \thw->eth_dev = eth_dev;\n-\trte_intr_callback_register(&pci_dev->intr_handle,\n+\trte_intr_callback_register(pci_dev->intr_handle,\n \t\t\t\t ice_dcf_dev_interrupt_handler, hw);\n-\trte_intr_enable(&pci_dev->intr_handle);\n+\trte_intr_enable(pci_dev->intr_handle);\n \tice_dcf_enable_irq0(hw);\n \n \treturn 0;\n@@ -718,7 +718,7 @@ void\n ice_dcf_uninit_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \tif (hw->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS)\n \t\tif (hw->tm_conf.committed) {\ndiff --git a/drivers/net/ice/ice_dcf_ethdev.c b/drivers/net/ice/ice_dcf_ethdev.c\nindex 7cb8066416..7c71a48010 100644\n--- a/drivers/net/ice/ice_dcf_ethdev.c\n+++ b/drivers/net/ice/ice_dcf_ethdev.c\n@@ -144,11 +144,9 @@ ice_dcf_config_rx_queues_irqs(struct rte_eth_dev *dev,\n \t\t\treturn -1;\n \t}\n \n-\tif (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {\n-\t\tintr_handle->intr_vec =\n-\t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t dev->data->nb_rx_queues * sizeof(int), 0);\n-\t\tif (!intr_handle->intr_vec) {\n+\tif (rte_intr_dp_is_en(intr_handle)) {\n+\t\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t\t\t dev->data->nb_rx_queues)) {\n \t\t\tPMD_DRV_LOG(ERR, \"Failed to allocate %d rx intr_vec\",\n \t\t\t\t dev->data->nb_rx_queues);\n \t\t\treturn -1;\n@@ -198,7 +196,8 @@ ice_dcf_config_rx_queues_irqs(struct rte_eth_dev *dev,\n \t\t\thw->msix_base = IAVF_MISC_VEC_ID;\n \t\t\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n \t\t\t\thw->rxq_map[hw->msix_base] |= 1 << i;\n-\t\t\t\tintr_handle->intr_vec[i] = IAVF_MISC_VEC_ID;\n+\t\t\t\trte_intr_vec_list_index_set(intr_handle,\n+\t\t\t\t\t\t\ti, IAVF_MISC_VEC_ID);\n \t\t\t}\n \t\t\tPMD_DRV_LOG(DEBUG,\n \t\t\t\t \"vector %u are mapping to all Rx queues\",\n@@ -208,12 +207,13 @@ ice_dcf_config_rx_queues_irqs(struct rte_eth_dev *dev,\n \t\t\t * multi interrupts, then the vec is from 1\n \t\t\t */\n \t\t\thw->nb_msix = RTE_MIN(hw->vf_res->max_vectors,\n-\t\t\t\t\t intr_handle->nb_efd);\n+\t\t\t\t rte_intr_nb_efd_get(intr_handle));\n \t\t\thw->msix_base = IAVF_MISC_VEC_ID;\n \t\t\tvec = IAVF_MISC_VEC_ID;\n \t\t\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n \t\t\t\thw->rxq_map[vec] |= 1 << i;\n-\t\t\t\tintr_handle->intr_vec[i] = vec++;\n+\t\t\t\trte_intr_vec_list_index_set(intr_handle,\n+\t\t\t\t\t\t\t\t i, vec++);\n \t\t\t\tif (vec >= hw->nb_msix)\n \t\t\t\t\tvec = IAVF_RX_VEC_START;\n \t\t\t}\n@@ -623,10 +623,7 @@ ice_dcf_dev_stop(struct rte_eth_dev *dev)\n \tice_dcf_stop_queues(dev);\n \n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\trte_intr_vec_list_free(intr_handle);\n \n \tice_dcf_add_del_all_mac_addr(&dcf_ad->real_hw, false);\n \tdev->data->dev_link.link_status = RTE_ETH_LINK_DOWN;\ndiff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex 6a6637a15a..ef6ee1c386 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -2178,7 +2178,7 @@ ice_dev_init(struct rte_eth_dev *dev)\n \n \tice_set_default_ptype_table(dev);\n \tpci_dev = RTE_DEV_TO_PCI(dev->device);\n-\tintr_handle = &pci_dev->intr_handle;\n+\tintr_handle = pci_dev->intr_handle;\n \n \tpf->adapter = ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n \tpf->dev_data = dev->data;\n@@ -2375,7 +2375,7 @@ ice_vsi_disable_queues_intr(struct ice_vsi *vsi)\n {\n \tstruct rte_eth_dev *dev = &rte_eth_devices[vsi->adapter->pf.dev_data->port_id];\n \tstruct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct ice_hw *hw = ICE_VSI_TO_HW(vsi);\n \tuint16_t msix_intr, i;\n \n@@ -2405,7 +2405,7 @@ ice_dev_stop(struct rte_eth_dev *dev)\n \tstruct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tstruct ice_vsi *main_vsi = pf->main_vsi;\n \tstruct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint16_t i;\n \n \t/* avoid stopping again */\n@@ -2430,10 +2430,7 @@ ice_dev_stop(struct rte_eth_dev *dev)\n \n \t/* Clean datapath event and queue/vec mapping */\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\trte_intr_vec_list_free(intr_handle);\n \n \tpf->adapter_stopped = true;\n \tdev->data->dev_started = 0;\n@@ -2447,7 +2444,7 @@ ice_dev_close(struct rte_eth_dev *dev)\n \tstruct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct ice_adapter *ad =\n \t\tICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n \tint ret;\n@@ -3345,10 +3342,11 @@ ice_vsi_queues_bind_intr(struct ice_vsi *vsi)\n {\n \tstruct rte_eth_dev *dev = &rte_eth_devices[vsi->adapter->pf.dev_data->port_id];\n \tstruct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct ice_hw *hw = ICE_VSI_TO_HW(vsi);\n \tuint16_t msix_vect = vsi->msix_intr;\n-\tuint16_t nb_msix = RTE_MIN(vsi->nb_msix, intr_handle->nb_efd);\n+\tuint16_t nb_msix = RTE_MIN(vsi->nb_msix,\n+\t\t\t\t rte_intr_nb_efd_get(intr_handle));\n \tuint16_t queue_idx = 0;\n \tint record = 0;\n \tint i;\n@@ -3376,8 +3374,9 @@ ice_vsi_queues_bind_intr(struct ice_vsi *vsi)\n \t\t\t\t\t vsi->nb_used_qps - i);\n \n \t\t\tfor (; !!record && i < vsi->nb_used_qps; i++)\n-\t\t\t\tintr_handle->intr_vec[queue_idx + i] =\n-\t\t\t\t\tmsix_vect;\n+\t\t\t\trte_intr_vec_list_index_set(intr_handle,\n+\t\t\t\t\t\tqueue_idx + i, msix_vect);\n+\n \t\t\tbreak;\n \t\t}\n \n@@ -3386,7 +3385,9 @@ ice_vsi_queues_bind_intr(struct ice_vsi *vsi)\n \t\t\t\t vsi->base_queue + i, 1);\n \n \t\tif (!!record)\n-\t\t\tintr_handle->intr_vec[queue_idx + i] = msix_vect;\n+\t\t\trte_intr_vec_list_index_set(intr_handle,\n+\t\t\t\t\t\t\t queue_idx + i,\n+\t\t\t\t\t\t\t msix_vect);\n \n \t\tmsix_vect++;\n \t\tnb_msix--;\n@@ -3398,7 +3399,7 @@ ice_vsi_enable_queues_intr(struct ice_vsi *vsi)\n {\n \tstruct rte_eth_dev *dev = &rte_eth_devices[vsi->adapter->pf.dev_data->port_id];\n \tstruct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct ice_hw *hw = ICE_VSI_TO_HW(vsi);\n \tuint16_t msix_intr, i;\n \n@@ -3424,7 +3425,7 @@ ice_rxq_intr_setup(struct rte_eth_dev *dev)\n {\n \tstruct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct ice_vsi *vsi = pf->main_vsi;\n \tuint32_t intr_vector = 0;\n \n@@ -3444,11 +3445,9 @@ ice_rxq_intr_setup(struct rte_eth_dev *dev)\n \t\t\treturn -1;\n \t}\n \n-\tif (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {\n-\t\tintr_handle->intr_vec =\n-\t\trte_zmalloc(NULL, dev->data->nb_rx_queues * sizeof(int),\n-\t\t\t 0);\n-\t\tif (!intr_handle->intr_vec) {\n+\tif (rte_intr_dp_is_en(intr_handle)) {\n+\t\tif (rte_intr_vec_list_alloc(intr_handle, NULL,\n+\t\t\t\t\t\t dev->data->nb_rx_queues)) {\n \t\t\tPMD_DRV_LOG(ERR,\n \t\t\t\t \"Failed to allocate %d rx_queues intr_vec\",\n \t\t\t\t dev->data->nb_rx_queues);\n@@ -4755,19 +4754,19 @@ static int ice_rx_queue_intr_enable(struct rte_eth_dev *dev,\n \t\t\t\t uint16_t queue_id)\n {\n \tstruct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint32_t val;\n \tuint16_t msix_intr;\n \n-\tmsix_intr = intr_handle->intr_vec[queue_id];\n+\tmsix_intr = rte_intr_vec_list_index_get(intr_handle, queue_id);\n \n \tval = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |\n \t GLINT_DYN_CTL_ITR_INDX_M;\n \tval &= ~GLINT_DYN_CTL_WB_ON_ITR_M;\n \n \tICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), val);\n-\trte_intr_ack(&pci_dev->intr_handle);\n+\trte_intr_ack(pci_dev->intr_handle);\n \n \treturn 0;\n }\n@@ -4776,11 +4775,11 @@ static int ice_rx_queue_intr_disable(struct rte_eth_dev *dev,\n \t\t\t\t uint16_t queue_id)\n {\n \tstruct rte_pci_device *pci_dev = ICE_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint16_t msix_intr;\n \n-\tmsix_intr = intr_handle->intr_vec[queue_id];\n+\tmsix_intr = rte_intr_vec_list_index_get(intr_handle, queue_id);\n \n \tICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), GLINT_DYN_CTL_WB_ON_ITR_M);\n \ndiff --git a/drivers/net/igc/igc_ethdev.c b/drivers/net/igc/igc_ethdev.c\nindex 7ce80a442b..8189ad412a 100644\n--- a/drivers/net/igc/igc_ethdev.c\n+++ b/drivers/net/igc/igc_ethdev.c\n@@ -377,7 +377,7 @@ igc_intr_other_disable(struct rte_eth_dev *dev)\n {\n \tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \tif (rte_intr_allow_others(intr_handle) &&\n \t\tdev->data->dev_conf.intr_conf.lsc) {\n@@ -397,7 +397,7 @@ igc_intr_other_enable(struct rte_eth_dev *dev)\n \tstruct igc_interrupt *intr = IGC_DEV_PRIVATE_INTR(dev);\n \tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \tif (rte_intr_allow_others(intr_handle) &&\n \t\tdev->data->dev_conf.intr_conf.lsc) {\n@@ -609,7 +609,7 @@ eth_igc_stop(struct rte_eth_dev *dev)\n \tstruct igc_adapter *adapter = IGC_DEV_PRIVATE(dev);\n \tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct rte_eth_link link;\n \n \tdev->data->dev_started = 0;\n@@ -661,10 +661,7 @@ eth_igc_stop(struct rte_eth_dev *dev)\n \n \t/* Clean datapath event and queue/vec mapping */\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec != NULL) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\trte_intr_vec_list_free(intr_handle);\n \n \treturn 0;\n }\n@@ -724,7 +721,7 @@ igc_configure_msix_intr(struct rte_eth_dev *dev)\n {\n \tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \tuint32_t intr_mask;\n \tuint32_t vec = IGC_MISC_VEC_ID;\n@@ -748,8 +745,8 @@ igc_configure_msix_intr(struct rte_eth_dev *dev)\n \tIGC_WRITE_REG(hw, IGC_GPIE, IGC_GPIE_MSIX_MODE |\n \t\t\t\tIGC_GPIE_PBA | IGC_GPIE_EIAME |\n \t\t\t\tIGC_GPIE_NSICR);\n-\tintr_mask = RTE_LEN2MASK(intr_handle->nb_efd, uint32_t) <<\n-\t\tmisc_shift;\n+\tintr_mask = RTE_LEN2MASK(rte_intr_nb_efd_get(intr_handle),\n+\t\t\t\t uint32_t) << misc_shift;\n \n \tif (dev->data->dev_conf.intr_conf.lsc)\n \t\tintr_mask |= (1u << IGC_MSIX_OTHER_INTR_VEC);\n@@ -766,8 +763,8 @@ igc_configure_msix_intr(struct rte_eth_dev *dev)\n \n \tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n \t\tigc_write_ivar(hw, i, 0, vec);\n-\t\tintr_handle->intr_vec[i] = vec;\n-\t\tif (vec < base + intr_handle->nb_efd - 1)\n+\t\trte_intr_vec_list_index_set(intr_handle, i, vec);\n+\t\tif (vec < base + rte_intr_nb_efd_get(intr_handle) - 1)\n \t\t\tvec++;\n \t}\n \n@@ -803,7 +800,7 @@ igc_rxq_interrupt_setup(struct rte_eth_dev *dev)\n \tuint32_t mask;\n \tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint misc_shift = rte_intr_allow_others(intr_handle) ? 1 : 0;\n \n \t/* won't configure msix register if no mapping is done\n@@ -812,7 +809,8 @@ igc_rxq_interrupt_setup(struct rte_eth_dev *dev)\n \tif (!rte_intr_dp_is_en(intr_handle))\n \t\treturn;\n \n-\tmask = RTE_LEN2MASK(intr_handle->nb_efd, uint32_t) << misc_shift;\n+\tmask = RTE_LEN2MASK(rte_intr_nb_efd_get(intr_handle), uint32_t)\n+\t\t<< misc_shift;\n \tIGC_WRITE_REG(hw, IGC_EIMS, mask);\n }\n \n@@ -906,7 +904,7 @@ eth_igc_start(struct rte_eth_dev *dev)\n \tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n \tstruct igc_adapter *adapter = IGC_DEV_PRIVATE(dev);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint32_t *speeds;\n \tint ret;\n \n@@ -944,10 +942,9 @@ eth_igc_start(struct rte_eth_dev *dev)\n \t\t\treturn -1;\n \t}\n \n-\tif (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {\n-\t\tintr_handle->intr_vec = rte_zmalloc(\"intr_vec\",\n-\t\t\tdev->data->nb_rx_queues * sizeof(int), 0);\n-\t\tif (intr_handle->intr_vec == NULL) {\n+\tif (rte_intr_dp_is_en(intr_handle)) {\n+\t\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t\t\t dev->data->nb_rx_queues)) {\n \t\t\tPMD_DRV_LOG(ERR,\n \t\t\t\t\"Failed to allocate %d rx_queues intr_vec\",\n \t\t\t\tdev->data->nb_rx_queues);\n@@ -1162,7 +1159,7 @@ static int\n eth_igc_close(struct rte_eth_dev *dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n \tstruct igc_adapter *adapter = IGC_DEV_PRIVATE(dev);\n \tint retry = 0;\n@@ -1331,11 +1328,11 @@ eth_igc_dev_init(struct rte_eth_dev *dev)\n \t\t\tdev->data->port_id, pci_dev->id.vendor_id,\n \t\t\tpci_dev->id.device_id);\n \n-\trte_intr_callback_register(&pci_dev->intr_handle,\n+\trte_intr_callback_register(pci_dev->intr_handle,\n \t\t\teth_igc_interrupt_handler, (void *)dev);\n \n \t/* enable uio/vfio intr/eventfd mapping */\n-\trte_intr_enable(&pci_dev->intr_handle);\n+\trte_intr_enable(pci_dev->intr_handle);\n \n \t/* enable support intr */\n \tigc_intr_other_enable(dev);\n@@ -2076,7 +2073,7 @@ eth_igc_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)\n {\n \tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint32_t vec = IGC_MISC_VEC_ID;\n \n \tif (rte_intr_allow_others(intr_handle))\n@@ -2095,7 +2092,7 @@ eth_igc_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n {\n \tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint32_t vec = IGC_MISC_VEC_ID;\n \n \tif (rte_intr_allow_others(intr_handle))\ndiff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c\nindex c688c3735c..28280c5377 100644\n--- a/drivers/net/ionic/ionic_ethdev.c\n+++ b/drivers/net/ionic/ionic_ethdev.c\n@@ -1060,7 +1060,7 @@ static int\n ionic_configure_intr(struct ionic_adapter *adapter)\n {\n \tstruct rte_pci_device *pci_dev = adapter->pci_dev;\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint err;\n \n \tIONIC_PRINT(DEBUG, \"Configuring %u intrs\", adapter->nintrs);\n@@ -1074,15 +1074,10 @@ ionic_configure_intr(struct ionic_adapter *adapter)\n \t\tIONIC_PRINT(DEBUG,\n \t\t\t\"Packet I/O interrupt on datapath is enabled\");\n \n-\tif (!intr_handle->intr_vec) {\n-\t\tintr_handle->intr_vec = rte_zmalloc(\"intr_vec\",\n-\t\t\tadapter->nintrs * sizeof(int), 0);\n-\n-\t\tif (!intr_handle->intr_vec) {\n-\t\t\tIONIC_PRINT(ERR, \"Failed to allocate %u vectors\",\n-\t\t\t\tadapter->nintrs);\n-\t\t\treturn -ENOMEM;\n-\t\t}\n+\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\", adapter->nintrs)) {\n+\t\tIONIC_PRINT(ERR, \"Failed to allocate %u vectors\",\n+\t\t\t adapter->nintrs);\n+\t\treturn -ENOMEM;\n \t}\n \n \terr = rte_intr_callback_register(intr_handle,\n@@ -1111,7 +1106,7 @@ static void\n ionic_unconfigure_intr(struct ionic_adapter *adapter)\n {\n \tstruct rte_pci_device *pci_dev = adapter->pci_dev;\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \trte_intr_disable(intr_handle);\n \ndiff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c\nindex a87c607106..1911cf2fab 100644\n--- a/drivers/net/ixgbe/ixgbe_ethdev.c\n+++ b/drivers/net/ixgbe/ixgbe_ethdev.c\n@@ -1027,7 +1027,7 @@ eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)\n {\n \tstruct ixgbe_adapter *ad = eth_dev->data->dev_private;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct ixgbe_hw *hw =\n \t\tIXGBE_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);\n \tstruct ixgbe_vfta *shadow_vfta =\n@@ -1525,7 +1525,7 @@ eth_ixgbevf_dev_init(struct rte_eth_dev *eth_dev)\n \tuint32_t tc, tcs;\n \tstruct ixgbe_adapter *ad = eth_dev->data->dev_private;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct ixgbe_hw *hw =\n \t\tIXGBE_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);\n \tstruct ixgbe_vfta *shadow_vfta =\n@@ -2539,7 +2539,7 @@ ixgbe_dev_start(struct rte_eth_dev *dev)\n \tstruct ixgbe_vf_info *vfinfo =\n \t\t*IXGBE_DEV_PRIVATE_TO_P_VFDATA(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint32_t intr_vector = 0;\n \tint err;\n \tbool link_up = false, negotiate = 0;\n@@ -2594,11 +2594,9 @@ ixgbe_dev_start(struct rte_eth_dev *dev)\n \t\t\treturn -1;\n \t}\n \n-\tif (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {\n-\t\tintr_handle->intr_vec =\n-\t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t dev->data->nb_rx_queues * sizeof(int), 0);\n-\t\tif (intr_handle->intr_vec == NULL) {\n+\tif (rte_intr_dp_is_en(intr_handle)) {\n+\t\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t\t\t dev->data->nb_rx_queues)) {\n \t\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %d rx_queues\"\n \t\t\t\t \" intr_vec\", dev->data->nb_rx_queues);\n \t\t\treturn -ENOMEM;\n@@ -2834,7 +2832,7 @@ ixgbe_dev_stop(struct rte_eth_dev *dev)\n \tstruct ixgbe_vf_info *vfinfo =\n \t\t*IXGBE_DEV_PRIVATE_TO_P_VFDATA(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint vf;\n \tstruct ixgbe_tm_conf *tm_conf =\n \t\tIXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);\n@@ -2885,10 +2883,7 @@ ixgbe_dev_stop(struct rte_eth_dev *dev)\n \n \t/* Clean datapath event and queue/vec mapping */\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec != NULL) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\trte_intr_vec_list_free(intr_handle);\n \n \t/* reset hierarchy commit */\n \ttm_conf->committed = false;\n@@ -2972,7 +2967,7 @@ ixgbe_dev_close(struct rte_eth_dev *dev)\n \tstruct ixgbe_hw *hw =\n \t\tIXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint retries = 0;\n \tint ret;\n \n@@ -4618,7 +4613,7 @@ ixgbe_dev_interrupt_delayed_handler(void *param)\n {\n \tstruct rte_eth_dev *dev = (struct rte_eth_dev *)param;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct ixgbe_interrupt *intr =\n \t\tIXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private);\n \tstruct ixgbe_hw *hw =\n@@ -5290,7 +5285,7 @@ ixgbevf_dev_start(struct rte_eth_dev *dev)\n \t\tIXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint32_t intr_vector = 0;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \tint err, mask = 0;\n \n@@ -5353,11 +5348,9 @@ ixgbevf_dev_start(struct rte_eth_dev *dev)\n \t\t}\n \t}\n \n-\tif (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {\n-\t\tintr_handle->intr_vec =\n-\t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t dev->data->nb_rx_queues * sizeof(int), 0);\n-\t\tif (intr_handle->intr_vec == NULL) {\n+\tif (rte_intr_dp_is_en(intr_handle)) {\n+\t\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t\t\t dev->data->nb_rx_queues)) {\n \t\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %d rx_queues\"\n \t\t\t\t \" intr_vec\", dev->data->nb_rx_queues);\n \t\t\tixgbe_dev_clear_queues(dev);\n@@ -5397,7 +5390,7 @@ ixgbevf_dev_stop(struct rte_eth_dev *dev)\n \tstruct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct ixgbe_adapter *adapter = dev->data->dev_private;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \tif (hw->adapter_stopped)\n \t\treturn 0;\n@@ -5425,10 +5418,7 @@ ixgbevf_dev_stop(struct rte_eth_dev *dev)\n \n \t/* Clean datapath event and queue/vec mapping */\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec != NULL) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\trte_intr_vec_list_free(intr_handle);\n \n \tadapter->rss_reta_updated = 0;\n \n@@ -5440,7 +5430,7 @@ ixgbevf_dev_close(struct rte_eth_dev *dev)\n {\n \tstruct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint ret;\n \n \tPMD_INIT_FUNC_TRACE();\n@@ -5738,7 +5728,7 @@ static int\n ixgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct ixgbe_interrupt *intr =\n \t\tIXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private);\n \tstruct ixgbe_hw *hw =\n@@ -5764,7 +5754,7 @@ ixgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)\n \tstruct ixgbe_hw *hw =\n \t\tIXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint32_t vec = IXGBE_MISC_VEC_ID;\n \n \tif (rte_intr_allow_others(intr_handle))\n@@ -5780,7 +5770,7 @@ static int\n ixgbe_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint32_t mask;\n \tstruct ixgbe_hw *hw =\n \t\tIXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n@@ -5907,7 +5897,7 @@ static void\n ixgbevf_configure_msix(struct rte_eth_dev *dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct ixgbe_hw *hw =\n \t\tIXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint32_t q_idx;\n@@ -5934,8 +5924,10 @@ ixgbevf_configure_msix(struct rte_eth_dev *dev)\n \t\t * as IXGBE_VF_MAXMSIVECOTR = 1\n \t\t */\n \t\tixgbevf_set_ivar_map(hw, 0, q_idx, vector_idx);\n-\t\tintr_handle->intr_vec[q_idx] = vector_idx;\n-\t\tif (vector_idx < base + intr_handle->nb_efd - 1)\n+\t\trte_intr_vec_list_index_set(intr_handle, q_idx,\n+\t\t\t\t\t\t vector_idx);\n+\t\tif (vector_idx < base + rte_intr_nb_efd_get(intr_handle)\n+\t\t - 1)\n \t\t\tvector_idx++;\n \t}\n \n@@ -5956,7 +5948,7 @@ static void\n ixgbe_configure_msix(struct rte_eth_dev *dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct ixgbe_hw *hw =\n \t\tIXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint32_t queue_id, base = IXGBE_MISC_VEC_ID;\n@@ -6000,8 +5992,10 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)\n \t\t\tqueue_id++) {\n \t\t\t/* by default, 1:1 mapping */\n \t\t\tixgbe_set_ivar_map(hw, 0, queue_id, vec);\n-\t\t\tintr_handle->intr_vec[queue_id] = vec;\n-\t\t\tif (vec < base + intr_handle->nb_efd - 1)\n+\t\t\trte_intr_vec_list_index_set(intr_handle,\n+\t\t\t\t\t\t\t queue_id, vec);\n+\t\t\tif (vec < base + rte_intr_nb_efd_get(intr_handle)\n+\t\t\t - 1)\n \t\t\t\tvec++;\n \t\t}\n \ndiff --git a/drivers/net/memif/memif_socket.c b/drivers/net/memif/memif_socket.c\nindex 8533e39f69..d48c3685d9 100644\n--- a/drivers/net/memif/memif_socket.c\n+++ b/drivers/net/memif/memif_socket.c\n@@ -65,7 +65,8 @@ memif_msg_send_from_queue(struct memif_control_channel *cc)\n \tif (e == NULL)\n \t\treturn 0;\n \n-\tsize = memif_msg_send(cc->intr_handle.fd, &e->msg, e->fd);\n+\tsize = memif_msg_send(rte_intr_fd_get(cc->intr_handle), &e->msg,\n+\t\t\t e->fd);\n \tif (size != sizeof(memif_msg_t)) {\n \t\tMIF_LOG(ERR, \"sendmsg fail: %s.\", strerror(errno));\n \t\tret = -1;\n@@ -317,7 +318,9 @@ memif_msg_receive_add_ring(struct rte_eth_dev *dev, memif_msg_t *msg, int fd)\n \tmq = (ar->flags & MEMIF_MSG_ADD_RING_FLAG_C2S) ?\n \t dev->data->rx_queues[ar->index] : dev->data->tx_queues[ar->index];\n \n-\tmq->intr_handle.fd = fd;\n+\tif (rte_intr_fd_set(mq->intr_handle, fd))\n+\t\treturn -1;\n+\n \tmq->log2_ring_size = ar->log2_ring_size;\n \tmq->region = ar->region;\n \tmq->ring_offset = ar->offset;\n@@ -453,7 +456,7 @@ memif_msg_enq_add_ring(struct rte_eth_dev *dev, uint8_t idx,\n \t dev->data->rx_queues[idx];\n \n \te->msg.type = MEMIF_MSG_TYPE_ADD_RING;\n-\te->fd = mq->intr_handle.fd;\n+\te->fd = rte_intr_fd_get(mq->intr_handle);\n \tar->index = idx;\n \tar->offset = mq->ring_offset;\n \tar->region = mq->region;\n@@ -505,12 +508,13 @@ memif_intr_unregister_handler(struct rte_intr_handle *intr_handle, void *arg)\n \tstruct memif_control_channel *cc = arg;\n \n \t/* close control channel fd */\n-\tclose(intr_handle->fd);\n+\tclose(rte_intr_fd_get(intr_handle));\n \t/* clear message queue */\n \twhile ((elt = TAILQ_FIRST(&cc->msg_queue)) != NULL) {\n \t\tTAILQ_REMOVE(&cc->msg_queue, elt, next);\n \t\trte_free(elt);\n \t}\n+\trte_intr_instance_free(cc->intr_handle);\n \t/* free control channel */\n \trte_free(cc);\n }\n@@ -548,8 +552,8 @@ memif_disconnect(struct rte_eth_dev *dev)\n \t\t\t\t\"Unexpected message(s) in message queue.\");\n \t\t}\n \n-\t\tih = &pmd->cc->intr_handle;\n-\t\tif (ih->fd > 0) {\n+\t\tih = pmd->cc->intr_handle;\n+\t\tif (rte_intr_fd_get(ih) > 0) {\n \t\t\tret = rte_intr_callback_unregister(ih,\n \t\t\t\t\t\t\tmemif_intr_handler,\n \t\t\t\t\t\t\tpmd->cc);\n@@ -563,7 +567,8 @@ memif_disconnect(struct rte_eth_dev *dev)\n \t\t\t\t\t\t\tpmd->cc,\n \t\t\t\t\t\t\tmemif_intr_unregister_handler);\n \t\t\t} else if (ret > 0) {\n-\t\t\t\tclose(ih->fd);\n+\t\t\t\tclose(rte_intr_fd_get(ih));\n+\t\t\t\trte_intr_instance_free(ih);\n \t\t\t\trte_free(pmd->cc);\n \t\t\t}\n \t\t\tpmd->cc = NULL;\n@@ -587,9 +592,10 @@ memif_disconnect(struct rte_eth_dev *dev)\n \t\t\telse\n \t\t\t\tcontinue;\n \t\t}\n-\t\tif (mq->intr_handle.fd > 0) {\n-\t\t\tclose(mq->intr_handle.fd);\n-\t\t\tmq->intr_handle.fd = -1;\n+\n+\t\tif (rte_intr_fd_get(mq->intr_handle) > 0) {\n+\t\t\tclose(rte_intr_fd_get(mq->intr_handle));\n+\t\t\trte_intr_fd_set(mq->intr_handle, -1);\n \t\t}\n \t}\n \tfor (i = 0; i < pmd->cfg.num_s2c_rings; i++) {\n@@ -604,9 +610,10 @@ memif_disconnect(struct rte_eth_dev *dev)\n \t\t\telse\n \t\t\t\tcontinue;\n \t\t}\n-\t\tif (mq->intr_handle.fd > 0) {\n-\t\t\tclose(mq->intr_handle.fd);\n-\t\t\tmq->intr_handle.fd = -1;\n+\n+\t\tif (rte_intr_fd_get(mq->intr_handle) > 0) {\n+\t\t\tclose(rte_intr_fd_get(mq->intr_handle));\n+\t\t\trte_intr_fd_set(mq->intr_handle, -1);\n \t\t}\n \t}\n \n@@ -644,7 +651,7 @@ memif_msg_receive(struct memif_control_channel *cc)\n \tmh.msg_control = ctl;\n \tmh.msg_controllen = sizeof(ctl);\n \n-\tsize = recvmsg(cc->intr_handle.fd, &mh, 0);\n+\tsize = recvmsg(rte_intr_fd_get(cc->intr_handle), &mh, 0);\n \tif (size != sizeof(memif_msg_t)) {\n \t\tMIF_LOG(DEBUG, \"Invalid message size = %zd\", size);\n \t\tif (size > 0)\n@@ -774,7 +781,7 @@ memif_intr_handler(void *arg)\n \t/* if driver failed to assign device */\n \tif (cc->dev == NULL) {\n \t\tmemif_msg_send_from_queue(cc);\n-\t\tret = rte_intr_callback_unregister_pending(&cc->intr_handle,\n+\t\tret = rte_intr_callback_unregister_pending(cc->intr_handle,\n \t\t\t\t\t\t\t memif_intr_handler,\n \t\t\t\t\t\t\t cc,\n \t\t\t\t\t\t\t memif_intr_unregister_handler);\n@@ -812,12 +819,12 @@ memif_listener_handler(void *arg)\n \tint ret;\n \n \taddr_len = sizeof(client);\n-\tsockfd = accept(socket->intr_handle.fd, (struct sockaddr *)&client,\n-\t\t\t(socklen_t *)&addr_len);\n+\tsockfd = accept(rte_intr_fd_get(socket->intr_handle),\n+\t\t\t(struct sockaddr *)&client, (socklen_t *)&addr_len);\n \tif (sockfd < 0) {\n \t\tMIF_LOG(ERR,\n \t\t\t\"Failed to accept connection request on socket fd %d\",\n-\t\t\tsocket->intr_handle.fd);\n+\t\t\trte_intr_fd_get(socket->intr_handle));\n \t\treturn;\n \t}\n \n@@ -829,13 +836,25 @@ memif_listener_handler(void *arg)\n \t\tgoto error;\n \t}\n \n-\tcc->intr_handle.fd = sockfd;\n-\tcc->intr_handle.type = RTE_INTR_HANDLE_EXT;\n+\t/* Allocate interrupt instance */\n+\tcc->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);\n+\tif (cc->intr_handle == NULL) {\n+\t\tMIF_LOG(ERR, \"Failed to allocate intr handle\");\n+\t\tgoto error;\n+\t}\n+\n+\tif (rte_intr_fd_set(cc->intr_handle, sockfd))\n+\t\tgoto error;\n+\n+\tif (rte_intr_type_set(cc->intr_handle, RTE_INTR_HANDLE_EXT))\n+\t\tgoto error;\n+\n \tcc->socket = socket;\n \tcc->dev = NULL;\n \tTAILQ_INIT(&cc->msg_queue);\n \n-\tret = rte_intr_callback_register(&cc->intr_handle, memif_intr_handler, cc);\n+\tret = rte_intr_callback_register(cc->intr_handle, memif_intr_handler,\n+\t\t\t\t\t cc);\n \tif (ret < 0) {\n \t\tMIF_LOG(ERR, \"Failed to register control channel callback.\");\n \t\tgoto error;\n@@ -857,8 +876,10 @@ memif_listener_handler(void *arg)\n \t\tclose(sockfd);\n \t\tsockfd = -1;\n \t}\n-\tif (cc != NULL)\n+\tif (cc != NULL) {\n+\t\trte_intr_instance_free(cc->intr_handle);\n \t\trte_free(cc);\n+\t}\n }\n \n static struct memif_socket *\n@@ -914,9 +935,21 @@ memif_socket_create(char *key, uint8_t listener, bool is_abstract)\n \n \t\tMIF_LOG(DEBUG, \"Memif listener socket %s created.\", sock->filename);\n \n-\t\tsock->intr_handle.fd = sockfd;\n-\t\tsock->intr_handle.type = RTE_INTR_HANDLE_EXT;\n-\t\tret = rte_intr_callback_register(&sock->intr_handle,\n+\t\t/* Allocate interrupt instance */\n+\t\tsock->intr_handle =\n+\t\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);\n+\t\tif (sock->intr_handle == NULL) {\n+\t\t\tMIF_LOG(ERR, \"Failed to allocate intr handle\");\n+\t\t\tgoto error;\n+\t\t}\n+\n+\t\tif (rte_intr_fd_set(sock->intr_handle, sockfd))\n+\t\t\tgoto error;\n+\n+\t\tif (rte_intr_type_set(sock->intr_handle, RTE_INTR_HANDLE_EXT))\n+\t\t\tgoto error;\n+\n+\t\tret = rte_intr_callback_register(sock->intr_handle,\n \t\t\t\t\t\t memif_listener_handler, sock);\n \t\tif (ret < 0) {\n \t\t\tMIF_LOG(ERR, \"Failed to register interrupt \"\n@@ -929,8 +962,10 @@ memif_socket_create(char *key, uint8_t listener, bool is_abstract)\n \n error:\n \tMIF_LOG(ERR, \"Failed to setup socket %s: %s\", key, strerror(errno));\n-\tif (sock != NULL)\n+\tif (sock != NULL) {\n+\t\trte_intr_instance_free(sock->intr_handle);\n \t\trte_free(sock);\n+\t}\n \tif (sockfd >= 0)\n \t\tclose(sockfd);\n \treturn NULL;\n@@ -1047,6 +1082,8 @@ memif_socket_remove_device(struct rte_eth_dev *dev)\n \t\t\t\tMIF_LOG(ERR, \"Failed to remove socket file: %s\",\n \t\t\t\t\tsocket->filename);\n \t\t}\n+\t\tif (pmd->role != MEMIF_ROLE_CLIENT)\n+\t\t\trte_intr_instance_free(socket->intr_handle);\n \t\trte_free(socket);\n \t}\n }\n@@ -1109,13 +1146,25 @@ memif_connect_client(struct rte_eth_dev *dev)\n \t\tgoto error;\n \t}\n \n-\tpmd->cc->intr_handle.fd = sockfd;\n-\tpmd->cc->intr_handle.type = RTE_INTR_HANDLE_EXT;\n+\t/* Allocate interrupt instance */\n+\tpmd->cc->intr_handle =\n+\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);\n+\tif (pmd->cc->intr_handle == NULL) {\n+\t\tMIF_LOG(ERR, \"Failed to allocate intr handle\");\n+\t\tgoto error;\n+\t}\n+\n+\tif (rte_intr_fd_set(pmd->cc->intr_handle, sockfd))\n+\t\tgoto error;\n+\n+\tif (rte_intr_type_set(pmd->cc->intr_handle, RTE_INTR_HANDLE_EXT))\n+\t\tgoto error;\n+\n \tpmd->cc->socket = NULL;\n \tpmd->cc->dev = dev;\n \tTAILQ_INIT(&pmd->cc->msg_queue);\n \n-\tret = rte_intr_callback_register(&pmd->cc->intr_handle,\n+\tret = rte_intr_callback_register(pmd->cc->intr_handle,\n \t\t\t\t\t memif_intr_handler, pmd->cc);\n \tif (ret < 0) {\n \t\tMIF_LOG(ERR, \"Failed to register interrupt callback for control fd\");\n@@ -1130,6 +1179,7 @@ memif_connect_client(struct rte_eth_dev *dev)\n \t\tsockfd = -1;\n \t}\n \tif (pmd->cc != NULL) {\n+\t\trte_intr_instance_free(pmd->cc->intr_handle);\n \t\trte_free(pmd->cc);\n \t\tpmd->cc = NULL;\n \t}\ndiff --git a/drivers/net/memif/memif_socket.h b/drivers/net/memif/memif_socket.h\nindex b9b8a15178..b0decbb0a2 100644\n--- a/drivers/net/memif/memif_socket.h\n+++ b/drivers/net/memif/memif_socket.h\n@@ -85,7 +85,7 @@ struct memif_socket_dev_list_elt {\n \t(sizeof(struct sockaddr_un) - offsetof(struct sockaddr_un, sun_path))\n \n struct memif_socket {\n-\tstruct rte_intr_handle intr_handle;\t/**< interrupt handle */\n+\tstruct rte_intr_handle *intr_handle;\t/**< interrupt handle */\n \tchar filename[MEMIF_SOCKET_UN_SIZE];\t/**< socket filename */\n \n \tTAILQ_HEAD(, memif_socket_dev_list_elt) dev_queue;\n@@ -101,7 +101,7 @@ struct memif_msg_queue_elt {\n };\n \n struct memif_control_channel {\n-\tstruct rte_intr_handle intr_handle;\t/**< interrupt handle */\n+\tstruct rte_intr_handle *intr_handle;\t/**< interrupt handle */\n \tTAILQ_HEAD(, memif_msg_queue_elt) msg_queue; /**< control message queue */\n \tstruct memif_socket *socket;\t\t/**< pointer to socket */\n \tstruct rte_eth_dev *dev;\t\t/**< pointer to device */\ndiff --git a/drivers/net/memif/rte_eth_memif.c b/drivers/net/memif/rte_eth_memif.c\nindex 9deb7a5f13..8cec493ffd 100644\n--- a/drivers/net/memif/rte_eth_memif.c\n+++ b/drivers/net/memif/rte_eth_memif.c\n@@ -326,7 +326,8 @@ eth_memif_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)\n \n \t/* consume interrupt */\n \tif ((ring->flags & MEMIF_RING_FLAG_MASK_INT) == 0)\n-\t\tsize = read(mq->intr_handle.fd, &b, sizeof(b));\n+\t\tsize = read(rte_intr_fd_get(mq->intr_handle), &b,\n+\t\t\t sizeof(b));\n \n \tring_size = 1 << mq->log2_ring_size;\n \tmask = ring_size - 1;\n@@ -462,7 +463,8 @@ eth_memif_rx_zc(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)\n \tif ((ring->flags & MEMIF_RING_FLAG_MASK_INT) == 0) {\n \t\tuint64_t b;\n \t\tssize_t size __rte_unused;\n-\t\tsize = read(mq->intr_handle.fd, &b, sizeof(b));\n+\t\tsize = read(rte_intr_fd_get(mq->intr_handle), &b,\n+\t\t\t sizeof(b));\n \t}\n \n \tring_size = 1 << mq->log2_ring_size;\n@@ -680,7 +682,8 @@ eth_memif_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)\n \n \tif ((ring->flags & MEMIF_RING_FLAG_MASK_INT) == 0) {\n \t\ta = 1;\n-\t\tsize = write(mq->intr_handle.fd, &a, sizeof(a));\n+\t\tsize = write(rte_intr_fd_get(mq->intr_handle), &a,\n+\t\t\t sizeof(a));\n \t\tif (unlikely(size < 0)) {\n \t\t\tMIF_LOG(WARNING,\n \t\t\t\t\"Failed to send interrupt. %s\", strerror(errno));\n@@ -832,7 +835,8 @@ eth_memif_tx_zc(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)\n \t/* Send interrupt, if enabled. */\n \tif ((ring->flags & MEMIF_RING_FLAG_MASK_INT) == 0) {\n \t\tuint64_t a = 1;\n-\t\tssize_t size = write(mq->intr_handle.fd, &a, sizeof(a));\n+\t\tssize_t size = write(rte_intr_fd_get(mq->intr_handle),\n+\t\t\t\t &a, sizeof(a));\n \t\tif (unlikely(size < 0)) {\n \t\t\tMIF_LOG(WARNING,\n \t\t\t\t\"Failed to send interrupt. %s\", strerror(errno));\n@@ -1092,8 +1096,10 @@ memif_init_queues(struct rte_eth_dev *dev)\n \t\tmq->ring_offset = memif_get_ring_offset(dev, mq, MEMIF_RING_C2S, i);\n \t\tmq->last_head = 0;\n \t\tmq->last_tail = 0;\n-\t\tmq->intr_handle.fd = eventfd(0, EFD_NONBLOCK);\n-\t\tif (mq->intr_handle.fd < 0) {\n+\t\tif (rte_intr_fd_set(mq->intr_handle, eventfd(0, EFD_NONBLOCK)))\n+\t\t\treturn -rte_errno;\n+\n+\t\tif (rte_intr_fd_get(mq->intr_handle) < 0) {\n \t\t\tMIF_LOG(WARNING,\n \t\t\t\t\"Failed to create eventfd for tx queue %d: %s.\", i,\n \t\t\t\tstrerror(errno));\n@@ -1115,8 +1121,9 @@ memif_init_queues(struct rte_eth_dev *dev)\n \t\tmq->ring_offset = memif_get_ring_offset(dev, mq, MEMIF_RING_S2C, i);\n \t\tmq->last_head = 0;\n \t\tmq->last_tail = 0;\n-\t\tmq->intr_handle.fd = eventfd(0, EFD_NONBLOCK);\n-\t\tif (mq->intr_handle.fd < 0) {\n+\t\tif (rte_intr_fd_set(mq->intr_handle, eventfd(0, EFD_NONBLOCK)))\n+\t\t\treturn -rte_errno;\n+\t\tif (rte_intr_fd_get(mq->intr_handle) < 0) {\n \t\t\tMIF_LOG(WARNING,\n \t\t\t\t\"Failed to create eventfd for rx queue %d: %s.\", i,\n \t\t\t\tstrerror(errno));\n@@ -1310,12 +1317,24 @@ memif_tx_queue_setup(struct rte_eth_dev *dev,\n \t\treturn -ENOMEM;\n \t}\n \n+\t/* Allocate interrupt instance */\n+\tmq->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);\n+\tif (mq->intr_handle == NULL) {\n+\t\tMIF_LOG(ERR, \"Failed to allocate intr handle\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n \tmq->type =\n \t (pmd->role == MEMIF_ROLE_CLIENT) ? MEMIF_RING_C2S : MEMIF_RING_S2C;\n \tmq->n_pkts = 0;\n \tmq->n_bytes = 0;\n-\tmq->intr_handle.fd = -1;\n-\tmq->intr_handle.type = RTE_INTR_HANDLE_EXT;\n+\n+\tif (rte_intr_fd_set(mq->intr_handle, -1))\n+\t\treturn -rte_errno;\n+\n+\tif (rte_intr_type_set(mq->intr_handle, RTE_INTR_HANDLE_EXT))\n+\t\treturn -rte_errno;\n+\n \tmq->in_port = dev->data->port_id;\n \tdev->data->tx_queues[qid] = mq;\n \n@@ -1339,11 +1358,23 @@ memif_rx_queue_setup(struct rte_eth_dev *dev,\n \t\treturn -ENOMEM;\n \t}\n \n+\t/* Allocate interrupt instance */\n+\tmq->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);\n+\tif (mq->intr_handle == NULL) {\n+\t\tMIF_LOG(ERR, \"Failed to allocate intr handle\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n \tmq->type = (pmd->role == MEMIF_ROLE_CLIENT) ? MEMIF_RING_S2C : MEMIF_RING_C2S;\n \tmq->n_pkts = 0;\n \tmq->n_bytes = 0;\n-\tmq->intr_handle.fd = -1;\n-\tmq->intr_handle.type = RTE_INTR_HANDLE_EXT;\n+\n+\tif (rte_intr_fd_set(mq->intr_handle, -1))\n+\t\treturn -rte_errno;\n+\n+\tif (rte_intr_type_set(mq->intr_handle, RTE_INTR_HANDLE_EXT))\n+\t\treturn -rte_errno;\n+\n \tmq->mempool = mb_pool;\n \tmq->in_port = dev->data->port_id;\n \tdev->data->rx_queues[qid] = mq;\n@@ -1359,6 +1390,7 @@ memif_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid)\n \tif (!mq)\n \t\treturn;\n \n+\trte_intr_instance_free(mq->intr_handle);\n \trte_free(mq);\n }\n \ndiff --git a/drivers/net/memif/rte_eth_memif.h b/drivers/net/memif/rte_eth_memif.h\nindex 2038bda742..a5ee23d42e 100644\n--- a/drivers/net/memif/rte_eth_memif.h\n+++ b/drivers/net/memif/rte_eth_memif.h\n@@ -68,7 +68,7 @@ struct memif_queue {\n \tuint64_t n_pkts;\t\t\t/**< number of rx/tx packets */\n \tuint64_t n_bytes;\t\t\t/**< number of rx/tx bytes */\n \n-\tstruct rte_intr_handle intr_handle;\t/**< interrupt handle */\n+\tstruct rte_intr_handle *intr_handle;\t/**< interrupt handle */\n \n \tmemif_log2_ring_size_t log2_ring_size;\t/**< log2 of ring size */\n };\ndiff --git a/drivers/net/mlx4/mlx4.c b/drivers/net/mlx4/mlx4.c\nindex f7fe831d61..cccc71f757 100644\n--- a/drivers/net/mlx4/mlx4.c\n+++ b/drivers/net/mlx4/mlx4.c\n@@ -1042,9 +1042,19 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n \t\trte_eth_copy_pci_info(eth_dev, pci_dev);\n \t\teth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;\n \t\t/* Initialize local interrupt handle for current port. */\n-\t\tmemset(&priv->intr_handle, 0, sizeof(struct rte_intr_handle));\n-\t\tpriv->intr_handle.fd = -1;\n-\t\tpriv->intr_handle.type = RTE_INTR_HANDLE_EXT;\n+\t\tpriv->intr_handle =\n+\t\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);\n+\t\tif (priv->intr_handle == NULL) {\n+\t\t\tRTE_LOG(ERR, EAL, \"Fail to allocate intr_handle\\n\");\n+\t\t\tgoto port_error;\n+\t\t}\n+\n+\t\tif (rte_intr_fd_set(priv->intr_handle, -1))\n+\t\t\tgoto port_error;\n+\n+\t\tif (rte_intr_type_set(priv->intr_handle, RTE_INTR_HANDLE_EXT))\n+\t\t\tgoto port_error;\n+\n \t\t/*\n \t\t * Override ethdev interrupt handle pointer with private\n \t\t * handle instead of that of the parent PCI device used by\n@@ -1057,7 +1067,7 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n \t\t * besides setting up eth_dev->intr_handle, the rest is\n \t\t * handled by rte_intr_rx_ctl().\n \t\t */\n-\t\teth_dev->intr_handle = &priv->intr_handle;\n+\t\teth_dev->intr_handle = priv->intr_handle;\n \t\tpriv->dev_data = eth_dev->data;\n \t\teth_dev->dev_ops = &mlx4_dev_ops;\n #ifdef HAVE_IBV_MLX4_BUF_ALLOCATORS\n@@ -1102,6 +1112,7 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n \t\tprev_dev = eth_dev;\n \t\tcontinue;\n port_error:\n+\t\trte_intr_instance_free(priv->intr_handle);\n \t\trte_free(priv);\n \t\tif (eth_dev != NULL)\n \t\t\teth_dev->data->dev_private = NULL;\ndiff --git a/drivers/net/mlx4/mlx4.h b/drivers/net/mlx4/mlx4.h\nindex e07b1d2386..2d0c512f79 100644\n--- a/drivers/net/mlx4/mlx4.h\n+++ b/drivers/net/mlx4/mlx4.h\n@@ -176,7 +176,7 @@ struct mlx4_priv {\n \tuint32_t tso_max_payload_sz; /**< Max supported TSO payload size. */\n \tuint32_t hw_rss_max_qps; /**< Max Rx Queues supported by RSS. */\n \tuint64_t hw_rss_sup; /**< Supported RSS hash fields (Verbs format). */\n-\tstruct rte_intr_handle intr_handle; /**< Port interrupt handle. */\n+\tstruct rte_intr_handle *intr_handle; /**< Port interrupt handle. */\n \tstruct mlx4_drop *drop; /**< Shared resources for drop flow rules. */\n \tstruct {\n \t\tuint32_t dev_gen; /* Generation number to flush local caches. */\ndiff --git a/drivers/net/mlx4/mlx4_intr.c b/drivers/net/mlx4/mlx4_intr.c\nindex 2aab0f60a7..01057482ec 100644\n--- a/drivers/net/mlx4/mlx4_intr.c\n+++ b/drivers/net/mlx4/mlx4_intr.c\n@@ -43,12 +43,12 @@ static int mlx4_link_status_check(struct mlx4_priv *priv);\n static void\n mlx4_rx_intr_vec_disable(struct mlx4_priv *priv)\n {\n-\tstruct rte_intr_handle *intr_handle = &priv->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = priv->intr_handle;\n \n \trte_intr_free_epoll_fd(intr_handle);\n-\tfree(intr_handle->intr_vec);\n-\tintr_handle->nb_efd = 0;\n-\tintr_handle->intr_vec = NULL;\n+\trte_intr_vec_list_free(intr_handle);\n+\n+\trte_intr_nb_efd_set(intr_handle, 0);\n }\n \n /**\n@@ -67,11 +67,10 @@ mlx4_rx_intr_vec_enable(struct mlx4_priv *priv)\n \tunsigned int rxqs_n = ETH_DEV(priv)->data->nb_rx_queues;\n \tunsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);\n \tunsigned int count = 0;\n-\tstruct rte_intr_handle *intr_handle = &priv->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = priv->intr_handle;\n \n \tmlx4_rx_intr_vec_disable(priv);\n-\tintr_handle->intr_vec = malloc(n * sizeof(intr_handle->intr_vec[0]));\n-\tif (intr_handle->intr_vec == NULL) {\n+\tif (rte_intr_vec_list_alloc(intr_handle, NULL, n)) {\n \t\trte_errno = ENOMEM;\n \t\tERROR(\"failed to allocate memory for interrupt vector,\"\n \t\t \" Rx interrupts will not be supported\");\n@@ -83,9 +82,9 @@ mlx4_rx_intr_vec_enable(struct mlx4_priv *priv)\n \t\t/* Skip queues that cannot request interrupts. */\n \t\tif (!rxq || !rxq->channel) {\n \t\t\t/* Use invalid intr_vec[] index to disable entry. */\n-\t\t\tintr_handle->intr_vec[i] =\n-\t\t\t\tRTE_INTR_VEC_RXTX_OFFSET +\n-\t\t\t\tRTE_MAX_RXTX_INTR_VEC_ID;\n+\t\t\tif (rte_intr_vec_list_index_set(intr_handle, i,\n+\t\t\tRTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID))\n+\t\t\t\treturn -rte_errno;\n \t\t\tcontinue;\n \t\t}\n \t\tif (count >= RTE_MAX_RXTX_INTR_VEC_ID) {\n@@ -96,14 +95,21 @@ mlx4_rx_intr_vec_enable(struct mlx4_priv *priv)\n \t\t\tmlx4_rx_intr_vec_disable(priv);\n \t\t\treturn -rte_errno;\n \t\t}\n-\t\tintr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;\n-\t\tintr_handle->efds[count] = rxq->channel->fd;\n+\n+\t\tif (rte_intr_vec_list_index_set(intr_handle, i,\n+\t\t\t\t\tRTE_INTR_VEC_RXTX_OFFSET + count))\n+\t\t\treturn -rte_errno;\n+\n+\t\tif (rte_intr_efds_index_set(intr_handle, i,\n+\t\t\t\t\t\t rxq->channel->fd))\n+\t\t\treturn -rte_errno;\n+\n \t\tcount++;\n \t}\n \tif (!count)\n \t\tmlx4_rx_intr_vec_disable(priv);\n-\telse\n-\t\tintr_handle->nb_efd = count;\n+\telse if (rte_intr_nb_efd_set(intr_handle, count))\n+\t\treturn -rte_errno;\n \treturn 0;\n }\n \n@@ -254,12 +260,13 @@ mlx4_intr_uninstall(struct mlx4_priv *priv)\n {\n \tint err = rte_errno; /* Make sure rte_errno remains unchanged. */\n \n-\tif (priv->intr_handle.fd != -1) {\n-\t\trte_intr_callback_unregister(&priv->intr_handle,\n+\tif (rte_intr_fd_get(priv->intr_handle) != -1) {\n+\t\trte_intr_callback_unregister(priv->intr_handle,\n \t\t\t\t\t (void (*)(void *))\n \t\t\t\t\t mlx4_interrupt_handler,\n \t\t\t\t\t priv);\n-\t\tpriv->intr_handle.fd = -1;\n+\t\tif (rte_intr_fd_set(priv->intr_handle, -1))\n+\t\t\treturn -rte_errno;\n \t}\n \trte_eal_alarm_cancel((void (*)(void *))mlx4_link_status_alarm, priv);\n \tpriv->intr_alarm = 0;\n@@ -286,8 +293,10 @@ mlx4_intr_install(struct mlx4_priv *priv)\n \n \tmlx4_intr_uninstall(priv);\n \tif (intr_conf->lsc | intr_conf->rmv) {\n-\t\tpriv->intr_handle.fd = priv->ctx->async_fd;\n-\t\trc = rte_intr_callback_register(&priv->intr_handle,\n+\t\tif (rte_intr_fd_set(priv->intr_handle, priv->ctx->async_fd))\n+\t\t\treturn -rte_errno;\n+\n+\t\trc = rte_intr_callback_register(priv->intr_handle,\n \t\t\t\t\t\t(void (*)(void *))\n \t\t\t\t\t\tmlx4_interrupt_handler,\n \t\t\t\t\t\tpriv);\ndiff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c\nindex f17e1aac3c..72bbb665cf 100644\n--- a/drivers/net/mlx5/linux/mlx5_os.c\n+++ b/drivers/net/mlx5/linux/mlx5_os.c\n@@ -2458,11 +2458,9 @@ mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,\n \t\t * Representor interrupts handle is released in mlx5_dev_stop().\n \t\t */\n \t\tif (list[i].info.representor) {\n-\t\t\tstruct rte_intr_handle *intr_handle;\n-\t\t\tintr_handle = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,\n-\t\t\t\t\t\t sizeof(*intr_handle), 0,\n-\t\t\t\t\t\t SOCKET_ID_ANY);\n-\t\t\tif (!intr_handle) {\n+\t\t\tstruct rte_intr_handle *intr_handle =\n+\t\t\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);\n+\t\t\tif (intr_handle == NULL) {\n \t\t\t\tDRV_LOG(ERR,\n \t\t\t\t\t\"port %u failed to allocate memory for interrupt handler \"\n \t\t\t\t\t\"Rx interrupts will not be supported\",\n@@ -2626,7 +2624,7 @@ mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev)\n \tif (eth_dev == NULL)\n \t\treturn -rte_errno;\n \t/* Post create. */\n-\teth_dev->intr_handle = &adev->intr_handle;\n+\teth_dev->intr_handle = adev->intr_handle;\n \tif (rte_eal_process_type() == RTE_PROC_PRIMARY) {\n \t\teth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;\n \t\teth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;\n@@ -2690,24 +2688,38 @@ mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)\n \tint flags;\n \tstruct ibv_context *ctx = sh->cdev->ctx;\n \n-\tsh->intr_handle.fd = -1;\n+\tsh->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);\n+\tif (sh->intr_handle == NULL) {\n+\t\tDRV_LOG(ERR, \"Fail to allocate intr_handle\");\n+\t\trte_errno = ENOMEM;\n+\t\treturn;\n+\t}\n+\trte_intr_fd_set(sh->intr_handle, -1);\n+\n \tflags = fcntl(ctx->async_fd, F_GETFL);\n \tret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK);\n \tif (ret) {\n \t\tDRV_LOG(INFO, \"failed to change file descriptor async event\"\n \t\t\t\" queue\");\n \t} else {\n-\t\tsh->intr_handle.fd = ctx->async_fd;\n-\t\tsh->intr_handle.type = RTE_INTR_HANDLE_EXT;\n-\t\tif (rte_intr_callback_register(&sh->intr_handle,\n+\t\trte_intr_fd_set(sh->intr_handle, ctx->async_fd);\n+\t\trte_intr_type_set(sh->intr_handle, RTE_INTR_HANDLE_EXT);\n+\t\tif (rte_intr_callback_register(sh->intr_handle,\n \t\t\t\t\tmlx5_dev_interrupt_handler, sh)) {\n \t\t\tDRV_LOG(INFO, \"Fail to install the shared interrupt.\");\n-\t\t\tsh->intr_handle.fd = -1;\n+\t\t\trte_intr_fd_set(sh->intr_handle, -1);\n \t\t}\n \t}\n \tif (sh->devx) {\n #ifdef HAVE_IBV_DEVX_ASYNC\n-\t\tsh->intr_handle_devx.fd = -1;\n+\t\tsh->intr_handle_devx =\n+\t\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);\n+\t\tif (!sh->intr_handle_devx) {\n+\t\t\tDRV_LOG(ERR, \"Fail to allocate intr_handle\");\n+\t\t\trte_errno = ENOMEM;\n+\t\t\treturn;\n+\t\t}\n+\t\trte_intr_fd_set(sh->intr_handle_devx, -1);\n \t\tsh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);\n \t\tstruct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;\n \t\tif (!devx_comp) {\n@@ -2721,13 +2733,14 @@ mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)\n \t\t\t\t\" devx comp\");\n \t\t\treturn;\n \t\t}\n-\t\tsh->intr_handle_devx.fd = devx_comp->fd;\n-\t\tsh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;\n-\t\tif (rte_intr_callback_register(&sh->intr_handle_devx,\n+\t\trte_intr_fd_set(sh->intr_handle_devx, devx_comp->fd);\n+\t\trte_intr_type_set(sh->intr_handle_devx,\n+\t\t\t\t\t RTE_INTR_HANDLE_EXT);\n+\t\tif (rte_intr_callback_register(sh->intr_handle_devx,\n \t\t\t\t\tmlx5_dev_interrupt_handler_devx, sh)) {\n \t\t\tDRV_LOG(INFO, \"Fail to install the devx shared\"\n \t\t\t\t\" interrupt.\");\n-\t\t\tsh->intr_handle_devx.fd = -1;\n+\t\t\trte_intr_fd_set(sh->intr_handle_devx, -1);\n \t\t}\n #endif /* HAVE_IBV_DEVX_ASYNC */\n \t}\n@@ -2744,13 +2757,15 @@ mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)\n void\n mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)\n {\n-\tif (sh->intr_handle.fd >= 0)\n-\t\tmlx5_intr_callback_unregister(&sh->intr_handle,\n+\tif (rte_intr_fd_get(sh->intr_handle) >= 0)\n+\t\tmlx5_intr_callback_unregister(sh->intr_handle,\n \t\t\t\t\t mlx5_dev_interrupt_handler, sh);\n+\trte_intr_instance_free(sh->intr_handle);\n #ifdef HAVE_IBV_DEVX_ASYNC\n-\tif (sh->intr_handle_devx.fd >= 0)\n-\t\trte_intr_callback_unregister(&sh->intr_handle_devx,\n+\tif (rte_intr_fd_get(sh->intr_handle_devx) >= 0)\n+\t\trte_intr_callback_unregister(sh->intr_handle_devx,\n \t\t\t\t mlx5_dev_interrupt_handler_devx, sh);\n+\trte_intr_instance_free(sh->intr_handle_devx);\n \tif (sh->devx_comp)\n \t\tmlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);\n #endif\ndiff --git a/drivers/net/mlx5/linux/mlx5_socket.c b/drivers/net/mlx5/linux/mlx5_socket.c\nindex 902b8ec934..db474f030a 100644\n--- a/drivers/net/mlx5/linux/mlx5_socket.c\n+++ b/drivers/net/mlx5/linux/mlx5_socket.c\n@@ -23,7 +23,7 @@\n #define MLX5_SOCKET_PATH \"/var/tmp/dpdk_net_mlx5_%d\"\n \n int server_socket; /* Unix socket for primary process. */\n-struct rte_intr_handle server_intr_handle; /* Interrupt handler. */\n+struct rte_intr_handle *server_intr_handle; /* Interrupt handler. */\n \n /**\n * Handle server pmd socket interrupts.\n@@ -145,9 +145,19 @@ static int\n mlx5_pmd_interrupt_handler_install(void)\n {\n \tMLX5_ASSERT(server_socket);\n-\tserver_intr_handle.fd = server_socket;\n-\tserver_intr_handle.type = RTE_INTR_HANDLE_EXT;\n-\treturn rte_intr_callback_register(&server_intr_handle,\n+\tserver_intr_handle =\n+\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);\n+\tif (server_intr_handle == NULL) {\n+\t\tDRV_LOG(ERR, \"Fail to allocate intr_handle\");\n+\t\treturn -ENOMEM;\n+\t}\n+\tif (rte_intr_fd_set(server_intr_handle, server_socket))\n+\t\treturn -rte_errno;\n+\n+\tif (rte_intr_type_set(server_intr_handle, RTE_INTR_HANDLE_EXT))\n+\t\treturn -rte_errno;\n+\n+\treturn rte_intr_callback_register(server_intr_handle,\n \t\t\t\t\t mlx5_pmd_socket_handle, NULL);\n }\n \n@@ -158,12 +168,13 @@ static void\n mlx5_pmd_interrupt_handler_uninstall(void)\n {\n \tif (server_socket) {\n-\t\tmlx5_intr_callback_unregister(&server_intr_handle,\n+\t\tmlx5_intr_callback_unregister(server_intr_handle,\n \t\t\t\t\t mlx5_pmd_socket_handle,\n \t\t\t\t\t NULL);\n \t}\n-\tserver_intr_handle.fd = 0;\n-\tserver_intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;\n+\trte_intr_fd_set(server_intr_handle, 0);\n+\trte_intr_type_set(server_intr_handle, RTE_INTR_HANDLE_UNKNOWN);\n+\trte_intr_instance_free(server_intr_handle);\n }\n \n /**\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 5da5ceaafe..5768b82935 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -996,7 +996,7 @@ struct mlx5_dev_txpp {\n \tuint32_t tick; /* Completion tick duration in nanoseconds. */\n \tuint32_t test; /* Packet pacing test mode. */\n \tint32_t skew; /* Scheduling skew. */\n-\tstruct rte_intr_handle intr_handle; /* Periodic interrupt. */\n+\tstruct rte_intr_handle *intr_handle; /* Periodic interrupt. */\n \tvoid *echan; /* Event Channel. */\n \tstruct mlx5_txpp_wq clock_queue; /* Clock Queue. */\n \tstruct mlx5_txpp_wq rearm_queue; /* Clock Queue. */\n@@ -1160,8 +1160,8 @@ struct mlx5_dev_ctx_shared {\n \tstruct mlx5_indexed_pool *ipool[MLX5_IPOOL_MAX];\n \tstruct mlx5_indexed_pool *mdh_ipools[MLX5_MAX_MODIFY_NUM];\n \t/* Shared interrupt handler section. */\n-\tstruct rte_intr_handle intr_handle; /* Interrupt handler for device. */\n-\tstruct rte_intr_handle intr_handle_devx; /* DEVX interrupt handler. */\n+\tstruct rte_intr_handle *intr_handle; /* Interrupt handler for device. */\n+\tstruct rte_intr_handle *intr_handle_devx; /* DEVX interrupt handler. */\n \tvoid *devx_comp; /* DEVX async comp obj. */\n \tstruct mlx5_devx_obj *tis[16]; /* TIS object. */\n \tstruct mlx5_devx_obj *td; /* Transport domain. */\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex 5fed42324d..4f02fe02b9 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -834,10 +834,7 @@ mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)\n \tif (!dev->data->dev_conf.intr_conf.rxq)\n \t\treturn 0;\n \tmlx5_rx_intr_vec_disable(dev);\n-\tintr_handle->intr_vec = mlx5_malloc(0,\n-\t\t\t\tn * sizeof(intr_handle->intr_vec[0]),\n-\t\t\t\t0, SOCKET_ID_ANY);\n-\tif (intr_handle->intr_vec == NULL) {\n+\tif (rte_intr_vec_list_alloc(intr_handle, NULL, n)) {\n \t\tDRV_LOG(ERR,\n \t\t\t\"port %u failed to allocate memory for interrupt\"\n \t\t\t\" vector, Rx interrupts will not be supported\",\n@@ -845,7 +842,10 @@ mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)\n \t\trte_errno = ENOMEM;\n \t\treturn -rte_errno;\n \t}\n-\tintr_handle->type = RTE_INTR_HANDLE_EXT;\n+\n+\tif (rte_intr_type_set(intr_handle, RTE_INTR_HANDLE_EXT))\n+\t\treturn -rte_errno;\n+\n \tfor (i = 0; i != n; ++i) {\n \t\t/* This rxq obj must not be released in this function. */\n \t\tstruct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_get(dev, i);\n@@ -856,9 +856,9 @@ mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)\n \t\tif (!rxq_obj || (!rxq_obj->ibv_channel &&\n \t\t\t\t !rxq_obj->devx_channel)) {\n \t\t\t/* Use invalid intr_vec[] index to disable entry. */\n-\t\t\tintr_handle->intr_vec[i] =\n-\t\t\t\tRTE_INTR_VEC_RXTX_OFFSET +\n-\t\t\t\tRTE_MAX_RXTX_INTR_VEC_ID;\n+\t\t\tif (rte_intr_vec_list_index_set(intr_handle, i,\n+\t\t\t RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID))\n+\t\t\t\treturn -rte_errno;\n \t\t\t/* Decrease the rxq_ctrl's refcnt */\n \t\t\tif (rxq_ctrl)\n \t\t\t\tmlx5_rxq_release(dev, i);\n@@ -885,14 +885,19 @@ mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)\n \t\t\tmlx5_rx_intr_vec_disable(dev);\n \t\t\treturn -rte_errno;\n \t\t}\n-\t\tintr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;\n-\t\tintr_handle->efds[count] = rxq_obj->fd;\n+\n+\t\tif (rte_intr_vec_list_index_set(intr_handle, i,\n+\t\t\t\t\tRTE_INTR_VEC_RXTX_OFFSET + count))\n+\t\t\treturn -rte_errno;\n+\t\tif (rte_intr_efds_index_set(intr_handle, count,\n+\t\t\t\t\t\t rxq_obj->fd))\n+\t\t\treturn -rte_errno;\n \t\tcount++;\n \t}\n \tif (!count)\n \t\tmlx5_rx_intr_vec_disable(dev);\n-\telse\n-\t\tintr_handle->nb_efd = count;\n+\telse if (rte_intr_nb_efd_set(intr_handle, count))\n+\t\treturn -rte_errno;\n \treturn 0;\n }\n \n@@ -913,11 +918,11 @@ mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)\n \n \tif (!dev->data->dev_conf.intr_conf.rxq)\n \t\treturn;\n-\tif (!intr_handle->intr_vec)\n+\tif (rte_intr_vec_list_index_get(intr_handle, 0) < 0)\n \t\tgoto free;\n \tfor (i = 0; i != n; ++i) {\n-\t\tif (intr_handle->intr_vec[i] == RTE_INTR_VEC_RXTX_OFFSET +\n-\t\t RTE_MAX_RXTX_INTR_VEC_ID)\n+\t\tif (rte_intr_vec_list_index_get(intr_handle, i) ==\n+\t\t RTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID)\n \t\t\tcontinue;\n \t\t/**\n \t\t * Need to access directly the queue to release the reference\n@@ -927,10 +932,10 @@ mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)\n \t}\n free:\n \trte_intr_free_epoll_fd(intr_handle);\n-\tif (intr_handle->intr_vec)\n-\t\tmlx5_free(intr_handle->intr_vec);\n-\tintr_handle->nb_efd = 0;\n-\tintr_handle->intr_vec = NULL;\n+\n+\trte_intr_vec_list_free(intr_handle);\n+\n+\trte_intr_nb_efd_set(intr_handle, 0);\n }\n \n /**\ndiff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c\nindex dacf7ff272..d916c8addc 100644\n--- a/drivers/net/mlx5/mlx5_trigger.c\n+++ b/drivers/net/mlx5/mlx5_trigger.c\n@@ -1183,7 +1183,7 @@ mlx5_dev_start(struct rte_eth_dev *dev)\n \tdev->rx_pkt_burst = mlx5_select_rx_function(dev);\n \t/* Enable datapath on secondary process. */\n \tmlx5_mp_os_req_start_rxtx(dev);\n-\tif (priv->sh->intr_handle.fd >= 0) {\n+\tif (rte_intr_fd_get(priv->sh->intr_handle) >= 0) {\n \t\tpriv->sh->port[priv->dev_port - 1].ih_port_id =\n \t\t\t\t\t(uint32_t)dev->data->port_id;\n \t} else {\n@@ -1192,7 +1192,7 @@ mlx5_dev_start(struct rte_eth_dev *dev)\n \t\tdev->data->dev_conf.intr_conf.lsc = 0;\n \t\tdev->data->dev_conf.intr_conf.rmv = 0;\n \t}\n-\tif (priv->sh->intr_handle_devx.fd >= 0)\n+\tif (rte_intr_fd_get(priv->sh->intr_handle_devx) >= 0)\n \t\tpriv->sh->port[priv->dev_port - 1].devx_ih_port_id =\n \t\t\t\t\t(uint32_t)dev->data->port_id;\n \treturn 0;\ndiff --git a/drivers/net/mlx5/mlx5_txpp.c b/drivers/net/mlx5/mlx5_txpp.c\nindex 48f03fcd79..34f92faa67 100644\n--- a/drivers/net/mlx5/mlx5_txpp.c\n+++ b/drivers/net/mlx5/mlx5_txpp.c\n@@ -759,11 +759,11 @@ mlx5_txpp_interrupt_handler(void *cb_arg)\n static void\n mlx5_txpp_stop_service(struct mlx5_dev_ctx_shared *sh)\n {\n-\tif (!sh->txpp.intr_handle.fd)\n+\tif (!rte_intr_fd_get(sh->txpp.intr_handle))\n \t\treturn;\n-\tmlx5_intr_callback_unregister(&sh->txpp.intr_handle,\n+\tmlx5_intr_callback_unregister(sh->txpp.intr_handle,\n \t\t\t\t mlx5_txpp_interrupt_handler, sh);\n-\tsh->txpp.intr_handle.fd = 0;\n+\trte_intr_instance_free(sh->txpp.intr_handle);\n }\n \n /* Attach interrupt handler and fires first request to Rearm Queue. */\n@@ -787,13 +787,22 @@ mlx5_txpp_start_service(struct mlx5_dev_ctx_shared *sh)\n \t\trte_errno = errno;\n \t\treturn -rte_errno;\n \t}\n-\tmemset(&sh->txpp.intr_handle, 0, sizeof(sh->txpp.intr_handle));\n+\tsh->txpp.intr_handle =\n+\t\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);\n+\tif (sh->txpp.intr_handle == NULL) {\n+\t\tDRV_LOG(ERR, \"Fail to allocate intr_handle\");\n+\t\treturn -ENOMEM;\n+\t}\n \tfd = mlx5_os_get_devx_channel_fd(sh->txpp.echan);\n-\tsh->txpp.intr_handle.fd = fd;\n-\tsh->txpp.intr_handle.type = RTE_INTR_HANDLE_EXT;\n-\tif (rte_intr_callback_register(&sh->txpp.intr_handle,\n+\tif (rte_intr_fd_set(sh->txpp.intr_handle, fd))\n+\t\treturn -rte_errno;\n+\n+\tif (rte_intr_type_set(sh->txpp.intr_handle, RTE_INTR_HANDLE_EXT))\n+\t\treturn -rte_errno;\n+\n+\tif (rte_intr_callback_register(sh->txpp.intr_handle,\n \t\t\t\t mlx5_txpp_interrupt_handler, sh)) {\n-\t\tsh->txpp.intr_handle.fd = 0;\n+\t\trte_intr_fd_set(sh->txpp.intr_handle, 0);\n \t\tDRV_LOG(ERR, \"Failed to register CQE interrupt %d.\", rte_errno);\n \t\treturn -rte_errno;\n \t}\ndiff --git a/drivers/net/netvsc/hn_ethdev.c b/drivers/net/netvsc/hn_ethdev.c\nindex 9c4ae80e7e..8a950403ac 100644\n--- a/drivers/net/netvsc/hn_ethdev.c\n+++ b/drivers/net/netvsc/hn_ethdev.c\n@@ -133,9 +133,9 @@ eth_dev_vmbus_allocate(struct rte_vmbus_device *dev, size_t private_data_size)\n \teth_dev->device = &dev->device;\n \n \t/* interrupt is simulated */\n-\tdev->intr_handle.type = RTE_INTR_HANDLE_EXT;\n+\trte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_EXT);\n \teth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;\n-\teth_dev->intr_handle = &dev->intr_handle;\n+\teth_dev->intr_handle = dev->intr_handle;\n \n \treturn eth_dev;\n }\ndiff --git a/drivers/net/nfp/nfp_common.c b/drivers/net/nfp/nfp_common.c\nindex 3ea697c544..f8978e803a 100644\n--- a/drivers/net/nfp/nfp_common.c\n+++ b/drivers/net/nfp/nfp_common.c\n@@ -307,24 +307,21 @@ nfp_configure_rx_interrupt(struct rte_eth_dev *dev,\n \tstruct nfp_net_hw *hw;\n \tint i;\n \n-\tif (!intr_handle->intr_vec) {\n-\t\tintr_handle->intr_vec =\n-\t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t dev->data->nb_rx_queues * sizeof(int), 0);\n-\t\tif (!intr_handle->intr_vec) {\n-\t\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %d rx_queues\"\n-\t\t\t\t \" intr_vec\", dev->data->nb_rx_queues);\n-\t\t\treturn -ENOMEM;\n-\t\t}\n+\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t dev->data->nb_rx_queues)) {\n+\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %d rx_queues\"\n+\t\t\t \" intr_vec\", dev->data->nb_rx_queues);\n+\t\treturn -ENOMEM;\n \t}\n \n \thw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \n-\tif (intr_handle->type == RTE_INTR_HANDLE_UIO) {\n+\tif (rte_intr_type_get(intr_handle) == RTE_INTR_HANDLE_UIO) {\n \t\tPMD_INIT_LOG(INFO, \"VF: enabling RX interrupt with UIO\");\n \t\t/* UIO just supports one queue and no LSC*/\n \t\tnn_cfg_writeb(hw, NFP_NET_CFG_RXR_VEC(0), 0);\n-\t\tintr_handle->intr_vec[0] = 0;\n+\t\tif (rte_intr_vec_list_index_set(intr_handle, 0, 0))\n+\t\t\treturn -1;\n \t} else {\n \t\tPMD_INIT_LOG(INFO, \"VF: enabling RX interrupt with VFIO\");\n \t\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n@@ -333,9 +330,12 @@ nfp_configure_rx_interrupt(struct rte_eth_dev *dev,\n \t\t\t * efd interrupts\n \t\t\t*/\n \t\t\tnn_cfg_writeb(hw, NFP_NET_CFG_RXR_VEC(i), i + 1);\n-\t\t\tintr_handle->intr_vec[i] = i + 1;\n+\t\t\tif (rte_intr_vec_list_index_set(intr_handle, i,\n+\t\t\t\t\t\t\t i + 1))\n+\t\t\t\treturn -1;\n \t\t\tPMD_INIT_LOG(DEBUG, \"intr_vec[%d]= %d\", i,\n-\t\t\t\t\t intr_handle->intr_vec[i]);\n+\t\t\t\trte_intr_vec_list_index_get(intr_handle,\n+\t\t\t\t\t\t\t\t i));\n \t\t}\n \t}\n \n@@ -804,7 +804,8 @@ nfp_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n \thw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tpci_dev = RTE_ETH_DEV_TO_PCI(dev);\n \n-\tif (pci_dev->intr_handle.type != RTE_INTR_HANDLE_UIO)\n+\tif (rte_intr_type_get(pci_dev->intr_handle) !=\n+\t\t\t\t\t\t\tRTE_INTR_HANDLE_UIO)\n \t\tbase = 1;\n \n \t/* Make sure all updates are written before un-masking */\n@@ -824,7 +825,8 @@ nfp_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)\n \thw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tpci_dev = RTE_ETH_DEV_TO_PCI(dev);\n \n-\tif (pci_dev->intr_handle.type != RTE_INTR_HANDLE_UIO)\n+\tif (rte_intr_type_get(pci_dev->intr_handle) !=\n+\t\t\t\t\t\t\tRTE_INTR_HANDLE_UIO)\n \t\tbase = 1;\n \n \t/* Make sure all updates are written before un-masking */\n@@ -874,7 +876,7 @@ nfp_net_irq_unmask(struct rte_eth_dev *dev)\n \tif (hw->ctrl & NFP_NET_CFG_CTRL_MSIXAUTO) {\n \t\t/* If MSI-X auto-masking is used, clear the entry */\n \t\trte_wmb();\n-\t\trte_intr_ack(&pci_dev->intr_handle);\n+\t\trte_intr_ack(pci_dev->intr_handle);\n \t} else {\n \t\t/* Make sure all updates are written before un-masking */\n \t\trte_wmb();\ndiff --git a/drivers/net/nfp/nfp_ethdev.c b/drivers/net/nfp/nfp_ethdev.c\nindex e08e594b04..830863af28 100644\n--- a/drivers/net/nfp/nfp_ethdev.c\n+++ b/drivers/net/nfp/nfp_ethdev.c\n@@ -82,7 +82,7 @@ static int\n nfp_net_start(struct rte_eth_dev *dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint32_t new_ctrl, update = 0;\n \tstruct nfp_net_hw *hw;\n \tstruct nfp_pf_dev *pf_dev;\n@@ -109,12 +109,13 @@ nfp_net_start(struct rte_eth_dev *dev)\n \t\t\t\t\t \"with NFP multiport PF\");\n \t\t\t\treturn -EINVAL;\n \t\t}\n-\t\tif (intr_handle->type == RTE_INTR_HANDLE_UIO) {\n+\t\tif (rte_intr_type_get(intr_handle) ==\n+\t\t\t\t\t\tRTE_INTR_HANDLE_UIO) {\n \t\t\t/*\n \t\t\t * Better not to share LSC with RX interrupts.\n \t\t\t * Unregistering LSC interrupt handler\n \t\t\t */\n-\t\t\trte_intr_callback_unregister(&pci_dev->intr_handle,\n+\t\t\trte_intr_callback_unregister(pci_dev->intr_handle,\n \t\t\t\tnfp_net_dev_interrupt_handler, (void *)dev);\n \n \t\t\tif (dev->data->nb_rx_queues > 1) {\n@@ -333,10 +334,10 @@ nfp_net_close(struct rte_eth_dev *dev)\n \tnfp_cpp_free(pf_dev->cpp);\n \trte_free(pf_dev);\n \n-\trte_intr_disable(&pci_dev->intr_handle);\n+\trte_intr_disable(pci_dev->intr_handle);\n \n \t/* unregister callback func from eal lib */\n-\trte_intr_callback_unregister(&pci_dev->intr_handle,\n+\trte_intr_callback_unregister(pci_dev->intr_handle,\n \t\t\t\t nfp_net_dev_interrupt_handler,\n \t\t\t\t (void *)dev);\n \n@@ -579,7 +580,7 @@ nfp_net_init(struct rte_eth_dev *eth_dev)\n \n \tif (rte_eal_process_type() == RTE_PROC_PRIMARY) {\n \t\t/* Registering LSC interrupt handler */\n-\t\trte_intr_callback_register(&pci_dev->intr_handle,\n+\t\trte_intr_callback_register(pci_dev->intr_handle,\n \t\t\t\t\t nfp_net_dev_interrupt_handler,\n \t\t\t\t\t (void *)eth_dev);\n \t\t/* Telling the firmware about the LSC interrupt entry */\ndiff --git a/drivers/net/nfp/nfp_ethdev_vf.c b/drivers/net/nfp/nfp_ethdev_vf.c\nindex 817fe64dbc..5557a1e002 100644\n--- a/drivers/net/nfp/nfp_ethdev_vf.c\n+++ b/drivers/net/nfp/nfp_ethdev_vf.c\n@@ -51,7 +51,7 @@ static int\n nfp_netvf_start(struct rte_eth_dev *dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint32_t new_ctrl, update = 0;\n \tstruct nfp_net_hw *hw;\n \tstruct rte_eth_conf *dev_conf;\n@@ -71,12 +71,13 @@ nfp_netvf_start(struct rte_eth_dev *dev)\n \n \t/* check and configure queue intr-vector mapping */\n \tif (dev->data->dev_conf.intr_conf.rxq != 0) {\n-\t\tif (intr_handle->type == RTE_INTR_HANDLE_UIO) {\n+\t\tif (rte_intr_type_get(intr_handle) ==\n+\t\t\t\t\t\tRTE_INTR_HANDLE_UIO) {\n \t\t\t/*\n \t\t\t * Better not to share LSC with RX interrupts.\n \t\t\t * Unregistering LSC interrupt handler\n \t\t\t */\n-\t\t\trte_intr_callback_unregister(&pci_dev->intr_handle,\n+\t\t\trte_intr_callback_unregister(pci_dev->intr_handle,\n \t\t\t\tnfp_net_dev_interrupt_handler, (void *)dev);\n \n \t\t\tif (dev->data->nb_rx_queues > 1) {\n@@ -225,10 +226,10 @@ nfp_netvf_close(struct rte_eth_dev *dev)\n \t\tnfp_net_reset_rx_queue(this_rx_q);\n \t}\n \n-\trte_intr_disable(&pci_dev->intr_handle);\n+\trte_intr_disable(pci_dev->intr_handle);\n \n \t/* unregister callback func from eal lib */\n-\trte_intr_callback_unregister(&pci_dev->intr_handle,\n+\trte_intr_callback_unregister(pci_dev->intr_handle,\n \t\t\t\t nfp_net_dev_interrupt_handler,\n \t\t\t\t (void *)dev);\n \n@@ -445,7 +446,7 @@ nfp_netvf_init(struct rte_eth_dev *eth_dev)\n \n \tif (rte_eal_process_type() == RTE_PROC_PRIMARY) {\n \t\t/* Registering LSC interrupt handler */\n-\t\trte_intr_callback_register(&pci_dev->intr_handle,\n+\t\trte_intr_callback_register(pci_dev->intr_handle,\n \t\t\t\t\t nfp_net_dev_interrupt_handler,\n \t\t\t\t\t (void *)eth_dev);\n \t\t/* Telling the firmware about the LSC interrupt entry */\ndiff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c\nindex fc76b84b5b..466e089b34 100644\n--- a/drivers/net/ngbe/ngbe_ethdev.c\n+++ b/drivers/net/ngbe/ngbe_ethdev.c\n@@ -129,7 +129,7 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n \tstruct ngbe_hw *hw = ngbe_dev_hw(eth_dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tconst struct rte_memzone *mz;\n \tuint32_t ctrl_ext;\n \tint err;\n@@ -334,7 +334,7 @@ ngbe_dev_start(struct rte_eth_dev *dev)\n {\n \tstruct ngbe_hw *hw = ngbe_dev_hw(dev);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint32_t intr_vector = 0;\n \tint err;\n \tbool link_up = false, negotiate = false;\n@@ -372,11 +372,9 @@ ngbe_dev_start(struct rte_eth_dev *dev)\n \t\t\treturn -1;\n \t}\n \n-\tif (rte_intr_dp_is_en(intr_handle) && intr_handle->intr_vec == NULL) {\n-\t\tintr_handle->intr_vec =\n-\t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t dev->data->nb_rx_queues * sizeof(int), 0);\n-\t\tif (intr_handle->intr_vec == NULL) {\n+\tif (rte_intr_dp_is_en(intr_handle)) {\n+\t\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t\t\t dev->data->nb_rx_queues)) {\n \t\t\tPMD_INIT_LOG(ERR,\n \t\t\t\t \"Failed to allocate %d rx_queues intr_vec\",\n \t\t\t\t dev->data->nb_rx_queues);\n@@ -503,7 +501,7 @@ ngbe_dev_stop(struct rte_eth_dev *dev)\n \tstruct rte_eth_link link;\n \tstruct ngbe_hw *hw = ngbe_dev_hw(dev);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \tif (hw->adapter_stopped)\n \t\treturn 0;\n@@ -540,10 +538,7 @@ ngbe_dev_stop(struct rte_eth_dev *dev)\n \n \t/* Clean datapath event and queue/vec mapping */\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec != NULL) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\trte_intr_vec_list_free(intr_handle);\n \n \thw->adapter_stopped = true;\n \tdev->data->dev_started = 0;\n@@ -559,7 +554,7 @@ ngbe_dev_close(struct rte_eth_dev *dev)\n {\n \tstruct ngbe_hw *hw = ngbe_dev_hw(dev);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint retries = 0;\n \tint ret;\n \n@@ -1093,7 +1088,7 @@ static void\n ngbe_configure_msix(struct rte_eth_dev *dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct ngbe_hw *hw = ngbe_dev_hw(dev);\n \tuint32_t queue_id, base = NGBE_MISC_VEC_ID;\n \tuint32_t vec = NGBE_MISC_VEC_ID;\n@@ -1128,8 +1123,10 @@ ngbe_configure_msix(struct rte_eth_dev *dev)\n \t\t\tqueue_id++) {\n \t\t\t/* by default, 1:1 mapping */\n \t\t\tngbe_set_ivar_map(hw, 0, queue_id, vec);\n-\t\t\tintr_handle->intr_vec[queue_id] = vec;\n-\t\t\tif (vec < base + intr_handle->nb_efd - 1)\n+\t\t\trte_intr_vec_list_index_set(intr_handle,\n+\t\t\t\t\t\t\t queue_id, vec);\n+\t\t\tif (vec < base + rte_intr_nb_efd_get(intr_handle)\n+\t\t\t - 1)\n \t\t\t\tvec++;\n \t\t}\n \ndiff --git a/drivers/net/octeontx2/otx2_ethdev_irq.c b/drivers/net/octeontx2/otx2_ethdev_irq.c\nindex b121488faf..cc573bb2e8 100644\n--- a/drivers/net/octeontx2/otx2_ethdev_irq.c\n+++ b/drivers/net/octeontx2/otx2_ethdev_irq.c\n@@ -34,7 +34,7 @@ static int\n nix_lf_register_err_irq(struct rte_eth_dev *eth_dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n \tint rc, vec;\n \n@@ -54,7 +54,7 @@ static void\n nix_lf_unregister_err_irq(struct rte_eth_dev *eth_dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n \tint vec;\n \n@@ -90,7 +90,7 @@ static int\n nix_lf_register_ras_irq(struct rte_eth_dev *eth_dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n \tint rc, vec;\n \n@@ -110,7 +110,7 @@ static void\n nix_lf_unregister_ras_irq(struct rte_eth_dev *eth_dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n \tint vec;\n \n@@ -263,7 +263,7 @@ int\n oxt2_nix_register_queue_irqs(struct rte_eth_dev *eth_dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n \tint vec, q, sqs, rqs, qs, rc = 0;\n \n@@ -308,7 +308,7 @@ void\n oxt2_nix_unregister_queue_irqs(struct rte_eth_dev *eth_dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n \tint vec, q;\n \n@@ -332,7 +332,7 @@ int\n oxt2_nix_register_cq_irqs(struct rte_eth_dev *eth_dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n \tuint8_t rc = 0, vec, q;\n \n@@ -362,20 +362,19 @@ oxt2_nix_register_cq_irqs(struct rte_eth_dev *eth_dev)\n \t\t\treturn rc;\n \t\t}\n \n-\t\tif (!handle->intr_vec) {\n-\t\t\thandle->intr_vec = rte_zmalloc(\"intr_vec\",\n-\t\t\t\t\t dev->configured_cints *\n-\t\t\t\t\t sizeof(int), 0);\n-\t\t\tif (!handle->intr_vec) {\n-\t\t\t\totx2_err(\"Failed to allocate %d rx intr_vec\",\n-\t\t\t\t\t dev->configured_cints);\n-\t\t\t\treturn -ENOMEM;\n-\t\t\t}\n+\t\trc = rte_intr_vec_list_alloc(handle, \"intr_vec\",\n+\t\t\t\t\t\tdev->configured_cints);\n+\t\tif (rc) {\n+\t\t\totx2_err(\"Fail to allocate intr vec list, \"\n+\t\t\t\t \"rc=%d\", rc);\n+\t\t\treturn rc;\n \t\t}\n \t\t/* VFIO vector zero is resereved for misc interrupt so\n \t\t * doing required adjustment. (b13bfab4cd)\n \t\t */\n-\t\thandle->intr_vec[q] = RTE_INTR_VEC_RXTX_OFFSET + vec;\n+\t\tif (rte_intr_vec_list_index_set(handle, q,\n+\t\t\t\t\t\tRTE_INTR_VEC_RXTX_OFFSET + vec))\n+\t\t\treturn -1;\n \n \t\t/* Configure CQE interrupt coalescing parameters */\n \t\totx2_write64(((CQ_CQE_THRESH_DEFAULT) |\n@@ -395,7 +394,7 @@ void\n oxt2_nix_unregister_cq_irqs(struct rte_eth_dev *eth_dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n \tint vec, q;\n \ndiff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c\nindex c907d7fd83..8ca00e7f6c 100644\n--- a/drivers/net/qede/qede_ethdev.c\n+++ b/drivers/net/qede/qede_ethdev.c\n@@ -1569,17 +1569,17 @@ static int qede_dev_close(struct rte_eth_dev *eth_dev)\n \n \tqdev->ops->common->slowpath_stop(edev);\n \tqdev->ops->common->remove(edev);\n-\trte_intr_disable(&pci_dev->intr_handle);\n+\trte_intr_disable(pci_dev->intr_handle);\n \n-\tswitch (pci_dev->intr_handle.type) {\n+\tswitch (rte_intr_type_get(pci_dev->intr_handle)) {\n \tcase RTE_INTR_HANDLE_UIO_INTX:\n \tcase RTE_INTR_HANDLE_VFIO_LEGACY:\n-\t\trte_intr_callback_unregister(&pci_dev->intr_handle,\n+\t\trte_intr_callback_unregister(pci_dev->intr_handle,\n \t\t\t\t\t qede_interrupt_handler_intx,\n \t\t\t\t\t (void *)eth_dev);\n \t\tbreak;\n \tdefault:\n-\t\trte_intr_callback_unregister(&pci_dev->intr_handle,\n+\t\trte_intr_callback_unregister(pci_dev->intr_handle,\n \t\t\t\t\t qede_interrupt_handler,\n \t\t\t\t\t (void *)eth_dev);\n \t}\n@@ -2554,22 +2554,22 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)\n \t}\n \tqede_update_pf_params(edev);\n \n-\tswitch (pci_dev->intr_handle.type) {\n+\tswitch (rte_intr_type_get(pci_dev->intr_handle)) {\n \tcase RTE_INTR_HANDLE_UIO_INTX:\n \tcase RTE_INTR_HANDLE_VFIO_LEGACY:\n \t\tint_mode = ECORE_INT_MODE_INTA;\n-\t\trte_intr_callback_register(&pci_dev->intr_handle,\n+\t\trte_intr_callback_register(pci_dev->intr_handle,\n \t\t\t\t\t qede_interrupt_handler_intx,\n \t\t\t\t\t (void *)eth_dev);\n \t\tbreak;\n \tdefault:\n \t\tint_mode = ECORE_INT_MODE_MSIX;\n-\t\trte_intr_callback_register(&pci_dev->intr_handle,\n+\t\trte_intr_callback_register(pci_dev->intr_handle,\n \t\t\t\t\t qede_interrupt_handler,\n \t\t\t\t\t (void *)eth_dev);\n \t}\n \n-\tif (rte_intr_enable(&pci_dev->intr_handle)) {\n+\tif (rte_intr_enable(pci_dev->intr_handle)) {\n \t\tDP_ERR(edev, \"rte_intr_enable() failed\\n\");\n \t\trc = -ENODEV;\n \t\tgoto err;\ndiff --git a/drivers/net/sfc/sfc_intr.c b/drivers/net/sfc/sfc_intr.c\nindex 69414fd839..ab67aa9237 100644\n--- a/drivers/net/sfc/sfc_intr.c\n+++ b/drivers/net/sfc/sfc_intr.c\n@@ -79,7 +79,7 @@ sfc_intr_line_handler(void *cb_arg)\n \tif (qmask & (1 << sa->mgmt_evq_index))\n \t\tsfc_intr_handle_mgmt_evq(sa);\n \n-\tif (rte_intr_ack(&pci_dev->intr_handle) != 0)\n+\tif (rte_intr_ack(pci_dev->intr_handle) != 0)\n \t\tsfc_err(sa, \"cannot reenable interrupts\");\n \n \tsfc_log_init(sa, \"done\");\n@@ -123,7 +123,7 @@ sfc_intr_message_handler(void *cb_arg)\n \n \tsfc_intr_handle_mgmt_evq(sa);\n \n-\tif (rte_intr_ack(&pci_dev->intr_handle) != 0)\n+\tif (rte_intr_ack(pci_dev->intr_handle) != 0)\n \t\tsfc_err(sa, \"cannot reenable interrupts\");\n \n \tsfc_log_init(sa, \"done\");\n@@ -159,7 +159,7 @@ sfc_intr_start(struct sfc_adapter *sa)\n \t\tgoto fail_intr_init;\n \n \tpci_dev = RTE_ETH_DEV_TO_PCI(sa->eth_dev);\n-\tintr_handle = &pci_dev->intr_handle;\n+\tintr_handle = pci_dev->intr_handle;\n \n \tif (intr->handler != NULL) {\n \t\tif (intr->rxq_intr && rte_intr_cap_multiple(intr_handle)) {\n@@ -171,16 +171,15 @@ sfc_intr_start(struct sfc_adapter *sa)\n \t\t\t\tgoto fail_rte_intr_efd_enable;\n \t\t}\n \t\tif (rte_intr_dp_is_en(intr_handle)) {\n-\t\t\tintr_handle->intr_vec =\n-\t\t\t\trte_calloc(\"intr_vec\",\n-\t\t\t\tsa->eth_dev->data->nb_rx_queues, sizeof(int),\n-\t\t\t\t0);\n-\t\t\tif (intr_handle->intr_vec == NULL) {\n+\t\t\tif (rte_intr_vec_list_alloc(intr_handle,\n+\t\t\t\t\t\"intr_vec\",\n+\t\t\t\t\tsa->eth_dev->data->nb_rx_queues)) {\n \t\t\t\tsfc_err(sa,\n \t\t\t\t\t\"Failed to allocate %d rx_queues intr_vec\",\n \t\t\t\t\tsa->eth_dev->data->nb_rx_queues);\n \t\t\t\tgoto fail_intr_vector_alloc;\n \t\t\t}\n+\n \t\t}\n \n \t\tsfc_log_init(sa, \"rte_intr_callback_register\");\n@@ -214,16 +213,17 @@ sfc_intr_start(struct sfc_adapter *sa)\n \t\tefx_intr_enable(sa->nic);\n \t}\n \n-\tsfc_log_init(sa, \"done type=%u max_intr=%d nb_efd=%u vec=%p\",\n-\t\t intr_handle->type, intr_handle->max_intr,\n-\t\t intr_handle->nb_efd, intr_handle->intr_vec);\n+\tsfc_log_init(sa, \"done type=%u max_intr=%d nb_efd=%u\",\n+\t\t rte_intr_type_get(intr_handle),\n+\t\t rte_intr_max_intr_get(intr_handle),\n+\t\t rte_intr_nb_efd_get(intr_handle));\n \treturn 0;\n \n fail_rte_intr_enable:\n \trte_intr_callback_unregister(intr_handle, intr->handler, (void *)sa);\n \n fail_rte_intr_cb_reg:\n-\trte_free(intr_handle->intr_vec);\n+\trte_intr_vec_list_free(intr_handle);\n \n fail_intr_vector_alloc:\n \trte_intr_efd_disable(intr_handle);\n@@ -250,9 +250,9 @@ sfc_intr_stop(struct sfc_adapter *sa)\n \n \t\tefx_intr_disable(sa->nic);\n \n-\t\tintr_handle = &pci_dev->intr_handle;\n+\t\tintr_handle = pci_dev->intr_handle;\n \n-\t\trte_free(intr_handle->intr_vec);\n+\t\trte_intr_vec_list_free(intr_handle);\n \t\trte_intr_efd_disable(intr_handle);\n \n \t\tif (rte_intr_disable(intr_handle) != 0)\n@@ -322,7 +322,7 @@ sfc_intr_attach(struct sfc_adapter *sa)\n \n \tsfc_log_init(sa, \"entry\");\n \n-\tswitch (pci_dev->intr_handle.type) {\n+\tswitch (rte_intr_type_get(pci_dev->intr_handle)) {\n #ifdef RTE_EXEC_ENV_LINUX\n \tcase RTE_INTR_HANDLE_UIO_INTX:\n \tcase RTE_INTR_HANDLE_VFIO_LEGACY:\ndiff --git a/drivers/net/tap/rte_eth_tap.c b/drivers/net/tap/rte_eth_tap.c\nindex ef3399ee0f..a9a7658147 100644\n--- a/drivers/net/tap/rte_eth_tap.c\n+++ b/drivers/net/tap/rte_eth_tap.c\n@@ -1663,7 +1663,8 @@ tap_dev_intr_handler(void *cb_arg)\n \tstruct rte_eth_dev *dev = cb_arg;\n \tstruct pmd_internals *pmd = dev->data->dev_private;\n \n-\ttap_nl_recv(pmd->intr_handle.fd, tap_nl_msg_handler, dev);\n+\ttap_nl_recv(rte_intr_fd_get(pmd->intr_handle),\n+\t\t tap_nl_msg_handler, dev);\n }\n \n static int\n@@ -1674,22 +1675,22 @@ tap_lsc_intr_handle_set(struct rte_eth_dev *dev, int set)\n \n \t/* In any case, disable interrupt if the conf is no longer there. */\n \tif (!dev->data->dev_conf.intr_conf.lsc) {\n-\t\tif (pmd->intr_handle.fd != -1) {\n+\t\tif (rte_intr_fd_get(pmd->intr_handle) != -1)\n \t\t\tgoto clean;\n-\t\t}\n+\n \t\treturn 0;\n \t}\n \tif (set) {\n-\t\tpmd->intr_handle.fd = tap_nl_init(RTMGRP_LINK);\n-\t\tif (unlikely(pmd->intr_handle.fd == -1))\n+\t\trte_intr_fd_set(pmd->intr_handle, tap_nl_init(RTMGRP_LINK));\n+\t\tif (unlikely(rte_intr_fd_get(pmd->intr_handle) == -1))\n \t\t\treturn -EBADF;\n \t\treturn rte_intr_callback_register(\n-\t\t\t&pmd->intr_handle, tap_dev_intr_handler, dev);\n+\t\t\tpmd->intr_handle, tap_dev_intr_handler, dev);\n \t}\n \n clean:\n \tdo {\n-\t\tret = rte_intr_callback_unregister(&pmd->intr_handle,\n+\t\tret = rte_intr_callback_unregister(pmd->intr_handle,\n \t\t\ttap_dev_intr_handler, dev);\n \t\tif (ret >= 0) {\n \t\t\tbreak;\n@@ -1702,8 +1703,8 @@ tap_lsc_intr_handle_set(struct rte_eth_dev *dev, int set)\n \t\t}\n \t} while (true);\n \n-\ttap_nl_final(pmd->intr_handle.fd);\n-\tpmd->intr_handle.fd = -1;\n+\ttap_nl_final(rte_intr_fd_get(pmd->intr_handle));\n+\trte_intr_fd_set(pmd->intr_handle, -1);\n \n \treturn 0;\n }\n@@ -1918,6 +1919,13 @@ eth_dev_tap_create(struct rte_vdev_device *vdev, const char *tap_name,\n \t\tgoto error_exit;\n \t}\n \n+\t/* Allocate interrupt instance */\n+\tpmd->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);\n+\tif (pmd->intr_handle == NULL) {\n+\t\tTAP_LOG(ERR, \"Failed to allocate intr handle\");\n+\t\tgoto error_exit;\n+\t}\n+\n \t/* Setup some default values */\n \tdata = dev->data;\n \tdata->dev_private = pmd;\n@@ -1935,9 +1943,9 @@ eth_dev_tap_create(struct rte_vdev_device *vdev, const char *tap_name,\n \tdev->rx_pkt_burst = pmd_rx_burst;\n \tdev->tx_pkt_burst = pmd_tx_burst;\n \n-\tpmd->intr_handle.type = RTE_INTR_HANDLE_EXT;\n-\tpmd->intr_handle.fd = -1;\n-\tdev->intr_handle = &pmd->intr_handle;\n+\trte_intr_type_set(pmd->intr_handle, RTE_INTR_HANDLE_EXT);\n+\trte_intr_fd_set(pmd->intr_handle, -1);\n+\tdev->intr_handle = pmd->intr_handle;\n \n \t/* Presetup the fds to -1 as being not valid */\n \tfor (i = 0; i < RTE_PMD_TAP_MAX_QUEUES; i++) {\n@@ -2088,6 +2096,7 @@ eth_dev_tap_create(struct rte_vdev_device *vdev, const char *tap_name,\n \t/* mac_addrs must not be freed alone because part of dev_private */\n \tdev->data->mac_addrs = NULL;\n \trte_eth_dev_release_port(dev);\n+\trte_intr_instance_free(pmd->intr_handle);\n \n error_exit_nodev:\n \tTAP_LOG(ERR, \"%s Unable to initialize %s\",\ndiff --git a/drivers/net/tap/rte_eth_tap.h b/drivers/net/tap/rte_eth_tap.h\nindex a98ea11a33..996021e424 100644\n--- a/drivers/net/tap/rte_eth_tap.h\n+++ b/drivers/net/tap/rte_eth_tap.h\n@@ -89,7 +89,7 @@ struct pmd_internals {\n \tLIST_HEAD(tap_implicit_flows, rte_flow) implicit_flows;\n \tstruct rx_queue rxq[RTE_PMD_TAP_MAX_QUEUES]; /* List of RX queues */\n \tstruct tx_queue txq[RTE_PMD_TAP_MAX_QUEUES]; /* List of TX queues */\n-\tstruct rte_intr_handle intr_handle; /* LSC interrupt handle. */\n+\tstruct rte_intr_handle *intr_handle; /* LSC interrupt handle. */\n \tint ka_fd; /* keep-alive file descriptor */\n \tstruct rte_mempool *gso_ctx_mp; /* Mempool for GSO packets */\n };\ndiff --git a/drivers/net/tap/tap_intr.c b/drivers/net/tap/tap_intr.c\nindex 1cacc15d9f..56c343acea 100644\n--- a/drivers/net/tap/tap_intr.c\n+++ b/drivers/net/tap/tap_intr.c\n@@ -29,12 +29,13 @@ static void\n tap_rx_intr_vec_uninstall(struct rte_eth_dev *dev)\n {\n \tstruct pmd_internals *pmd = dev->data->dev_private;\n-\tstruct rte_intr_handle *intr_handle = &pmd->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pmd->intr_handle;\n \n \trte_intr_free_epoll_fd(intr_handle);\n-\tfree(intr_handle->intr_vec);\n-\tintr_handle->intr_vec = NULL;\n-\tintr_handle->nb_efd = 0;\n+\trte_intr_vec_list_free(intr_handle);\n+\trte_intr_nb_efd_set(intr_handle, 0);\n+\n+\trte_intr_instance_free(intr_handle);\n }\n \n /**\n@@ -52,15 +53,15 @@ tap_rx_intr_vec_install(struct rte_eth_dev *dev)\n \tstruct pmd_internals *pmd = dev->data->dev_private;\n \tstruct pmd_process_private *process_private = dev->process_private;\n \tunsigned int rxqs_n = pmd->dev->data->nb_rx_queues;\n-\tstruct rte_intr_handle *intr_handle = &pmd->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pmd->intr_handle;\n \tunsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);\n \tunsigned int i;\n \tunsigned int count = 0;\n \n \tif (!dev->data->dev_conf.intr_conf.rxq)\n \t\treturn 0;\n-\tintr_handle->intr_vec = malloc(sizeof(int) * rxqs_n);\n-\tif (intr_handle->intr_vec == NULL) {\n+\n+\tif (rte_intr_vec_list_alloc(intr_handle, NULL, rxqs_n)) {\n \t\trte_errno = ENOMEM;\n \t\tTAP_LOG(ERR,\n \t\t\t\"failed to allocate memory for interrupt vector,\"\n@@ -73,19 +74,23 @@ tap_rx_intr_vec_install(struct rte_eth_dev *dev)\n \t\t/* Skip queues that cannot request interrupts. */\n \t\tif (!rxq || process_private->rxq_fds[i] == -1) {\n \t\t\t/* Use invalid intr_vec[] index to disable entry. */\n-\t\t\tintr_handle->intr_vec[i] =\n-\t\t\t\tRTE_INTR_VEC_RXTX_OFFSET +\n-\t\t\t\tRTE_MAX_RXTX_INTR_VEC_ID;\n+\t\t\tif (rte_intr_vec_list_index_set(intr_handle, i,\n+\t\t\tRTE_INTR_VEC_RXTX_OFFSET + RTE_MAX_RXTX_INTR_VEC_ID))\n+\t\t\t\treturn -rte_errno;\n \t\t\tcontinue;\n \t\t}\n-\t\tintr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;\n-\t\tintr_handle->efds[count] = process_private->rxq_fds[i];\n+\t\tif (rte_intr_vec_list_index_set(intr_handle, i,\n+\t\t\t\t\tRTE_INTR_VEC_RXTX_OFFSET + count))\n+\t\t\treturn -rte_errno;\n+\t\tif (rte_intr_efds_index_set(intr_handle, count,\n+\t\t\t\t\t\t process_private->rxq_fds[i]))\n+\t\t\treturn -rte_errno;\n \t\tcount++;\n \t}\n \tif (!count)\n \t\ttap_rx_intr_vec_uninstall(dev);\n-\telse\n-\t\tintr_handle->nb_efd = count;\n+\telse if (rte_intr_nb_efd_set(intr_handle, count))\n+\t\treturn -rte_errno;\n \treturn 0;\n }\n \ndiff --git a/drivers/net/thunderx/nicvf_ethdev.c b/drivers/net/thunderx/nicvf_ethdev.c\nindex 762647e3b6..fc334cf734 100644\n--- a/drivers/net/thunderx/nicvf_ethdev.c\n+++ b/drivers/net/thunderx/nicvf_ethdev.c\n@@ -1858,6 +1858,8 @@ nicvf_dev_close(struct rte_eth_dev *dev)\n \t\tnicvf_periodic_alarm_stop(nicvf_vf_interrupt, nic->snicvf[i]);\n \t}\n \n+\trte_intr_instance_free(nic->intr_handle);\n+\n \treturn 0;\n }\n \n@@ -2157,6 +2159,14 @@ nicvf_eth_dev_init(struct rte_eth_dev *eth_dev)\n \t\tgoto fail;\n \t}\n \n+\t/* Allocate interrupt instance */\n+\tnic->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);\n+\tif (nic->intr_handle == NULL) {\n+\t\tPMD_INIT_LOG(ERR, \"Failed to allocate intr handle\");\n+\t\tret = -ENODEV;\n+\t\tgoto fail;\n+\t}\n+\n \tnicvf_disable_all_interrupts(nic);\n \n \tret = nicvf_periodic_alarm_start(nicvf_interrupt, eth_dev);\ndiff --git a/drivers/net/thunderx/nicvf_struct.h b/drivers/net/thunderx/nicvf_struct.h\nindex 0ca207d0dd..c7ea13313e 100644\n--- a/drivers/net/thunderx/nicvf_struct.h\n+++ b/drivers/net/thunderx/nicvf_struct.h\n@@ -100,7 +100,7 @@ struct nicvf {\n \tuint16_t subsystem_vendor_id;\n \tstruct nicvf_rbdr *rbdr;\n \tstruct nicvf_rss_reta_info rss_info;\n-\tstruct rte_intr_handle intr_handle;\n+\tstruct rte_intr_handle *intr_handle;\n \tuint8_t cpi_alg;\n \tuint16_t mtu;\n \tint skip_bytes;\ndiff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c\nindex 4b3b703029..169272ded5 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.c\n+++ b/drivers/net/txgbe/txgbe_ethdev.c\n@@ -548,7 +548,7 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)\n \tstruct txgbe_dcb_config *dcb_config = TXGBE_DEV_DCB_CONFIG(eth_dev);\n \tstruct txgbe_filter_info *filter_info = TXGBE_DEV_FILTER(eth_dev);\n \tstruct txgbe_bw_conf *bw_conf = TXGBE_DEV_BW_CONF(eth_dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tconst struct rte_memzone *mz;\n \tuint32_t ctrl_ext;\n \tuint16_t csum;\n@@ -1620,7 +1620,7 @@ txgbe_dev_start(struct rte_eth_dev *dev)\n \tstruct txgbe_hw_stats *hw_stats = TXGBE_DEV_STATS(dev);\n \tstruct txgbe_vf_info *vfinfo = *TXGBE_DEV_VFDATA(dev);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint32_t intr_vector = 0;\n \tint err;\n \tbool link_up = false, negotiate = 0;\n@@ -1670,17 +1670,14 @@ txgbe_dev_start(struct rte_eth_dev *dev)\n \t\t\treturn -1;\n \t}\n \n-\tif (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {\n-\t\tintr_handle->intr_vec =\n-\t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t dev->data->nb_rx_queues * sizeof(int), 0);\n-\t\tif (intr_handle->intr_vec == NULL) {\n+\tif (rte_intr_dp_is_en(intr_handle)) {\n+\t\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t\t\t dev->data->nb_rx_queues)) {\n \t\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %d rx_queues\"\n \t\t\t\t \" intr_vec\", dev->data->nb_rx_queues);\n \t\t\treturn -ENOMEM;\n \t\t}\n \t}\n-\n \t/* confiugre msix for sleep until rx interrupt */\n \ttxgbe_configure_msix(dev);\n \n@@ -1861,7 +1858,7 @@ txgbe_dev_stop(struct rte_eth_dev *dev)\n \tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n \tstruct txgbe_vf_info *vfinfo = *TXGBE_DEV_VFDATA(dev);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint vf;\n \tstruct txgbe_tm_conf *tm_conf = TXGBE_DEV_TM_CONF(dev);\n \n@@ -1911,10 +1908,7 @@ txgbe_dev_stop(struct rte_eth_dev *dev)\n \n \t/* Clean datapath event and queue/vec mapping */\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec != NULL) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\trte_intr_vec_list_free(intr_handle);\n \n \t/* reset hierarchy commit */\n \ttm_conf->committed = false;\n@@ -1977,7 +1971,7 @@ txgbe_dev_close(struct rte_eth_dev *dev)\n {\n \tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint retries = 0;\n \tint ret;\n \n@@ -2936,8 +2930,8 @@ txgbe_dev_interrupt_get_status(struct rte_eth_dev *dev,\n \tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n \tstruct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);\n \n-\tif (intr_handle->type != RTE_INTR_HANDLE_UIO &&\n-\t\t\tintr_handle->type != RTE_INTR_HANDLE_VFIO_MSIX)\n+\tif (rte_intr_type_get(intr_handle) != RTE_INTR_HANDLE_UIO &&\n+\t\trte_intr_type_get(intr_handle) != RTE_INTR_HANDLE_VFIO_MSIX)\n \t\twr32(hw, TXGBE_PX_INTA, 1);\n \n \t/* clear all cause mask */\n@@ -3103,7 +3097,7 @@ txgbe_dev_interrupt_delayed_handler(void *param)\n {\n \tstruct rte_eth_dev *dev = (struct rte_eth_dev *)param;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);\n \tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n \tuint32_t eicr;\n@@ -3623,7 +3617,7 @@ static int\n txgbe_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint32_t mask;\n \tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n \n@@ -3705,7 +3699,7 @@ static void\n txgbe_configure_msix(struct rte_eth_dev *dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n \tuint32_t queue_id, base = TXGBE_MISC_VEC_ID;\n \tuint32_t vec = TXGBE_MISC_VEC_ID;\n@@ -3739,8 +3733,10 @@ txgbe_configure_msix(struct rte_eth_dev *dev)\n \t\t\tqueue_id++) {\n \t\t\t/* by default, 1:1 mapping */\n \t\t\ttxgbe_set_ivar_map(hw, 0, queue_id, vec);\n-\t\t\tintr_handle->intr_vec[queue_id] = vec;\n-\t\t\tif (vec < base + intr_handle->nb_efd - 1)\n+\t\t\trte_intr_vec_list_index_set(intr_handle,\n+\t\t\t\t\t\t\t queue_id, vec);\n+\t\t\tif (vec < base + rte_intr_nb_efd_get(intr_handle)\n+\t\t\t - 1)\n \t\t\t\tvec++;\n \t\t}\n \ndiff --git a/drivers/net/txgbe/txgbe_ethdev_vf.c b/drivers/net/txgbe/txgbe_ethdev_vf.c\nindex 283b52e8f3..4dda55b0c2 100644\n--- a/drivers/net/txgbe/txgbe_ethdev_vf.c\n+++ b/drivers/net/txgbe/txgbe_ethdev_vf.c\n@@ -166,7 +166,7 @@ eth_txgbevf_dev_init(struct rte_eth_dev *eth_dev)\n \tint err;\n \tuint32_t tc, tcs;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);\n \tstruct txgbe_vfta *shadow_vfta = TXGBE_DEV_VFTA(eth_dev);\n \tstruct txgbe_hwstrip *hwstrip = TXGBE_DEV_HWSTRIP(eth_dev);\n@@ -608,7 +608,7 @@ txgbevf_dev_start(struct rte_eth_dev *dev)\n \tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n \tuint32_t intr_vector = 0;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \tint err, mask = 0;\n \n@@ -669,11 +669,9 @@ txgbevf_dev_start(struct rte_eth_dev *dev)\n \t\t\treturn -1;\n \t}\n \n-\tif (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {\n-\t\tintr_handle->intr_vec =\n-\t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t dev->data->nb_rx_queues * sizeof(int), 0);\n-\t\tif (intr_handle->intr_vec == NULL) {\n+\tif (rte_intr_dp_is_en(intr_handle)) {\n+\t\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t\t\t dev->data->nb_rx_queues)) {\n \t\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %d rx_queues\"\n \t\t\t\t \" intr_vec\", dev->data->nb_rx_queues);\n \t\t\treturn -ENOMEM;\n@@ -712,7 +710,7 @@ txgbevf_dev_stop(struct rte_eth_dev *dev)\n \tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n \tstruct txgbe_adapter *adapter = TXGBE_DEV_ADAPTER(dev);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \n \tif (hw->adapter_stopped)\n \t\treturn 0;\n@@ -739,10 +737,7 @@ txgbevf_dev_stop(struct rte_eth_dev *dev)\n \n \t/* Clean datapath event and queue/vec mapping */\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec != NULL) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\trte_intr_vec_list_free(intr_handle);\n \n \tadapter->rss_reta_updated = 0;\n \thw->dev_start = false;\n@@ -755,7 +750,7 @@ txgbevf_dev_close(struct rte_eth_dev *dev)\n {\n \tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tint ret;\n \n \tPMD_INIT_FUNC_TRACE();\n@@ -916,7 +911,7 @@ static int\n txgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);\n \tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n \tuint32_t vec = TXGBE_MISC_VEC_ID;\n@@ -938,7 +933,7 @@ txgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)\n \tstruct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);\n \tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tuint32_t vec = TXGBE_MISC_VEC_ID;\n \n \tif (rte_intr_allow_others(intr_handle))\n@@ -978,7 +973,7 @@ static void\n txgbevf_configure_msix(struct rte_eth_dev *dev)\n {\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n-\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n \tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n \tuint32_t q_idx;\n \tuint32_t vector_idx = TXGBE_MISC_VEC_ID;\n@@ -1004,8 +999,10 @@ txgbevf_configure_msix(struct rte_eth_dev *dev)\n \t\t * as TXGBE_VF_MAXMSIVECOTR = 1\n \t\t */\n \t\ttxgbevf_set_ivar_map(hw, 0, q_idx, vector_idx);\n-\t\tintr_handle->intr_vec[q_idx] = vector_idx;\n-\t\tif (vector_idx < base + intr_handle->nb_efd - 1)\n+\t\trte_intr_vec_list_index_set(intr_handle, q_idx,\n+\t\t\t\t\t\t vector_idx);\n+\t\tif (vector_idx < base + rte_intr_nb_efd_get(intr_handle)\n+\t\t - 1)\n \t\t\tvector_idx++;\n \t}\n \ndiff --git a/drivers/net/vhost/rte_eth_vhost.c b/drivers/net/vhost/rte_eth_vhost.c\nindex beb4b8de2d..5111304ff9 100644\n--- a/drivers/net/vhost/rte_eth_vhost.c\n+++ b/drivers/net/vhost/rte_eth_vhost.c\n@@ -523,40 +523,43 @@ static int\n eth_vhost_update_intr(struct rte_eth_dev *eth_dev, uint16_t rxq_idx)\n {\n \tstruct rte_intr_handle *handle = eth_dev->intr_handle;\n-\tstruct rte_epoll_event rev;\n+\tstruct rte_epoll_event rev, *elist;\n \tint epfd, ret;\n \n-\tif (!handle)\n+\tif (handle == NULL)\n \t\treturn 0;\n \n-\tif (handle->efds[rxq_idx] == handle->elist[rxq_idx].fd)\n+\telist = rte_intr_elist_index_get(handle, rxq_idx);\n+\tif (rte_intr_efds_index_get(handle, rxq_idx) == elist->fd)\n \t\treturn 0;\n \n \tVHOST_LOG(INFO, \"kickfd for rxq-%d was changed, updating handler.\\n\",\n \t\t\trxq_idx);\n \n-\tif (handle->elist[rxq_idx].fd != -1)\n+\tif (elist->fd != -1)\n \t\tVHOST_LOG(ERR, \"Unexpected previous kickfd value (Got %d, expected -1).\\n\",\n-\t\t\t\thandle->elist[rxq_idx].fd);\n+\t\t\telist->fd);\n \n \t/*\n \t * First remove invalid epoll event, and then install\n \t * the new one. May be solved with a proper API in the\n \t * future.\n \t */\n-\tepfd = handle->elist[rxq_idx].epfd;\n-\trev = handle->elist[rxq_idx];\n+\tepfd = elist->epfd;\n+\trev = *elist;\n \tret = rte_epoll_ctl(epfd, EPOLL_CTL_DEL, rev.fd,\n-\t\t\t&handle->elist[rxq_idx]);\n+\t\t\telist);\n \tif (ret) {\n \t\tVHOST_LOG(ERR, \"Delete epoll event failed.\\n\");\n \t\treturn ret;\n \t}\n \n-\trev.fd = handle->efds[rxq_idx];\n-\thandle->elist[rxq_idx] = rev;\n-\tret = rte_epoll_ctl(epfd, EPOLL_CTL_ADD, rev.fd,\n-\t\t\t&handle->elist[rxq_idx]);\n+\trev.fd = rte_intr_efds_index_get(handle, rxq_idx);\n+\tif (rte_intr_elist_index_set(handle, rxq_idx, rev))\n+\t\treturn -rte_errno;\n+\n+\telist = rte_intr_elist_index_get(handle, rxq_idx);\n+\tret = rte_epoll_ctl(epfd, EPOLL_CTL_ADD, rev.fd, elist);\n \tif (ret) {\n \t\tVHOST_LOG(ERR, \"Add epoll event failed.\\n\");\n \t\treturn ret;\n@@ -634,12 +637,10 @@ eth_vhost_uninstall_intr(struct rte_eth_dev *dev)\n {\n \tstruct rte_intr_handle *intr_handle = dev->intr_handle;\n \n-\tif (intr_handle) {\n-\t\tif (intr_handle->intr_vec)\n-\t\t\tfree(intr_handle->intr_vec);\n-\t\tfree(intr_handle);\n+\tif (intr_handle != NULL) {\n+\t\trte_intr_vec_list_free(intr_handle);\n+\t\trte_intr_instance_free(intr_handle);\n \t}\n-\n \tdev->intr_handle = NULL;\n }\n \n@@ -653,32 +654,31 @@ eth_vhost_install_intr(struct rte_eth_dev *dev)\n \tint ret;\n \n \t/* uninstall firstly if we are reconnecting */\n-\tif (dev->intr_handle)\n+\tif (dev->intr_handle != NULL)\n \t\teth_vhost_uninstall_intr(dev);\n \n-\tdev->intr_handle = malloc(sizeof(*dev->intr_handle));\n-\tif (!dev->intr_handle) {\n+\tdev->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);\n+\tif (dev->intr_handle == NULL) {\n \t\tVHOST_LOG(ERR, \"Fail to allocate intr_handle\\n\");\n \t\treturn -ENOMEM;\n \t}\n-\tmemset(dev->intr_handle, 0, sizeof(*dev->intr_handle));\n-\n-\tdev->intr_handle->efd_counter_size = sizeof(uint64_t);\n+\tif (rte_intr_efd_counter_size_set(dev->intr_handle, sizeof(uint64_t)))\n+\t\treturn -rte_errno;\n \n-\tdev->intr_handle->intr_vec =\n-\t\tmalloc(nb_rxq * sizeof(dev->intr_handle->intr_vec[0]));\n-\n-\tif (!dev->intr_handle->intr_vec) {\n+\tif (rte_intr_vec_list_alloc(dev->intr_handle, NULL, nb_rxq)) {\n \t\tVHOST_LOG(ERR,\n \t\t\t\"Failed to allocate memory for interrupt vector\\n\");\n-\t\tfree(dev->intr_handle);\n+\t\trte_intr_instance_free(dev->intr_handle);\n \t\treturn -ENOMEM;\n \t}\n \n+\n \tVHOST_LOG(INFO, \"Prepare intr vec\\n\");\n \tfor (i = 0; i < nb_rxq; i++) {\n-\t\tdev->intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + i;\n-\t\tdev->intr_handle->efds[i] = -1;\n+\t\tif (rte_intr_vec_list_index_set(dev->intr_handle, i, RTE_INTR_VEC_RXTX_OFFSET + i))\n+\t\t\treturn -rte_errno;\n+\t\tif (rte_intr_efds_index_set(dev->intr_handle, i, -1))\n+\t\t\treturn -rte_errno;\n \t\tvq = dev->data->rx_queues[i];\n \t\tif (!vq) {\n \t\t\tVHOST_LOG(INFO, \"rxq-%d not setup yet, skip!\\n\", i);\n@@ -697,13 +697,20 @@ eth_vhost_install_intr(struct rte_eth_dev *dev)\n \t\t\t\t\"rxq-%d's kickfd is invalid, skip!\\n\", i);\n \t\t\tcontinue;\n \t\t}\n-\t\tdev->intr_handle->efds[i] = vring.kickfd;\n+\n+\t\tif (rte_intr_efds_index_set(dev->intr_handle, i, vring.kickfd))\n+\t\t\tcontinue;\n \t\tVHOST_LOG(INFO, \"Installed intr vec for rxq-%d\\n\", i);\n \t}\n \n-\tdev->intr_handle->nb_efd = nb_rxq;\n-\tdev->intr_handle->max_intr = nb_rxq + 1;\n-\tdev->intr_handle->type = RTE_INTR_HANDLE_VDEV;\n+\tif (rte_intr_nb_efd_set(dev->intr_handle, nb_rxq))\n+\t\treturn -rte_errno;\n+\n+\tif (rte_intr_max_intr_set(dev->intr_handle, nb_rxq + 1))\n+\t\treturn -rte_errno;\n+\n+\tif (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_VDEV))\n+\t\treturn -rte_errno;\n \n \treturn 0;\n }\n@@ -908,7 +915,10 @@ vring_conf_update(int vid, struct rte_eth_dev *eth_dev, uint16_t vring_id)\n \t\t\t\t\tvring_id);\n \t\t\treturn ret;\n \t\t}\n-\t\teth_dev->intr_handle->efds[rx_idx] = vring.kickfd;\n+\n+\t\tif (rte_intr_efds_index_set(eth_dev->intr_handle, rx_idx,\n+\t\t\t\t\t\t vring.kickfd))\n+\t\t\treturn -rte_errno;\n \n \t\tvq = eth_dev->data->rx_queues[rx_idx];\n \t\tif (!vq) {\ndiff --git a/drivers/net/virtio/virtio_ethdev.c b/drivers/net/virtio/virtio_ethdev.c\nindex 94120b3490..26de006c77 100644\n--- a/drivers/net/virtio/virtio_ethdev.c\n+++ b/drivers/net/virtio/virtio_ethdev.c\n@@ -731,8 +731,7 @@ virtio_dev_close(struct rte_eth_dev *dev)\n \tif (intr_conf->lsc || intr_conf->rxq) {\n \t\tvirtio_intr_disable(dev);\n \t\trte_intr_efd_disable(dev->intr_handle);\n-\t\trte_free(dev->intr_handle->intr_vec);\n-\t\tdev->intr_handle->intr_vec = NULL;\n+\t\trte_intr_vec_list_free(dev->intr_handle);\n \t}\n \n \tvirtio_reset(hw);\n@@ -1643,7 +1642,9 @@ virtio_queues_bind_intr(struct rte_eth_dev *dev)\n \n \tPMD_INIT_LOG(INFO, \"queue/interrupt binding\");\n \tfor (i = 0; i < dev->data->nb_rx_queues; ++i) {\n-\t\tdev->intr_handle->intr_vec[i] = i + 1;\n+\t\tif (rte_intr_vec_list_index_set(dev->intr_handle, i,\n+\t\t\t\t\t\t i + 1))\n+\t\t\treturn -rte_errno;\n \t\tif (VIRTIO_OPS(hw)->set_queue_irq(hw, hw->vqs[i * 2], i + 1) ==\n \t\t\t\t\t\t VIRTIO_MSI_NO_VECTOR) {\n \t\t\tPMD_DRV_LOG(ERR, \"failed to set queue vector\");\n@@ -1682,15 +1683,11 @@ virtio_configure_intr(struct rte_eth_dev *dev)\n \t\treturn -1;\n \t}\n \n-\tif (!dev->intr_handle->intr_vec) {\n-\t\tdev->intr_handle->intr_vec =\n-\t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t hw->max_queue_pairs * sizeof(int), 0);\n-\t\tif (!dev->intr_handle->intr_vec) {\n-\t\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %u rxq vectors\",\n-\t\t\t\t hw->max_queue_pairs);\n-\t\t\treturn -ENOMEM;\n-\t\t}\n+\tif (rte_intr_vec_list_alloc(dev->intr_handle, \"intr_vec\",\n+\t\t\t\t hw->max_queue_pairs)) {\n+\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %u rxq vectors\",\n+\t\t\t hw->max_queue_pairs);\n+\t\treturn -ENOMEM;\n \t}\n \n \tif (dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC) {\ndiff --git a/drivers/net/virtio/virtio_user/virtio_user_dev.c b/drivers/net/virtio/virtio_user/virtio_user_dev.c\nindex 6a6145583b..35aa76b1ff 100644\n--- a/drivers/net/virtio/virtio_user/virtio_user_dev.c\n+++ b/drivers/net/virtio/virtio_user/virtio_user_dev.c\n@@ -406,23 +406,37 @@ virtio_user_fill_intr_handle(struct virtio_user_dev *dev)\n \tuint32_t i;\n \tstruct rte_eth_dev *eth_dev = &rte_eth_devices[dev->hw.port_id];\n \n-\tif (!eth_dev->intr_handle) {\n-\t\teth_dev->intr_handle = malloc(sizeof(*eth_dev->intr_handle));\n-\t\tif (!eth_dev->intr_handle) {\n+\tif (eth_dev->intr_handle == NULL) {\n+\t\teth_dev->intr_handle =\n+\t\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);\n+\t\tif (eth_dev->intr_handle == NULL) {\n \t\t\tPMD_DRV_LOG(ERR, \"(%s) failed to allocate intr_handle\", dev->path);\n \t\t\treturn -1;\n \t\t}\n-\t\tmemset(eth_dev->intr_handle, 0, sizeof(*eth_dev->intr_handle));\n \t}\n \n-\tfor (i = 0; i < dev->max_queue_pairs; ++i)\n-\t\teth_dev->intr_handle->efds[i] = dev->callfds[2 * i];\n-\teth_dev->intr_handle->nb_efd = dev->max_queue_pairs;\n-\teth_dev->intr_handle->max_intr = dev->max_queue_pairs + 1;\n-\teth_dev->intr_handle->type = RTE_INTR_HANDLE_VDEV;\n+\tfor (i = 0; i < dev->max_queue_pairs; ++i) {\n+\t\tif (rte_intr_efds_index_set(eth_dev->intr_handle, i,\n+\t\t\t\tdev->callfds[i]))\n+\t\t\treturn -rte_errno;\n+\t}\n+\n+\tif (rte_intr_nb_efd_set(eth_dev->intr_handle, dev->max_queue_pairs))\n+\t\treturn -rte_errno;\n+\n+\tif (rte_intr_max_intr_set(eth_dev->intr_handle,\n+\t\t\tdev->max_queue_pairs + 1))\n+\t\treturn -rte_errno;\n+\n+\tif (rte_intr_type_set(eth_dev->intr_handle, RTE_INTR_HANDLE_VDEV))\n+\t\treturn -rte_errno;\n+\n \t/* For virtio vdev, no need to read counter for clean */\n-\teth_dev->intr_handle->efd_counter_size = 0;\n-\teth_dev->intr_handle->fd = dev->ops->get_intr_fd(dev);\n+\tif (rte_intr_efd_counter_size_set(eth_dev->intr_handle, 0))\n+\t\treturn -rte_errno;\n+\n+\tif (rte_intr_fd_set(eth_dev->intr_handle, dev->ops->get_intr_fd(dev)))\n+\t\treturn -rte_errno;\n \n \treturn 0;\n }\n@@ -656,10 +670,8 @@ virtio_user_dev_uninit(struct virtio_user_dev *dev)\n {\n \tstruct rte_eth_dev *eth_dev = &rte_eth_devices[dev->hw.port_id];\n \n-\tif (eth_dev->intr_handle) {\n-\t\tfree(eth_dev->intr_handle);\n-\t\teth_dev->intr_handle = NULL;\n-\t}\n+\trte_intr_instance_free(eth_dev->intr_handle);\n+\teth_dev->intr_handle = NULL;\n \n \tvirtio_user_stop_device(dev);\n \n@@ -962,7 +974,7 @@ virtio_user_dev_delayed_disconnect_handler(void *param)\n \t\treturn;\n \t}\n \tPMD_DRV_LOG(DEBUG, \"Unregistering intr fd: %d\",\n-\t\t eth_dev->intr_handle->fd);\n+\t\t rte_intr_fd_get(eth_dev->intr_handle));\n \tif (rte_intr_callback_unregister(eth_dev->intr_handle,\n \t\t\t\t\t virtio_interrupt_handler,\n \t\t\t\t\t eth_dev) != 1)\n@@ -972,10 +984,11 @@ virtio_user_dev_delayed_disconnect_handler(void *param)\n \t\tif (dev->ops->server_disconnect)\n \t\t\tdev->ops->server_disconnect(dev);\n \n-\t\teth_dev->intr_handle->fd = dev->ops->get_intr_fd(dev);\n+\t\trte_intr_fd_set(eth_dev->intr_handle,\n+\t\t\tdev->ops->get_intr_fd(dev));\n \n \t\tPMD_DRV_LOG(DEBUG, \"Registering intr fd: %d\",\n-\t\t\t eth_dev->intr_handle->fd);\n+\t\t\t rte_intr_fd_get(eth_dev->intr_handle));\n \n \t\tif (rte_intr_callback_register(eth_dev->intr_handle,\n \t\t\t\t\t virtio_interrupt_handler,\n@@ -996,16 +1009,17 @@ virtio_user_dev_delayed_intr_reconfig_handler(void *param)\n \tstruct rte_eth_dev *eth_dev = &rte_eth_devices[dev->hw.port_id];\n \n \tPMD_DRV_LOG(DEBUG, \"Unregistering intr fd: %d\",\n-\t\t eth_dev->intr_handle->fd);\n+\t\t rte_intr_fd_get(eth_dev->intr_handle));\n \n \tif (rte_intr_callback_unregister(eth_dev->intr_handle,\n \t\t\t\t\t virtio_interrupt_handler,\n \t\t\t\t\t eth_dev) != 1)\n \t\tPMD_DRV_LOG(ERR, \"interrupt unregister failed\");\n \n-\teth_dev->intr_handle->fd = dev->ops->get_intr_fd(dev);\n+\trte_intr_fd_set(eth_dev->intr_handle, dev->ops->get_intr_fd(dev));\n \n-\tPMD_DRV_LOG(DEBUG, \"Registering intr fd: %d\", eth_dev->intr_handle->fd);\n+\tPMD_DRV_LOG(DEBUG, \"Registering intr fd: %d\",\n+\t\t rte_intr_fd_get(eth_dev->intr_handle));\n \n \tif (rte_intr_callback_register(eth_dev->intr_handle,\n \t\t\t\t virtio_interrupt_handler, eth_dev))\ndiff --git a/drivers/net/vmxnet3/vmxnet3_ethdev.c b/drivers/net/vmxnet3/vmxnet3_ethdev.c\nindex 26d9edf531..d1ef1cad08 100644\n--- a/drivers/net/vmxnet3/vmxnet3_ethdev.c\n+++ b/drivers/net/vmxnet3/vmxnet3_ethdev.c\n@@ -619,11 +619,9 @@ vmxnet3_configure_msix(struct rte_eth_dev *dev)\n \t\treturn -1;\n \t}\n \n-\tif (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {\n-\t\tintr_handle->intr_vec =\n-\t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t dev->data->nb_rx_queues * sizeof(int), 0);\n-\t\tif (intr_handle->intr_vec == NULL) {\n+\tif (rte_intr_dp_is_en(intr_handle)) {\n+\t\tif (rte_intr_vec_list_alloc(intr_handle, \"intr_vec\",\n+\t\t\t\t\t\t dev->data->nb_rx_queues)) {\n \t\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %d Rx queues intr_vec\",\n \t\t\t\t\tdev->data->nb_rx_queues);\n \t\t\trte_intr_efd_disable(intr_handle);\n@@ -634,8 +632,7 @@ vmxnet3_configure_msix(struct rte_eth_dev *dev)\n \tif (!rte_intr_allow_others(intr_handle) &&\n \t dev->data->dev_conf.intr_conf.lsc != 0) {\n \t\tPMD_INIT_LOG(ERR, \"not enough intr vector to support both Rx interrupt and LSC\");\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n+\t\trte_intr_vec_list_free(intr_handle);\n \t\trte_intr_efd_disable(intr_handle);\n \t\treturn -1;\n \t}\n@@ -643,17 +640,19 @@ vmxnet3_configure_msix(struct rte_eth_dev *dev)\n \t/* if we cannot allocate one MSI-X vector per queue, don't enable\n \t * interrupt mode.\n \t */\n-\tif (hw->intr.num_intrs != (intr_handle->nb_efd + 1)) {\n+\tif (hw->intr.num_intrs !=\n+\t\t\t\t(rte_intr_nb_efd_get(intr_handle) + 1)) {\n \t\tPMD_INIT_LOG(ERR, \"Device configured with %d Rx intr vectors, expecting %d\",\n-\t\t\t\thw->intr.num_intrs, intr_handle->nb_efd + 1);\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n+\t\t\t\thw->intr.num_intrs,\n+\t\t\t\trte_intr_nb_efd_get(intr_handle) + 1);\n+\t\trte_intr_vec_list_free(intr_handle);\n \t\trte_intr_efd_disable(intr_handle);\n \t\treturn -1;\n \t}\n \n \tfor (i = 0; i < dev->data->nb_rx_queues; i++)\n-\t\tintr_handle->intr_vec[i] = i + 1;\n+\t\tif (rte_intr_vec_list_index_set(intr_handle, i, i + 1))\n+\t\t\treturn -rte_errno;\n \n \tfor (i = 0; i < hw->intr.num_intrs; i++)\n \t\thw->intr.mod_levels[i] = UPT1_IML_ADAPTIVE;\n@@ -801,7 +800,9 @@ vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)\n \t\tif (hw->intr.lsc_only)\n \t\t\ttqd->conf.intrIdx = 1;\n \t\telse\n-\t\t\ttqd->conf.intrIdx = intr_handle->intr_vec[i];\n+\t\t\ttqd->conf.intrIdx =\n+\t\t\t\trte_intr_vec_list_index_get(intr_handle,\n+\t\t\t\t\t\t\t\t i);\n \t\ttqd->status.stopped = TRUE;\n \t\ttqd->status.error = 0;\n \t\tmemset(&tqd->stats, 0, sizeof(tqd->stats));\n@@ -824,7 +825,9 @@ vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)\n \t\tif (hw->intr.lsc_only)\n \t\t\trqd->conf.intrIdx = 1;\n \t\telse\n-\t\t\trqd->conf.intrIdx = intr_handle->intr_vec[i];\n+\t\t\trqd->conf.intrIdx =\n+\t\t\t\trte_intr_vec_list_index_get(intr_handle,\n+\t\t\t\t\t\t\t\t i);\n \t\trqd->status.stopped = TRUE;\n \t\trqd->status.error = 0;\n \t\tmemset(&rqd->stats, 0, sizeof(rqd->stats));\n@@ -1021,10 +1024,7 @@ vmxnet3_dev_stop(struct rte_eth_dev *dev)\n \n \t/* Clean datapath event and queue/vector mapping */\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec != NULL) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\trte_intr_vec_list_free(intr_handle);\n \n \t/* quiesce the device first */\n \tVMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);\n@@ -1670,7 +1670,9 @@ vmxnet3_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n {\n \tstruct vmxnet3_hw *hw = dev->data->dev_private;\n \n-\tvmxnet3_enable_intr(hw, dev->intr_handle->intr_vec[queue_id]);\n+\tvmxnet3_enable_intr(hw,\n+\t\t\t rte_intr_vec_list_index_get(dev->intr_handle,\n+\t\t\t\t\t\t\t queue_id));\n \n \treturn 0;\n }\n@@ -1680,7 +1682,8 @@ vmxnet3_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)\n {\n \tstruct vmxnet3_hw *hw = dev->data->dev_private;\n \n-\tvmxnet3_disable_intr(hw, dev->intr_handle->intr_vec[queue_id]);\n+\tvmxnet3_disable_intr(hw,\n+\t\trte_intr_vec_list_index_get(dev->intr_handle, queue_id));\n \n \treturn 0;\n }\ndiff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c\nindex 76e6a8530b..8d9db585a4 100644\n--- a/drivers/raw/ifpga/ifpga_rawdev.c\n+++ b/drivers/raw/ifpga/ifpga_rawdev.c\n@@ -73,7 +73,7 @@ static pthread_t ifpga_monitor_start_thread;\n \n #define IFPGA_MAX_IRQ 12\n /* 0 for FME interrupt, others are reserved for AFU irq */\n-static struct rte_intr_handle ifpga_irq_handle[IFPGA_MAX_IRQ];\n+static struct rte_intr_handle *ifpga_irq_handle[IFPGA_MAX_IRQ];\n \n static struct ifpga_rawdev *\n ifpga_rawdev_allocate(struct rte_rawdev *rawdev);\n@@ -1345,17 +1345,22 @@ ifpga_unregister_msix_irq(enum ifpga_irq_type type,\n \t\tint vec_start, rte_intr_callback_fn handler, void *arg)\n {\n \tstruct rte_intr_handle *intr_handle;\n+\tint rc, i;\n \n \tif (type == IFPGA_FME_IRQ)\n-\t\tintr_handle = &ifpga_irq_handle[0];\n+\t\tintr_handle = ifpga_irq_handle[0];\n \telse if (type == IFPGA_AFU_IRQ)\n-\t\tintr_handle = &ifpga_irq_handle[vec_start + 1];\n+\t\tintr_handle = ifpga_irq_handle[vec_start + 1];\n \telse\n \t\treturn 0;\n \n \trte_intr_efd_disable(intr_handle);\n \n-\treturn rte_intr_callback_unregister(intr_handle, handler, arg);\n+\trc = rte_intr_callback_unregister(intr_handle, handler, arg);\n+\n+\tfor (i = 0; i < IFPGA_MAX_IRQ; i++)\n+\t\trte_intr_instance_free(ifpga_irq_handle[i]);\n+\treturn rc;\n }\n \n int\n@@ -1369,6 +1374,14 @@ ifpga_register_msix_irq(struct rte_rawdev *dev, int port_id,\n \tstruct opae_adapter *adapter;\n \tstruct opae_manager *mgr;\n \tstruct opae_accelerator *acc;\n+\tint *intr_efds = NULL, nb_intr, i;\n+\n+\tfor (i = 0; i < IFPGA_MAX_IRQ; i++) {\n+\t\tifpga_irq_handle[i] =\n+\t\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_PRIVATE);\n+\t\tif (ifpga_irq_handle[i] == NULL)\n+\t\t\treturn -ENOMEM;\n+\t}\n \n \tadapter = ifpga_rawdev_get_priv(dev);\n \tif (!adapter)\n@@ -1379,29 +1392,33 @@ ifpga_register_msix_irq(struct rte_rawdev *dev, int port_id,\n \t\treturn -ENODEV;\n \n \tif (type == IFPGA_FME_IRQ) {\n-\t\tintr_handle = &ifpga_irq_handle[0];\n+\t\tintr_handle = ifpga_irq_handle[0];\n \t\tcount = 1;\n \t} else if (type == IFPGA_AFU_IRQ) {\n-\t\tintr_handle = &ifpga_irq_handle[vec_start + 1];\n+\t\tintr_handle = ifpga_irq_handle[vec_start + 1];\n \t} else {\n \t\treturn -EINVAL;\n \t}\n \n-\tintr_handle->type = RTE_INTR_HANDLE_VFIO_MSIX;\n+\tif (rte_intr_type_set(intr_handle, RTE_INTR_HANDLE_VFIO_MSIX))\n+\t\treturn -rte_errno;\n \n \tret = rte_intr_efd_enable(intr_handle, count);\n \tif (ret)\n \t\treturn -ENODEV;\n \n-\tintr_handle->fd = intr_handle->efds[0];\n+\tif (rte_intr_fd_set(intr_handle,\n+\t\t\trte_intr_efds_index_get(intr_handle, 0)))\n+\t\treturn -rte_errno;\n \n \tIFPGA_RAWDEV_PMD_DEBUG(\"register %s irq, vfio_fd=%d, fd=%d\\n\",\n-\t\t\tname, intr_handle->vfio_dev_fd,\n-\t\t\tintr_handle->fd);\n+\t\t\tname, rte_intr_dev_fd_get(intr_handle),\n+\t\t\trte_intr_fd_get(intr_handle));\n \n \tif (type == IFPGA_FME_IRQ) {\n \t\tstruct fpga_fme_err_irq_set err_irq_set;\n-\t\terr_irq_set.evtfd = intr_handle->efds[0];\n+\t\terr_irq_set.evtfd = rte_intr_efds_index_get(intr_handle,\n+\t\t\t\t\t\t\t\t 0);\n \n \t\tret = opae_manager_ifpga_set_err_irq(mgr, &err_irq_set);\n \t\tif (ret)\n@@ -1411,20 +1428,33 @@ ifpga_register_msix_irq(struct rte_rawdev *dev, int port_id,\n \t\tif (!acc)\n \t\t\treturn -EINVAL;\n \n-\t\tret = opae_acc_set_irq(acc, vec_start, count,\n-\t\t\t\tintr_handle->efds);\n-\t\tif (ret)\n+\t\tnb_intr = rte_intr_nb_intr_get(intr_handle);\n+\n+\t\tintr_efds = calloc(nb_intr, sizeof(int));\n+\t\tif (!intr_efds)\n+\t\t\treturn -ENOMEM;\n+\n+\t\tfor (i = 0; i < nb_intr; i++)\n+\t\t\tintr_efds[i] = rte_intr_efds_index_get(intr_handle, i);\n+\n+\t\tret = opae_acc_set_irq(acc, vec_start, count, intr_efds);\n+\t\tif (ret) {\n+\t\t\tfree(intr_efds);\n \t\t\treturn -EINVAL;\n+\t\t}\n \t}\n \n \t/* register interrupt handler using DPDK API */\n \tret = rte_intr_callback_register(intr_handle,\n \t\t\thandler, (void *)arg);\n-\tif (ret)\n+\tif (ret) {\n+\t\tfree(intr_efds);\n \t\treturn -EINVAL;\n+\t}\n \n \tIFPGA_RAWDEV_PMD_INFO(\"success register %s interrupt\\n\", name);\n \n+\tfree(intr_efds);\n \treturn 0;\n }\n \n@@ -1491,7 +1521,7 @@ ifpga_rawdev_create(struct rte_pci_device *pci_dev,\n \tdata->bus = pci_dev->addr.bus;\n \tdata->devid = pci_dev->addr.devid;\n \tdata->function = pci_dev->addr.function;\n-\tdata->vfio_dev_fd = pci_dev->intr_handle.vfio_dev_fd;\n+\tdata->vfio_dev_fd = rte_intr_dev_fd_get(pci_dev->intr_handle);\n \n \tadapter = rawdev->dev_private;\n \t/* create a opae_adapter based on above device data */\ndiff --git a/drivers/raw/ntb/ntb.c b/drivers/raw/ntb/ntb.c\nindex 78cfcd79f7..46ac02e5ab 100644\n--- a/drivers/raw/ntb/ntb.c\n+++ b/drivers/raw/ntb/ntb.c\n@@ -1044,13 +1044,10 @@ ntb_dev_close(struct rte_rawdev *dev)\n \t\tntb_queue_release(dev, i);\n \thw->queue_pairs = 0;\n \n-\tintr_handle = &hw->pci_dev->intr_handle;\n+\tintr_handle = hw->pci_dev->intr_handle;\n \t/* Clean datapath event and vec mapping */\n \trte_intr_efd_disable(intr_handle);\n-\tif (intr_handle->intr_vec) {\n-\t\trte_free(intr_handle->intr_vec);\n-\t\tintr_handle->intr_vec = NULL;\n-\t}\n+\trte_intr_vec_list_free(intr_handle);\n \t/* Disable uio intr before callback unregister */\n \trte_intr_disable(intr_handle);\n \n@@ -1402,7 +1399,7 @@ ntb_init_hw(struct rte_rawdev *dev, struct rte_pci_device *pci_dev)\n \t/* Init doorbell. */\n \thw->db_valid_mask = RTE_LEN2MASK(hw->db_cnt, uint64_t);\n \n-\tintr_handle = &pci_dev->intr_handle;\n+\tintr_handle = pci_dev->intr_handle;\n \t/* Register callback func to eal lib */\n \trte_intr_callback_register(intr_handle,\n \t\t\t\t ntb_dev_intr_handler, dev);\ndiff --git a/drivers/regex/octeontx2/otx2_regexdev_hw_access.c b/drivers/regex/octeontx2/otx2_regexdev_hw_access.c\nindex 620d5c9122..f8031d0f72 100644\n--- a/drivers/regex/octeontx2/otx2_regexdev_hw_access.c\n+++ b/drivers/regex/octeontx2/otx2_regexdev_hw_access.c\n@@ -31,7 +31,7 @@ ree_lf_err_intr_unregister(const struct rte_regexdev *dev, uint16_t msix_off,\n \t\t\t uintptr_t base)\n {\n \tstruct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \n \t/* Disable error interrupts */\n \totx2_write64(~0ull, base + OTX2_REE_LF_MISC_INT_ENA_W1C);\n@@ -61,7 +61,7 @@ ree_lf_err_intr_register(const struct rte_regexdev *dev, uint16_t msix_off,\n \t\t\t uintptr_t base)\n {\n \tstruct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);\n-\tstruct rte_intr_handle *handle = &pci_dev->intr_handle;\n+\tstruct rte_intr_handle *handle = pci_dev->intr_handle;\n \tint ret;\n \n \t/* Disable error interrupts */\ndiff --git a/drivers/vdpa/ifc/ifcvf_vdpa.c b/drivers/vdpa/ifc/ifcvf_vdpa.c\nindex 365da2a8b9..dd5251d382 100644\n--- a/drivers/vdpa/ifc/ifcvf_vdpa.c\n+++ b/drivers/vdpa/ifc/ifcvf_vdpa.c\n@@ -162,7 +162,7 @@ ifcvf_vfio_setup(struct ifcvf_internal *internal)\n \tif (rte_pci_map_device(dev))\n \t\tgoto err;\n \n-\tinternal->vfio_dev_fd = dev->intr_handle.vfio_dev_fd;\n+\tinternal->vfio_dev_fd = rte_intr_dev_fd_get(dev->intr_handle);\n \n \tfor (i = 0; i < RTE_MIN(PCI_MAX_RESOURCE, IFCVF_PCI_MAX_RESOURCE);\n \t\t\ti++) {\n@@ -365,7 +365,8 @@ vdpa_enable_vfio_intr(struct ifcvf_internal *internal, bool m_rx)\n \tirq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;\n \tirq_set->start = 0;\n \tfd_ptr = (int *)&irq_set->data;\n-\tfd_ptr[RTE_INTR_VEC_ZERO_OFFSET] = internal->pdev->intr_handle.fd;\n+\tfd_ptr[RTE_INTR_VEC_ZERO_OFFSET] =\n+\t\trte_intr_fd_get(internal->pdev->intr_handle);\n \n \tfor (i = 0; i < nr_vring; i++)\n \t\tinternal->intr_fd[i] = -1;\ndiff --git a/drivers/vdpa/mlx5/mlx5_vdpa.c b/drivers/vdpa/mlx5/mlx5_vdpa.c\nindex 9a6f64797b..b9e84dd9bf 100644\n--- a/drivers/vdpa/mlx5/mlx5_vdpa.c\n+++ b/drivers/vdpa/mlx5/mlx5_vdpa.c\n@@ -543,6 +543,12 @@ mlx5_vdpa_dev_probe(struct mlx5_common_device *cdev)\n \t\tDRV_LOG(ERR, \"Failed to allocate VAR %u.\", errno);\n \t\tgoto error;\n \t}\n+\tpriv->err_intr_handle =\n+\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);\n+\tif (priv->err_intr_handle == NULL) {\n+\t\tDRV_LOG(ERR, \"Fail to allocate intr_handle\");\n+\t\tgoto error;\n+\t}\n \tpriv->vdev = rte_vdpa_register_device(cdev->dev, &mlx5_vdpa_ops);\n \tif (priv->vdev == NULL) {\n \t\tDRV_LOG(ERR, \"Failed to register vDPA device.\");\n@@ -561,6 +567,7 @@ mlx5_vdpa_dev_probe(struct mlx5_common_device *cdev)\n \tif (priv) {\n \t\tif (priv->var)\n \t\t\tmlx5_glue->dv_free_var(priv->var);\n+\t\trte_intr_instance_free(priv->err_intr_handle);\n \t\trte_free(priv);\n \t}\n \treturn -rte_errno;\n@@ -592,6 +599,7 @@ mlx5_vdpa_dev_remove(struct mlx5_common_device *cdev)\n \t\tif (priv->vdev)\n \t\t\trte_vdpa_unregister_device(priv->vdev);\n \t\tpthread_mutex_destroy(&priv->vq_config_lock);\n+\t\trte_intr_instance_free(priv->err_intr_handle);\n \t\trte_free(priv);\n \t}\n \treturn 0;\ndiff --git a/drivers/vdpa/mlx5/mlx5_vdpa.h b/drivers/vdpa/mlx5/mlx5_vdpa.h\nindex 5045fea773..cf4f384fa4 100644\n--- a/drivers/vdpa/mlx5/mlx5_vdpa.h\n+++ b/drivers/vdpa/mlx5/mlx5_vdpa.h\n@@ -89,7 +89,7 @@ struct mlx5_vdpa_virtq {\n \t\tvoid *buf;\n \t\tuint32_t size;\n \t} umems[3];\n-\tstruct rte_intr_handle intr_handle;\n+\tstruct rte_intr_handle *intr_handle;\n \tuint64_t err_time[3]; /* RDTSC time of recent errors. */\n \tuint32_t n_retry;\n \tstruct mlx5_devx_virtio_q_couners_attr reset;\n@@ -137,7 +137,7 @@ struct mlx5_vdpa_priv {\n \tstruct mlx5dv_devx_event_channel *eventc;\n \tstruct mlx5dv_devx_event_channel *err_chnl;\n \tstruct mlx5dv_devx_uar *uar;\n-\tstruct rte_intr_handle err_intr_handle;\n+\tstruct rte_intr_handle *err_intr_handle;\n \tstruct mlx5_devx_obj *td;\n \tstruct mlx5_devx_obj *tiss[16]; /* TIS list for each LAG port. */\n \tuint16_t nr_virtqs;\ndiff --git a/drivers/vdpa/mlx5/mlx5_vdpa_event.c b/drivers/vdpa/mlx5/mlx5_vdpa_event.c\nindex 19497597e6..042d22777f 100644\n--- a/drivers/vdpa/mlx5/mlx5_vdpa_event.c\n+++ b/drivers/vdpa/mlx5/mlx5_vdpa_event.c\n@@ -411,12 +411,17 @@ mlx5_vdpa_err_event_setup(struct mlx5_vdpa_priv *priv)\n \t\tDRV_LOG(ERR, \"Failed to change device event channel FD.\");\n \t\tgoto error;\n \t}\n-\tpriv->err_intr_handle.fd = priv->err_chnl->fd;\n-\tpriv->err_intr_handle.type = RTE_INTR_HANDLE_EXT;\n-\tif (rte_intr_callback_register(&priv->err_intr_handle,\n+\n+\tif (rte_intr_fd_set(priv->err_intr_handle, priv->err_chnl->fd))\n+\t\tgoto error;\n+\n+\tif (rte_intr_type_set(priv->err_intr_handle, RTE_INTR_HANDLE_EXT))\n+\t\tgoto error;\n+\n+\tif (rte_intr_callback_register(priv->err_intr_handle,\n \t\t\t\t mlx5_vdpa_err_interrupt_handler,\n \t\t\t\t priv)) {\n-\t\tpriv->err_intr_handle.fd = 0;\n+\t\trte_intr_fd_set(priv->err_intr_handle, 0);\n \t\tDRV_LOG(ERR, \"Failed to register error interrupt for device %d.\",\n \t\t\tpriv->vid);\n \t\tgoto error;\n@@ -436,20 +441,20 @@ mlx5_vdpa_err_event_unset(struct mlx5_vdpa_priv *priv)\n \tint retries = MLX5_VDPA_INTR_RETRIES;\n \tint ret = -EAGAIN;\n \n-\tif (!priv->err_intr_handle.fd)\n+\tif (!rte_intr_fd_get(priv->err_intr_handle))\n \t\treturn;\n \twhile (retries-- && ret == -EAGAIN) {\n-\t\tret = rte_intr_callback_unregister(&priv->err_intr_handle,\n+\t\tret = rte_intr_callback_unregister(priv->err_intr_handle,\n \t\t\t\t\t mlx5_vdpa_err_interrupt_handler,\n \t\t\t\t\t priv);\n \t\tif (ret == -EAGAIN) {\n \t\t\tDRV_LOG(DEBUG, \"Try again to unregister fd %d \"\n \t\t\t\t\"of error interrupt, retries = %d.\",\n-\t\t\t\tpriv->err_intr_handle.fd, retries);\n+\t\t\t\trte_intr_fd_get(priv->err_intr_handle),\n+\t\t\t\tretries);\n \t\t\trte_pause();\n \t\t}\n \t}\n-\tmemset(&priv->err_intr_handle, 0, sizeof(priv->err_intr_handle));\n \tif (priv->err_chnl) {\n #ifdef HAVE_IBV_DEVX_EVENT\n \t\tunion {\ndiff --git a/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c b/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c\nindex c5b357a83b..cb37ba097c 100644\n--- a/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c\n+++ b/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c\n@@ -25,7 +25,8 @@ mlx5_vdpa_virtq_handler(void *cb_arg)\n \tint nbytes;\n \n \tdo {\n-\t\tnbytes = read(virtq->intr_handle.fd, &buf, 8);\n+\t\tnbytes = read(rte_intr_fd_get(virtq->intr_handle), &buf,\n+\t\t\t 8);\n \t\tif (nbytes < 0) {\n \t\t\tif (errno == EINTR ||\n \t\t\t errno == EWOULDBLOCK ||\n@@ -58,21 +59,23 @@ mlx5_vdpa_virtq_unset(struct mlx5_vdpa_virtq *virtq)\n \tint retries = MLX5_VDPA_INTR_RETRIES;\n \tint ret = -EAGAIN;\n \n-\tif (virtq->intr_handle.fd != -1) {\n+\tif (rte_intr_fd_get(virtq->intr_handle) != -1) {\n \t\twhile (retries-- && ret == -EAGAIN) {\n-\t\t\tret = rte_intr_callback_unregister(&virtq->intr_handle,\n+\t\t\tret = rte_intr_callback_unregister(virtq->intr_handle,\n \t\t\t\t\t\t\tmlx5_vdpa_virtq_handler,\n \t\t\t\t\t\t\tvirtq);\n \t\t\tif (ret == -EAGAIN) {\n \t\t\t\tDRV_LOG(DEBUG, \"Try again to unregister fd %d \"\n-\t\t\t\t\t\"of virtq %d interrupt, retries = %d.\",\n-\t\t\t\t\tvirtq->intr_handle.fd,\n-\t\t\t\t\t(int)virtq->index, retries);\n+\t\t\t\t\"of virtq %d interrupt, retries = %d.\",\n+\t\t\t\trte_intr_fd_get(virtq->intr_handle),\n+\t\t\t\t(int)virtq->index, retries);\n+\n \t\t\t\tusleep(MLX5_VDPA_INTR_RETRIES_USEC);\n \t\t\t}\n \t\t}\n-\t\tvirtq->intr_handle.fd = -1;\n+\t\trte_intr_fd_set(virtq->intr_handle, -1);\n \t}\n+\trte_intr_instance_free(virtq->intr_handle);\n \tif (virtq->virtq) {\n \t\tret = mlx5_vdpa_virtq_stop(virtq->priv, virtq->index);\n \t\tif (ret)\n@@ -337,21 +340,33 @@ mlx5_vdpa_virtq_setup(struct mlx5_vdpa_priv *priv, int index)\n \tvirtq->priv = priv;\n \trte_write32(virtq->index, priv->virtq_db_addr);\n \t/* Setup doorbell mapping. */\n-\tvirtq->intr_handle.fd = vq.kickfd;\n-\tif (virtq->intr_handle.fd == -1) {\n+\tvirtq->intr_handle =\n+\t\trte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);\n+\tif (virtq->intr_handle == NULL) {\n+\t\tDRV_LOG(ERR, \"Fail to allocate intr_handle\");\n+\t\tgoto error;\n+\t}\n+\n+\tif (rte_intr_fd_set(virtq->intr_handle, vq.kickfd))\n+\t\tgoto error;\n+\n+\tif (rte_intr_fd_get(virtq->intr_handle) == -1) {\n \t\tDRV_LOG(WARNING, \"Virtq %d kickfd is invalid.\", index);\n \t} else {\n-\t\tvirtq->intr_handle.type = RTE_INTR_HANDLE_EXT;\n-\t\tif (rte_intr_callback_register(&virtq->intr_handle,\n+\t\tif (rte_intr_type_set(virtq->intr_handle, RTE_INTR_HANDLE_EXT))\n+\t\t\tgoto error;\n+\n+\t\tif (rte_intr_callback_register(virtq->intr_handle,\n \t\t\t\t\t mlx5_vdpa_virtq_handler,\n \t\t\t\t\t virtq)) {\n-\t\t\tvirtq->intr_handle.fd = -1;\n+\t\t\trte_intr_fd_set(virtq->intr_handle, -1);\n \t\t\tDRV_LOG(ERR, \"Failed to register virtq %d interrupt.\",\n \t\t\t\tindex);\n \t\t\tgoto error;\n \t\t} else {\n \t\t\tDRV_LOG(DEBUG, \"Register fd %d interrupt for virtq %d.\",\n-\t\t\t\tvirtq->intr_handle.fd, index);\n+\t\t\t\trte_intr_fd_get(virtq->intr_handle),\n+\t\t\t\tindex);\n \t\t}\n \t}\n \t/* Subscribe virtq error event. */\n@@ -506,7 +521,8 @@ mlx5_vdpa_virtq_is_modified(struct mlx5_vdpa_priv *priv,\n \n \tif (ret)\n \t\treturn -1;\n-\tif (vq.size != virtq->vq_size || vq.kickfd != virtq->intr_handle.fd)\n+\tif (vq.size != virtq->vq_size || vq.kickfd !=\n+\t rte_intr_fd_get(virtq->intr_handle))\n \t\treturn 1;\n \tif (virtq->eqp.cq.cq_obj.cq) {\n \t\tif (vq.callfd != virtq->eqp.cq.callfd)\ndiff --git a/lib/ethdev/ethdev_pci.h b/lib/ethdev/ethdev_pci.h\nindex 59c5d7b40f..71aa4b2e98 100644\n--- a/lib/ethdev/ethdev_pci.h\n+++ b/lib/ethdev/ethdev_pci.h\n@@ -32,7 +32,7 @@ rte_eth_copy_pci_info(struct rte_eth_dev *eth_dev,\n \t\treturn;\n \t}\n \n-\teth_dev->intr_handle = &pci_dev->intr_handle;\n+\teth_dev->intr_handle = pci_dev->intr_handle;\n \n \tif (rte_eal_process_type() == RTE_PROC_PRIMARY) {\n \t\teth_dev->data->dev_flags = 0;\n", "prefixes": [ "v7", "6/9" ] }