Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/102309/?format=api
{ "id": 102309, "url": "http://patches.dpdk.org/api/patches/102309/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20211019205602.3188203-5-michaelba@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211019205602.3188203-5-michaelba@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211019205602.3188203-5-michaelba@nvidia.com", "date": "2021-10-19T20:55:48", "name": "[v3,04/18] common/mlx5: share memory related devargs", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "c626c80413f7a91a26ad0828108f6cc877cdb30a", "submitter": { "id": 1949, "url": "http://patches.dpdk.org/api/people/1949/?format=api", "name": "Michael Baum", "email": "michaelba@nvidia.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20211019205602.3188203-5-michaelba@nvidia.com/mbox/", "series": [ { "id": 19808, "url": "http://patches.dpdk.org/api/series/19808/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=19808", "date": "2021-10-19T20:55:44", "name": "mlx5: sharing global MR cache between drivers", "version": 3, "mbox": "http://patches.dpdk.org/series/19808/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/102309/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/102309/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 6EB91A0C41;\n\tTue, 19 Oct 2021 22:56:56 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6029141153;\n\tTue, 19 Oct 2021 22:56:43 +0200 (CEST)", "from NAM02-DM3-obe.outbound.protection.outlook.com\n (mail-dm3nam07on2049.outbound.protection.outlook.com [40.107.95.49])\n by mails.dpdk.org (Postfix) with ESMTP id 4C8B641149\n for <dev@dpdk.org>; Tue, 19 Oct 2021 22:56:36 +0200 (CEST)", "from BN9PR03CA0907.namprd03.prod.outlook.com (2603:10b6:408:107::12)\n by DM5PR1201MB0076.namprd12.prod.outlook.com (2603:10b6:4:55::14)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4608.16; Tue, 19 Oct\n 2021 20:56:33 +0000", "from BN8NAM11FT035.eop-nam11.prod.protection.outlook.com\n (2603:10b6:408:107:cafe::23) by BN9PR03CA0907.outlook.office365.com\n (2603:10b6:408:107::12) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4608.16 via Frontend\n Transport; Tue, 19 Oct 2021 20:56:33 +0000", "from mail.nvidia.com (216.228.112.34) by\n BN8NAM11FT035.mail.protection.outlook.com (10.13.177.116) with Microsoft SMTP\n Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id\n 15.20.4608.15 via Frontend Transport; Tue, 19 Oct 2021 20:56:32 +0000", "from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com\n (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 19 Oct\n 2021 20:56:28 +0000" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=G2AIICtImv2O6o4DAZnL0kSJtp58VlPSjKHfyDJwPhKmNWypXVfWEf9dnnqEuB5OLMM0dVdLMBc+2lEq8q+gjUCKeZPsTzPKMqEgH3HRaxumVEuDjRlwr8GL8ixw2NpqKgwqb6UQJNHP7fHEij/skNrfwQvgPkm13vyNp6EYTlsbTDYl9y1s4W2G1qFBGdKAUyqVYAvYAc3qQy6nWEciZSyFD8TXaQpe8RkCCRe+zmI0Ef/Xo68e1MBLK/0q8Yao5e2Mfsghm1zU7u5KOYnUJlbIC+ss8zAhxxeWdqAI+o11udqeypaoWd8X2Ggo5Y7lRUyrVN+Ijijo9gQcCp5h3w==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=HkhLYnjvQwEmbrVntXvGN2emUOQLYlg+S8Bce+SYFE0=;\n b=J5/GN0AJo1cUAgINK9+VO6bUw5PE8mpjr0YfbtRoI+bmG8wOTbD+nSL+DgUNB9Jpx2RuUSkTp2fTvU25CXWujUNvlOFLrMohHGwWpAPGUnKiy1pxBUxc2UmcTvSqO36e6Fzs+ICbtRHYno8VVURdHtFrnDgISK+cHj2n16W4wTZbzYneqm9HliUdboBHAskZWQyJU9COr4/gerE2jFR9oPBLrJn/cfQJp353opn3v8yzMS2UB/vLK9lH0cM09CE2ieOcaR66Mw9z/Ck2Hso7qX4k1s2wzTAjyLAydJG9GYVkWtysfHVFxRcgJs+m6lhvkhyL93SVh9C2sGOVSo7ybQ==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.112.34) smtp.rcpttodomain=monjalon.net smtp.mailfrom=nvidia.com;\n dmarc=pass (p=quarantine sp=quarantine pct=100) action=none\n header.from=nvidia.com; dkim=none (message not signed); arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=HkhLYnjvQwEmbrVntXvGN2emUOQLYlg+S8Bce+SYFE0=;\n b=DGppWmQnKrb+TN+kyRxE9K5JSA5hZG05FuolzAK9N0oNQiNJPGbLv4va5Nl6k8StHekAygnbwe2PsCbaisigEdIPcjHmcNvN+1w79igoBrA9E7pfw9ZmRQS70MzhN2BxXgIbN63qxsXErimfCwxAsM87fWHmZQkGI1XQ1NwS3yVmI63hZ5paifwlFZezd4WLil66Kqp12Tz32k0AeYi/hZ29SEkRiF97zshI2abF5Gdsjd+dT/dTg2gXDXNRHmZKSwhHQWsobPkGJd/HKC98ntwFs25QauPOHidzru5WYQJM2nxOg1rFHPC1n/AUeYatlTuP6r6rQvaZgETLuv7WIQ==", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.112.34)\n smtp.mailfrom=nvidia.com; monjalon.net; dkim=none (message not signed)\n header.d=none;monjalon.net; dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.112.34 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.112.34; helo=mail.nvidia.com;", "From": "<michaelba@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "Matan Azrad <matan@nvidia.com>, Thomas Monjalon <thomas@monjalon.net>,\n Michael Baum <michaelba@oss.nvidia.com>", "Date": "Tue, 19 Oct 2021 23:55:48 +0300", "Message-ID": "<20211019205602.3188203-5-michaelba@nvidia.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20211019205602.3188203-1-michaelba@nvidia.com>", "References": "<20211006220350.2357487-1-michaelba@nvidia.com>\n <20211019205602.3188203-1-michaelba@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL101.nvidia.com (172.20.187.10) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "5e6b459c-ba8d-4333-1028-08d99342ee9b", "X-MS-TrafficTypeDiagnostic": "DM5PR1201MB0076:", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-Microsoft-Antispam-PRVS": "\n <DM5PR1201MB007661F899240CB66FEF695FCCBD9@DM5PR1201MB0076.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:178;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n 3CAOy6iUR3OIxIgS1U+ItyLv2VCdVpinWejM5KQkzy6N+nvNb4cU6eH4v47gtMR2dapeODMY6lvQQeWS/U7ISIgd2XNT/wk+dEbHHt5AbQ5Fv98n2AyDjxQfaX7cwNmewsb2NpT9+MoIesi7F/EzWjHExhTIGUxbvr2SBGDEEX1d7iqBirw2V3sH8iP9CI87WAFg3NS0+TPNsDM+kJX6XkFTPIAecTW/H11mTMOTtg7gqthrE1ontUpy02xuKm3LjVQ+YAFJmPJBfJfTkjAYb1ghSzrKIRMAkM+lPcu4Z7da0UpQcX39fInfITJ6yR/bBQBLqfN4OX/OybbPUJb8EKp9/q5cFIy00cURIUbqphx1N+T3lp5GjcXD+Q5LQvYewqdBVODhnnj0hGsStCvh2UJiUI+XtKp6rceZyTsZfUXd32+sg8wApy6tuedmDU/y/V1GH7CEu7DQRTY2yzOtpIYAK5PA4UjFa/fAOmD9PUTu+aDhteeE5fYJBVqDEVTJkil6xDj+0PPV3KESSVT2HOMu/DyCStSq8OcuAaJ50A3VT159Gyl+RKp5ih3O+0Nuq62DlUGmhT/kqDzx6+GXCq8xr4Phmvlx8cettEzkaSV9mO6kOr/JKr7I7Ob0Hl3K2KWLMxsq61+nPoAIOCGoVXq+KAUvFcTQWaJjmJBUfeP4U7hpDYu++vvF92/thKj92LiuImFZZzf1GWunp6eR/mknweJfkEfYtkILvKxuk0w=", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(36840700001)(46966006)(356005)(30864003)(8676002)(7636003)(4326008)(6916009)(2616005)(36860700001)(2876002)(5660300002)(36756003)(6286002)(426003)(83380400001)(508600001)(55016002)(316002)(54906003)(47076005)(70586007)(6666004)(82310400003)(1076003)(2906002)(70206006)(107886003)(26005)(7696005)(8936002)(336012)(186003)(16526019)(86362001)(309714004);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "19 Oct 2021 20:56:32.6761 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 5e6b459c-ba8d-4333-1028-08d99342ee9b", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT035.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM5PR1201MB0076", "Subject": "[dpdk-dev] [PATCH v3 04/18] common/mlx5: share memory related\n devargs", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Michael Baum <michaelba@oss.nvidia.com>\n\nAdd device configure structure and function to parse user device\narguments into it.\nMove parsing and management of relevant device arguments to common.\n\nSigned-off-by: Michael Baum <michaelba@oss.nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/common/mlx5/mlx5_common.c | 184 ++++++++++++++++++++++------\n drivers/common/mlx5/mlx5_common.h | 18 +++\n drivers/common/mlx5/mlx5_malloc.h | 1 -\n drivers/common/mlx5/version.map | 1 -\n drivers/net/mlx5/linux/mlx5_mp_os.c | 4 +-\n drivers/net/mlx5/linux/mlx5_os.c | 11 +-\n drivers/net/mlx5/mlx5.c | 29 ++---\n drivers/net/mlx5/mlx5.h | 7 --\n drivers/net/mlx5/mlx5_mr.c | 8 +-\n drivers/net/mlx5/mlx5_txq.c | 4 +-\n drivers/net/mlx5/windows/mlx5_os.c | 8 --\n 11 files changed, 186 insertions(+), 89 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/mlx5_common.c b/drivers/common/mlx5/mlx5_common.c\nindex 8e3ea073e3..0ad9e09972 100644\n--- a/drivers/common/mlx5/mlx5_common.c\n+++ b/drivers/common/mlx5/mlx5_common.c\n@@ -90,6 +90,93 @@ driver_get(uint32_t class)\n \treturn NULL;\n }\n \n+/**\n+ * Verify and store value for devargs.\n+ *\n+ * @param[in] key\n+ * Key argument to verify.\n+ * @param[in] val\n+ * Value associated with key.\n+ * @param opaque\n+ * User data.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+static int\n+mlx5_common_args_check_handler(const char *key, const char *val, void *opaque)\n+{\n+\tstruct mlx5_common_dev_config *config = opaque;\n+\tsigned long tmp;\n+\n+\terrno = 0;\n+\ttmp = strtol(val, NULL, 0);\n+\tif (errno) {\n+\t\trte_errno = errno;\n+\t\tDRV_LOG(WARNING, \"%s: \\\"%s\\\" is an invalid integer.\", key, val);\n+\t\treturn -rte_errno;\n+\t}\n+\tif (strcmp(key, \"tx_db_nc\") == 0) {\n+\t\tif (tmp != MLX5_TXDB_CACHED &&\n+\t\t tmp != MLX5_TXDB_NCACHED &&\n+\t\t tmp != MLX5_TXDB_HEURISTIC) {\n+\t\t\tDRV_LOG(ERR, \"Invalid Tx doorbell mapping parameter.\");\n+\t\t\trte_errno = EINVAL;\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t\tconfig->dbnc = tmp;\n+\t} else if (strcmp(key, \"mr_ext_memseg_en\") == 0) {\n+\t\tconfig->mr_ext_memseg_en = !!tmp;\n+\t} else if (strcmp(key, \"mr_mempool_reg_en\") == 0) {\n+\t\tconfig->mr_mempool_reg_en = !!tmp;\n+\t} else if (strcmp(key, \"sys_mem_en\") == 0) {\n+\t\tconfig->sys_mem_en = !!tmp;\n+\t}\n+\treturn 0;\n+}\n+\n+/**\n+ * Parse common device parameters.\n+ *\n+ * @param devargs\n+ * Device arguments structure.\n+ * @param config\n+ * Pointer to device configuration structure.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+static int\n+mlx5_common_config_get(struct rte_devargs *devargs,\n+\t\t struct mlx5_common_dev_config *config)\n+{\n+\tstruct rte_kvargs *kvlist;\n+\tint ret = 0;\n+\n+\t/* Set defaults. */\n+\tconfig->mr_ext_memseg_en = 1;\n+\tconfig->mr_mempool_reg_en = 1;\n+\tconfig->sys_mem_en = 0;\n+\tconfig->dbnc = MLX5_ARG_UNSET;\n+\tif (devargs == NULL)\n+\t\treturn 0;\n+\tkvlist = rte_kvargs_parse(devargs->args, NULL);\n+\tif (kvlist == NULL) {\n+\t\trte_errno = EINVAL;\n+\t\treturn -rte_errno;\n+\t}\n+\tret = rte_kvargs_process(kvlist, NULL, mlx5_common_args_check_handler,\n+\t\t\t\t config);\n+\tif (ret)\n+\t\tret = -rte_errno;\n+\trte_kvargs_free(kvlist);\n+\tDRV_LOG(DEBUG, \"mr_ext_memseg_en is %u.\", config->mr_ext_memseg_en);\n+\tDRV_LOG(DEBUG, \"mr_mempool_reg_en is %u.\", config->mr_mempool_reg_en);\n+\tDRV_LOG(DEBUG, \"sys_mem_en is %u.\", config->sys_mem_en);\n+\tDRV_LOG(DEBUG, \"Tx doorbell mapping parameter is %d.\", config->dbnc);\n+\treturn ret;\n+}\n+\n static int\n devargs_class_handler(__rte_unused const char *key,\n \t\t const char *class_names, void *opaque)\n@@ -189,11 +276,11 @@ mlx5_bus_match(const struct mlx5_class_driver *drv,\n static struct mlx5_common_device *\n to_mlx5_device(const struct rte_device *rte_dev)\n {\n-\tstruct mlx5_common_device *dev;\n+\tstruct mlx5_common_device *cdev;\n \n-\tTAILQ_FOREACH(dev, &devices_list, next) {\n-\t\tif (rte_dev == dev->dev)\n-\t\t\treturn dev;\n+\tTAILQ_FOREACH(cdev, &devices_list, next) {\n+\t\tif (rte_dev == cdev->dev)\n+\t\t\treturn cdev;\n \t}\n \treturn NULL;\n }\n@@ -222,29 +309,60 @@ mlx5_dev_to_pci_str(const struct rte_device *dev, char *addr, size_t size)\n }\n \n static void\n-dev_release(struct mlx5_common_device *dev)\n+mlx5_common_dev_release(struct mlx5_common_device *cdev)\n+{\n+\tpthread_mutex_lock(&devices_list_lock);\n+\tTAILQ_REMOVE(&devices_list, cdev, next);\n+\tpthread_mutex_unlock(&devices_list_lock);\n+\trte_free(cdev);\n+}\n+\n+static struct mlx5_common_device *\n+mlx5_common_dev_create(struct rte_device *eal_dev)\n {\n+\tstruct mlx5_common_device *cdev;\n+\tint ret;\n+\n+\tcdev = rte_zmalloc(\"mlx5_common_device\", sizeof(*cdev), 0);\n+\tif (!cdev) {\n+\t\tDRV_LOG(ERR, \"Device allocation failure.\");\n+\t\trte_errno = ENOMEM;\n+\t\treturn NULL;\n+\t}\n+\tcdev->dev = eal_dev;\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\tgoto exit;\n+\t/* Parse device parameters. */\n+\tret = mlx5_common_config_get(eal_dev->devargs, &cdev->config);\n+\tif (ret < 0) {\n+\t\tDRV_LOG(ERR, \"Failed to process device arguments: %s\",\n+\t\t\tstrerror(rte_errno));\n+\t\trte_free(cdev);\n+\t\treturn NULL;\n+\t}\n+\tmlx5_malloc_mem_select(cdev->config.sys_mem_en);\n+exit:\n \tpthread_mutex_lock(&devices_list_lock);\n-\tTAILQ_REMOVE(&devices_list, dev, next);\n+\tTAILQ_INSERT_HEAD(&devices_list, cdev, next);\n \tpthread_mutex_unlock(&devices_list_lock);\n-\trte_free(dev);\n+\treturn cdev;\n }\n \n static int\n-drivers_remove(struct mlx5_common_device *dev, uint32_t enabled_classes)\n+drivers_remove(struct mlx5_common_device *cdev, uint32_t enabled_classes)\n {\n \tstruct mlx5_class_driver *driver;\n \tint local_ret = -ENODEV;\n \tunsigned int i = 0;\n \tint ret = 0;\n \n-\tenabled_classes &= dev->classes_loaded;\n+\tenabled_classes &= cdev->classes_loaded;\n \twhile (enabled_classes) {\n \t\tdriver = driver_get(RTE_BIT64(i));\n \t\tif (driver != NULL) {\n-\t\t\tlocal_ret = driver->remove(dev);\n+\t\t\tlocal_ret = driver->remove(cdev);\n \t\t\tif (local_ret == 0)\n-\t\t\t\tdev->classes_loaded &= ~RTE_BIT64(i);\n+\t\t\t\tcdev->classes_loaded &= ~RTE_BIT64(i);\n \t\t\telse if (ret == 0)\n \t\t\t\tret = local_ret;\n \t\t}\n@@ -257,7 +375,7 @@ drivers_remove(struct mlx5_common_device *dev, uint32_t enabled_classes)\n }\n \n static int\n-drivers_probe(struct mlx5_common_device *dev, uint32_t user_classes)\n+drivers_probe(struct mlx5_common_device *cdev, uint32_t user_classes)\n {\n \tstruct mlx5_class_driver *driver;\n \tuint32_t enabled_classes = 0;\n@@ -267,16 +385,16 @@ drivers_probe(struct mlx5_common_device *dev, uint32_t user_classes)\n \tTAILQ_FOREACH(driver, &drivers_list, next) {\n \t\tif ((driver->drv_class & user_classes) == 0)\n \t\t\tcontinue;\n-\t\tif (!mlx5_bus_match(driver, dev->dev))\n+\t\tif (!mlx5_bus_match(driver, cdev->dev))\n \t\t\tcontinue;\n-\t\talready_loaded = dev->classes_loaded & driver->drv_class;\n+\t\talready_loaded = cdev->classes_loaded & driver->drv_class;\n \t\tif (already_loaded && driver->probe_again == 0) {\n \t\t\tDRV_LOG(ERR, \"Device %s is already probed\",\n-\t\t\t\tdev->dev->name);\n+\t\t\t\tcdev->dev->name);\n \t\t\tret = -EEXIST;\n \t\t\tgoto probe_err;\n \t\t}\n-\t\tret = driver->probe(dev);\n+\t\tret = driver->probe(cdev);\n \t\tif (ret < 0) {\n \t\t\tDRV_LOG(ERR, \"Failed to load driver %s\",\n \t\t\t\tdriver->name);\n@@ -284,20 +402,20 @@ drivers_probe(struct mlx5_common_device *dev, uint32_t user_classes)\n \t\t}\n \t\tenabled_classes |= driver->drv_class;\n \t}\n-\tdev->classes_loaded |= enabled_classes;\n+\tcdev->classes_loaded |= enabled_classes;\n \treturn 0;\n probe_err:\n \t/* Only unload drivers which are enabled which were enabled\n \t * in this probe instance.\n \t */\n-\tdrivers_remove(dev, enabled_classes);\n+\tdrivers_remove(cdev, enabled_classes);\n \treturn ret;\n }\n \n int\n mlx5_common_dev_probe(struct rte_device *eal_dev)\n {\n-\tstruct mlx5_common_device *dev;\n+\tstruct mlx5_common_device *cdev;\n \tuint32_t classes = 0;\n \tbool new_device = false;\n \tint ret;\n@@ -313,15 +431,11 @@ mlx5_common_dev_probe(struct rte_device *eal_dev)\n \tif (classes == 0)\n \t\t/* Default to net class. */\n \t\tclasses = MLX5_CLASS_ETH;\n-\tdev = to_mlx5_device(eal_dev);\n-\tif (!dev) {\n-\t\tdev = rte_zmalloc(\"mlx5_common_device\", sizeof(*dev), 0);\n-\t\tif (!dev)\n+\tcdev = to_mlx5_device(eal_dev);\n+\tif (!cdev) {\n+\t\tcdev = mlx5_common_dev_create(eal_dev);\n+\t\tif (!cdev)\n \t\t\treturn -ENOMEM;\n-\t\tdev->dev = eal_dev;\n-\t\tpthread_mutex_lock(&devices_list_lock);\n-\t\tTAILQ_INSERT_HEAD(&devices_list, dev, next);\n-\t\tpthread_mutex_unlock(&devices_list_lock);\n \t\tnew_device = true;\n \t}\n \t/*\n@@ -329,34 +443,34 @@ mlx5_common_dev_probe(struct rte_device *eal_dev)\n \t * For new device, the classes_loaded field is 0 and it check only\n \t * the classes given as user device arguments.\n \t */\n-\tret = is_valid_class_combination(classes | dev->classes_loaded);\n+\tret = is_valid_class_combination(classes | cdev->classes_loaded);\n \tif (ret != 0) {\n \t\tDRV_LOG(ERR, \"Unsupported mlx5 classes combination.\");\n \t\tgoto class_err;\n \t}\n-\tret = drivers_probe(dev, classes);\n+\tret = drivers_probe(cdev, classes);\n \tif (ret)\n \t\tgoto class_err;\n \treturn 0;\n class_err:\n \tif (new_device)\n-\t\tdev_release(dev);\n+\t\tmlx5_common_dev_release(cdev);\n \treturn ret;\n }\n \n int\n mlx5_common_dev_remove(struct rte_device *eal_dev)\n {\n-\tstruct mlx5_common_device *dev;\n+\tstruct mlx5_common_device *cdev;\n \tint ret;\n \n-\tdev = to_mlx5_device(eal_dev);\n-\tif (!dev)\n+\tcdev = to_mlx5_device(eal_dev);\n+\tif (!cdev)\n \t\treturn -ENODEV;\n \t/* Matching device found, cleanup and unload drivers. */\n-\tret = drivers_remove(dev, dev->classes_loaded);\n+\tret = drivers_remove(cdev, cdev->classes_loaded);\n \tif (ret == 0)\n-\t\tdev_release(dev);\n+\t\tmlx5_common_dev_release(cdev);\n \treturn ret;\n }\n \ndiff --git a/drivers/common/mlx5/mlx5_common.h b/drivers/common/mlx5/mlx5_common.h\nindex b7e2ad1a82..f922757da1 100644\n--- a/drivers/common/mlx5/mlx5_common.h\n+++ b/drivers/common/mlx5/mlx5_common.h\n@@ -324,10 +324,28 @@ void mlx5_common_init(void);\n * from devargs, locating target RDMA device and probing with it.\n */\n \n+/*\n+ * Device configuration structure.\n+ *\n+ * Merged configuration from:\n+ *\n+ * - Device capabilities,\n+ * - User device parameters disabled features.\n+ */\n+struct mlx5_common_dev_config {\n+\tint dbnc; /* Skip doorbell register write barrier. */\n+\tunsigned int sys_mem_en:1; /* The default memory allocator. */\n+\tunsigned int mr_mempool_reg_en:1;\n+\t/* Allow/prevent implicit mempool memory registration. */\n+\tunsigned int mr_ext_memseg_en:1;\n+\t/* Whether memseg should be extended for MR creation. */\n+};\n+\n struct mlx5_common_device {\n \tstruct rte_device *dev;\n \tTAILQ_ENTRY(mlx5_common_device) next;\n \tuint32_t classes_loaded;\n+\tstruct mlx5_common_dev_config config; /* Device configuration. */\n };\n \n /**\ndiff --git a/drivers/common/mlx5/mlx5_malloc.h b/drivers/common/mlx5/mlx5_malloc.h\nindex 8aea414635..74b7eeb26e 100644\n--- a/drivers/common/mlx5/mlx5_malloc.h\n+++ b/drivers/common/mlx5/mlx5_malloc.h\n@@ -38,7 +38,6 @@ enum mlx5_mem_flags {\n * @param sys_mem_en\n * Use system memory or not.\n */\n-__rte_internal\n void mlx5_malloc_mem_select(uint32_t sys_mem_en);\n \n /**\ndiff --git a/drivers/common/mlx5/version.map b/drivers/common/mlx5/version.map\nindex 85100d5afb..9d17366d19 100644\n--- a/drivers/common/mlx5/version.map\n+++ b/drivers/common/mlx5/version.map\n@@ -96,7 +96,6 @@ INTERNAL {\n \tmlx5_hlist_destroy;\n \n \tmlx5_malloc;\n-\tmlx5_malloc_mem_select;\n \n \tmlx5_memory_stat_dump; # WINDOWS_NO_EXPORT\n \ndiff --git a/drivers/net/mlx5/linux/mlx5_mp_os.c b/drivers/net/mlx5/linux/mlx5_mp_os.c\nindex d2ac375a47..b0996813dc 100644\n--- a/drivers/net/mlx5/linux/mlx5_mp_os.c\n+++ b/drivers/net/mlx5/linux/mlx5_mp_os.c\n@@ -68,6 +68,7 @@ mlx5_mp_os_primary_handle(const struct rte_mp_msg *mp_msg, const void *peer)\n \t\t(const struct mlx5_mp_param *)mp_msg->param;\n \tstruct rte_eth_dev *dev;\n \tstruct mlx5_priv *priv;\n+\tstruct mlx5_common_device *cdev;\n \tstruct mr_cache_entry entry;\n \tuint32_t lkey;\n \tint ret;\n@@ -85,13 +86,14 @@ mlx5_mp_os_primary_handle(const struct rte_mp_msg *mp_msg, const void *peer)\n \t}\n \tdev = &rte_eth_devices[param->port_id];\n \tpriv = dev->data->dev_private;\n+\tcdev = priv->sh->cdev;\n \tswitch (param->type) {\n \tcase MLX5_MP_REQ_CREATE_MR:\n \t\tmp_init_msg(&priv->mp_id, &mp_res, param->type);\n \t\tlkey = mlx5_mr_create_primary(priv->sh->pd,\n \t\t\t\t\t &priv->sh->share_cache,\n \t\t\t\t\t &entry, param->args.addr,\n-\t\t\t\t\t priv->config.mr_ext_memseg_en);\n+\t\t\t\t\t cdev->config.mr_ext_memseg_en);\n \t\tif (lkey == UINT32_MAX)\n \t\t\tres->result = -rte_errno;\n \t\tret = rte_mp_reply(&mp_res, peer);\ndiff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c\nindex 0aad08aba4..d3b789bd72 100644\n--- a/drivers/net/mlx5/linux/mlx5_os.c\n+++ b/drivers/net/mlx5/linux/mlx5_os.c\n@@ -1072,7 +1072,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\tif (switch_info->master || switch_info->representor)\n \t\t\tconfig->dv_xmeta_en = MLX5_XMETA_MODE_META16;\n \t}\n-\tmlx5_malloc_mem_select(config->sys_mem_en);\n \tsh = mlx5_alloc_shared_dev_ctx(spawn, config);\n \tif (!sh)\n \t\treturn NULL;\n@@ -2124,15 +2123,12 @@ mlx5_os_config_default(struct mlx5_dev_config *config)\n {\n \tmemset(config, 0, sizeof(*config));\n \tconfig->mps = MLX5_ARG_UNSET;\n-\tconfig->dbnc = MLX5_ARG_UNSET;\n \tconfig->rx_vec_en = 1;\n \tconfig->txq_inline_max = MLX5_ARG_UNSET;\n \tconfig->txq_inline_min = MLX5_ARG_UNSET;\n \tconfig->txq_inline_mpw = MLX5_ARG_UNSET;\n \tconfig->txqs_inline = MLX5_ARG_UNSET;\n \tconfig->vf_nl_en = 1;\n-\tconfig->mr_ext_memseg_en = 1;\n-\tconfig->mr_mempool_reg_en = 1;\n \tconfig->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;\n \tconfig->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;\n \tconfig->dv_esw_en = 1;\n@@ -2796,7 +2792,7 @@ mlx5_os_net_probe(struct mlx5_common_device *cdev)\n }\n \n static int\n-mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)\n+mlx5_config_doorbell_mapping_env(const struct mlx5_common_dev_config *config)\n {\n \tchar *env;\n \tint value;\n@@ -2866,8 +2862,6 @@ mlx5_os_get_pdn(void *pd, uint32_t *pdn)\n *\n * @param[in] spawn\n * Pointer to the IB device attributes (name, port, etc).\n- * @param[out] config\n- * Pointer to device configuration structure.\n * @param[out] sh\n * Pointer to shared context structure.\n *\n@@ -2876,7 +2870,6 @@ mlx5_os_get_pdn(void *pd, uint32_t *pdn)\n */\n int\n mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,\n-\t\t const struct mlx5_dev_config *config,\n \t\t struct mlx5_dev_ctx_shared *sh)\n {\n \tint dbmap_env;\n@@ -2889,7 +2882,7 @@ mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,\n \t * checks the variable at device creation and\n \t * stores the result internally.\n \t */\n-\tdbmap_env = mlx5_config_doorbell_mapping_env(config);\n+\tdbmap_env = mlx5_config_doorbell_mapping_env(&spawn->cdev->config);\n \t/* Try to open IB device with DV first, then usual Verbs. */\n \terrno = 0;\n \tsh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);\ndiff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex e39e77aa9d..b5af21b0f6 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -968,7 +968,7 @@ mlx5_flex_parser_ecpri_release(struct rte_eth_dev *dev)\n */\n static int\n mlx5_alloc_rxtx_uars(struct mlx5_dev_ctx_shared *sh,\n-\t\t const struct mlx5_dev_config *config)\n+\t\t const struct mlx5_common_dev_config *config)\n {\n \tuint32_t uar_mapping, retry;\n \tint err = 0;\n@@ -1210,7 +1210,7 @@ mlx5_dev_ctx_shared_mempool_subscribe(struct rte_eth_dev *dev)\n \tint ret;\n \n \t/* Check if we only need to track Rx mempool destruction. */\n-\tif (!priv->config.mr_mempool_reg_en) {\n+\tif (!sh->cdev->config.mr_mempool_reg_en) {\n \t\tret = rte_mempool_event_callback_register\n \t\t\t\t(mlx5_dev_ctx_shared_rx_mempool_event_cb, sh);\n \t\treturn ret == 0 || rte_errno == EEXIST ? 0 : ret;\n@@ -1283,7 +1283,7 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,\n \tsh->cdev = spawn->cdev;\n \tif (spawn->bond_info)\n \t\tsh->bond = *spawn->bond_info;\n-\terr = mlx5_os_open_device(spawn, config, sh);\n+\terr = mlx5_os_open_device(spawn, sh);\n \tif (!sh->ctx)\n \t\tgoto error;\n \terr = mlx5_os_get_dev_attr(sh->ctx, &sh->device_attr);\n@@ -1332,7 +1332,7 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,\n \t\t\terr = ENOMEM;\n \t\t\tgoto error;\n \t\t}\n-\t\terr = mlx5_alloc_rxtx_uars(sh, config);\n+\t\terr = mlx5_alloc_rxtx_uars(sh, &sh->cdev->config);\n \t\tif (err)\n \t\t\tgoto error;\n \t\tMLX5_ASSERT(sh->tx_uar);\n@@ -2016,7 +2016,10 @@ mlx5_args_check(const char *key, const char *val, void *opaque)\n \tsigned long tmp;\n \n \t/* No-op, port representors are processed in mlx5_dev_spawn(). */\n-\tif (!strcmp(MLX5_DRIVER_KEY, key) || !strcmp(MLX5_REPRESENTOR, key))\n+\tif (!strcmp(MLX5_DRIVER_KEY, key) || !strcmp(MLX5_REPRESENTOR, key) ||\n+\t !strcmp(MLX5_SYS_MEM_EN, key) || !strcmp(MLX5_TX_DB_NC, key) ||\n+\t !strcmp(MLX5_MR_MEMPOOL_REG_EN, key) ||\n+\t !strcmp(MLX5_MR_EXT_MEMSEG_EN, key))\n \t\treturn 0;\n \terrno = 0;\n \ttmp = strtol(val, NULL, 0);\n@@ -2069,16 +2072,6 @@ mlx5_args_check(const char *key, const char *val, void *opaque)\n \t\tDRV_LOG(WARNING, \"%s: deprecated parameter, ignored\", key);\n \t} else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {\n \t\tconfig->mps = !!tmp;\n-\t} else if (strcmp(MLX5_TX_DB_NC, key) == 0) {\n-\t\tif (tmp != MLX5_TXDB_CACHED &&\n-\t\t tmp != MLX5_TXDB_NCACHED &&\n-\t\t tmp != MLX5_TXDB_HEURISTIC) {\n-\t\t\tDRV_LOG(ERR, \"invalid Tx doorbell \"\n-\t\t\t\t \"mapping parameter\");\n-\t\t\trte_errno = EINVAL;\n-\t\t\treturn -rte_errno;\n-\t\t}\n-\t\tconfig->dbnc = tmp;\n \t} else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {\n \t\tDRV_LOG(WARNING, \"%s: deprecated parameter, ignored\", key);\n \t} else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {\n@@ -2122,8 +2115,6 @@ mlx5_args_check(const char *key, const char *val, void *opaque)\n \t\t\tconfig->dv_miss_info = 1;\n \t} else if (strcmp(MLX5_LACP_BY_USER, key) == 0) {\n \t\tconfig->lacp_by_user = !!tmp;\n-\t} else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {\n-\t\tconfig->mr_ext_memseg_en = !!tmp;\n \t} else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {\n \t\tconfig->max_dump_files_num = tmp;\n \t} else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {\n@@ -2141,14 +2132,10 @@ mlx5_args_check(const char *key, const char *val, void *opaque)\n \t\t\treturn -rte_errno;\n \t\t}\n \t\tconfig->reclaim_mode = tmp;\n-\t} else if (strcmp(MLX5_SYS_MEM_EN, key) == 0) {\n-\t\tconfig->sys_mem_en = !!tmp;\n \t} else if (strcmp(MLX5_DECAP_EN, key) == 0) {\n \t\tconfig->decap_en = !!tmp;\n \t} else if (strcmp(MLX5_ALLOW_DUPLICATE_PATTERN, key) == 0) {\n \t\tconfig->allow_duplicate_pattern = !!tmp;\n-\t} else if (strcmp(MLX5_MR_MEMPOOL_REG_EN, key) == 0) {\n-\t\tconfig->mr_mempool_reg_en = !!tmp;\n \t} else {\n \t\tDRV_LOG(WARNING, \"%s: unknown parameter\", key);\n \t\trte_errno = EINVAL;\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 2e93ce2a3e..4c8e633fb6 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -256,8 +256,6 @@ struct mlx5_dev_config {\n \tunsigned int cqe_comp_fmt:3; /* CQE compression format. */\n \tunsigned int tso:1; /* Whether TSO is supported. */\n \tunsigned int rx_vec_en:1; /* Rx vector is enabled. */\n-\tunsigned int mr_ext_memseg_en:1;\n-\t/* Whether memseg should be extended for MR creation. */\n \tunsigned int l3_vxlan_en:1; /* Enable L3 VXLAN flow creation. */\n \tunsigned int vf_nl_en:1; /* Enable Netlink requests in VF mode. */\n \tunsigned int dv_esw_en:1; /* Enable E-Switch DV flow. */\n@@ -270,13 +268,10 @@ struct mlx5_dev_config {\n \tunsigned int dest_tir:1; /* Whether advanced DR API is available. */\n \tunsigned int reclaim_mode:2; /* Memory reclaim mode. */\n \tunsigned int rt_timestamp:1; /* realtime timestamp format. */\n-\tunsigned int sys_mem_en:1; /* The default memory allocator. */\n \tunsigned int decap_en:1; /* Whether decap will be used or not. */\n \tunsigned int dv_miss_info:1; /* restore packet after partial hw miss */\n \tunsigned int allow_duplicate_pattern:1;\n \t/* Allow/Prevent the duplicate rules pattern. */\n-\tunsigned int mr_mempool_reg_en:1;\n-\t/* Allow/prevent implicit mempool memory registration. */\n \tstruct {\n \t\tunsigned int enabled:1; /* Whether MPRQ is enabled. */\n \t\tunsigned int stride_num_n; /* Number of strides. */\n@@ -289,7 +284,6 @@ struct mlx5_dev_config {\n \t\t/* Rx queue count threshold to enable MPRQ. */\n \t} mprq; /* Configurations for Multi-Packet RQ. */\n \tint mps; /* Multi-packet send supported mode. */\n-\tint dbnc; /* Skip doorbell register write barrier. */\n \tunsigned int flow_prio; /* Number of flow priorities. */\n \tenum modify_reg flow_mreg_c[MLX5_MREG_C_NUM];\n \t/* Availibility of mreg_c's. */\n@@ -1778,7 +1772,6 @@ struct rte_pci_driver;\n int mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *dev_attr);\n void mlx5_os_free_shared_dr(struct mlx5_priv *priv);\n int mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,\n-\t\t\t const struct mlx5_dev_config *config,\n \t\t\t struct mlx5_dev_ctx_shared *sh);\n int mlx5_os_get_pdn(void *pd, uint32_t *pdn);\n int mlx5_os_net_probe(struct mlx5_common_device *cdev);\ndiff --git a/drivers/net/mlx5/mlx5_mr.c b/drivers/net/mlx5/mlx5_mr.c\nindex 55d27b50b9..f16f4f6a67 100644\n--- a/drivers/net/mlx5/mlx5_mr.c\n+++ b/drivers/net/mlx5/mlx5_mr.c\n@@ -86,7 +86,7 @@ mlx5_tx_addr2mr_bh(struct mlx5_txq_data *txq, uintptr_t addr)\n \n \treturn mlx5_mr_addr2mr_bh(priv->sh->pd, &priv->mp_id,\n \t\t\t\t &priv->sh->share_cache, mr_ctrl, addr,\n-\t\t\t\t priv->config.mr_ext_memseg_en);\n+\t\t\t\t priv->sh->cdev->config.mr_ext_memseg_en);\n }\n \n /**\n@@ -111,7 +111,7 @@ mlx5_tx_mb2mr_bh(struct mlx5_txq_data *txq, struct rte_mbuf *mb)\n \tuintptr_t addr = (uintptr_t)mb->buf_addr;\n \tuint32_t lkey;\n \n-\tif (priv->config.mr_mempool_reg_en) {\n+\tif (priv->sh->cdev->config.mr_mempool_reg_en) {\n \t\tstruct rte_mempool *mp = NULL;\n \t\tstruct mlx5_mprq_buf *buf;\n \n@@ -196,8 +196,8 @@ mlx5_mr_update_ext_mp_cb(struct rte_mempool *mp, void *opaque,\n \tmlx5_mr_insert_cache(&sh->share_cache, mr);\n \trte_rwlock_write_unlock(&sh->share_cache.rwlock);\n \t/* Insert to the local cache table */\n-\tmlx5_mr_addr2mr_bh(sh->pd, &priv->mp_id, &sh->share_cache,\n-\t\t\t mr_ctrl, addr, priv->config.mr_ext_memseg_en);\n+\tmlx5_mr_addr2mr_bh(sh->pd, &priv->mp_id, &sh->share_cache, mr_ctrl,\n+\t\t\t addr, priv->sh->cdev->config.mr_ext_memseg_en);\n }\n \n /**\ndiff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c\nindex 92fbdab568..ffb252525d 100644\n--- a/drivers/net/mlx5/mlx5_txq.c\n+++ b/drivers/net/mlx5/mlx5_txq.c\n@@ -498,10 +498,10 @@ mlx5_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid)\n static void\n txq_uar_ncattr_init(struct mlx5_txq_ctrl *txq_ctrl, size_t page_size)\n {\n-\tstruct mlx5_priv *priv = txq_ctrl->priv;\n+\tstruct mlx5_common_device *cdev = txq_ctrl->priv->sh->cdev;\n \toff_t cmd;\n \n-\ttxq_ctrl->txq.db_heu = priv->config.dbnc == MLX5_TXDB_HEURISTIC;\n+\ttxq_ctrl->txq.db_heu = cdev->config.dbnc == MLX5_TXDB_HEURISTIC;\n \ttxq_ctrl->txq.db_nc = 0;\n \t/* Check the doorbell register mapping type. */\n \tcmd = txq_ctrl->uar_mmap_offset / page_size;\ndiff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c\nindex 8ffbb9ff54..ea2d45bbce 100644\n--- a/drivers/net/mlx5/windows/mlx5_os.c\n+++ b/drivers/net/mlx5/windows/mlx5_os.c\n@@ -260,8 +260,6 @@ mlx5_os_set_nonblock_channel_fd(int fd)\n *\n * @param[in] spawn\n * Pointer to the device attributes (name, port, etc).\n- * @param[out] config\n- * Pointer to device configuration structure.\n * @param[out] sh\n * Pointer to shared context structure.\n *\n@@ -270,10 +268,8 @@ mlx5_os_set_nonblock_channel_fd(int fd)\n */\n int\n mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,\n-\t\t const struct mlx5_dev_config *config,\n \t\t struct mlx5_dev_ctx_shared *sh)\n {\n-\tRTE_SET_USED(config);\n \tint err = 0;\n \tstruct mlx5_context *mlx5_ctx;\n \n@@ -390,7 +386,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\t\tstrerror(rte_errno));\n \t\tgoto error;\n \t}\n-\tmlx5_malloc_mem_select(config->sys_mem_en);\n \tsh = mlx5_alloc_shared_dev_ctx(spawn, config);\n \tif (!sh)\n \t\treturn NULL;\n@@ -1122,15 +1117,12 @@ mlx5_os_net_probe(struct mlx5_common_device *cdev)\n \tmemset(&dev_config, 0, sizeof(struct mlx5_dev_config));\n \tdev_config.vf = dev_config_vf;\n \tdev_config.mps = 0;\n-\tdev_config.dbnc = MLX5_ARG_UNSET;\n \tdev_config.rx_vec_en = 1;\n \tdev_config.txq_inline_max = MLX5_ARG_UNSET;\n \tdev_config.txq_inline_min = MLX5_ARG_UNSET;\n \tdev_config.txq_inline_mpw = MLX5_ARG_UNSET;\n \tdev_config.txqs_inline = MLX5_ARG_UNSET;\n \tdev_config.vf_nl_en = 0;\n-\tdev_config.mr_ext_memseg_en = 1;\n-\tdev_config.mr_mempool_reg_en = 1;\n \tdev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;\n \tdev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;\n \tdev_config.dv_esw_en = 0;\n", "prefixes": [ "v3", "04/18" ] }