Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/100016/?format=api
{ "id": 100016, "url": "http://patches.dpdk.org/api/patches/100016/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210929163035.608387-10-ciara.power@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210929163035.608387-10-ciara.power@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210929163035.608387-10-ciara.power@intel.com", "date": "2021-09-29T16:30:34", "name": "[v3,09/10] crypto/ipsec_mb: add chacha20-poly1305 PMD to framework", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "fad9b27961792c8eddc8fdbc85429bad0bfa4c39", "submitter": { "id": 978, "url": "http://patches.dpdk.org/api/people/978/?format=api", "name": "Power, Ciara", "email": "ciara.power@intel.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210929163035.608387-10-ciara.power@intel.com/mbox/", "series": [ { "id": 19269, "url": "http://patches.dpdk.org/api/series/19269/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=19269", "date": "2021-09-29T16:30:25", "name": "drivers/crypto: introduce ipsec_mb framework", "version": 3, "mbox": "http://patches.dpdk.org/series/19269/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/100016/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/100016/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 90E0BA0547;\n\tWed, 29 Sep 2021 18:32:01 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 876814111D;\n\tWed, 29 Sep 2021 18:31:31 +0200 (CEST)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by mails.dpdk.org (Postfix) with ESMTP id C3FE4410ED\n for <dev@dpdk.org>; Wed, 29 Sep 2021 18:31:26 +0200 (CEST)", "from orsmga002.jf.intel.com ([10.7.209.21])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 29 Sep 2021 09:31:05 -0700", "from silpixa00400355.ir.intel.com (HELO\n silpixa00400355.ger.corp.intel.com) ([10.237.222.87])\n by orsmga002.jf.intel.com with ESMTP; 29 Sep 2021 09:31:03 -0700" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10122\"; a=\"247511721\"", "E=Sophos;i=\"5.85,332,1624345200\"; d=\"scan'208\";a=\"247511721\"", "E=Sophos;i=\"5.85,332,1624345200\"; d=\"scan'208\";a=\"457092906\"" ], "X-ExtLoop1": "1", "From": "Ciara Power <ciara.power@intel.com>", "To": "dev@dpdk.org", "Cc": "roy.fan.zhang@intel.com, piotrx.bronowski@intel.com, gakhil@marvell.com,\n Kai Ji <kai.ji@intel.com>, Ciara Power <ciara.power@intel.com>,\n Declan Doherty <declan.doherty@intel.com>,\n Pablo de Lara <pablo.de.lara.guarch@intel.com>", "Date": "Wed, 29 Sep 2021 16:30:34 +0000", "Message-Id": "<20210929163035.608387-10-ciara.power@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20210929163035.608387-1-ciara.power@intel.com>", "References": "<20210727083832.291687-1-roy.fan.zhang@intel.com>\n <20210929163035.608387-1-ciara.power@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v3 09/10] crypto/ipsec_mb: add chacha20-poly1305\n PMD to framework", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kai Ji <kai.ji@intel.com>\n\nAdd in new chacha20_poly1305 support in ipsec_mb.\nAdd in new chacha20_poly1305 test vector for SGL test.\n\nSigned-off-by: Kai Ji <kai.ji@intel.com>\nSigned-off-by: Ciara Power <ciara.power@intel.com>\n\n---\nv3:\n - Fixed some formatting.\n - Removed unnecessary get session function.\n\nv2:\n - Added unused tag to session configure parameter.\n - Added release note.\n - Added documentation for PMD.\n---\n app/test/test_cryptodev.c | 23 +\n app/test/test_cryptodev.h | 1 +\n app/test/test_cryptodev_aead_test_vectors.h | 114 +++++\n doc/guides/cryptodevs/chacha20_poly1305.rst | 99 ++++\n .../cryptodevs/features/chacha20_poly1305.ini | 35 ++\n doc/guides/cryptodevs/index.rst | 1 +\n doc/guides/rel_notes/release_21_11.rst | 5 +\n drivers/crypto/ipsec_mb/meson.build | 1 +\n drivers/crypto/ipsec_mb/pmd_chacha_poly.c | 482 ++++++++++++++++++\n .../ipsec_mb/rte_ipsec_mb_pmd_private.h | 7 +\n 10 files changed, 768 insertions(+)\n create mode 100644 doc/guides/cryptodevs/chacha20_poly1305.rst\n create mode 100644 doc/guides/cryptodevs/features/chacha20_poly1305.ini\n create mode 100644 drivers/crypto/ipsec_mb/pmd_chacha_poly.c", "diff": "diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c\nindex 16d770a17f..92c9bd0141 100644\n--- a/app/test/test_cryptodev.c\n+++ b/app/test/test_cryptodev.c\n@@ -13455,6 +13455,14 @@ test_chacha20_poly1305_decrypt_test_case_rfc8439(void)\n \treturn test_authenticated_decryption(&chacha20_poly1305_case_rfc8439);\n }\n \n+static int\n+test_chacha20_poly1305_encrypt_SGL_out_of_place(void)\n+{\n+\treturn test_authenticated_encryption_SGL(\n+\t\t&chacha20_poly1305_case_2, OUT_OF_PLACE, 32,\n+\t\tchacha20_poly1305_case_2.plaintext.len);\n+}\n+\n #ifdef RTE_CRYPTO_SCHEDULER\n \n /* global AESNI worker IDs for the scheduler test */\n@@ -14063,6 +14071,8 @@ static struct unit_test_suite cryptodev_chacha20_poly1305_testsuite = {\n \t\t\ttest_chacha20_poly1305_encrypt_test_case_rfc8439),\n \t\tTEST_CASE_ST(ut_setup, ut_teardown,\n \t\t\ttest_chacha20_poly1305_decrypt_test_case_rfc8439),\n+\t\tTEST_CASE_ST(ut_setup, ut_teardown,\n+\t\t\ttest_chacha20_poly1305_encrypt_SGL_out_of_place),\n \t\tTEST_CASES_END()\n \t}\n };\n@@ -14629,6 +14639,17 @@ test_cryptodev_cpu_aesni_mb(void)\n \treturn rc;\n }\n \n+static int\n+test_cryptodev_chacha_poly_mb(void)\n+{\n+\tint32_t rc;\n+\tenum rte_security_session_action_type at = gbl_action_type;\n+\trc = run_cryptodev_testsuite(\n+\t\t\tRTE_STR(CRYPTODEV_NAME_CHACHA20_POLY1305_PMD));\n+\tgbl_action_type = at;\n+\treturn rc;\n+}\n+\n static int\n test_cryptodev_openssl(void)\n {\n@@ -14888,6 +14909,8 @@ REGISTER_TEST_COMMAND(cryptodev_qat_autotest, test_cryptodev_qat);\n REGISTER_TEST_COMMAND(cryptodev_aesni_mb_autotest, test_cryptodev_aesni_mb);\n REGISTER_TEST_COMMAND(cryptodev_cpu_aesni_mb_autotest,\n \ttest_cryptodev_cpu_aesni_mb);\n+REGISTER_TEST_COMMAND(cryptodev_chacha_poly_mb_autotest,\n+\ttest_cryptodev_chacha_poly_mb);\n REGISTER_TEST_COMMAND(cryptodev_openssl_autotest, test_cryptodev_openssl);\n REGISTER_TEST_COMMAND(cryptodev_aesni_gcm_autotest, test_cryptodev_aesni_gcm);\n REGISTER_TEST_COMMAND(cryptodev_cpu_aesni_gcm_autotest,\ndiff --git a/app/test/test_cryptodev.h b/app/test/test_cryptodev.h\nindex 1cdd84d01f..90c8287365 100644\n--- a/app/test/test_cryptodev.h\n+++ b/app/test/test_cryptodev.h\n@@ -59,6 +59,7 @@\n #define CRYPTODEV_NAME_SNOW3G_PMD\tcrypto_snow3g\n #define CRYPTODEV_NAME_KASUMI_PMD\tcrypto_kasumi\n #define CRYPTODEV_NAME_ZUC_PMD\t\tcrypto_zuc\n+#define CRYPTODEV_NAME_CHACHA20_POLY1305_PMD\tcrypto_chacha20_poly1305\n #define CRYPTODEV_NAME_ARMV8_PMD\tcrypto_armv8\n #define CRYPTODEV_NAME_DPAA_SEC_PMD\tcrypto_dpaa_sec\n #define CRYPTODEV_NAME_DPAA2_SEC_PMD\tcrypto_dpaa2_sec\ndiff --git a/app/test/test_cryptodev_aead_test_vectors.h b/app/test/test_cryptodev_aead_test_vectors.h\nindex 73cc143f10..07292620a4 100644\n--- a/app/test/test_cryptodev_aead_test_vectors.h\n+++ b/app/test/test_cryptodev_aead_test_vectors.h\n@@ -3930,4 +3930,118 @@ static const struct aead_test_data chacha20_poly1305_case_rfc8439 = {\n \t\t.len = 16\n \t}\n };\n+\n+static uint8_t chacha_aad_2[] = {\n+\t\t\t0xf3, 0x33, 0x88, 0x86, 0x00, 0x00, 0x00, 0x00,\n+\t\t\t0x00, 0x00, 0x4e, 0x91\n+};\n+\n+static const struct aead_test_data chacha20_poly1305_case_2 = {\n+\t.algo = RTE_CRYPTO_AEAD_CHACHA20_POLY1305,\n+\t.key = {\n+\t\t.data = {\n+\t\t\t\t0x1c, 0x92, 0x40, 0xa5, 0xeb, 0x55, 0xd3, 0x8a,\n+\t\t\t\t0xf3, 0x33, 0x88, 0x86, 0x04, 0xf6, 0xb5, 0xf0,\n+\t\t\t\t0x47, 0x39, 0x17, 0xc1, 0x40, 0x2b, 0x80, 0x09,\n+\t\t\t\t0x9d, 0xca, 0x5c, 0xbc, 0x20, 0x70, 0x75, 0xc0\n+\t\t},\n+\t\t.len = 32\n+\t},\n+\t.iv = {\n+\t\t.data = {\n+\t\t\t\t0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x03, 0x04,\n+\t\t\t\t0x05, 0x06, 0x07, 0x08\n+\t\t},\n+\t\t.len = 12\n+\t},\n+\t.aad = {\n+\t\t.data = chacha_aad_2,\n+\t\t.len = 12\n+\t},\n+\t.plaintext = {\n+\t\t.data = {\n+\t\t\t\t0x49, 0x6e, 0x74, 0x65, 0x72, 0x6e, 0x65, 0x74,\n+\t\t\t\t0x2d, 0x44, 0x72, 0x61, 0x66, 0x74, 0x73, 0x20,\n+\t\t\t\t0x61, 0x72, 0x65, 0x20, 0x64, 0x72, 0x61, 0x66,\n+\t\t\t\t0x74, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65,\n+\t\t\t\t0x6e, 0x74, 0x73, 0x20, 0x76, 0x61, 0x6c, 0x69,\n+\t\t\t\t0x64, 0x20, 0x66, 0x6f, 0x72, 0x20, 0x61, 0x20,\n+\t\t\t\t0x6d, 0x61, 0x78, 0x69, 0x6d, 0x75, 0x6d, 0x20,\n+\t\t\t\t0x6f, 0x66, 0x20, 0x73, 0x69, 0x78, 0x20, 0x6d,\n+\t\t\t\t0x6f, 0x6e, 0x74, 0x68, 0x73, 0x20, 0x61, 0x6e,\n+\t\t\t\t0x64, 0x20, 0x6d, 0x61, 0x79, 0x20, 0x62, 0x65,\n+\t\t\t\t0x20, 0x75, 0x70, 0x64, 0x61, 0x74, 0x65, 0x64,\n+\t\t\t\t0x2c, 0x20, 0x72, 0x65, 0x70, 0x6c, 0x61, 0x63,\n+\t\t\t\t0x65, 0x64, 0x2c, 0x20, 0x6f, 0x72, 0x20, 0x6f,\n+\t\t\t\t0x62, 0x73, 0x6f, 0x6c, 0x65, 0x74, 0x65, 0x64,\n+\t\t\t\t0x20, 0x62, 0x79, 0x20, 0x6f, 0x74, 0x68, 0x65,\n+\t\t\t\t0x72, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65,\n+\t\t\t\t0x6e, 0x74, 0x73, 0x20, 0x61, 0x74, 0x20, 0x61,\n+\t\t\t\t0x6e, 0x79, 0x20, 0x74, 0x69, 0x6d, 0x65, 0x2e,\n+\t\t\t\t0x20, 0x49, 0x74, 0x20, 0x69, 0x73, 0x20, 0x69,\n+\t\t\t\t0x6e, 0x61, 0x70, 0x70, 0x72, 0x6f, 0x70, 0x72,\n+\t\t\t\t0x69, 0x61, 0x74, 0x65, 0x20, 0x74, 0x6f, 0x20,\n+\t\t\t\t0x75, 0x73, 0x65, 0x20, 0x49, 0x6e, 0x74, 0x65,\n+\t\t\t\t0x72, 0x6e, 0x65, 0x74, 0x2d, 0x44, 0x72, 0x61,\n+\t\t\t\t0x66, 0x74, 0x73, 0x20, 0x61, 0x73, 0x20, 0x72,\n+\t\t\t\t0x65, 0x66, 0x65, 0x72, 0x65, 0x6e, 0x63, 0x65,\n+\t\t\t\t0x20, 0x6d, 0x61, 0x74, 0x65, 0x72, 0x69, 0x61,\n+\t\t\t\t0x6c, 0x20, 0x6f, 0x72, 0x20, 0x74, 0x6f, 0x20,\n+\t\t\t\t0x63, 0x69, 0x74, 0x65, 0x20, 0x74, 0x68, 0x65,\n+\t\t\t\t0x6d, 0x20, 0x6f, 0x74, 0x68, 0x65, 0x72, 0x20,\n+\t\t\t\t0x74, 0x68, 0x61, 0x6e, 0x20, 0x61, 0x73, 0x20,\n+\t\t\t\t0x2f, 0xe2, 0x80, 0x9c, 0x77, 0x6f, 0x72, 0x6b,\n+\t\t\t\t0x20, 0x69, 0x6e, 0x20, 0x70, 0x72, 0x6f, 0x67,\n+\t\t\t\t0x72, 0x65, 0x73, 0x73, 0x2e, 0x2f, 0xe2, 0x80,\n+\t\t\t\t0x9d\n+\t\t},\n+\t\t.len = 265\n+\t},\n+\t.ciphertext = {\n+\t\t.data = {\n+\t\t\t\t0x64, 0xa0, 0x86, 0x15, 0x75, 0x86, 0x1a, 0xf4,\n+\t\t\t\t0x60, 0xf0, 0x62, 0xc7, 0x9b, 0xe6, 0x43, 0xbd,\n+\t\t\t\t0x5e, 0x80, 0x5c, 0xfd, 0x34, 0x5c, 0xf3, 0x89,\n+\t\t\t\t0xf1, 0x08, 0x67, 0x0a, 0xc7, 0x6c, 0x8c, 0xb2,\n+\t\t\t\t0x4c, 0x6c, 0xfc, 0x18, 0x75, 0x5d, 0x43, 0xee,\n+\t\t\t\t0xa0, 0x9e, 0xe9, 0x4e, 0x38, 0x2d, 0x26, 0xb0,\n+\t\t\t\t0xbd, 0xb7, 0xb7, 0x3c, 0x32, 0x1b, 0x01, 0x00,\n+\t\t\t\t0xd4, 0xf0, 0x3b, 0x7f, 0x35, 0x58, 0x94, 0xcf,\n+\t\t\t\t0x33, 0x2f, 0x83, 0x0e, 0x71, 0x0b, 0x97, 0xce,\n+\t\t\t\t0x98, 0xc8, 0xa8, 0x4a, 0xbd, 0x0b, 0x94, 0x81,\n+\t\t\t\t0x14, 0xad, 0x17, 0x6e, 0x00, 0x8d, 0x33, 0xbd,\n+\t\t\t\t0x60, 0xf9, 0x82, 0xb1, 0xff, 0x37, 0xc8, 0x55,\n+\t\t\t\t0x97, 0x97, 0xa0, 0x6e, 0xf4, 0xf0, 0xef, 0x61,\n+\t\t\t\t0xc1, 0x86, 0x32, 0x4e, 0x2b, 0x35, 0x06, 0x38,\n+\t\t\t\t0x36, 0x06, 0x90, 0x7b, 0x6a, 0x7c, 0x02, 0xb0,\n+\t\t\t\t0xf9, 0xf6, 0x15, 0x7b, 0x53, 0xc8, 0x67, 0xe4,\n+\t\t\t\t0xb9, 0x16, 0x6c, 0x76, 0x7b, 0x80, 0x4d, 0x46,\n+\t\t\t\t0xa5, 0x9b, 0x52, 0x16, 0xcd, 0xe7, 0xa4, 0xe9,\n+\t\t\t\t0x90, 0x40, 0xc5, 0xa4, 0x04, 0x33, 0x22, 0x5e,\n+\t\t\t\t0xe2, 0x82, 0xa1, 0xb0, 0xa0, 0x6c, 0x52, 0x3e,\n+\t\t\t\t0xaf, 0x45, 0x34, 0xd7, 0xf8, 0x3f, 0xa1, 0x15,\n+\t\t\t\t0x5b, 0x00, 0x47, 0x71, 0x8c, 0xbc, 0x54, 0x6a,\n+\t\t\t\t0x0d, 0x07, 0x2b, 0x04, 0xb3, 0x56, 0x4e, 0xea,\n+\t\t\t\t0x1b, 0x42, 0x22, 0x73, 0xf5, 0x48, 0x27, 0x1a,\n+\t\t\t\t0x0b, 0xb2, 0x31, 0x60, 0x53, 0xfa, 0x76, 0x99,\n+\t\t\t\t0x19, 0x55, 0xeb, 0xd6, 0x31, 0x59, 0x43, 0x4e,\n+\t\t\t\t0xce, 0xbb, 0x4e, 0x46, 0x6d, 0xae, 0x5a, 0x10,\n+\t\t\t\t0x73, 0xa6, 0x72, 0x76, 0x27, 0x09, 0x7a, 0x10,\n+\t\t\t\t0x49, 0xe6, 0x17, 0xd9, 0x1d, 0x36, 0x10, 0x94,\n+\t\t\t\t0xfa, 0x68, 0xf0, 0xff, 0x77, 0x98, 0x71, 0x30,\n+\t\t\t\t0x30, 0x5b, 0xea, 0xba, 0x2e, 0xda, 0x04, 0xdf,\n+\t\t\t\t0x99, 0x7b, 0x71, 0x4d, 0x6c, 0x6f, 0x2c, 0x29,\n+\t\t\t\t0xa6, 0xad, 0x5c, 0xb4, 0x02, 0x2b, 0x02, 0x70,\n+\t\t\t\t0x9b\n+\t\t},\n+\t\t.len = 265\n+\t},\n+\t.auth_tag = {\n+\t\t.data = {\n+\t\t\t\t0xee, 0xad, 0x9d, 0x67, 0x89, 0x0c, 0xbb, 0x22,\n+\t\t\t\t0x39, 0x23, 0x36, 0xfe, 0xa1, 0x85, 0x1f, 0x38\n+\t\t},\n+\t\t.len = 16\n+\t}\n+};\n #endif /* TEST_CRYPTODEV_AEAD_TEST_VECTORS_H_ */\ndiff --git a/doc/guides/cryptodevs/chacha20_poly1305.rst b/doc/guides/cryptodevs/chacha20_poly1305.rst\nnew file mode 100644\nindex 0000000000..e5f7368d6d\n--- /dev/null\n+++ b/doc/guides/cryptodevs/chacha20_poly1305.rst\n@@ -0,0 +1,99 @@\n+.. SPDX-License-Identifier: BSD-3-Clause\n+ Copyright(c) 2016-2019 Intel Corporation.\n+\n+Chacha20-poly1305 Crypto Poll Mode Driver\n+=========================================\n+\n+The Chacha20-poly1305 PMD provides poll mode crypto driver support for\n+utilizing `Intel IPSec Multi-buffer library <https://github.com/01org/intel-ipsec-mb>`_.\n+\n+Features\n+--------\n+\n+Chacha20-poly1305 PMD has support for:\n+\n+AEAD algorithms:\n+\n+* RTE_CRYPTO_AEAD_CHACHA20_POLY1305\n+\n+\n+Installation\n+------------\n+\n+To build DPDK with the Chacha20-poly1305 PMD the user is required to download\n+the multi-buffer library from `here <https://github.com/01org/intel-ipsec-mb>`_\n+and compile it on their user system before building DPDK.\n+The latest version of the library supported by this PMD is v1.0, which\n+can be downloaded from `<https://github.com/01org/intel-ipsec-mb/archive/v1.0.zip>`_.\n+\n+After downloading the library, the user needs to unpack and compile it\n+on their system before building DPDK:\n+\n+.. code-block:: console\n+\n+ make\n+ make install\n+\n+The library requires NASM to be built. Depending on the library version, it might\n+require a minimum NASM version (e.g. v0.54 requires at least NASM 2.14).\n+\n+NASM is packaged for different OS. However, on some OS the version is too old,\n+so a manual installation is required. In that case, NASM can be downloaded from\n+`NASM website <https://www.nasm.us/pub/nasm/releasebuilds/?C=M;O=D>`_.\n+Once it is downloaded, extract it and follow these steps:\n+\n+.. code-block:: console\n+\n+ ./configure\n+ make\n+ make install\n+\n+.. note::\n+\n+ Compilation of the Multi-Buffer library is broken when GCC < 5.0, if library <= v0.53.\n+ If a lower GCC version than 5.0, the workaround proposed by the following link\n+ should be used: `<https://github.com/intel/intel-ipsec-mb/issues/40>`_.\n+\n+As a reference, the following table shows a mapping between the past DPDK versions\n+and the external crypto libraries supported by them:\n+\n+.. _table_zuc_versions:\n+\n+.. table:: DPDK and external crypto library version compatibility\n+\n+ ============= ================================\n+ DPDK version Crypto library version\n+ ============= ================================\n+ 21.11+ Multi-buffer library 1.0*\n+ ============= ================================\n+\n+\\* Multi-buffer library 1.0 or newer only works for Meson but not Make build system.\n+\n+Initialization\n+--------------\n+\n+In order to enable this virtual crypto PMD, user must:\n+\n+* Build the multi buffer library (explained in Installation section).\n+\n+To use the PMD in an application, user must:\n+\n+* Call rte_vdev_init(\"crypto_chacha20_poly1305\") within the application.\n+\n+* Use --vdev=\"crypto_chacha20_poly1305\" in the EAL options, which will call\n+ rte_vdev_init() internally.\n+\n+The following parameters (all optional) can be provided in the previous two calls:\n+\n+* socket_id: Specify the socket where the memory for the device is going to be allocated\n+ (by default, socket_id will be the socket where the core that is creating the PMD is running on).\n+\n+* max_nb_queue_pairs: Specify the maximum number of queue pairs in the device (8 by default).\n+\n+* max_nb_sessions: Specify the maximum number of sessions that can be created (2048 by default).\n+\n+Example:\n+\n+.. code-block:: console\n+\n+ --vdev=\"crypto_chacha20_poly1305,socket_id=0,max_nb_sessions=128\"\ndiff --git a/doc/guides/cryptodevs/features/chacha20_poly1305.ini b/doc/guides/cryptodevs/features/chacha20_poly1305.ini\nnew file mode 100644\nindex 0000000000..3353e031c9\n--- /dev/null\n+++ b/doc/guides/cryptodevs/features/chacha20_poly1305.ini\n@@ -0,0 +1,35 @@\n+;\n+; Supported features of the 'chacha20_poly1305' crypto driver.\n+;\n+; Refer to default.ini for the full list of available PMD features.\n+;\n+[Features]\n+Symmetric crypto = Y\n+Sym operation chaining = Y\n+Symmetric sessionless = Y\n+Non-Byte aligned data = Y\n+In Place SGL = Y\n+OOP SGL In LB Out = Y\n+OOP LB In LB Out = Y\n+CPU crypto = Y\n+\n+;\n+; Supported crypto algorithms of the 'chacha20_poly1305' crypto driver.\n+;\n+[Cipher]\n+\n+;\n+; Supported authentication algorithms of the 'chacha20_poly1305' crypto driver.\n+;\n+[Auth]\n+\n+;\n+; Supported AEAD algorithms of the 'chacha20_poly1305' crypto driver.\n+;\n+[AEAD]\n+CHACHA20-POLY1305 = Y\n+\n+;\n+; Supported Asymmetric algorithms of the 'chacha20_poly1305' crypto driver.\n+;\n+[Asymmetric]\ndiff --git a/doc/guides/cryptodevs/index.rst b/doc/guides/cryptodevs/index.rst\nindex 0f981c77b5..3dcc2ecd2e 100644\n--- a/doc/guides/cryptodevs/index.rst\n+++ b/doc/guides/cryptodevs/index.rst\n@@ -16,6 +16,7 @@ Crypto Device Drivers\n bcmfs\n caam_jr\n ccp\n+ chacha20_poly1305\n cnxk\n dpaa2_sec\n dpaa_sec\ndiff --git a/doc/guides/rel_notes/release_21_11.rst b/doc/guides/rel_notes/release_21_11.rst\nindex 696541dab7..3beecb2392 100644\n--- a/doc/guides/rel_notes/release_21_11.rst\n+++ b/doc/guides/rel_notes/release_21_11.rst\n@@ -76,6 +76,11 @@ New Features\n * Added support for partially encrypted digest when using auth-cipher\n operations.\n \n+* **Added Chacha20-poly1305 Crypto PMD.**\n+\n+ * Added PMD to support chacha20-poly1305 algorithms to IPSec_MB PMD framework.\n+ * Test vector added for chacha20-poly1305 SGL test.\n+\n * **Updated Marvell cnxk crypto PMD.**\n \n * Added AES-CBC SHA1-HMAC support in lookaside protocol (IPsec) for CN10K.\ndiff --git a/drivers/crypto/ipsec_mb/meson.build b/drivers/crypto/ipsec_mb/meson.build\nindex a1619c78ac..6e0a5f8004 100644\n--- a/drivers/crypto/ipsec_mb/meson.build\n+++ b/drivers/crypto/ipsec_mb/meson.build\n@@ -25,6 +25,7 @@ sources = files('rte_ipsec_mb_pmd.c',\n \t\t'rte_ipsec_mb_pmd_ops.c',\n \t\t'pmd_aesni_mb.c',\n \t\t'pmd_aesni_gcm.c',\n+\t\t'pmd_chacha_poly.c',\n \t\t'pmd_kasumi.c',\n \t\t'pmd_snow3g.c',\n \t\t'pmd_zuc.c'\ndiff --git a/drivers/crypto/ipsec_mb/pmd_chacha_poly.c b/drivers/crypto/ipsec_mb/pmd_chacha_poly.c\nnew file mode 100644\nindex 0000000000..814bc0761c\n--- /dev/null\n+++ b/drivers/crypto/ipsec_mb/pmd_chacha_poly.c\n@@ -0,0 +1,482 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2015-2021 Intel Corporation\n+ */\n+\n+#include <intel-ipsec-mb.h>\n+\n+#if defined(RTE_LIB_SECURITY)\n+#define AESNI_MB_DOCSIS_SEC_ENABLED 1\n+#include <rte_ether.h>\n+#include <rte_security.h>\n+#include <rte_security_driver.h>\n+#endif\n+\n+#include \"rte_ipsec_mb_pmd_private.h\"\n+\n+#define CHACHA20_POLY1305_IV_LENGTH 12\n+#define CHACHA20_POLY1305_DIGEST_LENGTH 16\n+#define CHACHA20_POLY1305_KEY_SIZE 32\n+\n+static const\n+struct rte_cryptodev_capabilities chacha20_poly1305_capabilities[] = {\n+\t{/* CHACHA20-POLY1305 */\n+\t .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n+\t {.sym = {\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AEAD,\n+\t\t {.aead = {\n+\t\t\t\t.algo = RTE_CRYPTO_AEAD_CHACHA20_POLY1305,\n+\t\t\t\t.block_size = 64,\n+\t\t\t\t.key_size = {\n+\t\t\t\t\t.min = 32,\n+\t\t\t\t\t.max = 32,\n+\t\t\t\t\t.increment = 0},\n+\t\t\t\t.digest_size = {\n+\t\t\t\t\t.min = 16,\n+\t\t\t\t\t.max = 16,\n+\t\t\t\t\t.increment = 0},\n+\t\t\t\t.aad_size = {\n+\t\t\t\t\t.min = 0,\n+\t\t\t\t\t.max = 240,\n+\t\t\t\t\t.increment = 1},\n+\t\t\t\t.iv_size = {\n+\t\t\t\t\t.min = 12,\n+\t\t\t\t\t.max = 12,\n+\t\t\t\t\t.increment = 0},\n+\t\t\t },\n+\t\t\t}\n+\t\t},}\n+\t},\n+\tRTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()\n+};\n+\n+uint8_t pmd_driver_id_chacha20_poly1305;\n+\n+/** CHACHA20 POLY1305 private session structure */\n+struct chacha20_poly1305_session {\n+\tstruct {\n+\t\tuint16_t length;\n+\t\tuint16_t offset;\n+\t} iv;\n+\t/**< IV parameters */\n+\tuint16_t aad_length;\n+\t/**< AAD length */\n+\tuint16_t req_digest_length;\n+\t/**< Requested digest length */\n+\tuint16_t gen_digest_length;\n+\t/**< Generated digest length */\n+\tuint8_t key[CHACHA20_POLY1305_KEY_SIZE];\n+\tenum ipsec_mb_operation op;\n+} __rte_cache_aligned;\n+\n+struct chacha20_poly1305_qp_data {\n+\tstruct chacha20_poly1305_context_data chacha20_poly1305_ctx_data;\n+\tuint8_t temp_digest[CHACHA20_POLY1305_DIGEST_LENGTH];\n+\t/**< Buffer used to store the digest generated\n+\t * by the driver when verifying a digest provided\n+\t * by the user (using authentication verify operation)\n+\t */\n+};\n+\n+/** Parse crypto xform chain and set private session parameters. */\n+static int\n+chacha20_poly1305_session_configure(IMB_MGR * mb_mgr __rte_unused,\n+\t\tvoid *priv_sess, const struct rte_crypto_sym_xform *xform)\n+{\n+\tstruct chacha20_poly1305_session *sess = priv_sess;\n+\tconst struct rte_crypto_sym_xform *auth_xform;\n+\tconst struct rte_crypto_sym_xform *cipher_xform;\n+\tconst struct rte_crypto_sym_xform *aead_xform;\n+\n+\tuint8_t key_length;\n+\tconst uint8_t *key;\n+\tenum ipsec_mb_operation mode;\n+\tint ret = 0;\n+\n+\tret = ipsec_mb_parse_xform(xform, &mode, &auth_xform,\n+\t\t\t\t&cipher_xform, &aead_xform);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tsess->op = mode;\n+\n+\tswitch (sess->op) {\n+\tcase IPSEC_MB_OP_AEAD_AUTHENTICATED_ENCRYPT:\n+\tcase IPSEC_MB_OP_AEAD_AUTHENTICATED_DECRYPT:\n+\t\tif (aead_xform->aead.algo !=\n+\t\t\t\tRTE_CRYPTO_AEAD_CHACHA20_POLY1305) {\n+\t\t\tIPSEC_MB_LOG(ERR,\n+\t\t\t\"The only combined operation supported is CHACHA20 POLY1305\");\n+\t\t\tret = -ENOTSUP;\n+\t\t\tgoto error_exit;\n+\t\t}\n+\t\t/* Set IV parameters */\n+\t\tsess->iv.offset = aead_xform->aead.iv.offset;\n+\t\tsess->iv.length = aead_xform->aead.iv.length;\n+\t\tkey_length = aead_xform->aead.key.length;\n+\t\tkey = aead_xform->aead.key.data;\n+\t\tsess->aad_length = aead_xform->aead.aad_length;\n+\t\tsess->req_digest_length = aead_xform->aead.digest_length;\n+\t\tbreak;\n+\tdefault:\n+\t\tIPSEC_MB_LOG(\n+\t\t ERR, \"Wrong xform type, has to be AEAD or authentication\");\n+\t\tret = -ENOTSUP;\n+\t\tgoto error_exit;\n+\t}\n+\n+\t/* IV check */\n+\tif (sess->iv.length != CHACHA20_POLY1305_IV_LENGTH &&\n+\t\tsess->iv.length != 0) {\n+\t\tIPSEC_MB_LOG(ERR, \"Wrong IV length\");\n+\t\tret = -EINVAL;\n+\t\tgoto error_exit;\n+\t}\n+\n+\t/* Check key length */\n+\tif (key_length != CHACHA20_POLY1305_KEY_SIZE) {\n+\t\tIPSEC_MB_LOG(ERR, \"Invalid key length\");\n+\t\tret = -EINVAL;\n+\t\tgoto error_exit;\n+\t} else {\n+\t\tmemcpy(sess->key, key, CHACHA20_POLY1305_KEY_SIZE);\n+\t}\n+\n+\t/* Digest check */\n+\tif (sess->req_digest_length != CHACHA20_POLY1305_DIGEST_LENGTH) {\n+\t\tIPSEC_MB_LOG(ERR, \"Invalid digest length\");\n+\t\tret = -EINVAL;\n+\t\tgoto error_exit;\n+\t} else {\n+\t\tsess->gen_digest_length = CHACHA20_POLY1305_DIGEST_LENGTH;\n+\t}\n+\n+error_exit:\n+\treturn ret;\n+}\n+\n+/**\n+ * Process a crypto operation, calling\n+ * the direct chacha poly API from the multi buffer library.\n+ *\n+ * @param\tqp\t\tqueue pair\n+ * @param\top\t\tsymmetric crypto operation\n+ * @param\tsession\t\tchacha poly session\n+ *\n+ * @return\n+ * - Return 0 if success\n+ */\n+static int\n+chacha20_poly1305_crypto_op(struct ipsec_mb_qp *qp, struct rte_crypto_op *op,\n+\t\tstruct chacha20_poly1305_session *session)\n+{\n+\tstruct chacha20_poly1305_qp_data *qp_data =\n+\t\t\t\t\tipsec_mb_get_qp_private_data(qp);\n+\tuint8_t *src, *dst;\n+\tuint8_t *iv_ptr;\n+\tstruct rte_crypto_sym_op *sym_op = op->sym;\n+\tstruct rte_mbuf *m_src = sym_op->m_src;\n+\tuint32_t offset, data_offset, data_length;\n+\tuint32_t part_len, data_len;\n+\tint total_len;\n+\tuint8_t *tag;\n+\tunsigned int oop = 0;\n+\n+\toffset = sym_op->aead.data.offset;\n+\tdata_offset = offset;\n+\tdata_length = sym_op->aead.data.length;\n+\tRTE_ASSERT(m_src != NULL);\n+\n+\twhile (offset >= m_src->data_len && data_length != 0) {\n+\t\toffset -= m_src->data_len;\n+\t\tm_src = m_src->next;\n+\n+\t\tRTE_ASSERT(m_src != NULL);\n+\t}\n+\n+\tsrc = rte_pktmbuf_mtod_offset(m_src, uint8_t *, offset);\n+\n+\tdata_len = m_src->data_len - offset;\n+\tpart_len = (data_len < data_length) ? data_len :\n+\t\t\tdata_length;\n+\n+\t/* In-place */\n+\tif (sym_op->m_dst == NULL || (sym_op->m_dst == sym_op->m_src))\n+\t\tdst = src;\n+\t/* Out-of-place */\n+\telse {\n+\t\toop = 1;\n+\t\t/* Segmented destination buffer is not supported\n+\t\t * if operation is Out-of-place\n+\t\t */\n+\t\tRTE_ASSERT(rte_pktmbuf_is_contiguous(sym_op->m_dst));\n+\t\tdst = rte_pktmbuf_mtod_offset(sym_op->m_dst, uint8_t *,\n+\t\t\t\t\tdata_offset);\n+\t}\n+\n+\tiv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,\n+\t\t\t\tsession->iv.offset);\n+\n+\tIMB_CHACHA20_POLY1305_INIT(qp->mb_mgr, session->key,\n+\t\t\t\t&qp_data->chacha20_poly1305_ctx_data,\n+\t\t\t\tiv_ptr,\tsym_op->aead.aad.data,\n+\t\t\t\t(uint64_t)session->aad_length);\n+\n+\tif (session->op == IPSEC_MB_OP_AEAD_AUTHENTICATED_ENCRYPT) {\n+\t\tIMB_CHACHA20_POLY1305_ENC_UPDATE(qp->mb_mgr,\n+\t\t\t\tsession->key,\n+\t\t\t\t&qp_data->chacha20_poly1305_ctx_data,\n+\t\t\t\tdst, src, (uint64_t)part_len);\n+\t\ttotal_len = data_length - part_len;\n+\n+\t\twhile (total_len) {\n+\t\t\tm_src = m_src->next;\n+\t\t\tRTE_ASSERT(m_src != NULL);\n+\n+\t\t\tsrc = rte_pktmbuf_mtod(m_src, uint8_t *);\n+\t\t\tif (oop)\n+\t\t\t\tdst += part_len;\n+\t\t\telse\n+\t\t\t\tdst = src;\n+\t\t\tpart_len = (m_src->data_len < total_len) ?\n+\t\t\t\t\tm_src->data_len : total_len;\n+\n+\t\t\tif (dst == NULL || src == NULL) {\n+\t\t\t\tIPSEC_MB_LOG(ERR, \"Invalid src or dst input\");\n+\t\t\t\treturn -EINVAL;\n+\t\t\t}\n+\t\t\tIMB_CHACHA20_POLY1305_ENC_UPDATE(qp->mb_mgr,\n+\t\t\t\t\tsession->key,\n+\t\t\t\t\t&qp_data->chacha20_poly1305_ctx_data,\n+\t\t\t\t\tdst, src, (uint64_t)part_len);\n+\t\t\ttotal_len -= part_len;\n+\t\t\tif (total_len < 0) {\n+\t\t\t\tIPSEC_MB_LOG(ERR, \"Invalid part len\");\n+\t\t\t\treturn -EINVAL;\n+\t\t\t}\n+\t\t}\n+\n+\t\ttag = sym_op->aead.digest.data;\n+\t\tIMB_CHACHA20_POLY1305_ENC_FINALIZE(qp->mb_mgr,\n+\t\t\t\t\t&qp_data->chacha20_poly1305_ctx_data,\n+\t\t\t\t\ttag, session->gen_digest_length);\n+\n+\t} else {\n+\t\tIMB_CHACHA20_POLY1305_DEC_UPDATE(qp->mb_mgr,\n+\t\t\t\t\tsession->key,\n+\t\t\t\t\t&qp_data->chacha20_poly1305_ctx_data,\n+\t\t\t\t\tdst, src, (uint64_t)part_len);\n+\n+\t\ttotal_len = data_length - part_len;\n+\n+\t\twhile (total_len) {\n+\t\t\tm_src = m_src->next;\n+\n+\t\t\tRTE_ASSERT(m_src != NULL);\n+\n+\t\t\tsrc = rte_pktmbuf_mtod(m_src, uint8_t *);\n+\t\t\tif (oop)\n+\t\t\t\tdst += part_len;\n+\t\t\telse\n+\t\t\t\tdst = src;\n+\t\t\tpart_len = (m_src->data_len < total_len) ?\n+\t\t\t\t\tm_src->data_len : total_len;\n+\n+\t\t\tif (dst == NULL || src == NULL) {\n+\t\t\t\tIPSEC_MB_LOG(ERR, \"Invalid src or dst input\");\n+\t\t\t\treturn -EINVAL;\n+\t\t\t}\n+\t\t\tIMB_CHACHA20_POLY1305_DEC_UPDATE(qp->mb_mgr,\n+\t\t\t\t\tsession->key,\n+\t\t\t\t\t&qp_data->chacha20_poly1305_ctx_data,\n+\t\t\t\t\tdst, src, (uint64_t)part_len);\n+\t\t\ttotal_len -= part_len;\n+\t\t\tif (total_len < 0) {\n+\t\t\t\tIPSEC_MB_LOG(ERR, \"Invalid part len\");\n+\t\t\t\treturn -EINVAL;\n+\t\t\t}\n+\t\t}\n+\n+\t\ttag = qp_data->temp_digest;\n+\t\tIMB_CHACHA20_POLY1305_DEC_FINALIZE(qp->mb_mgr,\n+\t\t\t\t\t&qp_data->chacha20_poly1305_ctx_data,\n+\t\t\t\t\ttag, session->gen_digest_length);\n+\t}\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * Process a completed chacha poly op\n+ *\n+ * @param qp\t\tQueue Pair to process\n+ * @param op\t\tCrypto operation\n+ * @param sess\t\tCrypto session\n+ *\n+ * @return\n+ * - void\n+ */\n+static void\n+post_process_chacha20_poly1305_crypto_op(struct ipsec_mb_qp *qp,\n+\t\tstruct rte_crypto_op *op,\n+\t\tstruct chacha20_poly1305_session *session)\n+{\n+\tstruct chacha20_poly1305_qp_data *qp_data =\n+\t\t\t\t\tipsec_mb_get_qp_private_data(qp);\n+\n+\top->status = RTE_CRYPTO_OP_STATUS_SUCCESS;\n+\t/* Verify digest if required */\n+\tif (session->op == IPSEC_MB_OP_AEAD_AUTHENTICATED_DECRYPT ||\n+\t\t\tsession->op == IPSEC_MB_OP_HASH_VERIFY_ONLY) {\n+\t\tuint8_t *digest = op->sym->aead.digest.data;\n+\t\tuint8_t *tag = qp_data->temp_digest;\n+\n+#ifdef RTE_LIBRTE_PMD_CHACHA20_POLY1305_DEBUG\n+\t\trte_hexdump(stdout, \"auth tag (orig):\",\n+\t\t\t\tdigest, session->req_digest_length);\n+\t\trte_hexdump(stdout, \"auth tag (calc):\",\n+\t\t\t\ttag, session->req_digest_length);\n+#endif\n+\t\tif (memcmp(tag, digest,\tsession->req_digest_length) != 0)\n+\t\t\top->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;\n+\n+\t}\n+\n+}\n+\n+/**\n+ * Process a completed Chacha20_poly1305 request\n+ *\n+ * @param qp\t\tQueue Pair to process\n+ * @param op\t\tCrypto operation\n+ * @param sess\t\tCrypto session\n+ *\n+ * @return\n+ * - void\n+ */\n+static void\n+handle_completed_chacha20_poly1305_crypto_op(struct ipsec_mb_qp *qp,\n+\t\tstruct rte_crypto_op *op,\n+\t\tstruct chacha20_poly1305_session *sess)\n+{\n+\tpost_process_chacha20_poly1305_crypto_op(qp, op, sess);\n+\n+\t/* Free session if a session-less crypto op */\n+\tif (op->sess_type == RTE_CRYPTO_OP_SESSIONLESS) {\n+\t\tmemset(sess, 0, sizeof(struct chacha20_poly1305_session));\n+\t\tmemset(op->sym->session, 0,\n+\t\t\trte_cryptodev_sym_get_existing_header_session_size(\n+\t\t\t\top->sym->session));\n+\t\trte_mempool_put(qp->sess_mp_priv, sess);\n+\t\trte_mempool_put(qp->sess_mp, op->sym->session);\n+\t\top->sym->session = NULL;\n+\t}\n+}\n+\n+static uint16_t\n+chacha20_poly1305_pmd_dequeue_burst(void *queue_pair,\n+\t\tstruct rte_crypto_op **ops, uint16_t nb_ops)\n+{\n+\tstruct chacha20_poly1305_session *sess;\n+\tstruct ipsec_mb_qp *qp = queue_pair;\n+\n+\tint retval = 0;\n+\tunsigned int i = 0, nb_dequeued;\n+\n+\tnb_dequeued = rte_ring_dequeue_burst(qp->ingress_queue,\n+\t\t\t(void **)ops, nb_ops, NULL);\n+\n+\tfor (i = 0; i < nb_dequeued; i++) {\n+\n+\t\tsess = ipsec_mb_get_session_private(qp, ops[i]);\n+\t\tif (unlikely(sess == NULL)) {\n+\t\t\tops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;\n+\t\t\tqp->stats.dequeue_err_count++;\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\tretval = chacha20_poly1305_crypto_op(qp, ops[i], sess);\n+\t\tif (retval < 0) {\n+\t\t\tops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;\n+\t\t\tqp->stats.dequeue_err_count++;\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\thandle_completed_chacha20_poly1305_crypto_op(qp, ops[i], sess);\n+\t}\n+\n+\tqp->stats.dequeued_count += i;\n+\n+\treturn i;\n+}\n+\n+struct rte_cryptodev_ops chacha20_poly1305_pmd_ops = {\n+\t.dev_configure = ipsec_mb_pmd_config,\n+\t.dev_start = ipsec_mb_pmd_start,\n+\t.dev_stop = ipsec_mb_pmd_stop,\n+\t.dev_close = ipsec_mb_pmd_close,\n+\n+\t.stats_get = ipsec_mb_pmd_stats_get,\n+\t.stats_reset = ipsec_mb_pmd_stats_reset,\n+\n+\t.dev_infos_get = ipsec_mb_pmd_info_get,\n+\n+\t.queue_pair_setup = ipsec_mb_pmd_qp_setup,\n+\t.queue_pair_release = ipsec_mb_pmd_qp_release,\n+\n+\t.sym_session_get_size = ipsec_mb_pmd_sym_session_get_size,\n+\t.sym_session_configure = ipsec_mb_pmd_sym_session_configure,\n+\t.sym_session_clear = ipsec_mb_pmd_sym_session_clear\n+};\n+\n+struct rte_cryptodev_ops *rte_chacha20_poly1305_pmd_ops =\n+\t\t\t\t\t\t&chacha20_poly1305_pmd_ops;\n+\n+static int\n+cryptodev_chacha20_poly1305_probe(struct rte_vdev_device *vdev)\n+{\n+\treturn cryptodev_ipsec_mb_create(vdev,\n+\t\t\tIPSEC_MB_PMD_TYPE_CHACHA20_POLY1305);\n+}\n+\n+static struct rte_vdev_driver cryptodev_chacha20_poly1305_pmd_drv = {\n+\t.probe = cryptodev_chacha20_poly1305_probe,\n+\t.remove = cryptodev_ipsec_mb_remove\n+};\n+\n+static struct cryptodev_driver chacha20_poly1305_crypto_drv;\n+\n+RTE_PMD_REGISTER_VDEV(CRYPTODEV_NAME_CHACHA20_POLY1305_PMD,\n+\t\t\t\t\tcryptodev_chacha20_poly1305_pmd_drv);\n+RTE_PMD_REGISTER_ALIAS(CRYPTODEV_NAME_CHACHA20_POLY1305_PMD,\n+\t\t\t\t\tcryptodev_chacha20_poly1305_pmd);\n+RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_CHACHA20_POLY1305_PMD,\n+\t\t\t \"max_nb_queue_pairs=<int> socket_id=<int>\");\n+RTE_PMD_REGISTER_CRYPTO_DRIVER(chacha20_poly1305_crypto_drv,\n+\t\t\t\tcryptodev_chacha20_poly1305_pmd_drv.driver,\n+\t\t\t\tpmd_driver_id_chacha20_poly1305);\n+\n+/* Constructor function to register chacha20_poly1305 PMD */\n+RTE_INIT(ipsec_mb_register_chacha20_poly1305)\n+{\n+\tstruct ipsec_mb_pmd_data *chacha_poly_data\n+\t\t= &ipsec_mb_pmds[IPSEC_MB_PMD_TYPE_CHACHA20_POLY1305];\n+\n+\tchacha_poly_data->caps = chacha20_poly1305_capabilities;\n+\tchacha_poly_data->dequeue_burst = chacha20_poly1305_pmd_dequeue_burst;\n+\tchacha_poly_data->feature_flags =\n+\t\tRTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |\n+\t\tRTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |\n+\t\tRTE_CRYPTODEV_FF_IN_PLACE_SGL |\n+\t\tRTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |\n+\t\tRTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT |\n+\t\tRTE_CRYPTODEV_FF_SYM_CPU_CRYPTO |\n+\t\tRTE_CRYPTODEV_FF_SYM_SESSIONLESS;\n+\tchacha_poly_data->internals_priv_size = 0;\n+\tchacha_poly_data->ops = &chacha20_poly1305_pmd_ops;\n+\tchacha_poly_data->qp_priv_size =\n+\t\t\tsizeof(struct chacha20_poly1305_qp_data);\n+\tchacha_poly_data->session_configure =\n+\t\t\tchacha20_poly1305_session_configure;\n+\tchacha_poly_data->session_priv_size =\n+\t\t\tsizeof(struct chacha20_poly1305_session);\n+}\ndiff --git a/drivers/crypto/ipsec_mb/rte_ipsec_mb_pmd_private.h b/drivers/crypto/ipsec_mb/rte_ipsec_mb_pmd_private.h\nindex b6a98a85ba..db36584f3a 100644\n--- a/drivers/crypto/ipsec_mb/rte_ipsec_mb_pmd_private.h\n+++ b/drivers/crypto/ipsec_mb/rte_ipsec_mb_pmd_private.h\n@@ -49,6 +49,9 @@ extern RTE_DEFINE_PER_LCORE(IMB_MGR *, mb_mgr);\n #define CRYPTODEV_NAME_ZUC_PMD crypto_zuc\n /**< IPSEC Multi buffer PMD zuc device name */\n \n+#define CRYPTODEV_NAME_CHACHA20_POLY1305_PMD crypto_chacha20_poly1305\n+/**< IPSEC Multi buffer PMD chacha20_poly1305 device name */\n+\n /** PMD LOGTYPE DRIVER, common to all PMDs */\n extern int ipsec_mb_logtype_driver;\n #define IPSEC_MB_LOG(level, fmt, ...) \\\n@@ -62,6 +65,7 @@ enum ipsec_mb_pmd_types {\n \tIPSEC_MB_PMD_TYPE_KASUMI,\n \tIPSEC_MB_PMD_TYPE_SNOW3G,\n \tIPSEC_MB_PMD_TYPE_ZUC,\n+\tIPSEC_MB_PMD_TYPE_CHACHA20_POLY1305,\n \tIPSEC_MB_N_PMD_TYPES\n };\n \n@@ -85,6 +89,7 @@ extern uint8_t pmd_driver_id_aesni_gcm;\n extern uint8_t pmd_driver_id_kasumi;\n extern uint8_t pmd_driver_id_snow3g;\n extern uint8_t pmd_driver_id_zuc;\n+extern uint8_t pmd_driver_id_chacha20_poly1305;\n \n /** Helper function. Gets driver ID based on PMD type */\n static __rte_always_inline uint8_t\n@@ -101,6 +106,8 @@ ipsec_mb_get_driver_id(enum ipsec_mb_pmd_types pmd_type)\n \t\treturn pmd_driver_id_snow3g;\n \tcase IPSEC_MB_PMD_TYPE_ZUC:\n \t\treturn pmd_driver_id_zuc;\n+\tcase IPSEC_MB_PMD_TYPE_CHACHA20_POLY1305:\n+\t\treturn pmd_driver_id_chacha20_poly1305;\n \tdefault:\n \t\tbreak;\n \t}\n", "prefixes": [ "v3", "09/10" ] }