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{
    "id": 80856,
    "url": "http://patches.dpdk.org/api/covers/80856/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/cover/20201015103814.253636-1-ciara.power@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20201015103814.253636-1-ciara.power@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20201015103814.253636-1-ciara.power@intel.com",
    "date": "2020-10-15T10:37:56",
    "name": "[v6,00/18] add max SIMD bitwidth to EAL",
    "submitter": {
        "id": 978,
        "url": "http://patches.dpdk.org/api/people/978/?format=api",
        "name": "Power, Ciara",
        "email": "ciara.power@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/cover/20201015103814.253636-1-ciara.power@intel.com/mbox/",
    "series": [
        {
            "id": 13000,
            "url": "http://patches.dpdk.org/api/series/13000/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13000",
            "date": "2020-10-15T10:37:56",
            "name": "add max SIMD bitwidth to EAL",
            "version": 6,
            "mbox": "http://patches.dpdk.org/series/13000/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/covers/80856/comments/",
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 64973A04DB;\n\tThu, 15 Oct 2020 12:38:25 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 42EAB1DE93;\n\tThu, 15 Oct 2020 12:38:24 +0200 (CEST)",
            "from mga06.intel.com (mga06.intel.com [134.134.136.31])\n by dpdk.org (Postfix) with ESMTP id 17A9E1DDE5\n for <dev@dpdk.org>; Thu, 15 Oct 2020 12:38:22 +0200 (CEST)",
            "from fmsmga006.fm.intel.com ([10.253.24.20])\n by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 15 Oct 2020 03:38:18 -0700",
            "from silpixa00400355.ir.intel.com (HELO\n silpixa00400355.ger.corp.intel.com) ([10.237.222.239])\n by fmsmga006.fm.intel.com with ESMTP; 15 Oct 2020 03:38:16 -0700"
        ],
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        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "Ciara Power <ciara.power@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "viktorin@rehivetech.com, ruifeng.wang@arm.com, jerinj@marvell.com,\n drc@linux.vnet.ibm.com, bruce.richardson@intel.com,\n konstantin.ananyev@intel.com, Ciara Power <ciara.power@intel.com>",
        "Date": "Thu, 15 Oct 2020 11:37:56 +0100",
        "Message-Id": "<20201015103814.253636-1-ciara.power@intel.com>",
        "X-Mailer": "git-send-email 2.22.0",
        "In-Reply-To": "<20200807155859.63888-1-ciara.power@intel.com>",
        "References": "<20200807155859.63888-1-ciara.power@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH v6 00/18] add max SIMD bitwidth to EAL",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "A number of components in DPDK have optional AVX-512 or other vector\ncode paths which can be selected at runtime. Rather than having each\ncomponent provide its own mechanism to select a code path, this patchset\nadds support for a single setting to control what code paths are used.\nThis can be used to enable some non-default code paths e.g. ones using\nAVX-512, but also to limit the code paths to certain vector widths, or\nto scalar code only, which is useful for testing.\n\nThe max SIMD bitwidth setting can be set by the app itself through use of\nthe available API, or can be overriden by a commandline argument passed by\nthe user.\n\nv6:\n  - Rebased on main.\n  - Added ACL patch based on recent changes to the library.\n  - Modified net library patch based on recent rework.\n  - Fixed comments on the v5.\nv5: Fixed cc list.\nv4:\n  - Dropped LPM patch as the lookupx4 function is called from SSE/NEON headers,\n    so is already on a vectorised path. Given the performance impact for an\n    unnecessary change, it was decided the check is not needed.\n  - Renamed enum values for readability.\n  - Added patch to add check for node library.\n  - Reworked net patch to choose default handlers rather than scalar by default.\n  - Updated some Doxygen comments.\n  - Fixed some other small comments on v3.\nv3:\n  - Added patch to add check for LPM lib\n  - Modified default max bitwidth for Arm to disable max SIMD bitwidth,\n    which will allow for SVE.\n  - Added \"0\" as an acceptable value for command-line flag, which internally\n    is used as UINT16_MAX to essentially disable max SIMD bitwidth limits.\n  - Made suggested changes to net lib patch.\n  - Rebased onto main.\nv2:\n  - Added some documentation.\n  - Modified default max bitwidth for Arm.\n  - Moved mlx5 condition check into existing check vec support function.\n  - Added max SIMD bitwidth checks to some libraries.\n\nCiara Power (18):\n  eal: add max SIMD bitwidth\n  doc: add detail on using max SIMD bitwidth\n  net/i40e: add checks for max SIMD bitwidth\n  net/axgbe: add checks for max SIMD bitwidth\n  net/bnxt: add checks for max SIMD bitwidth\n  net/enic: add checks for max SIMD bitwidth\n  net/fm10k: add checks for max SIMD bitwidth\n  net/iavf: add checks for max SIMD bitwidth\n  net/ice: add checks for max SIMD bitwidth\n  net/ixgbe: add checks for max SIMD bitwidth\n  net/mlx5: add checks for max SIMD bitwidth\n  net/virtio: add checks for max SIMD bitwidth\n  distributor: add checks for max SIMD bitwidth\n  member: add checks for max SIMD bitwidth\n  efd: add checks for max SIMD bitwidth\n  net: add checks for max SIMD bitwidth\n  node: choose vector path at runtime\n  acl: add checks for max SIMD bitwidth\n\n doc/guides/howto/avx512.rst                   |  36 ++++++\n doc/guides/howto/index.rst                    |   1 +\n doc/guides/linux_gsg/eal_args.include.rst     |  16 +++\n .../prog_guide/env_abstraction_layer.rst      |  32 +++++\n drivers/net/axgbe/axgbe_rxtx.c                |   3 +-\n drivers/net/bnxt/bnxt_ethdev.c                |   6 +-\n drivers/net/enic/enic_rxtx_vec_avx2.c         |   3 +-\n drivers/net/fm10k/fm10k_ethdev.c              |  11 +-\n drivers/net/i40e/i40e_rxtx.c                  |  18 ++-\n drivers/net/iavf/iavf_rxtx.c                  |  16 ++-\n drivers/net/ice/ice_rxtx.c                    |  20 ++-\n drivers/net/ixgbe/ixgbe_rxtx.c                |   5 +-\n drivers/net/mlx5/mlx5_rxtx_vec.c              |   2 +\n drivers/net/virtio/virtio_ethdev.c            |   9 +-\n lib/librte_acl/rte_acl.c                      |  27 +++-\n lib/librte_distributor/rte_distributor.c      |   3 +-\n lib/librte_eal/arm/include/rte_vect.h         |   2 +\n lib/librte_eal/common/eal_common_options.c    |  66 ++++++++++\n lib/librte_eal/common/eal_internal_cfg.h      |   8 ++\n lib/librte_eal/common/eal_options.h           |   2 +\n lib/librte_eal/include/rte_eal.h              |  40 ++++++\n lib/librte_eal/ppc/include/rte_vect.h         |   2 +\n lib/librte_eal/rte_eal_exports.def            |   2 +\n lib/librte_eal/rte_eal_version.map            |   2 +\n lib/librte_eal/x86/include/rte_vect.h         |   2 +\n lib/librte_efd/rte_efd.c                      |   7 +-\n lib/librte_member/rte_member_ht.c             |   3 +-\n lib/librte_net/rte_net_crc.c                  | 117 +++++++++++++-----\n lib/librte_node/ip4_lookup.c                  |  14 ++-\n lib/librte_node/ip4_lookup_neon.h             |   2 +-\n lib/librte_node/ip4_lookup_sse.h              |   2 +-\n 31 files changed, 404 insertions(+), 75 deletions(-)\n create mode 100644 doc/guides/howto/avx512.rst"
}