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{
    "id": 112301,
    "url": "http://patches.dpdk.org/api/covers/112301/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/cover/20220603124821.1148119-1-spiked@nvidia.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20220603124821.1148119-1-spiked@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20220603124821.1148119-1-spiked@nvidia.com",
    "date": "2022-06-03T12:48:14",
    "name": "[v4,0/7] introduce per-queue fill threshold and host shaper",
    "submitter": {
        "id": 2637,
        "url": "http://patches.dpdk.org/api/people/2637/?format=api",
        "name": "Spike Du",
        "email": "spiked@nvidia.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/cover/20220603124821.1148119-1-spiked@nvidia.com/mbox/",
    "series": [
        {
            "id": 23319,
            "url": "http://patches.dpdk.org/api/series/23319/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=23319",
            "date": "2022-06-03T12:48:14",
            "name": "introduce per-queue fill threshold and host shaper",
            "version": 4,
            "mbox": "http://patches.dpdk.org/series/23319/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/covers/112301/comments/",
    "headers": {
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        ],
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        "From": "Spike Du <spiked@nvidia.com>",
        "To": "<matan@nvidia.com>, <viacheslavo@nvidia.com>, <orika@nvidia.com>,\n <thomas@monjalon.net>",
        "CC": "<andrew.rybchenko@oktetlabs.ru>, <stephen@networkplumber.org>,\n <mb@smartsharesystems.com>, <dev@dpdk.org>, <rasland@nvidia.com>",
        "Subject": "[PATCH v4 0/7] introduce per-queue fill threshold and host shaper",
        "Date": "Fri, 3 Jun 2022 15:48:14 +0300",
        "Message-ID": "<20220603124821.1148119-1-spiked@nvidia.com>",
        "X-Mailer": "git-send-email 2.27.0",
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        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
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    },
    "content": "Fill threshold is per RX queue attribute, when RX queue fullness reach the fill threshold limit, HW sends an event to application.\nHost shaper can configure shaper rate and fill_thresh-triggered for a host port.\nThe shaper limits the rate of traffic from host port to embedded ARM rx port on Nvidia BlueField 2 NIC.\nIf fill_thresh-triggered is enabled, a 100Mbps shaper is enabled automatically when one of the host port's Rx queues receives fill threshold event.\n\nThese two features can combine to control traffic from host port to wire port for BlueField 2 NIC.\nThe traffic flows from host to embedded ARM, then to the physical port.\nThe work flow is on the ARM system, configure fill threshold to RX queue and enable fill_thresh-triggered flag in host shaper, after receiving fill threshold event, delay a while until RX queue is empty , then disable the shaper. We recycle this work flow to reduce RX queue drops on ARM system.\n\nAdd new libethdev API to set fill threshold, add rte event RTE_ETH_EVENT_RX_FILL_THRESH to handle fill threshold event. For host shaper, because it doesn't align to existing DPDK framework and is specific to Nvidia NIC, use PMD private API.\n\nFor integration with testpmd, put the private cmdline function and fill threshold event handler in mlx5 PMD directory by adding a new file mlx5_testpmd.c. Follow David Marchand's driver specific commands framework to add mlx5 specific commands.\n\nSpike Du (7):\n  net/mlx5: add LWM support for Rxq\n  common/mlx5: share interrupt management\n  ethdev: introduce Rx queue based fill threshold\n  net/mlx5: add LWM event handling support\n  net/mlx5: support Rx queue based fill threshold\n  net/mlx5: add private API to config host port shaper\n  app/testpmd: add Host Shaper command\n\n app/test-pmd/cmdline.c                       |  68 +++++++\n app/test-pmd/config.c                        |  21 ++\n app/test-pmd/testpmd.c                       |  24 +++\n app/test-pmd/testpmd.h                       |   2 +\n doc/guides/nics/mlx5.rst                     |  93 +++++++++\n doc/guides/rel_notes/release_22_07.rst       |   2 +\n drivers/common/mlx5/linux/meson.build        |  13 ++\n drivers/common/mlx5/linux/mlx5_common_os.c   | 131 ++++++++++++\n drivers/common/mlx5/linux/mlx5_common_os.h   |  11 +\n drivers/common/mlx5/mlx5_prm.h               |  26 +++\n drivers/common/mlx5/version.map              |   2 +\n drivers/common/mlx5/windows/mlx5_common_os.h |  24 +++\n drivers/net/mlx5/linux/mlx5_ethdev_os.c      |  71 -------\n drivers/net/mlx5/linux/mlx5_os.c             | 132 +++---------\n drivers/net/mlx5/linux/mlx5_socket.c         |  53 +----\n drivers/net/mlx5/meson.build                 |   4 +\n drivers/net/mlx5/mlx5.c                      |  68 +++++++\n drivers/net/mlx5/mlx5.h                      |  12 +-\n drivers/net/mlx5/mlx5_devx.c                 |  60 +++++-\n drivers/net/mlx5/mlx5_devx.h                 |   1 +\n drivers/net/mlx5/mlx5_rx.c                   | 292 +++++++++++++++++++++++++++\n drivers/net/mlx5/mlx5_rx.h                   |  13 ++\n drivers/net/mlx5/mlx5_testpmd.c              | 201 ++++++++++++++++++\n drivers/net/mlx5/mlx5_testpmd.h              |  26 +++\n drivers/net/mlx5/mlx5_txpp.c                 |  28 +--\n drivers/net/mlx5/rte_pmd_mlx5.h              |  30 +++\n drivers/net/mlx5/version.map                 |   2 +\n drivers/net/mlx5/windows/mlx5_ethdev_os.c    |  22 --\n drivers/vdpa/mlx5/mlx5_vdpa_virtq.c          |  48 +----\n lib/ethdev/ethdev_driver.h                   |  22 ++\n lib/ethdev/rte_ethdev.c                      |  52 +++++\n lib/ethdev/rte_ethdev.h                      |  72 +++++++\n lib/ethdev/version.map                       |   2 +\n 33 files changed, 1320 insertions(+), 308 deletions(-)\n create mode 100644 drivers/net/mlx5/mlx5_testpmd.c\n create mode 100644 drivers/net/mlx5/mlx5_testpmd.h"
}