From patchwork Mon May 11 10:02:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dekel Peled X-Patchwork-Id: 70064 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B9BCDA0350; Mon, 11 May 2020 12:04:13 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9E1781C20D; Mon, 11 May 2020 12:04:13 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 85FC01C1F9 for ; Mon, 11 May 2020 12:04:11 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from dekelp@mellanox.com) with ESMTPS (AES256-SHA encrypted); 11 May 2020 13:04:08 +0300 Received: from mtl-vdi-280.wap.labs.mlnx. (mtl-vdi-280.wap.labs.mlnx [10.228.134.250]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 04BA48J3017265; Mon, 11 May 2020 13:04:08 +0300 From: Dekel Peled To: matan@mellanox.com, viacheslavo@mellanox.com, rasland@mellanox.com Cc: dev@dpdk.org, stable@dpdk.org Date: Mon, 11 May 2020 13:02:45 +0300 Message-Id: <7a382de5e9be260f7cadb07fd5396f48615ea911.1589191348.git.dekelp@mellanox.com> X-Mailer: git-send-email 1.7.1 Subject: [dpdk-dev] [PATCH] common/mlx5: fix umem buffer alignment X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The value MLX5_WQE_BUF_ALIGNMENT is defined as 512. In some cases this alignment size is not adequate, which results in memory registration that is not accepted by FW. The result error can be "page_offset is not aligned to page_size/64, bad umem_offset" (syndrome 0x357275). This patch updates the definition to match the running system. Fixes: 18a68e046b51 ("net/mlx5: fix DevX Rx queue memory alignment") Cc: stable@dpdk.org Signed-off-by: Dekel Peled Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_prm.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index 4ab1c75..b39a141 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -16,6 +16,8 @@ #pragma GCC diagnostic error "-Wpedantic" #endif +#include + #include #include @@ -251,7 +253,7 @@ #define MLX5_MAX_LOG_RQ_SEGS 5u /* The alignment needed for WQ buffer. */ -#define MLX5_WQE_BUF_ALIGNMENT 512 +#define MLX5_WQE_BUF_ALIGNMENT sysconf(_SC_PAGESIZE) /* Completion mode. */ enum mlx5_completion_mode {