From patchwork Tue May 5 03:09:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rasesh Mody X-Patchwork-Id: 69737 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 73EACA04AE; Tue, 5 May 2020 05:10:01 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 789171D5A0; Tue, 5 May 2020 05:09:59 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 485681D59C; Tue, 5 May 2020 05:09:57 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 04539uMW025209; Mon, 4 May 2020 20:09:56 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=pfpt0818; bh=kUByOLSCXtUW16naaqU+Wl7Sh/cLJXM1GUT46+muWds=; b=n8PeEctZzZx0GlV/DklvhPASmNtVly76bH0WYFKZ6/nzpXJBfacayLFEfBK2jE8CUB49 p4jzCx9Vybzp7Z4K+mKN7kr9v8LHHDypgzRs8CQHJk51ZxRRstCDCWIBaqkHHpKnwAG+ FJMjYsqIsKoOWRELrG3tuYqpHaTfD7j4FQI0FvsA+52h0E0N8kpWKmVNOExfZhejAz9T z9lTaA0YGEAwwDmM3WlxD2F430cO8NZBjQORY+YlpRgMY/6QRoNqKebaSaXX3P6DxdVG 7VSXOYg0PQyhzISB5r8lF91r+q2eQyQ0+S1EjgqjyEJ5U0GZokOmtNQDYhTFbLroPWe8 Zg== Received: from sc-exch04.marvell.com ([199.233.58.184]) by mx0a-0016f401.pphosted.com with ESMTP id 30s67qa82f-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 04 May 2020 20:09:56 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 4 May 2020 20:09:50 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 4 May 2020 20:09:50 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 4 May 2020 20:09:50 -0700 Received: from irv1user08.caveonetworks.com (unknown [10.104.116.105]) by maili.marvell.com (Postfix) with ESMTP id CB13D3F7040; Mon, 4 May 2020 20:09:49 -0700 (PDT) Received: (from rmody@localhost) by irv1user08.caveonetworks.com (8.14.4/8.14.4/Submit) id 04539nDY001141; Mon, 4 May 2020 20:09:49 -0700 X-Authentication-Warning: irv1user08.caveonetworks.com: rmody set sender to rmody@marvell.com using -f From: Rasesh Mody To: , , CC: Rasesh Mody , , , Igor Russkikh Date: Mon, 4 May 2020 20:09:42 -0700 Message-ID: <20200505030943.1091-1-rmody@marvell.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.676 definitions=2020-05-04_13:2020-05-04, 2020-05-04 signatures=0 Subject: [dpdk-dev] [PATCH 1/2] net/qede: fix assignment of Rx/Tx handlers X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Fix to assign dummy Rx/Tx handlers in dev_stop. For MTU set, assignment of the appropriate Rx/Tx handlers will be handled by dev_start/dev_stop. Fixes: 81f8804992c9 ("net/qede: enhance Rx CPU utilization") Fixes: 8de0c4201926 ("net/qede: fix odd number of queues usage in 100G mode") Cc: stable@dpdk.org Signed-off-by: Rasesh Mody Signed-off-by: Igor Russkikh --- drivers/net/qede/qede_ethdev.c | 33 ++++++++++++++++----------------- 1 file changed, 16 insertions(+), 17 deletions(-) diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c index e71fa1e6a..726daa3e3 100644 --- a/drivers/net/qede/qede_ethdev.c +++ b/drivers/net/qede/qede_ethdev.c @@ -320,13 +320,19 @@ qede_interrupt_handler(void *param) } static void -qede_assign_rxtx_handlers(struct rte_eth_dev *dev) +qede_assign_rxtx_handlers(struct rte_eth_dev *dev, bool is_dummy) { uint64_t tx_offloads = dev->data->dev_conf.txmode.offloads; struct qede_dev *qdev = dev->data->dev_private; struct ecore_dev *edev = &qdev->edev; bool use_tx_offload = false; + if (is_dummy) { + dev->rx_pkt_burst = qede_rxtx_pkts_dummy; + dev->tx_pkt_burst = qede_rxtx_pkts_dummy; + return; + } + if (ECORE_IS_CMT(edev)) { dev->rx_pkt_burst = qede_recv_pkts_cmt; dev->tx_pkt_burst = qede_xmit_pkts_cmt; @@ -1150,7 +1156,9 @@ static int qede_dev_start(struct rte_eth_dev *eth_dev) /* Start/resume traffic */ qede_fastpath_start(edev); - qede_assign_rxtx_handlers(eth_dev); + /* Assign I/O handlers */ + qede_assign_rxtx_handlers(eth_dev, false); + DP_INFO(edev, "Device started\n"); return 0; @@ -1166,6 +1174,11 @@ static void qede_dev_stop(struct rte_eth_dev *eth_dev) PMD_INIT_FUNC_TRACE(edev); + /* Replace I/O functions with dummy ones. It cannot + * be set to NULL because rte_eth_rx_burst() doesn't check for NULL. + */ + qede_assign_rxtx_handlers(eth_dev, true); + /* Disable vport */ if (qede_activate_vport(eth_dev, false)) return; @@ -2316,11 +2329,6 @@ static int qede_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) dev->data->min_rx_buf_size); return -EINVAL; } - /* Temporarily replace I/O functions with dummy ones. It cannot - * be set to NULL because rte_eth_rx_burst() doesn't check for NULL. - */ - dev->rx_pkt_burst = qede_rxtx_pkts_dummy; - dev->tx_pkt_burst = qede_rxtx_pkts_dummy; if (dev->data->dev_started) { dev->data->dev_started = 0; qede_dev_stop(dev); @@ -2359,15 +2367,6 @@ static int qede_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) /* update max frame size */ dev->data->dev_conf.rxmode.max_rx_pkt_len = max_rx_pkt_len; - /* Reassign back */ - qede_assign_rxtx_handlers(dev); - if (ECORE_IS_CMT(edev)) { - dev->rx_pkt_burst = qede_recv_pkts_cmt; - dev->tx_pkt_burst = qede_xmit_pkts_cmt; - } else { - dev->rx_pkt_burst = qede_recv_pkts; - dev->tx_pkt_burst = qede_xmit_pkts; - } return 0; } @@ -2570,7 +2569,7 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf) strncpy((char *)params.name, QEDE_PMD_VER_PREFIX, QEDE_PMD_DRV_VER_STR_SIZE); - qede_assign_rxtx_handlers(eth_dev); + qede_assign_rxtx_handlers(eth_dev, true); eth_dev->tx_pkt_prepare = qede_xmit_prep_pkts; /* For CMT mode device do periodic polling for slowpath events. From patchwork Tue May 5 03:09:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rasesh Mody X-Patchwork-Id: 69736 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5A07FA04AE; Tue, 5 May 2020 05:09:55 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3D2FB1D591; Tue, 5 May 2020 05:09:55 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 2C9501D57F for ; Tue, 5 May 2020 05:09:53 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 04534hk0020899; Mon, 4 May 2020 20:09:52 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0818; bh=vqqavqZAkjjb6mKWFWnUXXVUBZUOYjAWkQnbXwbsuqU=; b=rLUE0IF+U0wgNACRe97jfhzV8M8+EA9K/yP1pXPdhnhnNIvjKH9qOH+48UOQNKW3rXMx aEs6t2g1n70cyg5d3A+pTYBU7c7eiyyyRArWzR27YrxhgaFe1tYHXWQ5UC64HiQTakHf EWxLnuLg+I1vdMCn9lOBynux+BqRIHLqHCeWgyCgDQE941xCJ4+QF+QtKZAlwlmr9w0M ntQbsay29b8xbtOD+0dNdlNEQVBOdELesyBtSZ052cDWvtHRgO/ps7ax3MW3G7yHqHRJ 4ZalV7ebv31Ni4LlLyFVPCCSmEJtcNfEiHhL3EH/8fWeLCRk9bZBO5jpCigjj3KhyiwW EA== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0b-0016f401.pphosted.com with ESMTP id 30srykq0vm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 04 May 2020 20:09:52 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 4 May 2020 20:09:50 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 4 May 2020 20:09:50 -0700 Received: from irv1user08.caveonetworks.com (unknown [10.104.116.105]) by maili.marvell.com (Postfix) with ESMTP id 3EDA93F7041; Mon, 4 May 2020 20:09:50 -0700 (PDT) Received: (from rmody@localhost) by irv1user08.caveonetworks.com (8.14.4/8.14.4/Submit) id 04539ox3001143; Mon, 4 May 2020 20:09:50 -0700 X-Authentication-Warning: irv1user08.caveonetworks.com: rmody set sender to rmody@marvell.com using -f From: Rasesh Mody To: , , CC: Rasesh Mody , , "Igor Russkikh" Date: Mon, 4 May 2020 20:09:43 -0700 Message-ID: <20200505030943.1091-2-rmody@marvell.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200505030943.1091-1-rmody@marvell.com> References: <20200505030943.1091-1-rmody@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.676 definitions=2020-05-04_13:2020-05-04, 2020-05-04 signatures=0 Subject: [dpdk-dev] [PATCH 2/2] net/qede: restore Tx queue setup X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Some applications do not explicitly restore Tx queues setup during port re-configuration. This patch adds changes to check for released Tx queues and restore the setup if application doesn't explicitly does that. Signed-off-by: Rasesh Mody Signed-off-by: Igor Russkikh --- drivers/net/qede/qede_ethdev.h | 3 +++ drivers/net/qede/qede_rxtx.c | 25 ++++++++++++++++++++++++- 2 files changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/net/qede/qede_ethdev.h b/drivers/net/qede/qede_ethdev.h index b988a73f2..2e8e5febc 100644 --- a/drivers/net/qede/qede_ethdev.h +++ b/drivers/net/qede/qede_ethdev.h @@ -235,6 +235,9 @@ struct qede_dev { bool enable_lro; uint8_t num_rx_queues; uint8_t num_tx_queues; + uint16_t num_rx_desc; + uint16_t num_tx_desc; + const struct rte_eth_txconf *tx_conf; SLIST_HEAD(vlan_list_head, qede_vlan_entry)vlan_list_head; uint16_t configured_vlans; bool accept_any_vlan; diff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c index b81788ca4..1b212a4fb 100644 --- a/drivers/net/qede/qede_rxtx.c +++ b/drivers/net/qede/qede_rxtx.c @@ -151,6 +151,7 @@ qede_alloc_rx_queue_mem(struct rte_eth_dev *dev, rxq->qdev = qdev; rxq->mb_pool = mp; rxq->nb_rx_desc = nb_desc; + qdev->num_rx_desc = rxq->nb_rx_desc; rxq->queue_id = queue_idx; rxq->port_id = dev->data->port_id; @@ -405,6 +406,7 @@ qede_alloc_tx_queue_mem(struct rte_eth_dev *dev, } txq->nb_tx_desc = nb_desc; + qdev->num_tx_desc = txq->nb_tx_desc; txq->qdev = qdev; txq->port_id = dev->data->port_id; @@ -443,6 +445,7 @@ qede_alloc_tx_queue_mem(struct rte_eth_dev *dev, txq->nb_tx_avail = txq->nb_tx_desc; + qdev->tx_conf = tx_conf; txq->tx_free_thresh = tx_conf->tx_free_thresh ? tx_conf->tx_free_thresh : (txq->nb_tx_desc - QEDE_DEFAULT_TX_FREE_THRESH); @@ -593,7 +596,7 @@ qede_alloc_mem_sb(struct qede_dev *qdev, struct ecore_sb_info *sb_info, int qede_alloc_fp_resc(struct qede_dev *qdev) { - struct ecore_dev *edev = &qdev->edev; + struct ecore_dev *edev = QEDE_INIT_EDEV(qdev); struct qede_fastpath *fp; uint32_t num_sbs; uint16_t sb_idx; @@ -1005,9 +1008,29 @@ static int qede_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id) int qede_start_queues(struct rte_eth_dev *eth_dev) { struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev); + struct ecore_dev *edev = QEDE_INIT_EDEV(qdev); + struct qede_tx_queue *txq; + struct qede_fastpath *fp; uint8_t id; int rc = -1; + /* Restore setup of Tx queues */ + for (id = 0; id < qdev->num_tx_queues; id++) { + fp = &qdev->fp_array[id]; + txq = fp->txq; + + if (!txq) { + rc = qede_tx_queue_setup(eth_dev, id, qdev->num_tx_desc, + eth_dev->data->numa_node, + qdev->tx_conf); + if (rc != ECORE_SUCCESS) { + DP_ERR(edev, "TX queue %u not setup rc=%d\n", + id, rc); + return -1; + } + } + } + for (id = 0; id < qdev->num_rx_queues; id++) { rc = qede_rx_queue_start(eth_dev, id); if (rc != ECORE_SUCCESS)