From patchwork Tue Jan 14 08:28:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kiran Kumar Kokkilagadda X-Patchwork-Id: 64625 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 08AEEA04FD; Tue, 14 Jan 2020 10:08:50 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6ECBE1C230; Tue, 14 Jan 2020 10:08:49 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id E54131C1E8 for ; Tue, 14 Jan 2020 10:08:47 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 00E911Cu013521 for ; Tue, 14 Jan 2020 01:08:47 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0818; bh=JcXoyFiL5rnCB7uKIUJL+v5ISmsdHnlRBA/CoVeDm7s=; b=JXzYTeXPcFhcn/Qwc79lnyTDsJXYL0cmJWngZZN+y6PvWshez2CBo9z/JUomJm5Txir7 Wnt5uAqvb9rcFUNbbYwyouDGODLUPS/YoVZ5p3iw406bygXs/JrLjOptzKTEo/+a3dRs zD58OjnsFGgw95Gfq21CLTrHnvELvAaeqIgZ7ieob7fVwMgq1QCQjSEtgTmoqUI+r7CM L1Hs5lgAw1KFUy7R8EDoQm7gApZGHLkGg5UopJbPUYtXm42dnhEO148ozsVrvbrbKLgk ak0S196uDownC2DiIwJTodskESPVaSpv+u4oa9g3jQ5cl3j8hqdvzMrEFGGwudtgE389 SA== Received: from sc-exch04.marvell.com ([199.233.58.184]) by mx0b-0016f401.pphosted.com with ESMTP id 2xgng4uy7b-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 14 Jan 2020 01:08:47 -0800 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 14 Jan 2020 01:08:45 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 14 Jan 2020 01:08:45 -0800 Received: from localhost.localdomain (unknown [10.28.34.15]) by maili.marvell.com (Postfix) with ESMTP id CC5C73F7405; Tue, 14 Jan 2020 00:29:21 -0800 (PST) From: To: Jerin Jacob , Nithin Dabilpuram , Kiran Kumar K CC: Date: Tue, 14 Jan 2020 13:58:54 +0530 Message-ID: <20200114082854.13198-1-kirankumark@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200113042452.29013-1-kirankumark@marvell.com> References: <20200113042452.29013-1-kirankumark@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572 definitions=2020-01-14_02:2020-01-13, 2020-01-14 signatures=0 Subject: [dpdk-dev] [PATCH v2] net/octeontx2: add check for PTP and HIGIG2 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kiran Kumar K For octeontx2 we won't support both PTP and HIGIG2 together. Added a check to verify this. Signed-off-by: Kiran Kumar K --- V2 Changes: *Changed error message drivers/net/octeontx2/otx2_ethdev.c | 9 ++++++++- drivers/net/octeontx2/otx2_ptp.c | 5 +++++ 2 files changed, 13 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c index ed329273d..2e91a5ab7 100644 --- a/drivers/net/octeontx2/otx2_ethdev.c +++ b/drivers/net/octeontx2/otx2_ethdev.c @@ -18,7 +18,8 @@ nix_get_rx_offload_capa(struct otx2_eth_dev *dev) { uint64_t capa = NIX_RX_OFFLOAD_CAPA; - if (otx2_dev_is_vf(dev)) + if (otx2_dev_is_vf(dev) || + dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) capa &= ~DEV_RX_OFFLOAD_TIMESTAMP; return capa; @@ -1641,6 +1642,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev) goto fail_offloads; } + if (dev->ptp_en && + dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) { + otx2_err("Both PTP and switch header enabled"); + goto free_nix_lf; + } + rc = nix_lf_switch_header_type_enable(dev); if (rc) { otx2_err("Failed to enable switch type nix_lf rc=%d", rc); diff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c index f34b9339c..ae5a2b7cd 100644 --- a/drivers/net/octeontx2/otx2_ptp.c +++ b/drivers/net/octeontx2/otx2_ptp.c @@ -221,6 +221,11 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev) return -EINVAL; } + if (dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) { + otx2_err("Both PTP and switch header enabled"); + return -EINVAL; + } + /* Allocating a iova address for tx tstamp */ const struct rte_memzone *ts; ts = rte_eth_dma_zone_reserve(eth_dev, "otx2_ts",