From patchwork Mon Jan 6 03:38:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 64216 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 87D60A04F1; Mon, 6 Jan 2020 04:35:57 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 54A6F1D51E; Mon, 6 Jan 2020 04:35:50 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id A96371D37E for ; Mon, 6 Jan 2020 04:35:47 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jan 2020 19:35:46 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,401,1571727600"; d="scan'208";a="216726328" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by fmsmga007.fm.intel.com with ESMTP; 05 Jan 2020 19:35:45 -0800 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang , Jeb Cramer , Paul M Stillwell Jr Date: Mon, 6 Jan 2020 11:38:40 +0800 Message-Id: <20200106033851.43978-2-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200106033851.43978-1-qi.z.zhang@intel.com> References: <20191205123847.39579-1-qi.z.zhang@intel.com> <20200106033851.43978-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 01/12] net/ice/base: whitelist register for NVM access X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Allow tools to access register offset 0xB8188 (GLGEN_RSTAT) for NVMUpdate operations. This is a read-only register, so risk of other issues stemming from this change is low. Even so, update the write command to prevent and reject any commands which attempt to write to this register, just like we do for GL_HICR_EN. Signed-off-by: Jeb Cramer Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_nvm.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c index 1dbfc2dcc..2d92524f2 100644 --- a/drivers/net/ice/base/ice_nvm.c +++ b/drivers/net/ice/base/ice_nvm.c @@ -504,6 +504,7 @@ ice_validate_nvm_rw_reg(struct ice_nvm_access_cmd *cmd) case GL_FWSTS: case GL_MNG_FWSM: case GLGEN_CSR_DEBUG_C: + case GLGEN_RSTAT: case GLPCI_LBARCTRL: case GLNVM_GENS: case GLNVM_FLA: @@ -579,9 +580,14 @@ ice_nvm_access_write(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd, if (status) return status; - /* The HICR_EN register is read-only */ - if (cmd->offset == GL_HICR_EN) + /* Reject requests to write to read-only registers */ + switch (cmd->offset) { + case GL_HICR_EN: + case GLGEN_RSTAT: return ICE_ERR_OUT_OF_RANGE; + default: + break; + } ice_debug(hw, ICE_DBG_NVM, "NVM access: writing register %08x with value %08x\n", From patchwork Mon Jan 6 03:38:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 64217 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3E904A04F1; Mon, 6 Jan 2020 04:36:04 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 18B811D52E; Mon, 6 Jan 2020 04:35:52 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 7D1721D517 for ; Mon, 6 Jan 2020 04:35:48 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jan 2020 19:35:48 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,401,1571727600"; d="scan'208";a="216726332" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by fmsmga007.fm.intel.com with ESMTP; 05 Jan 2020 19:35:46 -0800 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang , Kiran Patil , Paul M Stillwell Jr Date: Mon, 6 Jan 2020 11:38:41 +0800 Message-Id: <20200106033851.43978-3-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200106033851.43978-1-qi.z.zhang@intel.com> References: <20191205123847.39579-1-qi.z.zhang@intel.com> <20200106033851.43978-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 02/12] net/ice/base: support MAC/VLAN with TCP/UDP in switch X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add a feature to allow user to add switch filter using input like MAC + VLAN (C-tag only) + L4 (TCP/UDP) port. API "ice_add_adv_rule" is extended to handle this filter type. Signed-off-by: Kiran Patil Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang Acked-by: Qiming Yang Signed-off-by: Kiran Patil Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_switch.c | 206 ++++++++++++++++++++++++++++++++++---- 1 file changed, 188 insertions(+), 18 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index afa4fe30d..f8f5fde3c 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -251,8 +251,8 @@ u8 dummy_udp_tun_udp_packet[] = { 0x00, 0x08, 0x00, 0x00, }; -static const -struct ice_dummy_pkt_offsets dummy_udp_packet_offsets[] = { +/* offset info for MAC + IPv4 + UDP dummy packet */ +static const struct ice_dummy_pkt_offsets dummy_udp_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_ETYPE_OL, 12 }, { ICE_IPV4_OFOS, 14 }, @@ -260,8 +260,8 @@ struct ice_dummy_pkt_offsets dummy_udp_packet_offsets[] = { { ICE_PROTOCOL_LAST, 0 }, }; -static const u8 -dummy_udp_packet[] = { +/* Dummy packet for MAC + IPv4 + UDP */ +static const u8 dummy_udp_packet[] = { 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -280,8 +280,40 @@ dummy_udp_packet[] = { 0x00, 0x00, /* 2 bytes for 4 byte alignment */ }; -static const -struct ice_dummy_pkt_offsets dummy_tcp_packet_offsets[] = { +/* offset info for MAC + VLAN + IPv4 + UDP dummy packet */ +static const struct ice_dummy_pkt_offsets dummy_vlan_udp_packet_offsets[] = { + { ICE_MAC_OFOS, 0 }, + { ICE_ETYPE_OL, 12 }, + { ICE_VLAN_OFOS, 14 }, + { ICE_IPV4_OFOS, 18 }, + { ICE_UDP_ILOS, 38 }, + { ICE_PROTOCOL_LAST, 0 }, +}; + +/* C-tag (801.1Q), IPv4:UDP dummy packet */ +static const u8 dummy_vlan_udp_packet[] = { + 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x81, 0x00, /* ICE_ETYPE_OL 12 */ + + 0x00, 0x00, 0x08, 0x00, /* ICE_VLAN_OFOS 14 */ + + 0x45, 0x00, 0x00, 0x1c, /* ICE_IPV4_OFOS 18 */ + 0x00, 0x01, 0x00, 0x00, + 0x00, 0x11, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 38 */ + 0x00, 0x08, 0x00, 0x00, + + 0x00, 0x00, /* 2 bytes for 4 byte alignment */ +}; + +/* offset info for MAC + IPv4 + TCP dummy packet */ +static const struct ice_dummy_pkt_offsets dummy_tcp_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_ETYPE_OL, 12 }, { ICE_IPV4_OFOS, 14 }, @@ -289,8 +321,8 @@ struct ice_dummy_pkt_offsets dummy_tcp_packet_offsets[] = { { ICE_PROTOCOL_LAST, 0 }, }; -static const u8 -dummy_tcp_packet[] = { +/* Dummy packet for MAC + IPv4 + TCP */ +static const u8 dummy_tcp_packet[] = { 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -312,8 +344,42 @@ dummy_tcp_packet[] = { 0x00, 0x00, /* 2 bytes for 4 byte alignment */ }; -static const -struct ice_dummy_pkt_offsets dummy_tcp_ipv6_packet_offsets[] = { +/* offset info for MAC + VLAN (C-tag, 802.1Q) + IPv4 + TCP dummy packet */ +static const struct ice_dummy_pkt_offsets dummy_vlan_tcp_packet_offsets[] = { + { ICE_MAC_OFOS, 0 }, + { ICE_ETYPE_OL, 12 }, + { ICE_VLAN_OFOS, 14 }, + { ICE_IPV4_OFOS, 18 }, + { ICE_TCP_IL, 38 }, + { ICE_PROTOCOL_LAST, 0 }, +}; + +/* C-tag (801.1Q), IPv4:TCP dummy packet */ +static const u8 dummy_vlan_tcp_packet[] = { + 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x81, 0x00, /* ICE_ETYPE_OL 12 */ + + 0x00, 0x00, 0x08, 0x00, /* ICE_VLAN_OFOS 14 */ + + 0x45, 0x00, 0x00, 0x28, /* ICE_IPV4_OFOS 18 */ + 0x00, 0x01, 0x00, 0x00, + 0x00, 0x06, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, 0x00, 0x00, /* ICE_TCP_IL 38 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x50, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, /* 2 bytes for 4 byte alignment */ +}; + +static const struct ice_dummy_pkt_offsets dummy_tcp_ipv6_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_ETYPE_OL, 12 }, { ICE_IPV6_OFOS, 14 }, @@ -349,8 +415,49 @@ dummy_tcp_ipv6_packet[] = { 0x00, 0x00, /* 2 bytes for 4 byte alignment */ }; -static const -struct ice_dummy_pkt_offsets dummy_udp_ipv6_packet_offsets[] = { +/* C-tag (802.1Q): IPv6 + TCP */ +static const struct ice_dummy_pkt_offsets +dummy_vlan_tcp_ipv6_packet_offsets[] = { + { ICE_MAC_OFOS, 0 }, + { ICE_ETYPE_OL, 12 }, + { ICE_VLAN_OFOS, 14 }, + { ICE_IPV6_OFOS, 18 }, + { ICE_TCP_IL, 58 }, + { ICE_PROTOCOL_LAST, 0 }, +}; + +/* C-tag (802.1Q), IPv6 + TCP dummy packet */ +static const u8 dummy_vlan_tcp_ipv6_packet[] = { + 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x81, 0x00, /* ICE_ETYPE_OL 12 */ + + 0x00, 0x00, 0x86, 0xDD, /* ICE_VLAN_OFOS 14 */ + + 0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 18 */ + 0x00, 0x14, 0x06, 0x00, /* Next header is TCP */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, 0x00, 0x00, /* ICE_TCP_IL 58 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x50, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, /* 2 bytes for 4 byte alignment */ +}; + +/* IPv6 + UDP */ +static const struct ice_dummy_pkt_offsets dummy_udp_ipv6_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_ETYPE_OL, 12 }, { ICE_IPV6_OFOS, 14 }, @@ -383,8 +490,45 @@ dummy_udp_ipv6_packet[] = { 0x00, 0x00, /* 2 bytes for 4 byte alignment */ }; -static const -struct ice_dummy_pkt_offsets dummy_udp_gtp_packet_offsets[] = { +/* C-tag (802.1Q): IPv6 + UDP */ +static const struct ice_dummy_pkt_offsets +dummy_vlan_udp_ipv6_packet_offsets[] = { + { ICE_MAC_OFOS, 0 }, + { ICE_ETYPE_OL, 12 }, + { ICE_VLAN_OFOS, 14 }, + { ICE_IPV6_OFOS, 18 }, + { ICE_UDP_ILOS, 58 }, + { ICE_PROTOCOL_LAST, 0 }, +}; + +/* C-tag (802.1Q), IPv6 + UDP dummy packet */ +static const u8 dummy_vlan_udp_ipv6_packet[] = { + 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x81, 0x00, /* ICE_ETYPE_OL 12 */ + + 0x00, 0x00, 0x86, 0xDD, /* ICE_VLAN_OFOS 14 */ + + 0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 18 */ + 0x00, 0x08, 0x11, 0x00, /* Next header UDP */ + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 58 */ + 0x00, 0x08, 0x00, 0x00, + + 0x00, 0x00, /* 2 bytes for 4 byte alignment */ +}; + +static const struct ice_dummy_pkt_offsets dummy_udp_gtp_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_IPV4_OFOS, 14 }, { ICE_UDP_OF, 34 }, @@ -5643,7 +5787,7 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, u16 *pkt_len, const struct ice_dummy_pkt_offsets **offsets) { - bool tcp = false, udp = false, ipv6 = false; + bool tcp = false, udp = false, ipv6 = false, vlan = false; u16 i; if (tun_type == ICE_SW_TUN_GTP) { @@ -5665,6 +5809,8 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, tcp = true; else if (lkups[i].type == ICE_IPV6_OFOS) ipv6 = true; + else if (lkups[i].type == ICE_VLAN_OFOS) + vlan = true; } if (tun_type == ICE_ALL_TUNNELS) { @@ -5704,25 +5850,49 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, } if (udp && !ipv6) { + if (vlan) { + *pkt = dummy_vlan_udp_packet; + *pkt_len = sizeof(dummy_vlan_udp_packet); + *offsets = dummy_vlan_udp_packet_offsets; + return; + } *pkt = dummy_udp_packet; *pkt_len = sizeof(dummy_udp_packet); *offsets = dummy_udp_packet_offsets; return; } else if (udp && ipv6) { + if (vlan) { + *pkt = dummy_vlan_udp_ipv6_packet; + *pkt_len = sizeof(dummy_vlan_udp_ipv6_packet); + *offsets = dummy_vlan_udp_ipv6_packet_offsets; + return; + } *pkt = dummy_udp_ipv6_packet; *pkt_len = sizeof(dummy_udp_ipv6_packet); *offsets = dummy_udp_ipv6_packet_offsets; return; } else if ((tcp && ipv6) || ipv6) { + if (vlan) { + *pkt = dummy_vlan_tcp_ipv6_packet; + *pkt_len = sizeof(dummy_vlan_tcp_ipv6_packet); + *offsets = dummy_vlan_tcp_ipv6_packet_offsets; + return; + } *pkt = dummy_tcp_ipv6_packet; *pkt_len = sizeof(dummy_tcp_ipv6_packet); *offsets = dummy_tcp_ipv6_packet_offsets; return; } - *pkt = dummy_tcp_packet; - *pkt_len = sizeof(dummy_tcp_packet); - *offsets = dummy_tcp_packet_offsets; + if (vlan) { + *pkt = dummy_vlan_tcp_packet; + *pkt_len = sizeof(dummy_vlan_tcp_packet); + *offsets = dummy_vlan_tcp_packet_offsets; + } else { + *pkt = dummy_tcp_packet; + *pkt_len = sizeof(dummy_tcp_packet); + *offsets = dummy_tcp_packet_offsets; + } } /** From patchwork Mon Jan 6 03:38:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 64218 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2C612A04F1; Mon, 6 Jan 2020 04:36:15 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 956461D539; Mon, 6 Jan 2020 04:35:53 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 2CC821D517 for ; Mon, 6 Jan 2020 04:35:50 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jan 2020 19:35:49 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,401,1571727600"; d="scan'208";a="216726336" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by fmsmga007.fm.intel.com with ESMTP; 05 Jan 2020 19:35:48 -0800 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang , Bruce Allan , Paul M Stillwell Jr Date: Mon, 6 Jan 2020 11:38:42 +0800 Message-Id: <20200106033851.43978-4-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200106033851.43978-1-qi.z.zhang@intel.com> References: <20191205123847.39579-1-qi.z.zhang@intel.com> <20200106033851.43978-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 03/12] net/ice/base: do not wait for PE unit to load X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When RDMA is not enabled, when checking for completion of a CORER or GLOBR do not wait for the PE unit to be loaded (indicated by GLNVM_ULD register's PE_DONE bit being set) since that does not happen and will cause issues such as failing to initialize the device. Signed-off-by: Bruce Allan Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_common.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 4ba3ab202..319b00f75 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -645,7 +645,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) ice_clear_pxe_mode(hw); - status = ice_get_caps(hw); if (status) goto err_unroll_cqinit; @@ -666,7 +665,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) goto err_unroll_alloc; hw->evb_veb = true; - /* Query the allocated resources for Tx scheduler */ status = ice_sched_query_res_alloc(hw); if (status) { @@ -785,7 +783,7 @@ void ice_deinit_hw(struct ice_hw *hw) */ enum ice_status ice_check_reset(struct ice_hw *hw) { - u32 cnt, reg = 0, grst_delay; + u32 cnt, reg = 0, grst_delay, uld_mask; /* Poll for Device Active state in case a recent CORER, GLOBR, * or EMPR has occurred. The grst delay value is in 100ms units. @@ -807,13 +805,20 @@ enum ice_status ice_check_reset(struct ice_hw *hw) return ICE_ERR_RESET_FAILED; } -#define ICE_RESET_DONE_MASK (GLNVM_ULD_CORER_DONE_M | \ - GLNVM_ULD_GLOBR_DONE_M) +#define ICE_RESET_DONE_MASK (GLNVM_ULD_PCIER_DONE_M |\ + GLNVM_ULD_PCIER_DONE_1_M |\ + GLNVM_ULD_CORER_DONE_M |\ + GLNVM_ULD_GLOBR_DONE_M |\ + GLNVM_ULD_POR_DONE_M |\ + GLNVM_ULD_POR_DONE_1_M |\ + GLNVM_ULD_PCIER_DONE_2_M) + + uld_mask = ICE_RESET_DONE_MASK; /* Device is Active; check Global Reset processes are done */ for (cnt = 0; cnt < ICE_PF_RESET_WAIT_COUNT; cnt++) { - reg = rd32(hw, GLNVM_ULD) & ICE_RESET_DONE_MASK; - if (reg == ICE_RESET_DONE_MASK) { + reg = rd32(hw, GLNVM_ULD) & uld_mask; + if (reg == uld_mask) { ice_debug(hw, ICE_DBG_INIT, "Global reset processes done. %d\n", cnt); break; From patchwork Mon Jan 6 03:38:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 64219 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id ECA0FA04F1; Mon, 6 Jan 2020 04:36:23 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E1E581D541; Mon, 6 Jan 2020 04:35:54 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 6E6F01D52B for ; Mon, 6 Jan 2020 04:35:51 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jan 2020 19:35:50 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,401,1571727600"; d="scan'208";a="216726342" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by fmsmga007.fm.intel.com with ESMTP; 05 Jan 2020 19:35:49 -0800 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang , Bruce Allan , Paul M Stillwell Jr Date: Mon, 6 Jan 2020 11:38:43 +0800 Message-Id: <20200106033851.43978-5-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200106033851.43978-1-qi.z.zhang@intel.com> References: <20191205123847.39579-1-qi.z.zhang@intel.com> <20200106033851.43978-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 04/12] net/ice/base: cleanup format of static const declarations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Use a format consistent with the rest of the code. Signed-off-by: Bruce Allan Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_switch.c | 40 ++++++++++++++------------------------- 1 file changed, 14 insertions(+), 26 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index f8f5fde3c..3ed84ca01 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -57,8 +57,7 @@ struct ice_dummy_pkt_offsets { u16 offset; /* ICE_PROTOCOL_LAST indicates end of list */ }; -static const -struct ice_dummy_pkt_offsets dummy_gre_tcp_packet_offsets[] = { +static const struct ice_dummy_pkt_offsets dummy_gre_tcp_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_ETYPE_OL, 12 }, { ICE_IPV4_OFOS, 14 }, @@ -69,8 +68,7 @@ struct ice_dummy_pkt_offsets dummy_gre_tcp_packet_offsets[] = { { ICE_PROTOCOL_LAST, 0 }, }; -static const -u8 dummy_gre_tcp_packet[] = { +static const u8 dummy_gre_tcp_packet[] = { 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -104,8 +102,7 @@ u8 dummy_gre_tcp_packet[] = { 0x00, 0x00, 0x00, 0x00 }; -static const -struct ice_dummy_pkt_offsets dummy_gre_udp_packet_offsets[] = { +static const struct ice_dummy_pkt_offsets dummy_gre_udp_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_ETYPE_OL, 12 }, { ICE_IPV4_OFOS, 14 }, @@ -116,8 +113,7 @@ struct ice_dummy_pkt_offsets dummy_gre_udp_packet_offsets[] = { { ICE_PROTOCOL_LAST, 0 }, }; -static const -u8 dummy_gre_udp_packet[] = { +static const u8 dummy_gre_udp_packet[] = { 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -148,8 +144,7 @@ u8 dummy_gre_udp_packet[] = { 0x00, 0x08, 0x00, 0x00, }; -static const -struct ice_dummy_pkt_offsets dummy_udp_tun_tcp_packet_offsets[] = { +static const struct ice_dummy_pkt_offsets dummy_udp_tun_tcp_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_ETYPE_OL, 12 }, { ICE_IPV4_OFOS, 14 }, @@ -163,8 +158,7 @@ struct ice_dummy_pkt_offsets dummy_udp_tun_tcp_packet_offsets[] = { { ICE_PROTOCOL_LAST, 0 }, }; -static const -u8 dummy_udp_tun_tcp_packet[] = { +static const u8 dummy_udp_tun_tcp_packet[] = { 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -201,8 +195,7 @@ u8 dummy_udp_tun_tcp_packet[] = { 0x00, 0x00, 0x00, 0x00 }; -static const -struct ice_dummy_pkt_offsets dummy_udp_tun_udp_packet_offsets[] = { +static const struct ice_dummy_pkt_offsets dummy_udp_tun_udp_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_ETYPE_OL, 12 }, { ICE_IPV4_OFOS, 14 }, @@ -216,8 +209,7 @@ struct ice_dummy_pkt_offsets dummy_udp_tun_udp_packet_offsets[] = { { ICE_PROTOCOL_LAST, 0 }, }; -static const -u8 dummy_udp_tun_udp_packet[] = { +static const u8 dummy_udp_tun_udp_packet[] = { 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -387,8 +379,7 @@ static const struct ice_dummy_pkt_offsets dummy_tcp_ipv6_packet_offsets[] = { { ICE_PROTOCOL_LAST, 0 }, }; -static const u8 -dummy_tcp_ipv6_packet[] = { +static const u8 dummy_tcp_ipv6_packet[] = { 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -465,8 +456,8 @@ static const struct ice_dummy_pkt_offsets dummy_udp_ipv6_packet_offsets[] = { { ICE_PROTOCOL_LAST, 0 }, }; -static const u8 -dummy_udp_ipv6_packet[] = { +/* IPv6 + UDP dummy packet */ +static const u8 dummy_udp_ipv6_packet[] = { 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -536,8 +527,7 @@ static const struct ice_dummy_pkt_offsets dummy_udp_gtp_packet_offsets[] = { { ICE_PROTOCOL_LAST, 0 }, }; -static const u8 -dummy_udp_gtp_packet[] = { +static const u8 dummy_udp_gtp_packet[] = { 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -560,8 +550,7 @@ dummy_udp_gtp_packet[] = { 0x00, 0x00, 0x00, 0x00, }; -static const -struct ice_dummy_pkt_offsets dummy_pppoe_packet_offsets[] = { +static const struct ice_dummy_pkt_offsets dummy_pppoe_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, { ICE_ETYPE_OL, 12 }, { ICE_VLAN_OFOS, 14}, @@ -569,8 +558,7 @@ struct ice_dummy_pkt_offsets dummy_pppoe_packet_offsets[] = { { ICE_PROTOCOL_LAST, 0 }, }; -static const u8 -dummy_pppoe_packet[] = { +static const u8 dummy_pppoe_packet[] = { 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, From patchwork Mon Jan 6 03:38:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 64220 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5C877A04F1; Mon, 6 Jan 2020 04:36:32 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 538BE1D546; Mon, 6 Jan 2020 04:35:56 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 6A2D41D52B for ; Mon, 6 Jan 2020 04:35:52 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jan 2020 19:35:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,401,1571727600"; d="scan'208";a="216726345" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by fmsmga007.fm.intel.com with ESMTP; 05 Jan 2020 19:35:50 -0800 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang , Henry Tieman , Paul M Stillwell Jr Date: Mon, 6 Jan 2020 11:38:44 +0800 Message-Id: <20200106033851.43978-6-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200106033851.43978-1-qi.z.zhang@intel.com> References: <20191205123847.39579-1-qi.z.zhang@intel.com> <20200106033851.43978-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 05/12] net/ice/base: flexbytes should match on header data X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Change the extraction sequence generated by flow director flexbytes to use package mac protocol. Without this change data in packet headers cannot be used for flexbyte matching. The old extraction for flex bytes started at the beginning of the payload which is after the header. Signed-off-by: Henry Tieman Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_flow.c | 17 ++++------------- drivers/net/ice/base/ice_flow.h | 2 +- 2 files changed, 5 insertions(+), 14 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 391df1b54..eaa7a3b96 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -868,20 +868,11 @@ ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params, raw = ¶ms->prof->segs[seg].raws[i]; - /* Only support matching raw fields in the payload */ - if (raw->off < hdrs_sz) - return ICE_ERR_PARAM; - - /* Convert the segment-relative offset into payload-relative - * offset. - */ - off = raw->off - hdrs_sz; - /* Storing extraction information */ - raw->info.xtrct.prot_id = ICE_PROT_PAY; - raw->info.xtrct.off = (off / ICE_FLOW_FV_EXTRACT_SZ) * + raw->info.xtrct.prot_id = ICE_PROT_MAC_OF_OR_S; + raw->info.xtrct.off = (raw->off / ICE_FLOW_FV_EXTRACT_SZ) * ICE_FLOW_FV_EXTRACT_SZ; - raw->info.xtrct.disp = (off % ICE_FLOW_FV_EXTRACT_SZ) * + raw->info.xtrct.disp = (raw->off % ICE_FLOW_FV_EXTRACT_SZ) * BITS_PER_BYTE; raw->info.xtrct.idx = params->es_cnt; @@ -909,7 +900,7 @@ ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params, else idx = params->es_cnt; - params->es[idx].prot_id = ICE_PROT_PAY; + params->es[idx].prot_id = raw->info.xtrct.prot_id; params->es[idx].off = off; params->es_cnt++; off += ICE_FLOW_FV_EXTRACT_SZ; diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h index 4686274af..d7b10ccc3 100644 --- a/drivers/net/ice/base/ice_flow.h +++ b/drivers/net/ice/base/ice_flow.h @@ -282,8 +282,8 @@ struct ice_flow_fld_info { }; struct ice_flow_seg_fld_raw { - int off; /* Offset from the start of the segment */ struct ice_flow_fld_info info; + u16 off; /* Offset from the start of the segment */ }; struct ice_flow_seg_info { From patchwork Mon Jan 6 03:38:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 64221 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id E55F3A04F1; Mon, 6 Jan 2020 04:36:42 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 889511D552; Mon, 6 Jan 2020 04:35:58 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id EF81C1D53E for ; Mon, 6 Jan 2020 04:35:53 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jan 2020 19:35:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,401,1571727600"; d="scan'208";a="216726351" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by fmsmga007.fm.intel.com with ESMTP; 05 Jan 2020 19:35:52 -0800 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang , Paul M Stillwell Jr Date: Mon, 6 Jan 2020 11:38:45 +0800 Message-Id: <20200106033851.43978-7-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200106033851.43978-1-qi.z.zhang@intel.com> References: <20191205123847.39579-1-qi.z.zhang@intel.com> <20200106033851.43978-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 06/12] net/ice/base: enable clearing of the HW tables X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Enable the code to clear the HW tables. Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_flex_pipe.c | 55 ++++++++++++++++++++++++++++++++++++ drivers/net/ice/base/ice_flex_pipe.h | 1 + 2 files changed, 56 insertions(+) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index e8d4bbee4..28ac3aa75 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -3618,6 +3618,61 @@ static void ice_init_flow_profs(struct ice_hw *hw, u8 blk_idx) } /** + * ice_clear_hw_tbls - clear HW tables and flow profiles + * @hw: pointer to the hardware structure + */ +void ice_clear_hw_tbls(struct ice_hw *hw) +{ + u8 i; + + for (i = 0; i < ICE_BLK_COUNT; i++) { + struct ice_prof_redir *prof_redir = &hw->blk[i].prof_redir; + struct ice_prof_tcam *prof = &hw->blk[i].prof; + struct ice_xlt1 *xlt1 = &hw->blk[i].xlt1; + struct ice_xlt2 *xlt2 = &hw->blk[i].xlt2; + struct ice_es *es = &hw->blk[i].es; + + if (hw->blk[i].is_list_init) { + ice_free_prof_map(hw, i); + ice_free_flow_profs(hw, i); + } + + ice_free_vsig_tbl(hw, (enum ice_block)i); + + ice_memset(xlt1->ptypes, 0, xlt1->count * sizeof(*xlt1->ptypes), + ICE_NONDMA_MEM); + ice_memset(xlt1->ptg_tbl, 0, + ICE_MAX_PTGS * sizeof(*xlt1->ptg_tbl), + ICE_NONDMA_MEM); + ice_memset(xlt1->t, 0, xlt1->count * sizeof(*xlt1->t), + ICE_NONDMA_MEM); + + ice_memset(xlt2->vsis, 0, xlt2->count * sizeof(*xlt2->vsis), + ICE_NONDMA_MEM); + ice_memset(xlt2->vsig_tbl, 0, + xlt2->count * sizeof(*xlt2->vsig_tbl), + ICE_NONDMA_MEM); + ice_memset(xlt2->t, 0, xlt2->count * sizeof(*xlt2->t), + ICE_NONDMA_MEM); + + ice_memset(prof->t, 0, prof->count * sizeof(*prof->t), + ICE_NONDMA_MEM); + ice_memset(prof_redir->t, 0, + prof_redir->count * sizeof(*prof_redir->t), + ICE_NONDMA_MEM); + + ice_memset(es->t, 0, es->count * sizeof(*es->t), + ICE_NONDMA_MEM); + ice_memset(es->ref_count, 0, es->count * sizeof(*es->ref_count), + ICE_NONDMA_MEM); + ice_memset(es->written, 0, es->count * sizeof(*es->written), + ICE_NONDMA_MEM); + ice_memset(es->mask_ena, 0, es->count * sizeof(*es->mask_ena), + ICE_NONDMA_MEM); + } +} + +/** * ice_init_hw_tbls - init hardware table memory * @hw: pointer to the hardware structure */ diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h index ee606af15..fa72e386d 100644 --- a/drivers/net/ice/base/ice_flex_pipe.h +++ b/drivers/net/ice/base/ice_flex_pipe.h @@ -71,6 +71,7 @@ ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len); enum ice_status ice_init_hw_tbls(struct ice_hw *hw); void ice_free_seg(struct ice_hw *hw); void ice_fill_blk_tbls(struct ice_hw *hw); +void ice_clear_hw_tbls(struct ice_hw *hw); void ice_free_hw_tbls(struct ice_hw *hw); enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id); From patchwork Mon Jan 6 03:38:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 64222 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 921F3A04F1; Mon, 6 Jan 2020 04:36:52 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 4B7751D560; Mon, 6 Jan 2020 04:36:00 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id E96761D542; Mon, 6 Jan 2020 04:35:54 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jan 2020 19:35:54 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,401,1571727600"; d="scan'208";a="216726354" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by fmsmga007.fm.intel.com with ESMTP; 05 Jan 2020 19:35:53 -0800 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang , stable@dpdk.org, Dan Nowlin , Paul M Stillwell Jr Date: Mon, 6 Jan 2020 11:38:46 +0800 Message-Id: <20200106033851.43978-8-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200106033851.43978-1-qi.z.zhang@intel.com> References: <20191205123847.39579-1-qi.z.zhang@intel.com> <20200106033851.43978-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 07/12] net/ice/base: fix loop limit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" In ice_prot_type_to_id routine, correct the loop limit check to use ARRAY_SIZE instead of looking for the array element to have a specific value. Fixes: fed0c5ca5f19 ("net/ice/base: support programming a new switch recipe") Cc: stable@dpdk.org Signed-off-by: Dan Nowlin Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_switch.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 3ed84ca01..b2945a9e2 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -4880,7 +4880,7 @@ static bool ice_prot_type_to_id(enum ice_protocol_type type, u16 *id) { u16 i; - for (i = 0; ice_prot_id_tbl[i].type != ICE_PROTOCOL_LAST; i++) + for (i = 0; i < ARRAY_SIZE(ice_prot_id_tbl); i++) if (ice_prot_id_tbl[i].type == type) { *id = ice_prot_id_tbl[i].protocol_id; return true; From patchwork Mon Jan 6 03:38:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 64223 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5DBEAA04F1; Mon, 6 Jan 2020 04:37:00 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BCA781D542; Mon, 6 Jan 2020 04:36:01 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 6632E1D547; Mon, 6 Jan 2020 04:35:56 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jan 2020 19:35:56 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,401,1571727600"; d="scan'208";a="216726359" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by fmsmga007.fm.intel.com with ESMTP; 05 Jan 2020 19:35:54 -0800 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang , stable@dpdk.org, Jacob Keller , Paul M Stillwell Jr Date: Mon, 6 Jan 2020 11:38:47 +0800 Message-Id: <20200106033851.43978-9-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200106033851.43978-1-qi.z.zhang@intel.com> References: <20191205123847.39579-1-qi.z.zhang@intel.com> <20200106033851.43978-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 08/12] net/ice/base: increase PF reset wait timeout X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Increase the maximum time that the driver will wait for a PF reset from 200 milliseconds to 300 milliseconds, to account for possibility of a slightly longer than expected PF reset. Fixes: 453d087ccaff ("net/ice/base: add common functions") Cc: stable@dpdk.org Signed-off-by: Jacob Keller Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 319b00f75..2e756f542 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -9,7 +9,7 @@ #include "ice_flow.h" #include "ice_switch.h" -#define ICE_PF_RESET_WAIT_COUNT 200 +#define ICE_PF_RESET_WAIT_COUNT 300 /** * ice_set_mac_type - Sets MAC type From patchwork Mon Jan 6 03:38:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 64224 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 85B36A04F1; Mon, 6 Jan 2020 04:37:09 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A8C4B1D56F; Mon, 6 Jan 2020 04:36:03 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id E095B1D54E for ; Mon, 6 Jan 2020 04:35:57 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jan 2020 19:35:57 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,401,1571727600"; d="scan'208";a="216726363" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by fmsmga007.fm.intel.com with ESMTP; 05 Jan 2020 19:35:56 -0800 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang , Kiran Patil , Paul M Stillwell Jr Date: Mon, 6 Jan 2020 11:38:48 +0800 Message-Id: <20200106033851.43978-10-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200106033851.43978-1-qi.z.zhang@intel.com> References: <20191205123847.39579-1-qi.z.zhang@intel.com> <20200106033851.43978-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 09/12] net/ice/base: change fdir desc preparation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Change internal implemenatation of how FD filter programming desc is prepared. This is to minimize the amount of code needed to prep the FD filter programming desc (avoid memcpy, etc...) and just use predefined shifts and mask. This type of change are needed to expedite FD setup during data path (ADQ uses this codepath during initial flow setup) and it will also be useful when adding side-band flow-director filter. Signed-off-by: Kiran Patil Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang Acked-by: Qiming Yang Signed-off-by: Kiran Patil Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_fdir.c | 92 ++++++++++++++++++++++++----------------- 1 file changed, 55 insertions(+), 37 deletions(-) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 37b388169..87fa0afba 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -352,35 +352,6 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = { #define ICE_FDIR_NUM_PKT ARRAY_SIZE(ice_fdir_pkt) -/* Flow Direcotr (FD) filter program descriptor Context */ -static const struct ice_ctx_ele ice_fd_fltr_desc_ctx_info[] = { - /* Field Width LSB */ - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, qindex, 11, 0), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, comp_q, 1, 11), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, comp_report, 2, 12), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fd_space, 2, 14), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, cnt_index, 13, 16), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, cnt_ena, 2, 29), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, evict_ena, 1, 31), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, toq, 3, 32), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, toq_prio, 3, 35), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, dpu_recipe, 2, 38), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, drop, 1, 40), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_prio, 3, 41), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_mdid, 4, 44), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, flex_val, 16, 48), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, dtype, 4, 64), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, pcmd, 1, 68), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, desc_prof_prio, 3, 69), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, desc_prof, 6, 72), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fd_vsi, 10, 78), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, swap, 1, 88), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid_prio, 3, 89), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid_mdid, 4, 92), - ICE_CTX_STORE(ice_fd_fltr_desc_ctx, fdid, 32, 96), - { 0 } -}; - /** * ice_set_dflt_val_fd_desc * @fd_fltr_ctx: pointer to fd filter descriptor @@ -455,19 +426,66 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input, /** * ice_set_fd_desc_val - * @fd_fltr_ctx: pointer to fd filter descriptor context + * @ctx: pointer to fd filter descriptor context * @fdir_desc: populated with fd filter descriptor values */ void -ice_set_fd_desc_val(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx, +ice_set_fd_desc_val(struct ice_fd_fltr_desc_ctx *ctx, struct ice_fltr_desc *fdir_desc) { - u64 ctx_buf[2] = { 0 }; - - ice_set_ctx((u8 *)fd_fltr_ctx, (u8 *)ctx_buf, - ice_fd_fltr_desc_ctx_info); - fdir_desc->qidx_compq_space_stat = CPU_TO_LE64(ctx_buf[0]); - fdir_desc->dtype_cmd_vsi_fdid = CPU_TO_LE64(ctx_buf[1]); + u64 qword; + + /* prep QW0 of FD filter programming desc */ + qword = ((u64)ctx->qindex << ICE_FXD_FLTR_QW0_QINDEX_S) & + ICE_FXD_FLTR_QW0_QINDEX_M; + qword |= ((u64)ctx->comp_q << ICE_FXD_FLTR_QW0_COMP_Q_S) & + ICE_FXD_FLTR_QW0_COMP_Q_M; + qword |= ((u64)ctx->comp_report << ICE_FXD_FLTR_QW0_COMP_REPORT_S) & + ICE_FXD_FLTR_QW0_COMP_REPORT_M; + qword |= ((u64)ctx->fd_space << ICE_FXD_FLTR_QW0_FD_SPACE_S) & + ICE_FXD_FLTR_QW0_FD_SPACE_M; + qword |= ((u64)ctx->cnt_index << ICE_FXD_FLTR_QW0_STAT_CNT_S) & + ICE_FXD_FLTR_QW0_STAT_CNT_M; + qword |= ((u64)ctx->cnt_ena << ICE_FXD_FLTR_QW0_STAT_ENA_S) & + ICE_FXD_FLTR_QW0_STAT_ENA_M; + qword |= ((u64)ctx->evict_ena << ICE_FXD_FLTR_QW0_EVICT_ENA_S) & + ICE_FXD_FLTR_QW0_EVICT_ENA_M; + qword |= ((u64)ctx->toq << ICE_FXD_FLTR_QW0_TO_Q_S) & + ICE_FXD_FLTR_QW0_TO_Q_M; + qword |= ((u64)ctx->toq_prio << ICE_FXD_FLTR_QW0_TO_Q_PRI_S) & + ICE_FXD_FLTR_QW0_TO_Q_PRI_M; + qword |= ((u64)ctx->dpu_recipe << ICE_FXD_FLTR_QW0_DPU_RECIPE_S) & + ICE_FXD_FLTR_QW0_DPU_RECIPE_M; + qword |= ((u64)ctx->drop << ICE_FXD_FLTR_QW0_DROP_S) & + ICE_FXD_FLTR_QW0_DROP_M; + qword |= ((u64)ctx->flex_prio << ICE_FXD_FLTR_QW0_FLEX_PRI_S) & + ICE_FXD_FLTR_QW0_FLEX_PRI_M; + qword |= ((u64)ctx->flex_mdid << ICE_FXD_FLTR_QW0_FLEX_MDID_S) & + ICE_FXD_FLTR_QW0_FLEX_MDID_M; + qword |= ((u64)ctx->flex_val << ICE_FXD_FLTR_QW0_FLEX_VAL_S) & + ICE_FXD_FLTR_QW0_FLEX_VAL_M; + fdir_desc->qidx_compq_space_stat = CPU_TO_LE64(qword); + + /* prep QW1 of FD filter programming desc */ + qword = ((u64)ctx->dtype << ICE_FXD_FLTR_QW1_DTYPE_S) & + ICE_FXD_FLTR_QW1_DTYPE_M; + qword |= ((u64)ctx->pcmd << ICE_FXD_FLTR_QW1_PCMD_S) & + ICE_FXD_FLTR_QW1_PCMD_M; + qword |= ((u64)ctx->desc_prof_prio << ICE_FXD_FLTR_QW1_PROF_PRI_S) & + ICE_FXD_FLTR_QW1_PROF_PRI_M; + qword |= ((u64)ctx->desc_prof << ICE_FXD_FLTR_QW1_PROF_S) & + ICE_FXD_FLTR_QW1_PROF_M; + qword |= ((u64)ctx->fd_vsi << ICE_FXD_FLTR_QW1_FD_VSI_S) & + ICE_FXD_FLTR_QW1_FD_VSI_M; + qword |= ((u64)ctx->swap << ICE_FXD_FLTR_QW1_SWAP_S) & + ICE_FXD_FLTR_QW1_SWAP_M; + qword |= ((u64)ctx->fdid_prio << ICE_FXD_FLTR_QW1_FDID_PRI_S) & + ICE_FXD_FLTR_QW1_FDID_PRI_M; + qword |= ((u64)ctx->fdid_mdid << ICE_FXD_FLTR_QW1_FDID_MDID_S) & + ICE_FXD_FLTR_QW1_FDID_MDID_M; + qword |= ((u64)ctx->fdid << ICE_FXD_FLTR_QW1_FDID_S) & + ICE_FXD_FLTR_QW1_FDID_M; + fdir_desc->dtype_cmd_vsi_fdid = CPU_TO_LE64(qword); } /** From patchwork Mon Jan 6 03:38:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 64225 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7D262A04F1; Mon, 6 Jan 2020 04:37:20 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BE53A1D578; Mon, 6 Jan 2020 04:36:05 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id B845F1D557 for ; Mon, 6 Jan 2020 04:35:59 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jan 2020 19:35:59 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,401,1571727600"; d="scan'208";a="216726367" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by fmsmga007.fm.intel.com with ESMTP; 05 Jan 2020 19:35:57 -0800 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang , Michal Swiatkowski , Paul M Stillwell Jr Date: Mon, 6 Jan 2020 11:38:49 +0800 Message-Id: <20200106033851.43978-11-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200106033851.43978-1-qi.z.zhang@intel.com> References: <20191205123847.39579-1-qi.z.zhang@intel.com> <20200106033851.43978-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 10/12] net/ice/base: support add MAC rules on specific port X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" ice_add_mac_rule allow user to add rule to port based on hw->port_info->lport number. Function in some case should allow user to add filter rule on different port, write another function which implemented that behaviour. The same situation is which removing mac function. Add new api function which allow user to choose port on which rule going to be added. Leave add mac rule function that always add rule on hw->port_info->lport to avoid changes in components which don't need to choose different port. Also add function to remove rule from specific port. Alloc more switch_info structs to track separately rules for each port. Choose switch_info struct basing on logic port number because in fw added rules are connected with port. Signed-off-by: Michal Swiatkowski Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_common.c | 2 +- drivers/net/ice/base/ice_switch.c | 269 +++++++++++++++++++++++++------------- drivers/net/ice/base/ice_switch.h | 3 +- 3 files changed, 180 insertions(+), 94 deletions(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 2e756f542..22b2e316d 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -462,7 +462,7 @@ static enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw) INIT_LIST_HEAD(&sw->vsi_list_map_head); - return ice_init_def_sw_recp(hw); + return ice_init_def_sw_recp(hw, &hw->switch_info->recp_list); } /** diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index b2945a9e2..085f34406 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -791,11 +791,13 @@ ice_get_recp_to_prof_map(struct ice_hw *hw) /** * ice_init_def_sw_recp - initialize the recipe book keeping tables * @hw: pointer to the HW struct + * @recp_list: pointer to sw recipe list * * Allocate memory for the entire recipe table and initialize the structures/ * entries corresponding to basic recipes. */ -enum ice_status ice_init_def_sw_recp(struct ice_hw *hw) +enum ice_status +ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list) { struct ice_sw_recipe *recps; u8 i; @@ -813,7 +815,7 @@ enum ice_status ice_init_def_sw_recp(struct ice_hw *hw) ice_init_lock(&recps[i].filt_rule_lock); } - hw->switch_info->recp_list = recps; + *recp_list = recps; return ICE_SUCCESS; } @@ -2427,6 +2429,7 @@ ice_create_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi, /** * ice_create_pkt_fwd_rule * @hw: pointer to the hardware structure + * @recp_list: corresponding filter management list * @f_entry: entry containing packet forwarding information * * Create switch rule with given filter information and add an entry @@ -2434,13 +2437,11 @@ ice_create_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi, * and VSI mapping */ static enum ice_status -ice_create_pkt_fwd_rule(struct ice_hw *hw, +ice_create_pkt_fwd_rule(struct ice_hw *hw, struct ice_sw_recipe *recp_list, struct ice_fltr_list_entry *f_entry) { struct ice_fltr_mgmt_list_entry *fm_entry; struct ice_aqc_sw_rules_elem *s_rule; - enum ice_sw_lkup_type l_type; - struct ice_sw_recipe *recp; enum ice_status status; s_rule = (struct ice_aqc_sw_rules_elem *) @@ -2480,9 +2481,7 @@ ice_create_pkt_fwd_rule(struct ice_hw *hw, /* The book keeping entries will get removed when base driver * calls remove filter AQ command */ - l_type = fm_entry->fltr_info.lkup_type; - recp = &hw->switch_info->recp_list[l_type]; - LIST_ADD(&fm_entry->list_entry, &recp->filt_rules); + LIST_ADD(&fm_entry->list_entry, &recp_list->filt_rules); ice_create_pkt_fwd_rule_exit: ice_free(hw, s_rule); @@ -2679,21 +2678,18 @@ ice_add_update_vsi_list(struct ice_hw *hw, /** * ice_find_rule_entry - Search a rule entry - * @hw: pointer to the hardware structure - * @recp_id: lookup type for which the specified rule needs to be searched + * @list_head: head of rule list * @f_info: rule information * * Helper function to search for a given rule entry * Returns pointer to entry storing the rule if found */ static struct ice_fltr_mgmt_list_entry * -ice_find_rule_entry(struct ice_hw *hw, u8 recp_id, struct ice_fltr_info *f_info) +ice_find_rule_entry(struct LIST_HEAD_TYPE *list_head, + struct ice_fltr_info *f_info) { struct ice_fltr_mgmt_list_entry *list_itr, *ret = NULL; - struct ice_switch_info *sw = hw->switch_info; - struct LIST_HEAD_TYPE *list_head; - list_head = &sw->recp_list[recp_id].filt_rules; LIST_FOR_EACH_ENTRY(list_itr, list_head, ice_fltr_mgmt_list_entry, list_entry) { if (!memcmp(&f_info->l_data, &list_itr->fltr_info.l_data, @@ -2764,16 +2760,16 @@ ice_find_vsi_list_entry(struct ice_hw *hw, u8 recp_id, u16 vsi_handle, /** * ice_add_rule_internal - add rule for a given lookup type * @hw: pointer to the hardware structure - * @recp_id: lookup type (recipe ID) for which rule has to be added + * @recp_list: recipe list for which rule has to be added + * @lport: logic port number on which function add rule * @f_entry: structure containing MAC forwarding information * * Adds or updates the rule lists for a given recipe */ static enum ice_status -ice_add_rule_internal(struct ice_hw *hw, u8 recp_id, - struct ice_fltr_list_entry *f_entry) +ice_add_rule_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list, + u8 lport, struct ice_fltr_list_entry *f_entry) { - struct ice_switch_info *sw = hw->switch_info; struct ice_fltr_info *new_fltr, *cur_fltr; struct ice_fltr_mgmt_list_entry *m_entry; struct ice_lock *rule_lock; /* Lock to protect filter rule list */ @@ -2787,19 +2783,19 @@ ice_add_rule_internal(struct ice_hw *hw, u8 recp_id, f_entry->fltr_info.fwd_id.hw_vsi_id = ice_get_hw_vsi_num(hw, f_entry->fltr_info.vsi_handle); - rule_lock = &sw->recp_list[recp_id].filt_rule_lock; + rule_lock = &recp_list->filt_rule_lock; ice_acquire_lock(rule_lock); new_fltr = &f_entry->fltr_info; if (new_fltr->flag & ICE_FLTR_RX) - new_fltr->src = hw->port_info->lport; + new_fltr->src = lport; else if (new_fltr->flag & ICE_FLTR_TX) new_fltr->src = ice_get_hw_vsi_num(hw, f_entry->fltr_info.vsi_handle); - m_entry = ice_find_rule_entry(hw, recp_id, new_fltr); + m_entry = ice_find_rule_entry(&recp_list->filt_rules, new_fltr); if (!m_entry) { - status = ice_create_pkt_fwd_rule(hw, f_entry); + status = ice_create_pkt_fwd_rule(hw, recp_list, f_entry); goto exit_add_rule_internal; } @@ -2940,14 +2936,13 @@ ice_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle, * ice_remove_rule_internal - Remove a filter rule of a given type * * @hw: pointer to the hardware structure - * @recp_id: recipe ID for which the rule needs to removed + * @recp_list: recipe list for which the rule needs to removed * @f_entry: rule entry containing filter information */ static enum ice_status -ice_remove_rule_internal(struct ice_hw *hw, u8 recp_id, +ice_remove_rule_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list, struct ice_fltr_list_entry *f_entry) { - struct ice_switch_info *sw = hw->switch_info; struct ice_fltr_mgmt_list_entry *list_elem; struct ice_lock *rule_lock; /* Lock to protect filter rule list */ enum ice_status status = ICE_SUCCESS; @@ -2959,9 +2954,10 @@ ice_remove_rule_internal(struct ice_hw *hw, u8 recp_id, f_entry->fltr_info.fwd_id.hw_vsi_id = ice_get_hw_vsi_num(hw, f_entry->fltr_info.vsi_handle); - rule_lock = &sw->recp_list[recp_id].filt_rule_lock; + rule_lock = &recp_list->filt_rule_lock; ice_acquire_lock(rule_lock); - list_elem = ice_find_rule_entry(hw, recp_id, &f_entry->fltr_info); + list_elem = ice_find_rule_entry(&recp_list->filt_rules, + &f_entry->fltr_info); if (!list_elem) { status = ICE_ERR_DOES_NOT_EXIST; goto exit; @@ -3110,9 +3106,11 @@ ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries, } /** - * ice_add_mac - Add a MAC address based filter rule + * ice_add_mac_rule - Add a MAC address based filter rule * @hw: pointer to the hardware structure * @m_list: list of MAC addresses and forwarding information + * @sw: pointer to switch info struct for which function add rule + * @lport: logic port number on which function add rule * * IMPORTANT: When the ucast_shared flag is set to false and m_list has * multiple unicast addresses, the function assumes that all the @@ -3120,24 +3118,24 @@ ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries, * check for duplicates in this case, removing duplicates from a given * list should be taken care of in the caller of this function. */ -enum ice_status -ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list) +static enum ice_status +ice_add_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list, + struct ice_switch_info *sw, u8 lport) { + struct ice_sw_recipe *recp_list = &sw->recp_list[ICE_SW_LKUP_MAC]; struct ice_aqc_sw_rules_elem *s_rule, *r_iter; struct ice_fltr_list_entry *m_list_itr; struct LIST_HEAD_TYPE *rule_head; u16 elem_sent, total_elem_left; - struct ice_switch_info *sw; struct ice_lock *rule_lock; /* Lock to protect filter rule list */ enum ice_status status = ICE_SUCCESS; u16 num_unicast = 0; u16 s_rule_size; - if (!m_list || !hw) - return ICE_ERR_PARAM; s_rule = NULL; - sw = hw->switch_info; - rule_lock = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rule_lock; + rule_lock = &recp_list->filt_rule_lock; + rule_head = &recp_list->filt_rules; + LIST_FOR_EACH_ENTRY(m_list_itr, m_list, ice_fltr_list_entry, list_entry) { u8 *add = &m_list_itr->fltr_info.l_data.mac.mac_addr[0]; @@ -3160,7 +3158,7 @@ ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list) if (IS_UNICAST_ETHER_ADDR(add) && !hw->ucast_shared) { /* Don't overwrite the unicast address */ ice_acquire_lock(rule_lock); - if (ice_find_rule_entry(hw, ICE_SW_LKUP_MAC, + if (ice_find_rule_entry(rule_head, &m_list_itr->fltr_info)) { ice_release_lock(rule_lock); return ICE_ERR_ALREADY_EXISTS; @@ -3170,7 +3168,7 @@ ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list) } else if (IS_MULTICAST_ETHER_ADDR(add) || (IS_UNICAST_ETHER_ADDR(add) && hw->ucast_shared)) { m_list_itr->status = - ice_add_rule_internal(hw, ICE_SW_LKUP_MAC, + ice_add_rule_internal(hw, recp_list, lport, m_list_itr); if (m_list_itr->status) return m_list_itr->status; @@ -3184,7 +3182,6 @@ ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list) goto ice_add_mac_exit; } - rule_head = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rules; /* Allocate switch rule buffer for the bulk update for unicast */ s_rule_size = ICE_SW_RULE_RX_TX_ETH_HDR_SIZE; @@ -3266,6 +3263,23 @@ ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list) } /** + * ice_add_mac - Add a MAC address based filter rule + * @hw: pointer to the hardware structure + * @m_list: list of MAC addresses and forwarding information + * + * Function add mac rule for logical port from hw struct + */ +enum ice_status +ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list) +{ + if (!m_list || !hw) + return ICE_ERR_PARAM; + + return ice_add_mac_rule(hw, m_list, hw->switch_info, + hw->port_info->lport); +} + +/** * ice_add_vlan_internal - Add one VLAN based filter rule * @hw: pointer to the hardware structure * @f_entry: filter entry containing one VLAN information @@ -3276,6 +3290,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry) struct ice_switch_info *sw = hw->switch_info; struct ice_fltr_mgmt_list_entry *v_list_itr; struct ice_fltr_info *new_fltr, *cur_fltr; + struct ice_sw_recipe *recp_list; enum ice_sw_lkup_type lkup_type; u16 vsi_list_id = 0, vsi_handle; struct ice_lock *rule_lock; /* Lock to protect filter rule list */ @@ -3298,9 +3313,10 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry) new_fltr->src = new_fltr->fwd_id.hw_vsi_id; lkup_type = new_fltr->lkup_type; vsi_handle = new_fltr->vsi_handle; - rule_lock = &sw->recp_list[ICE_SW_LKUP_VLAN].filt_rule_lock; + recp_list = &sw->recp_list[ICE_SW_LKUP_VLAN]; + rule_lock = &recp_list->filt_rule_lock; ice_acquire_lock(rule_lock); - v_list_itr = ice_find_rule_entry(hw, ICE_SW_LKUP_VLAN, new_fltr); + v_list_itr = ice_find_rule_entry(&recp_list->filt_rules, new_fltr); if (!v_list_itr) { struct ice_vsi_list_map_info *map_info = NULL; @@ -3327,9 +3343,9 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_fltr_list_entry *f_entry) new_fltr->fwd_id.vsi_list_id = vsi_list_id; } - status = ice_create_pkt_fwd_rule(hw, f_entry); + status = ice_create_pkt_fwd_rule(hw, recp_list, f_entry); if (!status) { - v_list_itr = ice_find_rule_entry(hw, ICE_SW_LKUP_VLAN, + v_list_itr = ice_find_rule_entry(&recp_list->filt_rules, new_fltr); if (!v_list_itr) { status = ICE_ERR_DOES_NOT_EXIST; @@ -3458,10 +3474,12 @@ enum ice_status ice_add_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *mv_list) { struct ice_fltr_list_entry *mv_list_itr; + struct ice_sw_recipe *recp_list; if (!mv_list || !hw) return ICE_ERR_PARAM; + recp_list = &hw->switch_info->recp_list[ICE_SW_LKUP_MAC_VLAN]; LIST_FOR_EACH_ENTRY(mv_list_itr, mv_list, ice_fltr_list_entry, list_entry) { enum ice_sw_lkup_type l_type = @@ -3471,7 +3489,8 @@ ice_add_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *mv_list) return ICE_ERR_PARAM; mv_list_itr->fltr_info.flag = ICE_FLTR_TX; mv_list_itr->status = - ice_add_rule_internal(hw, ICE_SW_LKUP_MAC_VLAN, + ice_add_rule_internal(hw, recp_list, + hw->port_info->lport, mv_list_itr); if (mv_list_itr->status) return mv_list_itr->status; @@ -3492,20 +3511,26 @@ enum ice_status ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list) { struct ice_fltr_list_entry *em_list_itr; + u8 lport; if (!em_list || !hw) return ICE_ERR_PARAM; + lport = hw->port_info->lport; LIST_FOR_EACH_ENTRY(em_list_itr, em_list, ice_fltr_list_entry, list_entry) { - enum ice_sw_lkup_type l_type = - em_list_itr->fltr_info.lkup_type; + struct ice_sw_recipe *recp_list; + enum ice_sw_lkup_type l_type; + + l_type = em_list_itr->fltr_info.lkup_type; + recp_list = &hw->switch_info->recp_list[l_type]; if (l_type != ICE_SW_LKUP_ETHERTYPE_MAC && l_type != ICE_SW_LKUP_ETHERTYPE) return ICE_ERR_PARAM; - em_list_itr->status = ice_add_rule_internal(hw, l_type, + em_list_itr->status = ice_add_rule_internal(hw, recp_list, + lport, em_list_itr); if (em_list_itr->status) return em_list_itr->status; @@ -3522,6 +3547,7 @@ enum ice_status ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list) { struct ice_fltr_list_entry *em_list_itr, *tmp; + struct ice_sw_recipe *recp_list; if (!em_list || !hw) return ICE_ERR_PARAM; @@ -3535,7 +3561,8 @@ ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list) l_type != ICE_SW_LKUP_ETHERTYPE) return ICE_ERR_PARAM; - em_list_itr->status = ice_remove_rule_internal(hw, l_type, + recp_list = &hw->switch_info->recp_list[l_type]; + em_list_itr->status = ice_remove_rule_internal(hw, recp_list, em_list_itr); if (em_list_itr->status) return em_list_itr->status; @@ -3695,8 +3722,7 @@ ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set, /** * ice_find_ucast_rule_entry - Search for a unicast MAC filter rule entry - * @hw: pointer to the hardware structure - * @recp_id: lookup type for which the specified rule needs to be searched + * @list_head: head of rule list * @f_info: rule information * * Helper function to search for a unicast rule entry - this is to be used @@ -3706,14 +3732,11 @@ ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set, * Returns pointer to entry storing the rule if found */ static struct ice_fltr_mgmt_list_entry * -ice_find_ucast_rule_entry(struct ice_hw *hw, u8 recp_id, +ice_find_ucast_rule_entry(struct LIST_HEAD_TYPE *list_head, struct ice_fltr_info *f_info) { - struct ice_switch_info *sw = hw->switch_info; struct ice_fltr_mgmt_list_entry *list_itr; - struct LIST_HEAD_TYPE *list_head; - list_head = &sw->recp_list[recp_id].filt_rules; LIST_FOR_EACH_ENTRY(list_itr, list_head, ice_fltr_mgmt_list_entry, list_entry) { if (!memcmp(&f_info->l_data, &list_itr->fltr_info.l_data, @@ -3727,9 +3750,10 @@ ice_find_ucast_rule_entry(struct ice_hw *hw, u8 recp_id, } /** - * ice_remove_mac - remove a MAC address based filter rule + * ice_remove_mac_rule - remove a MAC based filter rule * @hw: pointer to the hardware structure * @m_list: list of MAC addresses and forwarding information + * @recp_list: list from which function remove MAC address * * This function removes either a MAC filter rule or a specific VSI from a * VSI list for a multicast MAC address. @@ -3739,8 +3763,9 @@ ice_find_ucast_rule_entry(struct ice_hw *hw, u8 recp_id, * the entries passed into m_list were added previously. It will not attempt to * do a partial remove of entries that were found. */ -enum ice_status -ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list) +static enum ice_status +ice_remove_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list, + struct ice_sw_recipe *recp_list) { struct ice_fltr_list_entry *list_itr, *tmp; struct ice_lock *rule_lock; /* Lock to protect filter rule list */ @@ -3748,7 +3773,7 @@ ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list) if (!m_list) return ICE_ERR_PARAM; - rule_lock = &hw->switch_info->recp_list[ICE_SW_LKUP_MAC].filt_rule_lock; + rule_lock = &recp_list->filt_rule_lock; LIST_FOR_EACH_ENTRY_SAFE(list_itr, tmp, m_list, ice_fltr_list_entry, list_entry) { enum ice_sw_lkup_type l_type = list_itr->fltr_info.lkup_type; @@ -3770,15 +3795,14 @@ ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list) * shared... */ ice_acquire_lock(rule_lock); - if (!ice_find_ucast_rule_entry(hw, ICE_SW_LKUP_MAC, + if (!ice_find_ucast_rule_entry(&recp_list->filt_rules, &list_itr->fltr_info)) { ice_release_lock(rule_lock); return ICE_ERR_DOES_NOT_EXIST; } ice_release_lock(rule_lock); } - list_itr->status = ice_remove_rule_internal(hw, - ICE_SW_LKUP_MAC, + list_itr->status = ice_remove_rule_internal(hw, recp_list, list_itr); if (list_itr->status) return list_itr->status; @@ -3787,6 +3811,21 @@ ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list) } /** + * ice_remove_mac - remove a MAC address based filter rule + * @hw: pointer to the hardware structure + * @m_list: list of MAC addresses and forwarding information + * + */ +enum ice_status +ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list) +{ + struct ice_sw_recipe *recp_list; + + recp_list = &hw->switch_info->recp_list[ICE_SW_LKUP_MAC]; + return ice_remove_mac_rule(hw, m_list, recp_list); +} + +/** * ice_remove_vlan - Remove VLAN based filter rule * @hw: pointer to the hardware structure * @v_list: list of VLAN entries and forwarding information @@ -3795,18 +3834,19 @@ enum ice_status ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list) { struct ice_fltr_list_entry *v_list_itr, *tmp; + struct ice_sw_recipe *recp_list; if (!v_list || !hw) return ICE_ERR_PARAM; + recp_list = &hw->switch_info->recp_list[ICE_SW_LKUP_VLAN]; LIST_FOR_EACH_ENTRY_SAFE(v_list_itr, tmp, v_list, ice_fltr_list_entry, list_entry) { enum ice_sw_lkup_type l_type = v_list_itr->fltr_info.lkup_type; if (l_type != ICE_SW_LKUP_VLAN) return ICE_ERR_PARAM; - v_list_itr->status = ice_remove_rule_internal(hw, - ICE_SW_LKUP_VLAN, + v_list_itr->status = ice_remove_rule_internal(hw, recp_list, v_list_itr); if (v_list_itr->status) return v_list_itr->status; @@ -3823,10 +3863,12 @@ enum ice_status ice_remove_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list) { struct ice_fltr_list_entry *v_list_itr, *tmp; + struct ice_sw_recipe *recp_list; if (!v_list || !hw) return ICE_ERR_PARAM; + recp_list = &hw->switch_info->recp_list[ICE_SW_LKUP_MAC_VLAN]; LIST_FOR_EACH_ENTRY_SAFE(v_list_itr, tmp, v_list, ice_fltr_list_entry, list_entry) { enum ice_sw_lkup_type l_type = v_list_itr->fltr_info.lkup_type; @@ -3834,7 +3876,7 @@ ice_remove_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list) if (l_type != ICE_SW_LKUP_MAC_VLAN) return ICE_ERR_PARAM; v_list_itr->status = - ice_remove_rule_internal(hw, ICE_SW_LKUP_MAC_VLAN, + ice_remove_rule_internal(hw, recp_list, v_list_itr); if (v_list_itr->status) return v_list_itr->status; @@ -4065,11 +4107,13 @@ ice_remove_promisc(struct ice_hw *hw, u8 recp_id, struct LIST_HEAD_TYPE *v_list) { struct ice_fltr_list_entry *v_list_itr, *tmp; + struct ice_sw_recipe *recp_list; + recp_list = &hw->switch_info->recp_list[recp_id]; LIST_FOR_EACH_ENTRY_SAFE(v_list_itr, tmp, v_list, ice_fltr_list_entry, list_entry) { v_list_itr->status = - ice_remove_rule_internal(hw, recp_id, v_list_itr); + ice_remove_rule_internal(hw, recp_list, v_list_itr); if (v_list_itr->status) return v_list_itr->status; } @@ -4193,6 +4237,7 @@ ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask, u16 vid) * is found. */ while (promisc_mask) { + struct ice_sw_recipe *recp_list; u8 *mac_addr; pkt_type = 0; @@ -4256,8 +4301,11 @@ ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask, u16 vid) new_fltr.vsi_handle = vsi_handle; new_fltr.fwd_id.hw_vsi_id = hw_vsi_id; f_list_entry.fltr_info = new_fltr; + recp_list = &hw->switch_info->recp_list[recipe_id]; - status = ice_add_rule_internal(hw, recipe_id, &f_list_entry); + status = ice_add_rule_internal(hw, recp_list, + hw->port_info->lport, + &f_list_entry); if (status != ICE_SUCCESS) goto set_promisc_exit; } @@ -4323,13 +4371,14 @@ ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask, * ice_remove_vsi_lkup_fltr - Remove lookup type filters for a VSI * @hw: pointer to the hardware structure * @vsi_handle: VSI handle to remove filters from + * @recp_list: recipe list from which function remove fltr * @lkup: switch rule filter lookup type */ static void ice_remove_vsi_lkup_fltr(struct ice_hw *hw, u16 vsi_handle, + struct ice_sw_recipe *recp_list, enum ice_sw_lkup_type lkup) { - struct ice_switch_info *sw = hw->switch_info; struct ice_fltr_list_entry *fm_entry; struct LIST_HEAD_TYPE remove_list_head; struct LIST_HEAD_TYPE *rule_head; @@ -4338,8 +4387,8 @@ ice_remove_vsi_lkup_fltr(struct ice_hw *hw, u16 vsi_handle, enum ice_status status; INIT_LIST_HEAD(&remove_list_head); - rule_lock = &sw->recp_list[lkup].filt_rule_lock; - rule_head = &sw->recp_list[lkup].filt_rules; + rule_lock = &recp_list[lkup].filt_rule_lock; + rule_head = &recp_list[lkup].filt_rules; ice_acquire_lock(rule_lock); status = ice_add_to_vsi_fltr_list(hw, vsi_handle, rule_head, &remove_list_head); @@ -4349,7 +4398,7 @@ ice_remove_vsi_lkup_fltr(struct ice_hw *hw, u16 vsi_handle, switch (lkup) { case ICE_SW_LKUP_MAC: - ice_remove_mac(hw, &remove_list_head); + ice_remove_mac_rule(hw, &remove_list_head, recp_list); break; case ICE_SW_LKUP_VLAN: ice_remove_vlan(hw, &remove_list_head); @@ -4382,22 +4431,43 @@ ice_remove_vsi_lkup_fltr(struct ice_hw *hw, u16 vsi_handle, } /** - * ice_remove_vsi_fltr - Remove all filters for a VSI + * ice_remove_vsi_fltr_rule - Remove all filters for a VSI * @hw: pointer to the hardware structure * @vsi_handle: VSI handle to remove filters from + * @sw: pointer to switch info struct */ -void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle) +static void +ice_remove_vsi_fltr_rule(struct ice_hw *hw, u16 vsi_handle, + struct ice_switch_info *sw) { ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); - ice_remove_vsi_lkup_fltr(hw, vsi_handle, ICE_SW_LKUP_MAC); - ice_remove_vsi_lkup_fltr(hw, vsi_handle, ICE_SW_LKUP_MAC_VLAN); - ice_remove_vsi_lkup_fltr(hw, vsi_handle, ICE_SW_LKUP_PROMISC); - ice_remove_vsi_lkup_fltr(hw, vsi_handle, ICE_SW_LKUP_VLAN); - ice_remove_vsi_lkup_fltr(hw, vsi_handle, ICE_SW_LKUP_DFLT); - ice_remove_vsi_lkup_fltr(hw, vsi_handle, ICE_SW_LKUP_ETHERTYPE); - ice_remove_vsi_lkup_fltr(hw, vsi_handle, ICE_SW_LKUP_ETHERTYPE_MAC); - ice_remove_vsi_lkup_fltr(hw, vsi_handle, ICE_SW_LKUP_PROMISC_VLAN); + ice_remove_vsi_lkup_fltr(hw, vsi_handle, + sw->recp_list, ICE_SW_LKUP_MAC); + ice_remove_vsi_lkup_fltr(hw, vsi_handle, + sw->recp_list, ICE_SW_LKUP_MAC_VLAN); + ice_remove_vsi_lkup_fltr(hw, vsi_handle, + sw->recp_list, ICE_SW_LKUP_PROMISC); + ice_remove_vsi_lkup_fltr(hw, vsi_handle, + sw->recp_list, ICE_SW_LKUP_VLAN); + ice_remove_vsi_lkup_fltr(hw, vsi_handle, + sw->recp_list, ICE_SW_LKUP_DFLT); + ice_remove_vsi_lkup_fltr(hw, vsi_handle, + sw->recp_list, ICE_SW_LKUP_ETHERTYPE); + ice_remove_vsi_lkup_fltr(hw, vsi_handle, + sw->recp_list, ICE_SW_LKUP_ETHERTYPE_MAC); + ice_remove_vsi_lkup_fltr(hw, vsi_handle, + sw->recp_list, ICE_SW_LKUP_PROMISC_VLAN); +} + +/** + * ice_remove_vsi_fltr - Remove all filters for a VSI + * @hw: pointer to the hardware structure + * @vsi_handle: VSI handle to remove filters from + */ +void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle) +{ + ice_remove_vsi_fltr_rule(hw, vsi_handle, hw->switch_info); } /** @@ -4559,9 +4629,9 @@ enum ice_status ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info, u16 sw_marker) { - struct ice_switch_info *sw = hw->switch_info; struct ice_fltr_mgmt_list_entry *m_entry; struct ice_fltr_list_entry fl_info; + struct ice_sw_recipe *recp_list; struct LIST_HEAD_TYPE l_head; struct ice_lock *rule_lock; /* Lock to protect filter rule list */ enum ice_status ret; @@ -4590,16 +4660,18 @@ ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info, LIST_ADD(&fl_info.list_entry, &l_head); entry_exists = false; - ret = ice_add_mac(hw, &l_head); + ret = ice_add_mac_rule(hw, &l_head, hw->switch_info, + hw->port_info->lport); if (ret == ICE_ERR_ALREADY_EXISTS) entry_exists = true; else if (ret) return ret; - rule_lock = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rule_lock; + recp_list = &hw->switch_info->recp_list[ICE_SW_LKUP_MAC]; + rule_lock = &recp_list->filt_rule_lock; ice_acquire_lock(rule_lock); /* Get the book keeping entry for the filter */ - m_entry = ice_find_rule_entry(hw, ICE_SW_LKUP_MAC, f_info); + m_entry = ice_find_rule_entry(&recp_list->filt_rules, f_info); if (!m_entry) goto exit_error; @@ -4652,9 +4724,9 @@ ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info, enum ice_status ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info) { - struct ice_switch_info *sw = hw->switch_info; struct ice_fltr_mgmt_list_entry *m_entry; struct ice_fltr_list_entry fl_info; + struct ice_sw_recipe *recp_list; struct LIST_HEAD_TYPE l_head; struct ice_lock *rule_lock; /* Lock to protect filter rule list */ enum ice_status ret; @@ -4671,10 +4743,11 @@ ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info) if (!ice_is_vsi_valid(hw, f_info->vsi_handle)) return ICE_ERR_PARAM; f_info->fwd_id.hw_vsi_id = ice_get_hw_vsi_num(hw, f_info->vsi_handle); + recp_list = &hw->switch_info->recp_list[ICE_SW_LKUP_MAC]; entry_exist = false; - rule_lock = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rule_lock; + rule_lock = &recp_list->filt_rule_lock; /* Add filter if it doesn't exist so then the adding of large * action always results in update @@ -4684,14 +4757,15 @@ ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info) fl_info.fltr_info = *f_info; LIST_ADD(&fl_info.list_entry, &l_head); - ret = ice_add_mac(hw, &l_head); + ret = ice_add_mac_rule(hw, &l_head, hw->switch_info, + hw->port_info->lport); if (ret == ICE_ERR_ALREADY_EXISTS) entry_exist = true; else if (ret) return ret; ice_acquire_lock(rule_lock); - m_entry = ice_find_rule_entry(hw, ICE_SW_LKUP_MAC, f_info); + m_entry = ice_find_rule_entry(&recp_list->filt_rules, f_info); if (!m_entry) { ret = ICE_ERR_BAD_PTR; goto exit_error; @@ -6716,12 +6790,15 @@ static enum ice_status ice_replay_fltr(struct ice_hw *hw, u8 recp_id, struct LIST_HEAD_TYPE *list_head) { struct ice_fltr_mgmt_list_entry *itr; - struct LIST_HEAD_TYPE l_head; enum ice_status status = ICE_SUCCESS; + struct ice_sw_recipe *recp_list; + u8 lport = hw->port_info->lport; + struct LIST_HEAD_TYPE l_head; if (LIST_EMPTY(list_head)) return status; + recp_list = &hw->switch_info->recp_list[recp_id]; /* Move entries from the given list_head to a temporary l_head so that * they can be replayed. Otherwise when trying to re-add the same * filter, the function will return already exists @@ -6737,7 +6814,8 @@ ice_replay_fltr(struct ice_hw *hw, u8 recp_id, struct LIST_HEAD_TYPE *list_head) f_entry.fltr_info = itr->fltr_info; if (itr->vsi_count < 2 && recp_id != ICE_SW_LKUP_VLAN) { - status = ice_add_rule_internal(hw, recp_id, &f_entry); + status = ice_add_rule_internal(hw, recp_list, lport, + &f_entry); if (status != ICE_SUCCESS) goto end; continue; @@ -6761,7 +6839,8 @@ ice_replay_fltr(struct ice_hw *hw, u8 recp_id, struct LIST_HEAD_TYPE *list_head) if (recp_id == ICE_SW_LKUP_VLAN) status = ice_add_vlan_internal(hw, &f_entry); else - status = ice_add_rule_internal(hw, recp_id, + status = ice_add_rule_internal(hw, recp_list, + lport, &f_entry); if (status != ICE_SUCCESS) goto end; @@ -6812,10 +6891,12 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id, { struct ice_fltr_mgmt_list_entry *itr; enum ice_status status = ICE_SUCCESS; + struct ice_sw_recipe *recp_list; u16 hw_vsi_id; if (LIST_EMPTY(list_head)) return status; + recp_list = &hw->switch_info->recp_list[recp_id]; hw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle); LIST_FOR_EACH_ENTRY(itr, list_head, ice_fltr_mgmt_list_entry, @@ -6828,7 +6909,9 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id, /* update the src in case it is VSI num */ if (f_entry.fltr_info.src_id == ICE_SRC_ID_VSI) f_entry.fltr_info.src = hw_vsi_id; - status = ice_add_rule_internal(hw, recp_id, &f_entry); + status = ice_add_rule_internal(hw, recp_list, + hw->port_info->lport, + &f_entry); if (status != ICE_SUCCESS) goto end; continue; @@ -6846,7 +6929,9 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id, if (recp_id == ICE_SW_LKUP_VLAN) status = ice_add_vlan_internal(hw, &f_entry); else - status = ice_add_rule_internal(hw, recp_id, &f_entry); + status = ice_add_rule_internal(hw, recp_list, + hw->port_info->lport, + &f_entry); if (status != ICE_SUCCESS) goto end; } diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h index 61083738a..598e9c939 100644 --- a/drivers/net/ice/base/ice_switch.h +++ b/drivers/net/ice/base/ice_switch.h @@ -444,7 +444,8 @@ ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, enum ice_status ice_replay_all_fltr(struct ice_hw *hw); -enum ice_status ice_init_def_sw_recp(struct ice_hw *hw); +enum ice_status +ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list); u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle); bool ice_is_vsi_valid(struct ice_hw *hw, u16 vsi_handle); From patchwork Mon Jan 6 03:38:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 64226 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 674AAA04F1; Mon, 6 Jan 2020 04:37:31 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3AB851D589; Mon, 6 Jan 2020 04:36:07 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 1DE021D563 for ; Mon, 6 Jan 2020 04:36:00 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jan 2020 19:36:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,401,1571727600"; d="scan'208";a="216726371" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by fmsmga007.fm.intel.com with ESMTP; 05 Jan 2020 19:35:59 -0800 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang , Paul M Stillwell Jr Date: Mon, 6 Jan 2020 11:38:50 +0800 Message-Id: <20200106033851.43978-12-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200106033851.43978-1-qi.z.zhang@intel.com> References: <20191205123847.39579-1-qi.z.zhang@intel.com> <20200106033851.43978-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 11/12] net/ice: support 1/10G device IDs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for 1/10G devices. Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_devids.h | 4 ++++ drivers/net/ice/ice_ethdev.c | 2 ++ 2 files changed, 6 insertions(+) diff --git a/drivers/net/ice/base/ice_devids.h b/drivers/net/ice/base/ice_devids.h index 348d1907a..46ffdee2d 100644 --- a/drivers/net/ice/base/ice_devids.h +++ b/drivers/net/ice/base/ice_devids.h @@ -24,5 +24,9 @@ #define ICE_DEV_ID_C822N_QSFP 0x1891 /* Intel(R) Ethernet Connection C822N for SFP */ #define ICE_DEV_ID_C822N_SFP 0x1892 +/* Intel(R) Ethernet Connection C822N/X557-AT 10GBASE-T */ +#define ICE_DEV_ID_C822N_10G_BASE_T 0x1893 +/* Intel(R) Ethernet Connection C822N 1GbE */ +#define ICE_DEV_ID_C822N_SGMII 0x1894 #endif /* _ICE_DEVIDS_H_ */ diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index cf99fc358..88cd90660 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -166,6 +166,8 @@ static const struct rte_pci_id pci_id_ice_map[] = { { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_C822N_BACKPLANE) }, { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_C822N_QSFP) }, { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_C822N_SFP) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_C822N_10G_BASE_T) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_C822N_SGMII) }, { .vendor_id = 0, /* sentinel */ }, }; From patchwork Mon Jan 6 03:38:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 64227 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 49576A04F1; Mon, 6 Jan 2020 04:37:39 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A91BB1D569; Mon, 6 Jan 2020 04:36:08 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 4E6BF1D569 for ; Mon, 6 Jan 2020 04:36:02 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jan 2020 19:36:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,401,1571727600"; d="scan'208";a="216726377" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by fmsmga007.fm.intel.com with ESMTP; 05 Jan 2020 19:36:00 -0800 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang , Paul M Stillwell Jr Date: Mon, 6 Jan 2020 11:38:51 +0800 Message-Id: <20200106033851.43978-13-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200106033851.43978-1-qi.z.zhang@intel.com> References: <20191205123847.39579-1-qi.z.zhang@intel.com> <20200106033851.43978-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 12/12] net/ice/base: minor code clean X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Couple minor code clean include: 1. Improve debug message format. 2. Add missing macro and comment. 3. Remove unnecessary compile options. Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang Acked-by: Qiming Yang --- drivers/net/ice/base/ice_adminq_cmd.h | 1 + drivers/net/ice/base/ice_common.c | 2 +- drivers/net/ice/base/ice_flex_pipe.c | 8 +++++--- drivers/net/ice/base/ice_type.h | 4 ---- 4 files changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h index e6a1350ba..9a79c7645 100644 --- a/drivers/net/ice/base/ice_adminq_cmd.h +++ b/drivers/net/ice/base/ice_adminq_cmd.h @@ -1688,6 +1688,7 @@ struct ice_aqc_nvm { #define ICE_AQC_NVM_ACTIV_SEL_NVM BIT(3) /* Write Activate/SR Dump only */ #define ICE_AQC_NVM_ACTIV_SEL_OROM BIT(4) #define ICE_AQC_NVM_ACTIV_SEL_NETLIST BIT(5) +#define ICE_AQC_NVM_SPECIAL_UPDATE BIT(6) #define ICE_AQC_NVM_ACTIV_SEL_MASK MAKEMASK(0x7, 3) #define ICE_AQC_NVM_FLASH_ONLY BIT(7) __le16 module_typeid; diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 22b2e316d..786e99d21 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -592,7 +592,7 @@ void ice_print_rollback_msg(struct ice_hw *hw) SNPRINTF(nvm_str, sizeof(nvm_str), "%x.%02x 0x%x %d.%d.%d", ver_hi, ver_lo, hw->nvm.eetrack, oem_ver, oem_build, oem_patch); ice_warn(hw, - "Firmware rollback mode detected. Current version is NVM: %s, FW: %d.%d. Device may exhibit limited functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware rollback mode", + "Firmware rollback mode detected. Current version is NVM: %s, FW: %d.%d. Device may exhibit limited functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware rollback mode\n", nvm_str, hw->fw_maj_ver, hw->fw_min_ver); } diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 28ac3aa75..1598efd67 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -3069,7 +3069,8 @@ ice_free_prof_mask(struct ice_hw *hw, enum ice_block blk, u16 mask_idx) hw->blk[blk].masks.masks[mask_idx].idx = 0; /* update mask as unused entry */ - ice_debug(hw, ICE_DBG_PKG, "Free mask, blk %d, mask %d", blk, mask_idx); + ice_debug(hw, ICE_DBG_PKG, "Free mask, blk %d, mask %d\n", blk, + mask_idx); ice_write_prof_mask_reg(hw, blk, mask_idx, 0, 0); exit_ice_free_prof_mask: @@ -4173,7 +4174,7 @@ ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk, /* update package */ status = ice_update_pkg(hw, ice_pkg_buf(b), 1); if (status == ICE_ERR_AQ_ERROR) - ice_debug(hw, ICE_DBG_INIT, "Unable to update HW profile."); + ice_debug(hw, ICE_DBG_INIT, "Unable to update HW profile\n"); error_tmp: ice_pkg_buf_free(hw, b); @@ -5227,7 +5228,7 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig, * @blk: hardware block * @vsig: the VSIG to which this profile is to be added * @hdl: the profile handle indicating the profile to add - * @rev: true to reverse the additions to the list + * @rev: true to add entries to the end of the list * @chg: the change list */ static enum ice_status @@ -5379,6 +5380,7 @@ ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl, * @blk: hardware block * @vsi: the initial VSI that will be in VSIG * @lst: the list of profile that will be added to the VSIG + * @new_vsig: return of new vsig * @chg: the change list */ static enum ice_status diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index a8e4229a1..9773a549f 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -14,9 +14,7 @@ #define BITS_PER_BYTE 8 -#ifndef _FORCE_ #define _FORCE_ -#endif #define ICE_BYTES_PER_WORD 2 #define ICE_BYTES_PER_DWORD 4 @@ -130,9 +128,7 @@ static inline u32 ice_round_to_num(u32 N, u32 R) #define ICE_DBG_USER BIT_ULL(31) #define ICE_DBG_ALL 0xFFFFFFFFFFFFFFFFULL -#ifndef __ALWAYS_UNUSED #define __ALWAYS_UNUSED -#endif #define IS_ETHER_ADDR_EQUAL(addr1, addr2) \ (((bool)((((u16 *)(addr1))[0] == ((u16 *)(addr2))[0]))) && \