From patchwork Tue Oct 29 05:03:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 62131 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4CA13A00BE; Tue, 29 Oct 2019 06:03:39 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 259311BEE7; Tue, 29 Oct 2019 06:03:39 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id C2FBB1BEE0 for ; Tue, 29 Oct 2019 06:03:21 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x9T50gZD016396; Mon, 28 Oct 2019 22:03:21 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type : content-transfer-encoding; s=pfpt0818; bh=X4RuuXawpcp4keLdw3V6BJnBk/RBgU44VLGlSPSWFEg=; b=BpnQ5zKtMqUPOBF2hD6q40AeAGMaSwaTQ+W6xdWTRSRSPYpjFczBNUmyFahjsuv577Yu oDduAIjX3L5+Yn0ZHMBGMkRYGG/MO+6u42WnRPjYzyjH+nDHxOsExTq2wtLYhRYZwVq7 1gxH2AkR3QDnE5nDyeReeedjtWUwlzUwoTHsEgGX1CAq0zse1Wf3ElIluXBIcPKfmkA9 qoEU6DIAXZ0ll+jI+LHeWsmP0PEC1LEhLvbxoaysJbdHhOOowOTxJlL2lyeZK/73aYzB J+Ftc9rxF3FLpzuuynjz7dPn7V0a5Ly/UfhQ9XhG2i0ZAXs1IbfuLA14eBYb+EzRjHKq gQ== Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0a-0016f401.pphosted.com with ESMTP id 2vvkgq8qeh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 28 Oct 2019 22:03:20 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Mon, 28 Oct 2019 22:03:19 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Mon, 28 Oct 2019 22:03:19 -0700 Received: from BG-LT7430.marvell.com (bg-lt7430.marvell.com [10.28.10.255]) by maili.marvell.com (Postfix) with ESMTP id E79353F7040; Mon, 28 Oct 2019 22:03:16 -0700 (PDT) From: To: , , , John McNamara , "Marko Kovacevic" , Thomas Monjalon CC: , Pavan Nikhilesh Date: Tue, 29 Oct 2019 10:33:05 +0530 Message-ID: <20191029050312.2715-2-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029050312.2715-1-pbhagavatula@marvell.com> References: <20191025143314.11162-1-pbhagavatula@marvell.com> <20191029050312.2715-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-29_02:2019-10-28,2019-10-29 signatures=0 Subject: [dpdk-dev] [PATCH v14 1/7] ethdev: add set ptype function X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Add `rte_eth_dev_set_supported_ptypes` function that will allow the application to inform the PMD the packet types it is interested in. Based on the ptypes set PMDs can optimize their Rx path. -If application doesn’t want any ptype information it can call `rte_eth_dev_set_supported_ptypes(ethdev_id, RTE_PTYPE_UNKNOWN, NULL, 0)` and PMD may skip packet type processing and set rte_mbuf::packet_type to RTE_PTYPE_UNKNOWN. -If application doesn’t call `rte_eth_dev_set_supported_ptypes` PMD can return `rte_mbuf::packet_type` with `rte_eth_dev_get_supported_ptypes`. -If application is interested only in L2/L3 layer, it can inform the PMD to update `rte_mbuf::packet_type` with L2/L3 ptype by calling `rte_eth_dev_set_supported_ptypes(ethdev_id, RTE_PTYPE_L2_MASK | RTE_PTYPE_L3_MASK, NULL, 0)`. Suggested-by: Konstantin Ananyev Signed-off-by: Pavan Nikhilesh Reviewed-by: Andrew Rybchenko --- doc/guides/nics/features.rst | 7 +- doc/guides/rel_notes/release_19_11.rst | 8 +++ lib/librte_ethdev/rte_ethdev.c | 87 +++++++++++++++++++++++- lib/librte_ethdev/rte_ethdev.h | 37 ++++++++++ lib/librte_ethdev/rte_ethdev_core.h | 19 ++++++ lib/librte_ethdev/rte_ethdev_version.map | 1 + 6 files changed, 156 insertions(+), 3 deletions(-) diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst index d96696801..6e20bee5f 100644 --- a/doc/guides/nics/features.rst +++ b/doc/guides/nics/features.rst @@ -583,9 +583,12 @@ Packet type parsing ------------------- Supports packet type parsing and returns a list of supported types. +Allows application to set ptypes it is interested in. -* **[implements] eth_dev_ops**: ``dev_supported_ptypes_get``. -* **[related] API**: ``rte_eth_dev_get_supported_ptypes()``. +* **[implements] eth_dev_ops**: ``dev_supported_ptypes_get``, +* **[related] API**: ``rte_eth_dev_get_supported_ptypes()``, + ``rte_eth_dev_set_supported_ptypes()``, ``dev_supported_ptypes_set``. +* **[provides] mbuf**: ``mbuf.packet_type``. .. _nic_features_timesync: diff --git a/doc/guides/rel_notes/release_19_11.rst b/doc/guides/rel_notes/release_19_11.rst index e02e2f421..60f565401 100644 --- a/doc/guides/rel_notes/release_19_11.rst +++ b/doc/guides/rel_notes/release_19_11.rst @@ -224,6 +224,14 @@ New Features * Added a console command to testpmd app, ``show port (port_id) ptypes`` which gives ability to print port supported ptypes in different protocol layers. +* **Added ethdev API to set supported packet types** + + * Added new API ``rte_eth_dev_set_supported_ptypes`` that allows an + application to inform PMD about packet types classification the application + is interested in + * This scheme will allow PMDs to avoid lookup to internal ptype table on Rx + and thereby improve Rx performance if application wishes do so. + Removed Items ------------- diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c index 7743205d3..6ce8f5e75 100644 --- a/lib/librte_ethdev/rte_ethdev.c +++ b/lib/librte_ethdev/rte_ethdev.c @@ -2734,6 +2734,92 @@ rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask, return j; } +int +rte_eth_dev_set_supported_ptypes(uint16_t port_id, uint32_t ptype_mask, + uint32_t *set_ptypes, unsigned int num) +{ + const uint32_t valid_ptype_masks[] = { + RTE_PTYPE_L2_MASK, + RTE_PTYPE_L3_MASK, + RTE_PTYPE_L4_MASK, + RTE_PTYPE_TUNNEL_MASK, + RTE_PTYPE_INNER_L2_MASK, + RTE_PTYPE_INNER_L3_MASK, + RTE_PTYPE_INNER_L4_MASK, + }; + const uint32_t *all_ptypes; + struct rte_eth_dev *dev; + uint32_t unused_mask; + unsigned int i, j; + int ret; + + RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); + dev = &rte_eth_devices[port_id]; + + if (num > 0 && set_ptypes == NULL) + return -EINVAL; + + if (*dev->dev_ops->dev_supported_ptypes_get == NULL || + *dev->dev_ops->dev_supported_ptypes_set == NULL) { + ret = 0; + goto ptype_unknown; + } + + if (ptype_mask == 0) { + ret = (*dev->dev_ops->dev_supported_ptypes_set)(dev, + ptype_mask); + goto ptype_unknown; + } + + unused_mask = ptype_mask; + for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) { + uint32_t mask = ptype_mask & valid_ptype_masks[i]; + if (mask && mask != valid_ptype_masks[i]) { + ret = -EINVAL; + goto ptype_unknown; + } + unused_mask &= ~valid_ptype_masks[i]; + } + + if (unused_mask) { + ret = -EINVAL; + goto ptype_unknown; + } + + all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev); + if (all_ptypes == NULL) { + ret = 0; + goto ptype_unknown; + } + + /* + * Accodommodate as many set_ptypes as possible. If the supplied + * set_ptypes array is insufficient fill it partially. + */ + for (i = 0, j = 0; set_ptypes != NULL && + (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) { + if (ptype_mask & all_ptypes[i]) { + if (j < num - 1) { + set_ptypes[j] = all_ptypes[i]; + j++; + continue; + } + break; + } + } + + if (set_ptypes != NULL && j < num) + set_ptypes[j] = RTE_PTYPE_UNKNOWN; + + return (*dev->dev_ops->dev_supported_ptypes_set)(dev, ptype_mask); + +ptype_unknown: + if (num > 0) + set_ptypes[0] = RTE_PTYPE_UNKNOWN; + + return ret; +} + int rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr) { @@ -2746,7 +2832,6 @@ rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr) return 0; } - int rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu) { diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h index c36c1b631..c4ec36ea7 100644 --- a/lib/librte_ethdev/rte_ethdev.h +++ b/lib/librte_ethdev/rte_ethdev.h @@ -2539,6 +2539,43 @@ int rte_eth_dev_fw_version_get(uint16_t port_id, */ int rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask, uint32_t *ptypes, int num); +/** + * @warning + * @b EXPERIMENTAL: this API may change without prior notice. + * + * Inform Ethernet device of the packet types classification the recipient is + * interested in. + * + * Application can use this function to set only specific ptypes that it's + * interested. This information can be used by the PMD to optimize Rx path. + * + * The function accepts an array `set_ptypes` allocated by the caller to + * store the packet types set by the driver, the last element of the array + * is set to RTE_PTYPE_UNKNOWN. The size of the `set_ptype` array should be + * `rte_eth_dev_get_supported_ptypes() + 1` else it might only be filled + * partially. + * + * @param port_id + * The port identifier of the Ethernet device. + * @param ptype_mask + * The ptype family that application is interested in should be bitwise OR of + * RTE_PTYPE_*_MASK or 0. + * @param set_ptypes + * An array pointer to store set packet types, allocated by caller. The + * function marks the end of array with RTE_PTYPE_UNKNOWN. + * @param num + * Size of the array pointed by param ptypes. + * Should be rte_eth_dev_get_supported_ptypes() + 1 to accommodate the + * set ptypes. + * @return + * - (0) if Success. + * - (-ENODEV) if *port_id* invalid. + * - (-EINVAL) if *ptype_mask* is invalid (or) set_ptypes is NULL and + * num > 0. + */ +__rte_experimental +int rte_eth_dev_set_supported_ptypes(uint16_t port_id, uint32_t ptype_mask, + uint32_t *set_ptypes, unsigned int num); /** * Retrieve the MTU of an Ethernet device. diff --git a/lib/librte_ethdev/rte_ethdev_core.h b/lib/librte_ethdev/rte_ethdev_core.h index 392aea8e6..d5245a7d0 100644 --- a/lib/librte_ethdev/rte_ethdev_core.h +++ b/lib/librte_ethdev/rte_ethdev_core.h @@ -234,6 +234,23 @@ typedef int (*eth_dev_infos_get_t)(struct rte_eth_dev *dev, typedef const uint32_t *(*eth_dev_supported_ptypes_get_t)(struct rte_eth_dev *dev); /**< @internal Get supported ptypes of an Ethernet device. */ +/** + * @internal + * Inform an Ethernet device about packet types classifications the recipient + * is interested in. + * + * @param dev + * The Ethernet device identifier. + * @param ptype_mask + * The ptype family that application is interested in should be bitwise OR of + * RTE_PTYPE_*_MASK or 0. + * @return + * - (0) if Success. + * - (-EINVAL) if *ptype_mask* is invalid. + */ +typedef int (*eth_dev_supported_ptypes_set_t)(struct rte_eth_dev *dev, + uint32_t ptype_mask); + typedef int (*eth_queue_start_t)(struct rte_eth_dev *dev, uint16_t queue_id); /**< @internal Start rx and tx of a queue of an Ethernet device. */ @@ -550,6 +567,8 @@ struct eth_dev_ops { eth_fw_version_get_t fw_version_get; /**< Get firmware version. */ eth_dev_supported_ptypes_get_t dev_supported_ptypes_get; /**< Get packet types supported and identified by device. */ + eth_dev_supported_ptypes_set_t dev_supported_ptypes_set; + /**< Inform Ethernet device about packet types the recipient is interested in. */ vlan_filter_set_t vlan_filter_set; /**< Filter VLAN Setup. */ vlan_tpid_set_t vlan_tpid_set; /**< Outer/Inner VLAN TPID Setup. */ diff --git a/lib/librte_ethdev/rte_ethdev_version.map b/lib/librte_ethdev/rte_ethdev_version.map index e59d51648..f511294d2 100644 --- a/lib/librte_ethdev/rte_ethdev_version.map +++ b/lib/librte_ethdev/rte_ethdev_version.map @@ -288,4 +288,5 @@ EXPERIMENTAL { rte_eth_rx_burst_mode_get; rte_eth_tx_burst_mode_get; rte_eth_burst_mode_option_name; + rte_eth_dev_set_supported_ptypes; }; From patchwork Tue Oct 29 05:03:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 62132 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 978C7A00BE; Tue, 29 Oct 2019 06:03:44 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 0F3541BEF0; Tue, 29 Oct 2019 06:03:41 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 150841BECB for ; Tue, 29 Oct 2019 06:03:24 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x9T50gZF016396; Mon, 28 Oct 2019 22:03:24 -0700 DKIM-Signature: v=1; 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Mon, 28 Oct 2019 22:03:22 -0700 Received: from BG-LT7430.marvell.com (bg-lt7430.marvell.com [10.28.10.255]) by maili.marvell.com (Postfix) with ESMTP id 8051D3F7040; Mon, 28 Oct 2019 22:03:20 -0700 (PDT) From: To: , , , John McNamara , "Marko Kovacevic" , Thomas Monjalon CC: , Pavan Nikhilesh Date: Tue, 29 Oct 2019 10:33:06 +0530 Message-ID: <20191029050312.2715-3-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029050312.2715-1-pbhagavatula@marvell.com> References: <20191025143314.11162-1-pbhagavatula@marvell.com> <20191029050312.2715-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-29_02:2019-10-28,2019-10-29 signatures=0 Subject: [dpdk-dev] [PATCH v14 2/7] ethdev: add mbuf RSS update as an offload X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Add new Rx offload flag `DEV_RX_OFFLOAD_RSS_HASH` which can be used to enable/disable PMDs write to `rte_mbuf::hash::rss`. PMDs notify the validity of `rte_mbuf::hash:rss` to the applcation by enabling `PKT_RX_RSS_HASH ` flag in `rte_mbuf::ol_flags`. Signed-off-by: Pavan Nikhilesh Reviewed-by: Andrew Rybchenko --- doc/guides/nics/features.rst | 2 ++ doc/guides/rel_notes/release_19_11.rst | 7 +++++++ lib/librte_ethdev/rte_ethdev.c | 11 +++++++++++ lib/librte_ethdev/rte_ethdev.h | 1 + 4 files changed, 21 insertions(+) diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst index 6e20bee5f..9d45e927d 100644 --- a/doc/guides/nics/features.rst +++ b/doc/guides/nics/features.rst @@ -274,6 +274,7 @@ Supports RSS hashing on RX. * **[uses] user config**: ``dev_conf.rxmode.mq_mode`` = ``ETH_MQ_RX_RSS_FLAG``. * **[uses] user config**: ``dev_conf.rx_adv_conf.rss_conf``. +* **[uses] rte_eth_rxconf,rte_eth_rxmode**: ``offloads:DEV_RX_OFFLOAD_RSS_HASH``. * **[provides] rte_eth_dev_info**: ``flow_type_rss_offloads``. * **[provides] mbuf**: ``mbuf.ol_flags:PKT_RX_RSS_HASH``, ``mbuf.rss``. @@ -286,6 +287,7 @@ Inner RSS Supports RX RSS hashing on Inner headers. * **[uses] rte_flow_action_rss**: ``level``. +* **[uses] rte_eth_rxconf,rte_eth_rxmode**: ``offloads:DEV_RX_OFFLOAD_RSS_HASH``. * **[provides] mbuf**: ``mbuf.ol_flags:PKT_RX_RSS_HASH``, ``mbuf.rss``. diff --git a/doc/guides/rel_notes/release_19_11.rst b/doc/guides/rel_notes/release_19_11.rst index 60f565401..8b829ba11 100644 --- a/doc/guides/rel_notes/release_19_11.rst +++ b/doc/guides/rel_notes/release_19_11.rst @@ -232,6 +232,13 @@ New Features * This scheme will allow PMDs to avoid lookup to internal ptype table on Rx and thereby improve Rx performance if application wishes do so. +* **Added Rx offload flag to enable or disable RSS update** + + * Added new Rx offload flag `DEV_RX_OFFLOAD_RSS_HASH` which can be used to + enable/disable PMDs write to `rte_mbuf::hash::rss`. + * PMDs notify the validity of `rte_mbuf::hash:rss` to the application + by enabling `PKT_RX_RSS_HASH ` flag in `rte_mbuf::ol_flags`. + Removed Items ------------- diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c index 6ce8f5e75..fef1dbb61 100644 --- a/lib/librte_ethdev/rte_ethdev.c +++ b/lib/librte_ethdev/rte_ethdev.c @@ -129,6 +129,7 @@ static const struct { RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC), RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM), RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM), + RTE_RX_OFFLOAD_BIT2STR(RSS_HASH), }; #undef RTE_RX_OFFLOAD_BIT2STR @@ -1303,6 +1304,16 @@ rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q, goto rollback; } + /* Check if Rx*/ + if ((dev_conf->rxmode.mq_mode & ETH_MQ_RX_NONE) && + (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) { + RTE_ETHDEV_LOG(ERR, + "Ethdev port_id=%u config invalid mq_mode %s with offloads %s\n", + port_id, "ETH_MQ_RX_NONE", "DEV_RX_OFFLOAD_RSS_HASH"); + ret = -EINVAL; + goto rollback; + } + /* * Setup new number of RX/TX queues and reconfigure device. */ diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h index c4ec36ea7..a85e5bb0d 100644 --- a/lib/librte_ethdev/rte_ethdev.h +++ b/lib/librte_ethdev/rte_ethdev.h @@ -1048,6 +1048,7 @@ struct rte_eth_conf { #define DEV_RX_OFFLOAD_KEEP_CRC 0x00010000 #define DEV_RX_OFFLOAD_SCTP_CKSUM 0x00020000 #define DEV_RX_OFFLOAD_OUTER_UDP_CKSUM 0x00040000 +#define DEV_RX_OFFLOAD_RSS_HASH 0x00080000 #define DEV_RX_OFFLOAD_CHECKSUM (DEV_RX_OFFLOAD_IPV4_CKSUM | \ DEV_RX_OFFLOAD_UDP_CKSUM | \ From patchwork Tue Oct 29 05:03:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 62133 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 81AD7A00BE; Tue, 29 Oct 2019 06:03:54 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id CA8091BEFA; Tue, 29 Oct 2019 06:03:42 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id A83021BECE for ; Tue, 29 Oct 2019 06:03:27 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x9T50OZv010940; Mon, 28 Oct 2019 22:03:26 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; 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Mon, 28 Oct 2019 22:03:23 -0700 (PDT) From: To: , , , Thomas Monjalon CC: , Pavan Nikhilesh Date: Tue, 29 Oct 2019 10:33:07 +0530 Message-ID: <20191029050312.2715-4-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029050312.2715-1-pbhagavatula@marvell.com> References: <20191025143314.11162-1-pbhagavatula@marvell.com> <20191029050312.2715-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-29_02:2019-10-28,2019-10-29 signatures=0 Subject: [dpdk-dev] [PATCH v14 3/7] ethdev: log offloads that can't be disabled by PMD X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Some PMD can't work when certain offloads are disabled, to work around this the PMD auto enable the offloads internally and expose it through dev->data->dev_conf.rxmode.offloads. After dev_configure is called compare the requested offloads to the enabled offloads and log any offloads that have been enabled by the PMD. Suggested-by: Andrew Rybchenko Signed-off-by: Pavan Nikhilesh --- lib/librte_ethdev/rte_ethdev.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c index fef1dbb61..7dfc2f691 100644 --- a/lib/librte_ethdev/rte_ethdev.c +++ b/lib/librte_ethdev/rte_ethdev.c @@ -1142,6 +1142,8 @@ rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q, struct rte_eth_dev *dev; struct rte_eth_dev_info dev_info; struct rte_eth_conf orig_conf; + uint64_t offloads_force_ena; + uint64_t offload; int diag; int ret; @@ -1357,6 +1359,26 @@ rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q, goto rollback; } + /* Extract Rx offload bits that can't be disabled and log them */ + offloads_force_ena = dev_conf->rxmode.offloads ^ + dev->data->dev_conf.rxmode.offloads; + while (__builtin_popcount(offloads_force_ena)) { + offload = 1ULL << __builtin_ctzll(offloads_force_ena); + offloads_force_ena &= ~offload; + RTE_ETHDEV_LOG(INFO, "Port %u can't disable Rx offload %s\n", + port_id, rte_eth_dev_rx_offload_name(offload)); + } + + /* Extract Tx offload bits that can't be disabled and log them */ + offloads_force_ena = dev_conf->txmode.offloads ^ + dev->data->dev_conf.txmode.offloads; + while (__builtin_popcount(offloads_force_ena)) { + offload = 1ULL << __builtin_ctzll(offloads_force_ena); + offloads_force_ena &= ~offload; + RTE_ETHDEV_LOG(INFO, "Port %u can't disable Tx offload %s\n", + port_id, rte_eth_dev_tx_offload_name(offload)); + } + return 0; rollback: From patchwork Tue Oct 29 05:03:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 62135 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id ACE56A00BE; Tue, 29 Oct 2019 06:04:13 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9A2F81BF41; Tue, 29 Oct 2019 06:04:05 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id DFFFF1BF06 for ; Tue, 29 Oct 2019 06:03:42 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x9T50OVa010921; Mon, 28 Oct 2019 22:03:38 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=xhkn++C6I43wA5ocSg2yhNKuTvlNWliFPT7rEL6V6nA=; b=TsQyig7V8525Py/j+z7lUxDNCUn1TakMB4XxxV2tjGBiEDztLm2+YaK9A7eyJBMwNOGG bZYPx5fzQWyjcSrrKtyCa0tdX0QsHcTsJEw1XzP2AMUvspYLeRrX87H4S0HiEA/iWwQK o6kkV1iPdhyGlO/aOkEEycuVtDInhGHZyYiqXQBitv75gy8N6Tc9mZDizYaEELtkvgTi QrkDgPQ+o0OndsuQP/xk68kp3mpOLVhKLKtobXgqCD6MFpO/u54M3PDS1+dm9DkS4588 Mwh1T/efD7OQIDOe41rRGmPI9RlZavZ8aD7i1knLnpB81Mzg8YyxDAf5iizojXXqfCQO +g== Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0a-0016f401.pphosted.com with ESMTP id 2vvkgq8qfj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 28 Oct 2019 22:03:38 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Mon, 28 Oct 2019 22:03:37 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Mon, 28 Oct 2019 22:03:36 -0700 Received: from BG-LT7430.marvell.com (bg-lt7430.marvell.com [10.28.10.255]) by maili.marvell.com (Postfix) with ESMTP id EEA4E3F703F; Mon, 28 Oct 2019 22:03:26 -0700 (PDT) From: To: , , , Ajit Khaparde , "Somnath Kotur" , Rahul Lakkireddy , Hemant Agrawal , Sachin Saxena , Wenzhuo Lu , John Daley , Hyong Youb Kim , Qi Zhang , Xiao Wang , Ziyang Xuan , Xiaoyun Wang , Guoyang Zhou , Beilei Xing , Jingjing Wu , Qiming Yang , Konstantin Ananyev , Shijith Thotton , Srisivasubramanian Srinivasan , Matan Azrad , Shahaf Shuler , Viacheslav Ovsiienko , Stephen Hemminger , "K. Y. Srinivasan" , Haiyang Zhang , Alejandro Lucero , Nithin Dabilpuram , Kiran Kumar K , "Rasesh Mody" , Shahed Shaikh , Maciej Czekaj , Yong Wang CC: , Pavan Nikhilesh Date: Tue, 29 Oct 2019 10:33:08 +0530 Message-ID: <20191029050312.2715-5-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029050312.2715-1-pbhagavatula@marvell.com> References: <20191025143314.11162-1-pbhagavatula@marvell.com> <20191029050312.2715-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-29_02:2019-10-28,2019-10-29 signatures=0 Subject: [dpdk-dev] [PATCH v14 4/7] drivers/net: update Rx RSS hash offload capabilities X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Add DEV_RX_OFFLOAD_RSS_HASH flag for all PMDs that support RSS hash delivery. Signed-off-by: Pavan Nikhilesh Reviewed-by: Andrew Rybchenko Reviewed-by: Hemant Agrawal Acked-by: Jerin Jacob Acked-by: Ajit Khaparde --- drivers/net/bnxt/bnxt_ethdev.c | 8 +++++++- drivers/net/cxgbe/cxgbe.h | 3 ++- drivers/net/cxgbe/cxgbe_ethdev.c | 5 +++++ drivers/net/dpaa/dpaa_ethdev.c | 3 ++- drivers/net/dpaa2/dpaa2_ethdev.c | 1 + drivers/net/e1000/igb_ethdev.c | 6 ++++++ drivers/net/e1000/igb_rxtx.c | 3 ++- drivers/net/enic/enic_ethdev.c | 5 +++++ drivers/net/enic/enic_res.c | 3 ++- drivers/net/fm10k/fm10k_ethdev.c | 6 +++++- drivers/net/hinic/hinic_pmd_ethdev.c | 6 +++++- drivers/net/i40e/i40e_ethdev.c | 6 +++++- drivers/net/iavf/iavf_ethdev.c | 6 +++++- drivers/net/ice/ice_ethdev.c | 6 +++++- drivers/net/ixgbe/ixgbe_ethdev.c | 7 +++++++ drivers/net/ixgbe/ixgbe_rxtx.c | 3 ++- drivers/net/liquidio/lio_ethdev.c | 7 ++++++- drivers/net/mlx4/mlx4.c | 3 +++ drivers/net/mlx4/mlx4_rxq.c | 3 ++- drivers/net/mlx5/mlx5_ethdev.c | 4 ++++ drivers/net/mlx5/mlx5_rxq.c | 3 ++- drivers/net/netvsc/hn_ethdev.c | 3 +++ drivers/net/netvsc/hn_rndis.c | 3 ++- drivers/net/nfp/nfp_net.c | 6 +++++- drivers/net/octeontx2/otx2_ethdev.c | 3 ++- drivers/net/octeontx2/otx2_ethdev.h | 15 ++++++++------- drivers/net/qede/qede_ethdev.c | 6 +++++- drivers/net/sfc/sfc_ef10_essb_rx.c | 3 ++- drivers/net/sfc/sfc_ef10_rx.c | 3 ++- drivers/net/sfc/sfc_rx.c | 6 +++++- drivers/net/thunderx/nicvf_ethdev.c | 3 +++ drivers/net/thunderx/nicvf_ethdev.h | 3 ++- drivers/net/vmxnet3/vmxnet3_ethdev.c | 6 +++++- 33 files changed, 127 insertions(+), 30 deletions(-) diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index 7d9459f0a..01d48f47c 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -123,7 +123,8 @@ static const struct rte_pci_id bnxt_pci_id_map[] = { DEV_RX_OFFLOAD_KEEP_CRC | \ DEV_RX_OFFLOAD_VLAN_EXTEND | \ DEV_RX_OFFLOAD_TCP_LRO | \ - DEV_RX_OFFLOAD_SCATTER) + DEV_RX_OFFLOAD_SCATTER | \ + DEV_RX_OFFLOAD_RSS_HASH) static int bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask); static void bnxt_print_link_info(struct rte_eth_dev *eth_dev); @@ -689,6 +690,11 @@ static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev) bp->rx_cp_nr_rings = bp->rx_nr_rings; bp->tx_cp_nr_rings = bp->tx_nr_rings; + if (!(rx_offloads & DEV_RX_OFFLOAD_RSS_HASH)) { + rx_offloads |= DEV_RX_OFFLOAD_RSS_HASH; + eth_dev->data->dev_conf.rxmode.offloads = rx_offloads; + } + if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { eth_dev->data->mtu = eth_dev->data->dev_conf.rxmode.max_rx_pkt_len - diff --git a/drivers/net/cxgbe/cxgbe.h b/drivers/net/cxgbe/cxgbe.h index ed1be3559..6c1f73ac4 100644 --- a/drivers/net/cxgbe/cxgbe.h +++ b/drivers/net/cxgbe/cxgbe.h @@ -47,7 +47,8 @@ DEV_RX_OFFLOAD_UDP_CKSUM | \ DEV_RX_OFFLOAD_TCP_CKSUM | \ DEV_RX_OFFLOAD_JUMBO_FRAME | \ - DEV_RX_OFFLOAD_SCATTER) + DEV_RX_OFFLOAD_SCATTER | \ + DEV_RX_OFFLOAD_RSS_HASH) /* Common PF and VF devargs */ diff --git a/drivers/net/cxgbe/cxgbe_ethdev.c b/drivers/net/cxgbe/cxgbe_ethdev.c index 615dda607..6df127087 100644 --- a/drivers/net/cxgbe/cxgbe_ethdev.c +++ b/drivers/net/cxgbe/cxgbe_ethdev.c @@ -426,6 +426,11 @@ int cxgbe_dev_configure(struct rte_eth_dev *eth_dev) CXGBE_FUNC_TRACE(); + if (!(eth_dev->data->dev_conf.rxmode.offloads & + DEV_RX_OFFLOAD_RSS_HASH)) + eth_dev->data->dev_conf.rxmode.offloads |= + DEV_RX_OFFLOAD_RSS_HASH; + if (!(adapter->flags & FW_QUEUE_BOUND)) { err = cxgbe_setup_sge_fwevtq(adapter); if (err) diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c index caf255d67..096da752d 100644 --- a/drivers/net/dpaa/dpaa_ethdev.c +++ b/drivers/net/dpaa/dpaa_ethdev.c @@ -56,7 +56,8 @@ static uint64_t dev_rx_offloads_nodis = DEV_RX_OFFLOAD_IPV4_CKSUM | DEV_RX_OFFLOAD_UDP_CKSUM | DEV_RX_OFFLOAD_TCP_CKSUM | - DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM; + DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | + DEV_RX_OFFLOAD_RSS_HASH; /* Supported Tx offloads */ static uint64_t dev_tx_offloads_sup = diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c index 03131b903..eea31f254 100644 --- a/drivers/net/dpaa2/dpaa2_ethdev.c +++ b/drivers/net/dpaa2/dpaa2_ethdev.c @@ -45,6 +45,7 @@ static uint64_t dev_rx_offloads_sup = /* Rx offloads which cannot be disabled */ static uint64_t dev_rx_offloads_nodis = + DEV_RX_OFFLOAD_RSS_HASH | DEV_RX_OFFLOAD_SCATTER; /* Supported Tx offloads */ diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c index ce7c9e664..22665b51c 100644 --- a/drivers/net/e1000/igb_ethdev.c +++ b/drivers/net/e1000/igb_ethdev.c @@ -1182,6 +1182,9 @@ eth_igb_configure(struct rte_eth_dev *dev) PMD_INIT_FUNC_TRACE(); + if (!(dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) + dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; + /* multipe queue mode checking */ ret = igb_check_mq_mode(dev); if (ret != 0) { @@ -3255,6 +3258,9 @@ igbvf_dev_configure(struct rte_eth_dev *dev) PMD_INIT_LOG(DEBUG, "Configured Virtual Function port id: %d", dev->data->port_id); + if (!(dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) + dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; + /* * VF has no ability to enable/disable HW CRC * Keep the persistent behavior the same as Host PF diff --git a/drivers/net/e1000/igb_rxtx.c b/drivers/net/e1000/igb_rxtx.c index c5606de5d..684fa4ad8 100644 --- a/drivers/net/e1000/igb_rxtx.c +++ b/drivers/net/e1000/igb_rxtx.c @@ -1646,7 +1646,8 @@ igb_get_rx_port_offloads_capa(struct rte_eth_dev *dev) DEV_RX_OFFLOAD_TCP_CKSUM | DEV_RX_OFFLOAD_JUMBO_FRAME | DEV_RX_OFFLOAD_KEEP_CRC | - DEV_RX_OFFLOAD_SCATTER; + DEV_RX_OFFLOAD_SCATTER | + DEV_RX_OFFLOAD_RSS_HASH; return rx_offload_capa; } diff --git a/drivers/net/enic/enic_ethdev.c b/drivers/net/enic/enic_ethdev.c index 12c59a3c5..d2d1488d9 100644 --- a/drivers/net/enic/enic_ethdev.c +++ b/drivers/net/enic/enic_ethdev.c @@ -405,6 +405,11 @@ static int enicpmd_dev_configure(struct rte_eth_dev *eth_dev) return ret; } + if (!(eth_dev->data->dev_conf.rxmode.offloads & + DEV_RX_OFFLOAD_RSS_HASH)) + eth_dev->data->dev_conf.rxmode.offloads |= + DEV_RX_OFFLOAD_RSS_HASH; + enic->mc_count = 0; enic->hw_ip_checksum = !!(eth_dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_CHECKSUM); diff --git a/drivers/net/enic/enic_res.c b/drivers/net/enic/enic_res.c index f403a0b66..7c3c270a2 100644 --- a/drivers/net/enic/enic_res.c +++ b/drivers/net/enic/enic_res.c @@ -205,7 +205,8 @@ int enic_get_vnic_config(struct enic *enic) DEV_RX_OFFLOAD_VLAN_STRIP | DEV_RX_OFFLOAD_IPV4_CKSUM | DEV_RX_OFFLOAD_UDP_CKSUM | - DEV_RX_OFFLOAD_TCP_CKSUM; + DEV_RX_OFFLOAD_TCP_CKSUM | + DEV_RX_OFFLOAD_RSS_HASH; enic->tx_offload_mask = PKT_TX_IPV6 | PKT_TX_IPV4 | diff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c index 99c4366e4..2e834130d 100644 --- a/drivers/net/fm10k/fm10k_ethdev.c +++ b/drivers/net/fm10k/fm10k_ethdev.c @@ -461,6 +461,9 @@ fm10k_dev_configure(struct rte_eth_dev *dev) PMD_INIT_FUNC_TRACE(); + if (!(dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) + dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; + /* multipe queue mode checking */ ret = fm10k_check_mq_mode(dev); if (ret != 0) { @@ -1805,7 +1808,8 @@ static uint64_t fm10k_get_rx_port_offloads_capa(struct rte_eth_dev *dev) DEV_RX_OFFLOAD_UDP_CKSUM | DEV_RX_OFFLOAD_TCP_CKSUM | DEV_RX_OFFLOAD_JUMBO_FRAME | - DEV_RX_OFFLOAD_HEADER_SPLIT); + DEV_RX_OFFLOAD_HEADER_SPLIT | + DEV_RX_OFFLOAD_RSS_HASH); } static int diff --git a/drivers/net/hinic/hinic_pmd_ethdev.c b/drivers/net/hinic/hinic_pmd_ethdev.c index 9f37a404b..6673777e9 100644 --- a/drivers/net/hinic/hinic_pmd_ethdev.c +++ b/drivers/net/hinic/hinic_pmd_ethdev.c @@ -318,6 +318,9 @@ static int hinic_dev_configure(struct rte_eth_dev *dev) return -EINVAL; } + if (!(dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) + dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; + /* mtu size is 256~9600 */ if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE || dev->data->dev_conf.rxmode.max_rx_pkt_len > @@ -740,7 +743,8 @@ hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) DEV_RX_OFFLOAD_VLAN_FILTER | DEV_RX_OFFLOAD_SCATTER | DEV_RX_OFFLOAD_JUMBO_FRAME | - DEV_RX_OFFLOAD_TCP_LRO; + DEV_RX_OFFLOAD_TCP_LRO | + DEV_RX_OFFLOAD_RSS_HASH; info->tx_queue_offload_capa = 0; info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT | diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 77a46832c..78fea04f8 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -1812,6 +1812,9 @@ i40e_dev_configure(struct rte_eth_dev *dev) ad->tx_simple_allowed = true; ad->tx_vec_allowed = true; + if (!(dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) + dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; + /* Only legacy filter API needs the following fdir config. So when the * legacy filter API is deprecated, the following codes should also be * removed. @@ -3613,7 +3616,8 @@ i40e_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) DEV_RX_OFFLOAD_SCATTER | DEV_RX_OFFLOAD_VLAN_EXTEND | DEV_RX_OFFLOAD_VLAN_FILTER | - DEV_RX_OFFLOAD_JUMBO_FRAME; + DEV_RX_OFFLOAD_JUMBO_FRAME | + DEV_RX_OFFLOAD_RSS_HASH; dev_info->tx_queue_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE; dev_info->tx_offload_capa = diff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c index eebc49ade..172c3f6ac 100644 --- a/drivers/net/iavf/iavf_ethdev.c +++ b/drivers/net/iavf/iavf_ethdev.c @@ -147,6 +147,9 @@ iavf_dev_configure(struct rte_eth_dev *dev) ad->rx_vec_allowed = true; ad->tx_vec_allowed = true; + if (!(dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) + dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; + /* Vlan stripping setting */ if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN) { if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) @@ -522,7 +525,8 @@ iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | DEV_RX_OFFLOAD_SCATTER | DEV_RX_OFFLOAD_JUMBO_FRAME | - DEV_RX_OFFLOAD_VLAN_FILTER; + DEV_RX_OFFLOAD_VLAN_FILTER | + DEV_RX_OFFLOAD_RSS_HASH; dev_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT | DEV_TX_OFFLOAD_QINQ_INSERT | diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index d74675842..8ff96a96e 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -2357,6 +2357,9 @@ ice_dev_configure(struct rte_eth_dev *dev) ad->rx_bulk_alloc_allowed = true; ad->tx_simple_allowed = true; + if (!(dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) + dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; + return 0; } @@ -2800,7 +2803,8 @@ ice_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) DEV_RX_OFFLOAD_TCP_CKSUM | DEV_RX_OFFLOAD_QINQ_STRIP | DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | - DEV_RX_OFFLOAD_VLAN_EXTEND; + DEV_RX_OFFLOAD_VLAN_EXTEND | + DEV_RX_OFFLOAD_RSS_HASH; dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_QINQ_INSERT | DEV_TX_OFFLOAD_IPV4_CKSUM | diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index dbce7a80e..a299c1c74 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -2402,6 +2402,10 @@ ixgbe_dev_configure(struct rte_eth_dev *dev) int ret; PMD_INIT_FUNC_TRACE(); + + if (!(dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) + dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; + /* multipe queue mode checking */ ret = ixgbe_check_mq_mode(dev); if (ret != 0) { @@ -5140,6 +5144,9 @@ ixgbevf_dev_configure(struct rte_eth_dev *dev) PMD_INIT_LOG(DEBUG, "Configured Virtual Function port id: %d", dev->data->port_id); + if (!(dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) + dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; + /* * VF has no ability to enable/disable HW CRC * Keep the persistent behavior the same as Host PF diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c index edcfa60ce..fa572d184 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx.c +++ b/drivers/net/ixgbe/ixgbe_rxtx.c @@ -2872,7 +2872,8 @@ ixgbe_get_rx_port_offloads(struct rte_eth_dev *dev) DEV_RX_OFFLOAD_KEEP_CRC | DEV_RX_OFFLOAD_JUMBO_FRAME | DEV_RX_OFFLOAD_VLAN_FILTER | - DEV_RX_OFFLOAD_SCATTER; + DEV_RX_OFFLOAD_SCATTER | + DEV_RX_OFFLOAD_RSS_HASH; if (hw->mac.type == ixgbe_mac_82598EB) offloads |= DEV_RX_OFFLOAD_VLAN_STRIP; diff --git a/drivers/net/liquidio/lio_ethdev.c b/drivers/net/liquidio/lio_ethdev.c index ec01343f1..d873b6ff4 100644 --- a/drivers/net/liquidio/lio_ethdev.c +++ b/drivers/net/liquidio/lio_ethdev.c @@ -412,7 +412,8 @@ lio_dev_info_get(struct rte_eth_dev *eth_dev, devinfo->rx_offload_capa = (DEV_RX_OFFLOAD_IPV4_CKSUM | DEV_RX_OFFLOAD_UDP_CKSUM | DEV_RX_OFFLOAD_TCP_CKSUM | - DEV_RX_OFFLOAD_VLAN_STRIP); + DEV_RX_OFFLOAD_VLAN_STRIP | + DEV_RX_OFFLOAD_RSS_HASH); devinfo->tx_offload_capa = (DEV_TX_OFFLOAD_IPV4_CKSUM | DEV_TX_OFFLOAD_UDP_CKSUM | DEV_TX_OFFLOAD_TCP_CKSUM | @@ -1735,6 +1736,10 @@ lio_dev_configure(struct rte_eth_dev *eth_dev) PMD_INIT_FUNC_TRACE(); + if (!(eth_dev->data->dev_conf.rxmode.offloads & + DEV_RX_OFFLOAD_RSS_HASH)) + eth_dev->data->dev_conf.rxmode.offloads |= + DEV_RX_OFFLOAD_RSS_HASH; /* Inform firmware about change in number of queues to use. * Disable IO queues and reset registers for re-configuration. */ diff --git a/drivers/net/mlx4/mlx4.c b/drivers/net/mlx4/mlx4.c index 931e4f4fe..6df2f6f90 100644 --- a/drivers/net/mlx4/mlx4.c +++ b/drivers/net/mlx4/mlx4.c @@ -248,6 +248,9 @@ mlx4_dev_configure(struct rte_eth_dev *dev) struct rte_flow_error error; int ret; + if (!(dev->data->dev_conf.rxmode.offload & DEV_RX_OFFLOAD_RSS_HASH)) + dev->data->dev_conf.rxmode.offload |= DEV_RX_OFFLOAD_RSS_HASH; + /* Prepare internal flow rules. */ ret = mlx4_flow_sync(priv, &error); if (ret) { diff --git a/drivers/net/mlx4/mlx4_rxq.c b/drivers/net/mlx4/mlx4_rxq.c index f45c1ff85..4a6fbd922 100644 --- a/drivers/net/mlx4/mlx4_rxq.c +++ b/drivers/net/mlx4/mlx4_rxq.c @@ -685,7 +685,8 @@ mlx4_get_rx_queue_offloads(struct mlx4_priv *priv) { uint64_t offloads = DEV_RX_OFFLOAD_SCATTER | DEV_RX_OFFLOAD_KEEP_CRC | - DEV_RX_OFFLOAD_JUMBO_FRAME; + DEV_RX_OFFLOAD_JUMBO_FRAME | + DEV_RX_OFFLOAD_RSS_HASH; if (priv->hw_csum) offloads |= DEV_RX_OFFLOAD_CHECKSUM; diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c index 2278b24c0..e87d52ea1 100644 --- a/drivers/net/mlx5/mlx5_ethdev.c +++ b/drivers/net/mlx5/mlx5_ethdev.c @@ -407,6 +407,10 @@ mlx5_dev_configure(struct rte_eth_dev *dev) rte_errno = ENOMEM; return -rte_errno; } + + if (!(dev->data->dev_conf.rxmode.offload & DEV_RX_OFFLOAD_RSS_HASH)) + dev->data->dev_conf.rxmode.offload |= DEV_RX_OFFLOAD_RSS_HASH; + memcpy(priv->rss_conf.rss_key, use_app_rss_key ? dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key : diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index f0ab8438d..c8e1fc4b6 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -368,7 +368,8 @@ mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev) struct mlx5_dev_config *config = &priv->config; uint64_t offloads = (DEV_RX_OFFLOAD_SCATTER | DEV_RX_OFFLOAD_TIMESTAMP | - DEV_RX_OFFLOAD_JUMBO_FRAME); + DEV_RX_OFFLOAD_JUMBO_FRAME | + DEV_RX_OFFLOAD_RSS_HASH); if (config->hw_fcs_strip) offloads |= DEV_RX_OFFLOAD_KEEP_CRC; diff --git a/drivers/net/netvsc/hn_ethdev.c b/drivers/net/netvsc/hn_ethdev.c index eed8dece9..5c027e1a4 100644 --- a/drivers/net/netvsc/hn_ethdev.c +++ b/drivers/net/netvsc/hn_ethdev.c @@ -532,6 +532,9 @@ static int hn_dev_configure(struct rte_eth_dev *dev) PMD_INIT_FUNC_TRACE(); + if (!(rxmode->offloads & DEV_RX_OFFLOAD_RSS_HASH)) + dev_conf->rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; + unsupported = txmode->offloads & ~HN_TX_OFFLOAD_CAPS; if (unsupported) { PMD_DRV_LOG(NOTICE, diff --git a/drivers/net/netvsc/hn_rndis.c b/drivers/net/netvsc/hn_rndis.c index a67bc7a79..2b4714042 100644 --- a/drivers/net/netvsc/hn_rndis.c +++ b/drivers/net/netvsc/hn_rndis.c @@ -897,7 +897,8 @@ int hn_rndis_get_offload(struct hn_data *hv, == HN_NDIS_LSOV2_CAP_IP6) dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO; - dev_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP; + dev_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP | + DEV_RX_OFFLOAD_RSS_HASH; if (hwcaps.ndis_csum.ndis_ip4_rxcsum & NDIS_RXCSUM_CAP_IP4) dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_IPV4_CKSUM; diff --git a/drivers/net/nfp/nfp_net.c b/drivers/net/nfp/nfp_net.c index 22a8b2d19..e288a7f7e 100644 --- a/drivers/net/nfp/nfp_net.c +++ b/drivers/net/nfp/nfp_net.c @@ -407,6 +407,9 @@ nfp_net_configure(struct rte_eth_dev *dev) rxmode = &dev_conf->rxmode; txmode = &dev_conf->txmode; + if (!(rxmode->offloads & DEV_RX_OFFLOAD_RSS_HASH)) + rxmode->offloads |= DEV_RX_OFFLOAD_RSS_HASH; + /* Checking TX mode */ if (txmode->mq_mode) { PMD_INIT_LOG(INFO, "TX mq_mode DCB and VMDq not supported"); @@ -1236,7 +1239,8 @@ nfp_net_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) DEV_RX_OFFLOAD_UDP_CKSUM | DEV_RX_OFFLOAD_TCP_CKSUM; - dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_JUMBO_FRAME; + dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_JUMBO_FRAME | + DEV_RX_OFFLOAD_RSS_HASH; if (hw->cap & NFP_NET_CFG_CTRL_TXVLAN) dev_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT; diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c index 62291c698..d6e8ae745 100644 --- a/drivers/net/octeontx2/otx2_ethdev.c +++ b/drivers/net/octeontx2/otx2_ethdev.c @@ -575,7 +575,8 @@ nix_rx_offload_flags(struct rte_eth_dev *eth_dev) struct rte_eth_rxmode *rxmode = &conf->rxmode; uint16_t flags = 0; - if (rxmode->mq_mode == ETH_MQ_RX_RSS) + if (rxmode->mq_mode == ETH_MQ_RX_RSS && + (dev->rx_offloads & DEV_RX_OFFLOAD_RSS_HASH)) flags |= NIX_RX_OFFLOAD_RSS_F; if (dev->rx_offloads & (DEV_RX_OFFLOAD_TCP_CKSUM | diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h index 4d9ed4870..d581240fe 100644 --- a/drivers/net/octeontx2/otx2_ethdev.h +++ b/drivers/net/octeontx2/otx2_ethdev.h @@ -122,8 +122,8 @@ DEV_TX_OFFLOAD_MT_LOCKFREE | \ DEV_TX_OFFLOAD_VLAN_INSERT | \ DEV_TX_OFFLOAD_QINQ_INSERT | \ - DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | \ - DEV_TX_OFFLOAD_OUTER_UDP_CKSUM | \ + DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | \ + DEV_TX_OFFLOAD_OUTER_UDP_CKSUM | \ DEV_TX_OFFLOAD_TCP_CKSUM | \ DEV_TX_OFFLOAD_UDP_CKSUM | \ DEV_TX_OFFLOAD_SCTP_CKSUM | \ @@ -140,11 +140,12 @@ DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | \ DEV_RX_OFFLOAD_SCATTER | \ DEV_RX_OFFLOAD_JUMBO_FRAME | \ - DEV_RX_OFFLOAD_OUTER_UDP_CKSUM | \ - DEV_RX_OFFLOAD_VLAN_STRIP | \ - DEV_RX_OFFLOAD_VLAN_FILTER | \ - DEV_RX_OFFLOAD_QINQ_STRIP | \ - DEV_RX_OFFLOAD_TIMESTAMP) + DEV_RX_OFFLOAD_OUTER_UDP_CKSUM | \ + DEV_RX_OFFLOAD_VLAN_STRIP | \ + DEV_RX_OFFLOAD_VLAN_FILTER | \ + DEV_RX_OFFLOAD_QINQ_STRIP | \ + DEV_RX_OFFLOAD_TIMESTAMP | \ + DEV_RX_OFFLOAD_RSS_HASH) #define NIX_DEFAULT_RSS_CTX_GROUP 0 #define NIX_DEFAULT_RSS_MCAM_IDX -1 diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c index 53fdfde9a..8cdf04eaf 100644 --- a/drivers/net/qede/qede_ethdev.c +++ b/drivers/net/qede/qede_ethdev.c @@ -1182,6 +1182,9 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev) PMD_INIT_FUNC_TRACE(edev); + if (!(rxmode->offloads & DEV_RX_OFFLOAD_RSS_HASH)) + rxmode->offloads |= DEV_RX_OFFLOAD_RSS_HASH; + /* We need to have min 1 RX queue.There is no min check in * rte_eth_dev_configure(), so we are checking it here. */ @@ -1302,7 +1305,8 @@ qede_dev_info_get(struct rte_eth_dev *eth_dev, DEV_RX_OFFLOAD_SCATTER | DEV_RX_OFFLOAD_JUMBO_FRAME | DEV_RX_OFFLOAD_VLAN_FILTER | - DEV_RX_OFFLOAD_VLAN_STRIP); + DEV_RX_OFFLOAD_VLAN_STRIP | + DEV_RX_OFFLOAD_RSS_HASH); dev_info->rx_queue_offload_capa = 0; /* TX offloads are on a per-packet basis, so it is applicable diff --git a/drivers/net/sfc/sfc_ef10_essb_rx.c b/drivers/net/sfc/sfc_ef10_essb_rx.c index 63da807ea..d9d2ce6bd 100644 --- a/drivers/net/sfc/sfc_ef10_essb_rx.c +++ b/drivers/net/sfc/sfc_ef10_essb_rx.c @@ -715,7 +715,8 @@ struct sfc_dp_rx sfc_ef10_essb_rx = { }, .features = SFC_DP_RX_FEAT_FLOW_FLAG | SFC_DP_RX_FEAT_FLOW_MARK, - .dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM, + .dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM | + DEV_RX_OFFLOAD_RSS_HASH, .queue_offload_capa = 0, .get_dev_info = sfc_ef10_essb_rx_get_dev_info, .pool_ops_supported = sfc_ef10_essb_rx_pool_ops_supported, diff --git a/drivers/net/sfc/sfc_ef10_rx.c b/drivers/net/sfc/sfc_ef10_rx.c index f2fc6e70a..9e527b7fb 100644 --- a/drivers/net/sfc/sfc_ef10_rx.c +++ b/drivers/net/sfc/sfc_ef10_rx.c @@ -796,7 +796,8 @@ struct sfc_dp_rx sfc_ef10_rx = { .features = SFC_DP_RX_FEAT_MULTI_PROCESS | SFC_DP_RX_FEAT_INTR, .dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM | - DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM, + DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | + DEV_RX_OFFLOAD_RSS_HASH, .queue_offload_capa = DEV_RX_OFFLOAD_SCATTER, .get_dev_info = sfc_ef10_rx_get_dev_info, .qsize_up_rings = sfc_ef10_rx_qsize_up_rings, diff --git a/drivers/net/sfc/sfc_rx.c b/drivers/net/sfc/sfc_rx.c index e6809bb64..4af8f1977 100644 --- a/drivers/net/sfc/sfc_rx.c +++ b/drivers/net/sfc/sfc_rx.c @@ -617,7 +617,8 @@ struct sfc_dp_rx sfc_efx_rx = { .hw_fw_caps = 0, }, .features = SFC_DP_RX_FEAT_INTR, - .dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM, + .dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM | + DEV_RX_OFFLOAD_RSS_HASH, .queue_offload_capa = DEV_RX_OFFLOAD_SCATTER, .qsize_up_rings = sfc_efx_rx_qsize_up_rings, .qcreate = sfc_efx_rx_qcreate, @@ -1556,6 +1557,9 @@ sfc_rx_check_mode(struct sfc_adapter *sa, struct rte_eth_rxmode *rxmode) rxmode->offloads |= DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM; } + if (!(rxmode->offloads & DEV_RX_OFFLOAD_RSS_HASH)) + rxmode->offloads |= DEV_RX_OFFLOAD_RSS_HASH; + return rc; } diff --git a/drivers/net/thunderx/nicvf_ethdev.c b/drivers/net/thunderx/nicvf_ethdev.c index b93d45712..28ee3e46d 100644 --- a/drivers/net/thunderx/nicvf_ethdev.c +++ b/drivers/net/thunderx/nicvf_ethdev.c @@ -1920,6 +1920,9 @@ nicvf_dev_configure(struct rte_eth_dev *dev) PMD_INIT_FUNC_TRACE(); + if (!(rxmode->offloads & DEV_RX_OFFLOAD_RSS_HASH)) + rxmode->offloads |= DEV_RX_OFFLOAD_RSS_HASH; + if (!rte_eal_has_hugepages()) { PMD_INIT_LOG(INFO, "Huge page is not configured"); return -EINVAL; diff --git a/drivers/net/thunderx/nicvf_ethdev.h b/drivers/net/thunderx/nicvf_ethdev.h index c0bfbf848..391411799 100644 --- a/drivers/net/thunderx/nicvf_ethdev.h +++ b/drivers/net/thunderx/nicvf_ethdev.h @@ -41,7 +41,8 @@ DEV_RX_OFFLOAD_CHECKSUM | \ DEV_RX_OFFLOAD_VLAN_STRIP | \ DEV_RX_OFFLOAD_JUMBO_FRAME | \ - DEV_RX_OFFLOAD_SCATTER) + DEV_RX_OFFLOAD_SCATTER | \ + DEV_RX_OFFLOAD_RSS_HASH) #define NICVF_DEFAULT_RX_FREE_THRESH 224 #define NICVF_DEFAULT_TX_FREE_THRESH 224 diff --git a/drivers/net/vmxnet3/vmxnet3_ethdev.c b/drivers/net/vmxnet3/vmxnet3_ethdev.c index d1faeaa81..5ef6ad43c 100644 --- a/drivers/net/vmxnet3/vmxnet3_ethdev.c +++ b/drivers/net/vmxnet3/vmxnet3_ethdev.c @@ -56,7 +56,8 @@ DEV_RX_OFFLOAD_UDP_CKSUM | \ DEV_RX_OFFLOAD_TCP_CKSUM | \ DEV_RX_OFFLOAD_TCP_LRO | \ - DEV_RX_OFFLOAD_JUMBO_FRAME) + DEV_RX_OFFLOAD_JUMBO_FRAME | \ + DEV_RX_OFFLOAD_RSS_HASH) static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev); static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev); @@ -407,6 +408,9 @@ vmxnet3_dev_configure(struct rte_eth_dev *dev) PMD_INIT_FUNC_TRACE(); + if (!(dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) + dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; + if (dev->data->nb_tx_queues > VMXNET3_MAX_TX_QUEUES || dev->data->nb_rx_queues > VMXNET3_MAX_RX_QUEUES) { PMD_INIT_LOG(ERR, "ERROR: Number of queues not supported"); From patchwork Tue Oct 29 05:03:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 62134 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2F2D5A00BE; Tue, 29 Oct 2019 06:04:04 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DC64B1BEE9; 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Mon, 28 Oct 2019 22:03:41 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Mon, 28 Oct 2019 22:03:40 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Mon, 28 Oct 2019 22:03:40 -0700 Received: from BG-LT7430.marvell.com (bg-lt7430.marvell.com [10.28.10.255]) by maili.marvell.com (Postfix) with ESMTP id E812B3F703F; Mon, 28 Oct 2019 22:03:37 -0700 (PDT) From: To: , , , Harry van Haaren CC: , Pavan Nikhilesh Date: Tue, 29 Oct 2019 10:33:09 +0530 Message-ID: <20191029050312.2715-6-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029050312.2715-1-pbhagavatula@marvell.com> References: <20191025143314.11162-1-pbhagavatula@marvell.com> <20191029050312.2715-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-29_02:2019-10-28,2019-10-29 signatures=0 Subject: [dpdk-dev] [PATCH v14 5/7] examples/eventdev_pipeline: add new Rx RSS hash offload X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Since pipeline_generic uses `rte_mbuf::hash::rss` add the new Rx offload flag `DEV_RX_OFFLOAD_RSS_HASH` to inform PMD to copy the RSS hash result into the mbuf. Signed-off-by: Pavan Nikhilesh --- examples/eventdev_pipeline/main.c | 128 ----------------- .../pipeline_worker_generic.c | 132 ++++++++++++++++++ .../eventdev_pipeline/pipeline_worker_tx.c | 128 +++++++++++++++++ 3 files changed, 260 insertions(+), 128 deletions(-) diff --git a/examples/eventdev_pipeline/main.c b/examples/eventdev_pipeline/main.c index f77830282..d3ff1bbe4 100644 --- a/examples/eventdev_pipeline/main.c +++ b/examples/eventdev_pipeline/main.c @@ -242,133 +242,6 @@ parse_app_args(int argc, char **argv) } } -/* - * Initializes a given port using global settings and with the RX buffers - * coming from the mbuf_pool passed as a parameter. - */ -static inline int -port_init(uint8_t port, struct rte_mempool *mbuf_pool) -{ - struct rte_eth_rxconf rx_conf; - static const struct rte_eth_conf port_conf_default = { - .rxmode = { - .mq_mode = ETH_MQ_RX_RSS, - .max_rx_pkt_len = RTE_ETHER_MAX_LEN, - }, - .rx_adv_conf = { - .rss_conf = { - .rss_hf = ETH_RSS_IP | - ETH_RSS_TCP | - ETH_RSS_UDP, - } - } - }; - const uint16_t rx_rings = 1, tx_rings = 1; - const uint16_t rx_ring_size = 512, tx_ring_size = 512; - struct rte_eth_conf port_conf = port_conf_default; - int retval; - uint16_t q; - struct rte_eth_dev_info dev_info; - struct rte_eth_txconf txconf; - - if (!rte_eth_dev_is_valid_port(port)) - return -1; - - retval = rte_eth_dev_info_get(port, &dev_info); - if (retval != 0) { - printf("Error during getting device (port %u) info: %s\n", - port, strerror(-retval)); - return retval; - } - - if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE) - port_conf.txmode.offloads |= - DEV_TX_OFFLOAD_MBUF_FAST_FREE; - rx_conf = dev_info.default_rxconf; - rx_conf.offloads = port_conf.rxmode.offloads; - - port_conf.rx_adv_conf.rss_conf.rss_hf &= - dev_info.flow_type_rss_offloads; - if (port_conf.rx_adv_conf.rss_conf.rss_hf != - port_conf_default.rx_adv_conf.rss_conf.rss_hf) { - printf("Port %u modified RSS hash function based on hardware support," - "requested:%#"PRIx64" configured:%#"PRIx64"\n", - port, - port_conf_default.rx_adv_conf.rss_conf.rss_hf, - port_conf.rx_adv_conf.rss_conf.rss_hf); - } - - /* Configure the Ethernet device. */ - retval = rte_eth_dev_configure(port, rx_rings, tx_rings, &port_conf); - if (retval != 0) - return retval; - - /* Allocate and set up 1 RX queue per Ethernet port. */ - for (q = 0; q < rx_rings; q++) { - retval = rte_eth_rx_queue_setup(port, q, rx_ring_size, - rte_eth_dev_socket_id(port), &rx_conf, - mbuf_pool); - if (retval < 0) - return retval; - } - - txconf = dev_info.default_txconf; - txconf.offloads = port_conf_default.txmode.offloads; - /* Allocate and set up 1 TX queue per Ethernet port. */ - for (q = 0; q < tx_rings; q++) { - retval = rte_eth_tx_queue_setup(port, q, tx_ring_size, - rte_eth_dev_socket_id(port), &txconf); - if (retval < 0) - return retval; - } - - /* Display the port MAC address. */ - struct rte_ether_addr addr; - retval = rte_eth_macaddr_get(port, &addr); - if (retval != 0) { - printf("Failed to get MAC address (port %u): %s\n", - port, rte_strerror(-retval)); - return retval; - } - - printf("Port %u MAC: %02" PRIx8 " %02" PRIx8 " %02" PRIx8 - " %02" PRIx8 " %02" PRIx8 " %02" PRIx8 "\n", - (unsigned int)port, - addr.addr_bytes[0], addr.addr_bytes[1], - addr.addr_bytes[2], addr.addr_bytes[3], - addr.addr_bytes[4], addr.addr_bytes[5]); - - /* Enable RX in promiscuous mode for the Ethernet device. */ - retval = rte_eth_promiscuous_enable(port); - if (retval != 0) - return retval; - - return 0; -} - -static int -init_ports(uint16_t num_ports) -{ - uint16_t portid; - - if (!cdata.num_mbuf) - cdata.num_mbuf = 16384 * num_ports; - - struct rte_mempool *mp = rte_pktmbuf_pool_create("packet_pool", - /* mbufs */ cdata.num_mbuf, - /* cache_size */ 512, - /* priv_size*/ 0, - /* data_room_size */ RTE_MBUF_DEFAULT_BUF_SIZE, - rte_socket_id()); - - RTE_ETH_FOREACH_DEV(portid) - if (port_init(portid, mp) != 0) - rte_exit(EXIT_FAILURE, "Cannot init port %"PRIu16 "\n", - portid); - - return 0; -} - static void do_capability_setup(uint8_t eventdev_id) { @@ -515,7 +388,6 @@ main(int argc, char **argv) if (dev_id < 0) rte_exit(EXIT_FAILURE, "Error setting up eventdev\n"); - init_ports(num_ports); fdata->cap.adptr_setup(num_ports); /* Start the Ethernet port. */ diff --git a/examples/eventdev_pipeline/pipeline_worker_generic.c b/examples/eventdev_pipeline/pipeline_worker_generic.c index 766c8e958..42ff4eeb9 100644 --- a/examples/eventdev_pipeline/pipeline_worker_generic.c +++ b/examples/eventdev_pipeline/pipeline_worker_generic.c @@ -271,6 +271,137 @@ setup_eventdev_generic(struct worker_data *worker_data) return dev_id; } +/* + * Initializes a given port using global settings and with the RX buffers + * coming from the mbuf_pool passed as a parameter. + */ +static inline int +port_init(uint8_t port, struct rte_mempool *mbuf_pool) +{ + struct rte_eth_rxconf rx_conf; + static const struct rte_eth_conf port_conf_default = { + .rxmode = { + .mq_mode = ETH_MQ_RX_RSS, + .max_rx_pkt_len = RTE_ETHER_MAX_LEN, + }, + .rx_adv_conf = { + .rss_conf = { + .rss_hf = ETH_RSS_IP | + ETH_RSS_TCP | + ETH_RSS_UDP, + } + } + }; + const uint16_t rx_rings = 1, tx_rings = 1; + const uint16_t rx_ring_size = 512, tx_ring_size = 512; + struct rte_eth_conf port_conf = port_conf_default; + int retval; + uint16_t q; + struct rte_eth_dev_info dev_info; + struct rte_eth_txconf txconf; + + if (!rte_eth_dev_is_valid_port(port)) + return -1; + + retval = rte_eth_dev_info_get(port, &dev_info); + if (retval != 0) { + printf("Error during getting device (port %u) info: %s\n", + port, strerror(-retval)); + return retval; + } + + if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE) + port_conf.txmode.offloads |= + DEV_TX_OFFLOAD_MBUF_FAST_FREE; + + if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_RSS_HASH) + port_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; + + rx_conf = dev_info.default_rxconf; + rx_conf.offloads = port_conf.rxmode.offloads; + + port_conf.rx_adv_conf.rss_conf.rss_hf &= + dev_info.flow_type_rss_offloads; + if (port_conf.rx_adv_conf.rss_conf.rss_hf != + port_conf_default.rx_adv_conf.rss_conf.rss_hf) { + printf("Port %u modified RSS hash function based on hardware support," + "requested:%#"PRIx64" configured:%#"PRIx64"\n", + port, + port_conf_default.rx_adv_conf.rss_conf.rss_hf, + port_conf.rx_adv_conf.rss_conf.rss_hf); + } + + /* Configure the Ethernet device. */ + retval = rte_eth_dev_configure(port, rx_rings, tx_rings, &port_conf); + if (retval != 0) + return retval; + + /* Allocate and set up 1 RX queue per Ethernet port. */ + for (q = 0; q < rx_rings; q++) { + retval = rte_eth_rx_queue_setup(port, q, rx_ring_size, + rte_eth_dev_socket_id(port), &rx_conf, + mbuf_pool); + if (retval < 0) + return retval; + } + + txconf = dev_info.default_txconf; + txconf.offloads = port_conf_default.txmode.offloads; + /* Allocate and set up 1 TX queue per Ethernet port. */ + for (q = 0; q < tx_rings; q++) { + retval = rte_eth_tx_queue_setup(port, q, tx_ring_size, + rte_eth_dev_socket_id(port), &txconf); + if (retval < 0) + return retval; + } + + /* Display the port MAC address. */ + struct rte_ether_addr addr; + retval = rte_eth_macaddr_get(port, &addr); + if (retval != 0) { + printf("Failed to get MAC address (port %u): %s\n", + port, rte_strerror(-retval)); + return retval; + } + + printf("Port %u MAC: %02" PRIx8 " %02" PRIx8 " %02" PRIx8 + " %02" PRIx8 " %02" PRIx8 " %02" PRIx8 "\n", + (unsigned int)port, + addr.addr_bytes[0], addr.addr_bytes[1], + addr.addr_bytes[2], addr.addr_bytes[3], + addr.addr_bytes[4], addr.addr_bytes[5]); + + /* Enable RX in promiscuous mode for the Ethernet device. */ + retval = rte_eth_promiscuous_enable(port); + if (retval != 0) + return retval; + + return 0; +} + +static int +init_ports(uint16_t num_ports) +{ + uint16_t portid; + + if (!cdata.num_mbuf) + cdata.num_mbuf = 16384 * num_ports; + + struct rte_mempool *mp = rte_pktmbuf_pool_create("packet_pool", + /* mbufs */ cdata.num_mbuf, + /* cache_size */ 512, + /* priv_size*/ 0, + /* data_room_size */ RTE_MBUF_DEFAULT_BUF_SIZE, + rte_socket_id()); + + RTE_ETH_FOREACH_DEV(portid) + if (port_init(portid, mp) != 0) + rte_exit(EXIT_FAILURE, "Cannot init port %"PRIu16 "\n", + portid); + + return 0; +} + static void init_adapters(uint16_t nb_ports) { @@ -297,6 +428,7 @@ init_adapters(uint16_t nb_ports) adptr_p_conf.enqueue_depth = dev_info.max_event_port_enqueue_depth; + init_ports(nb_ports); /* Create one adapter for all the ethernet ports. */ ret = rte_event_eth_rx_adapter_create(cdata.rx_adapter_id, evdev_id, &adptr_p_conf); diff --git a/examples/eventdev_pipeline/pipeline_worker_tx.c b/examples/eventdev_pipeline/pipeline_worker_tx.c index a0f40c27c..55bb2f762 100644 --- a/examples/eventdev_pipeline/pipeline_worker_tx.c +++ b/examples/eventdev_pipeline/pipeline_worker_tx.c @@ -603,6 +603,133 @@ service_rx_adapter(void *arg) return 0; } +/* + * Initializes a given port using global settings and with the RX buffers + * coming from the mbuf_pool passed as a parameter. + */ +static inline int +port_init(uint8_t port, struct rte_mempool *mbuf_pool) +{ + struct rte_eth_rxconf rx_conf; + static const struct rte_eth_conf port_conf_default = { + .rxmode = { + .mq_mode = ETH_MQ_RX_RSS, + .max_rx_pkt_len = RTE_ETHER_MAX_LEN, + }, + .rx_adv_conf = { + .rss_conf = { + .rss_hf = ETH_RSS_IP | + ETH_RSS_TCP | + ETH_RSS_UDP, + } + } + }; + const uint16_t rx_rings = 1, tx_rings = 1; + const uint16_t rx_ring_size = 512, tx_ring_size = 512; + struct rte_eth_conf port_conf = port_conf_default; + int retval; + uint16_t q; + struct rte_eth_dev_info dev_info; + struct rte_eth_txconf txconf; + + if (!rte_eth_dev_is_valid_port(port)) + return -1; + + retval = rte_eth_dev_info_get(port, &dev_info); + if (retval != 0) { + printf("Error during getting device (port %u) info: %s\n", + port, strerror(-retval)); + return retval; + } + + if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE) + port_conf.txmode.offloads |= + DEV_TX_OFFLOAD_MBUF_FAST_FREE; + rx_conf = dev_info.default_rxconf; + rx_conf.offloads = port_conf.rxmode.offloads; + + port_conf.rx_adv_conf.rss_conf.rss_hf &= + dev_info.flow_type_rss_offloads; + if (port_conf.rx_adv_conf.rss_conf.rss_hf != + port_conf_default.rx_adv_conf.rss_conf.rss_hf) { + printf("Port %u modified RSS hash function based on hardware support," + "requested:%#"PRIx64" configured:%#"PRIx64"\n", + port, + port_conf_default.rx_adv_conf.rss_conf.rss_hf, + port_conf.rx_adv_conf.rss_conf.rss_hf); + } + + /* Configure the Ethernet device. */ + retval = rte_eth_dev_configure(port, rx_rings, tx_rings, &port_conf); + if (retval != 0) + return retval; + + /* Allocate and set up 1 RX queue per Ethernet port. */ + for (q = 0; q < rx_rings; q++) { + retval = rte_eth_rx_queue_setup(port, q, rx_ring_size, + rte_eth_dev_socket_id(port), &rx_conf, + mbuf_pool); + if (retval < 0) + return retval; + } + + txconf = dev_info.default_txconf; + txconf.offloads = port_conf_default.txmode.offloads; + /* Allocate and set up 1 TX queue per Ethernet port. */ + for (q = 0; q < tx_rings; q++) { + retval = rte_eth_tx_queue_setup(port, q, tx_ring_size, + rte_eth_dev_socket_id(port), &txconf); + if (retval < 0) + return retval; + } + + /* Display the port MAC address. */ + struct rte_ether_addr addr; + retval = rte_eth_macaddr_get(port, &addr); + if (retval != 0) { + printf("Failed to get MAC address (port %u): %s\n", + port, rte_strerror(-retval)); + return retval; + } + + printf("Port %u MAC: %02" PRIx8 " %02" PRIx8 " %02" PRIx8 + " %02" PRIx8 " %02" PRIx8 " %02" PRIx8 "\n", + (unsigned int)port, + addr.addr_bytes[0], addr.addr_bytes[1], + addr.addr_bytes[2], addr.addr_bytes[3], + addr.addr_bytes[4], addr.addr_bytes[5]); + + /* Enable RX in promiscuous mode for the Ethernet device. */ + retval = rte_eth_promiscuous_enable(port); + if (retval != 0) + return retval; + + return 0; +} + +static int +init_ports(uint16_t num_ports) +{ + uint16_t portid; + + if (!cdata.num_mbuf) + cdata.num_mbuf = 16384 * num_ports; + + struct rte_mempool *mp = rte_pktmbuf_pool_create("packet_pool", + /* mbufs */ cdata.num_mbuf, + /* cache_size */ 512, + /* priv_size*/ 0, + /* data_room_size */ RTE_MBUF_DEFAULT_BUF_SIZE, + rte_socket_id()); + + RTE_ETH_FOREACH_DEV(portid) + if (port_init(portid, mp) != 0) + rte_exit(EXIT_FAILURE, "Cannot init port %"PRIu16 "\n", + portid); + + return 0; +} + static void init_adapters(uint16_t nb_ports) { @@ -621,6 +748,7 @@ init_adapters(uint16_t nb_ports) .new_event_threshold = 4096, }; + init_ports(nb_ports); if (adptr_p_conf.new_event_threshold > dev_info.max_num_events) adptr_p_conf.new_event_threshold = dev_info.max_num_events; if (adptr_p_conf.dequeue_depth > dev_info.max_event_port_dequeue_depth) From patchwork Tue Oct 29 05:03:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 62136 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 538CCA00BE; Tue, 29 Oct 2019 06:04:23 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8680C1BF40; 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Mon, 28 Oct 2019 22:03:45 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Mon, 28 Oct 2019 22:03:44 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Mon, 28 Oct 2019 22:03:44 -0700 Received: from BG-LT7430.marvell.com (bg-lt7430.marvell.com [10.28.10.255]) by maili.marvell.com (Postfix) with ESMTP id 14A903F703F; Mon, 28 Oct 2019 22:03:40 -0700 (PDT) From: To: , , , Marko Kovacevic , Ori Kam , Bruce Richardson , "Radu Nicolau" , Akhil Goyal , "Tomasz Kantecki" CC: , Pavan Nikhilesh Date: Tue, 29 Oct 2019 10:33:10 +0530 Message-ID: <20191029050312.2715-7-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029050312.2715-1-pbhagavatula@marvell.com> References: <20191025143314.11162-1-pbhagavatula@marvell.com> <20191029050312.2715-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-29_02:2019-10-28,2019-10-29 signatures=0 Subject: [dpdk-dev] [PATCH v14 6/7] examples/l2fwd: disable ptype parsing X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Disable packet type parsing as l2fwd doesn't rely on packet types. Signed-off-by: Pavan Nikhilesh --- examples/l2fwd/Makefile | 1 + examples/l2fwd/main.c | 2 ++ examples/l2fwd/meson.build | 1 + 3 files changed, 4 insertions(+) diff --git a/examples/l2fwd/Makefile b/examples/l2fwd/Makefile index 230352093..123e6161c 100644 --- a/examples/l2fwd/Makefile +++ b/examples/l2fwd/Makefile @@ -51,6 +51,7 @@ include $(RTE_SDK)/mk/rte.vars.mk CFLAGS += -O3 CFLAGS += $(WERROR_FLAGS) +CFLAGS += -DALLOW_EXPERIMENTAL_API include $(RTE_SDK)/mk/rte.extapp.mk endif diff --git a/examples/l2fwd/main.c b/examples/l2fwd/main.c index d7bcbfae7..b2fee8d86 100644 --- a/examples/l2fwd/main.c +++ b/examples/l2fwd/main.c @@ -713,6 +713,8 @@ main(int argc, char **argv) "Cannot set error callback for tx buffer on port %u\n", portid); + rte_eth_dev_set_supported_ptypes(portid, RTE_PTYPE_UNKNOWN, + NULL, 0); /* Start device */ ret = rte_eth_dev_start(portid); if (ret < 0) diff --git a/examples/l2fwd/meson.build b/examples/l2fwd/meson.build index c34e11e36..2b0a25036 100644 --- a/examples/l2fwd/meson.build +++ b/examples/l2fwd/meson.build @@ -6,6 +6,7 @@ # To build this example as a standalone application with an already-installed # DPDK instance, use 'make' +allow_experimental_apis = true sources = files( 'main.c' ) From patchwork Tue Oct 29 05:03:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 62137 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4D720A00BE; Tue, 29 Oct 2019 06:04:31 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 276DB1BF52; Tue, 29 Oct 2019 06:04:10 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 91B831BEE6 for ; Tue, 29 Oct 2019 06:03:50 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x9T4xrpm012969; Mon, 28 Oct 2019 22:03:50 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=gOgqnzhB9py1xwKG4lA01Bv/BRdeGctKMm71eU5VLjo=; b=UQr9jpMasNTyctX6IENWVlhZkKHRI8ULLYjpe0B1sIea7lbS48OiTGIsTUJRUmJ2/rRu 9mA4dlRHcDwvkKcc3jlkzqoScmHbIyCwk+fFMV/gfM0HvSFG1Lt9tTwYT77MygZm8Ppb 7SOdULmPUanYj/s8ZEv4azt0Wwj47qhSGBUkro8J+TiHllW++ivjQAPfW/iuGxO7rnVw n6kgVPPQuGWF4KdoNFhBk7asipJlHmpgyXwQgUS1E50qTlZDQWdpmC59epzixr5mJyiJ JeeQoVKdiqaBv25MH2gt1yi5CQGnVnnmRa+33r74097NWTRjc6Q8i0rjvdQJRNM4Q94i 0A== Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0b-0016f401.pphosted.com with ESMTP id 2vvnnp04tc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 28 Oct 2019 22:03:49 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Mon, 28 Oct 2019 22:03:48 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Mon, 28 Oct 2019 22:03:48 -0700 Received: from BG-LT7430.marvell.com (bg-lt7430.marvell.com [10.28.10.255]) by maili.marvell.com (Postfix) with ESMTP id 507553F703F; Mon, 28 Oct 2019 22:03:45 -0700 (PDT) From: To: , , , Wenzhuo Lu , Jingjing Wu , Bernard Iremonger , John McNamara , Marko Kovacevic CC: , Pavan Nikhilesh Date: Tue, 29 Oct 2019 10:33:11 +0530 Message-ID: <20191029050312.2715-8-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029050312.2715-1-pbhagavatula@marvell.com> References: <20191025143314.11162-1-pbhagavatula@marvell.com> <20191029050312.2715-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-29_02:2019-10-28,2019-10-29 signatures=0 Subject: [dpdk-dev] [PATCH v14 7/7] app/testpmd: add command to set supported ptype mask X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Add command to set supported ptype mask. Usage: set port ptype_mask Disable ptype parsing by default. Signed-off-by: Pavan Nikhilesh --- app/test-pmd/cmdline.c | 80 +++++++++++++++++++++ app/test-pmd/testpmd.c | 6 ++ doc/guides/testpmd_app_ug/testpmd_funcs.rst | 7 ++ 3 files changed, 93 insertions(+) diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c index 447806991..9f0356b50 100644 --- a/app/test-pmd/cmdline.c +++ b/app/test-pmd/cmdline.c @@ -18915,6 +18915,85 @@ cmdline_parse_inst_t cmd_show_port_supported_ptypes = { }, }; +/* Common result structure for set port ptypes */ +struct cmd_set_port_supported_ptypes_result { + cmdline_fixed_string_t set; + cmdline_fixed_string_t port; + portid_t port_id; + cmdline_fixed_string_t ptype_mask; + uint32_t mask; +}; + +/* Common CLI fields for set port ptypes */ +cmdline_parse_token_string_t cmd_set_port_supported_ptypes_set = + TOKEN_STRING_INITIALIZER + (struct cmd_set_port_supported_ptypes_result, + set, "set"); +cmdline_parse_token_string_t cmd_set_port_supported_ptypes_port = + TOKEN_STRING_INITIALIZER + (struct cmd_set_port_supported_ptypes_result, + port, "port"); +cmdline_parse_token_num_t cmd_set_port_supported_ptypes_port_id = + TOKEN_NUM_INITIALIZER + (struct cmd_set_port_supported_ptypes_result, + port_id, UINT16); +cmdline_parse_token_string_t cmd_set_port_supported_ptypes_mask_str = + TOKEN_STRING_INITIALIZER + (struct cmd_set_port_supported_ptypes_result, + ptype_mask, "ptype_mask"); +cmdline_parse_token_num_t cmd_set_port_supported_ptypes_mask_u32 = + TOKEN_NUM_INITIALIZER + (struct cmd_set_port_supported_ptypes_result, + mask, UINT32); + +static void +cmd_set_port_supported_ptypes_parsed( + void *parsed_result, + __attribute__((unused)) struct cmdline *cl, + __attribute__((unused)) void *data) +{ + struct cmd_set_port_supported_ptypes_result *res = parsed_result; +#define PTYPE_NAMESIZE 256 + char ptype_name[PTYPE_NAMESIZE]; + uint16_t port_id = res->port_id; + uint32_t ptype_mask = res->mask; + int ret, i; + + ret = rte_eth_dev_get_supported_ptypes(port_id, ptype_mask, NULL, 0); + if (ret <= 0) { + printf("Port %d doesn't support any ptypes.\n", port_id); + return; + } + + uint32_t ptypes[ret]; + ret = rte_eth_dev_set_supported_ptypes(port_id, ptype_mask, ptypes, + ret); + if (ret <= 0) { + printf("Unable to set requested ptypes for Port %d\n", port_id); + return; + } + + printf("Successfully set following ptypes for Port %d\n", port_id); + for (i = 0; i < ret && ptypes[i] != RTE_PTYPE_UNKNOWN; i++) { + rte_get_ptype_name(ptypes[i], ptype_name, sizeof(ptype_name)); + printf("%s\n", ptype_name); + } +} + +cmdline_parse_inst_t cmd_set_port_supported_ptypes = { + .f = cmd_set_port_supported_ptypes_parsed, + .data = NULL, + .help_str = "set port ptype_mask ", + .tokens = { + (void *)&cmd_set_port_supported_ptypes_set, + (void *)&cmd_set_port_supported_ptypes_port, + (void *)&cmd_set_port_supported_ptypes_port_id, + (void *)&cmd_set_port_supported_ptypes_mask_str, + (void *)&cmd_set_port_supported_ptypes_mask_u32, + NULL, + }, +}; + /* ******************************************************************************** */ /* list of instructions */ @@ -19154,6 +19233,7 @@ cmdline_parse_ctx_t main_ctx[] = { (cmdline_parse_inst_t *)&cmd_show_vf_stats, (cmdline_parse_inst_t *)&cmd_clear_vf_stats, (cmdline_parse_inst_t *)&cmd_show_port_supported_ptypes, + (cmdline_parse_inst_t *)&cmd_set_port_supported_ptypes, (cmdline_parse_inst_t *)&cmd_ptype_mapping_get, (cmdline_parse_inst_t *)&cmd_ptype_mapping_replace, (cmdline_parse_inst_t *)&cmd_ptype_mapping_reset, diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c index 5701f3141..318a668e6 100644 --- a/app/test-pmd/testpmd.c +++ b/app/test-pmd/testpmd.c @@ -2064,6 +2064,7 @@ start_port(portid_t pid) queueid_t qi; struct rte_port *port; struct rte_ether_addr mac_addr; + static uint8_t clr_ptypes = 1; if (port_id_is_invalid(pid, ENABLED_WARN)) return 0; @@ -2193,6 +2194,11 @@ start_port(portid_t pid) } } configure_rxtx_dump_callbacks(verbose_level); + if (clr_ptypes) { + clr_ptypes = 0; + rte_eth_dev_set_supported_ptypes(pi, RTE_PTYPE_UNKNOWN, + NULL, 0); + } /* start port */ if (rte_eth_dev_start(pi) < 0) { printf("Fail to start port %d\n", pi); diff --git a/doc/guides/testpmd_app_ug/testpmd_funcs.rst b/doc/guides/testpmd_app_ug/testpmd_funcs.rst index c68a742eb..9c4dc92aa 100644 --- a/doc/guides/testpmd_app_ug/testpmd_funcs.rst +++ b/doc/guides/testpmd_app_ug/testpmd_funcs.rst @@ -472,6 +472,13 @@ Show ptypes supported for a specific port:: testpmd> show port (port_id) ptypes +set port supported ptypes +~~~~~~~~~~~~~~~~~~~~~~~~~ + +Inform packet types classification interested in for a specific port:: + + testpmd> set port (port_id) ptypes_mask (mask) + show device info ~~~~~~~~~~~~~~~~