From patchwork Thu Oct 24 18:46:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jasvinder Singh X-Patchwork-Id: 61919 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BD22B1EBAC; Thu, 24 Oct 2019 19:46:40 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 0FD411C1FD for ; Thu, 24 Oct 2019 19:46:33 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Oct 2019 10:46:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,225,1569308400"; d="scan'208";a="228601679" Received: from silpixa00381635.ir.intel.com (HELO silpixa00381635.ger.corp.intel.com) ([10.237.223.229]) by fmsmga002.fm.intel.com with ESMTP; 24 Oct 2019 10:46:32 -0700 From: Jasvinder Singh To: dev@dpdk.org Cc: cristian.dumitrescu@intel.com, Lukasz Krakowiak Date: Thu, 24 Oct 2019 19:46:16 +0100 Message-Id: <20191024184630.66881-2-jasvinder.singh@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191024184630.66881-1-jasvinder.singh@intel.com> References: <20191014172347.139114-1-jasvinder.singh@intel.com> <20191024184630.66881-1-jasvinder.singh@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v6 01/15] sched: add pipe config params to subport struct X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add pipe configuration parameters to subport level structure to allow different subports of the same port to have different configuration in terms of number of pipes, pipe queue sizes, etc. Signed-off-by: Jasvinder Singh Signed-off-by: Lukasz Krakowiak --- lib/librte_sched/Makefile | 2 +- lib/librte_sched/meson.build | 2 +- lib/librte_sched/rte_sched.h | 92 ++++++++++++++++++++++++------------ 3 files changed, 65 insertions(+), 31 deletions(-) diff --git a/lib/librte_sched/Makefile b/lib/librte_sched/Makefile index 3d7f410e1..6e4a72d89 100644 --- a/lib/librte_sched/Makefile +++ b/lib/librte_sched/Makefile @@ -18,7 +18,7 @@ LDLIBS += -lrte_timer EXPORT_MAP := rte_sched_version.map -LIBABIVER := 3 +LIBABIVER := 4 # # all source are stored in SRCS-y diff --git a/lib/librte_sched/meson.build b/lib/librte_sched/meson.build index 59d43c6d8..9f40a2368 100644 --- a/lib/librte_sched/meson.build +++ b/lib/librte_sched/meson.build @@ -1,7 +1,7 @@ # SPDX-License-Identifier: BSD-3-Clause # Copyright(c) 2017 Intel Corporation -version = 3 +version = 4 sources = files('rte_sched.c', 'rte_red.c', 'rte_approx.c') headers = files('rte_sched.h', 'rte_sched_common.h', 'rte_red.h', 'rte_approx.h') diff --git a/lib/librte_sched/rte_sched.h b/lib/librte_sched/rte_sched.h index eac6db274..fbb0e23fa 100644 --- a/lib/librte_sched/rte_sched.h +++ b/lib/librte_sched/rte_sched.h @@ -111,7 +111,7 @@ extern "C" { #endif /* - * Subport configuration parameters. The period and credits_per_period + * Pipe configuration parameters. The period and credits_per_period * parameters are measured in bytes, with one byte meaning the time * duration associated with the transmission of one byte on the * physical medium of the output port, with pipe or pipe traffic class @@ -119,7 +119,7 @@ extern "C" { * credits_per_period divided by period. One credit represents one * byte. */ -struct rte_sched_subport_params { +struct rte_sched_pipe_params { /** Token bucket rate (measured in bytes per second) */ uint32_t tb_rate; @@ -129,32 +129,18 @@ struct rte_sched_subport_params { /** Traffic class rates (measured in bytes per second) */ uint32_t tc_rate[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; - /** Enforcement period for rates (measured in milliseconds) */ + /** Enforcement period (measured in milliseconds) */ uint32_t tc_period; -}; - -/** Subport statistics */ -struct rte_sched_subport_stats { - /** Number of packets successfully written */ - uint32_t n_pkts_tc[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; - - /** Number of packets dropped */ - uint32_t n_pkts_tc_dropped[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; - /** Number of bytes successfully written for each traffic class */ - uint32_t n_bytes_tc[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; - - /** Number of bytes dropped for each traffic class */ - uint32_t n_bytes_tc_dropped[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; + /** Best-effort traffic class oversubscription weight */ + uint8_t tc_ov_weight; -#ifdef RTE_SCHED_RED - /** Number of packets dropped by red */ - uint32_t n_pkts_red_dropped[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; -#endif + /** WRR weights of best-effort traffic class queues */ + uint8_t wrr_weights[RTE_SCHED_BE_QUEUES_PER_PIPE]; }; /* - * Pipe configuration parameters. The period and credits_per_period + * Subport configuration parameters. The period and credits_per_period * parameters are measured in bytes, with one byte meaning the time * duration associated with the transmission of one byte on the * physical medium of the output port, with pipe or pipe traffic class @@ -162,7 +148,7 @@ struct rte_sched_subport_stats { * credits_per_period divided by period. One credit represents one * byte. */ -struct rte_sched_pipe_params { +struct rte_sched_subport_params { /** Token bucket rate (measured in bytes per second) */ uint32_t tb_rate; @@ -172,14 +158,58 @@ struct rte_sched_pipe_params { /** Traffic class rates (measured in bytes per second) */ uint32_t tc_rate[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; - /** Enforcement period (measured in milliseconds) */ + /** Enforcement period for rates (measured in milliseconds) */ uint32_t tc_period; - /** Best-effort traffic class oversubscription weight */ - uint8_t tc_ov_weight; + /** Number of subport pipes. + * The subport can enable/allocate fewer pipes than the maximum + * number set through struct port_params::n_max_pipes_per_subport, + * as needed, to avoid memory allocation for the queues of the + * pipes that are not really needed. + */ + uint32_t n_pipes_per_subport_enabled; - /** WRR weights of best-effort traffic class queues */ - uint8_t wrr_weights[RTE_SCHED_BE_QUEUES_PER_PIPE]; + /** Packet queue size for each traffic class. + * All the pipes within the same subport share the similar + * configuration for the queues. + */ + uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; + + /** Pipe profile table. + * Every pipe is configured using one of the profiles from this table. + */ + struct rte_sched_pipe_params *pipe_profiles; + + /** Profiles in the pipe profile table */ + uint32_t n_pipe_profiles; + + /** Max allowed profiles in the pipe profile table */ + uint32_t n_max_pipe_profiles; + +#ifdef RTE_SCHED_RED + /** RED parameters */ + struct rte_red_params red_params[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][RTE_COLORS]; +#endif +}; + +/** Subport statistics */ +struct rte_sched_subport_stats { + /** Number of packets successfully written */ + uint32_t n_pkts_tc[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; + + /** Number of packets dropped */ + uint32_t n_pkts_tc_dropped[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; + + /** Number of bytes successfully written for each traffic class */ + uint32_t n_bytes_tc[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; + + /** Number of bytes dropped for each traffic class */ + uint32_t n_bytes_tc_dropped[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; + +#ifdef RTE_SCHED_RED + /** Number of packets dropped by red */ + uint32_t n_pkts_red_dropped[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; +#endif }; /** Queue statistics */ @@ -224,7 +254,11 @@ struct rte_sched_port_params { /** Number of subports */ uint32_t n_subports_per_port; - /** Number of subport_pipes */ + /** Maximum number of subport pipes. + * This parameter is used to reserve a fixed number of bits + * in struct rte_mbuf::sched.queue_id for the pipe_id for all + * the subports of the same port. + */ uint32_t n_pipes_per_subport; /** Packet queue size for each traffic class. From patchwork Thu Oct 24 18:46:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jasvinder Singh X-Patchwork-Id: 61920 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C8BD51EBC9; Thu, 24 Oct 2019 19:46:44 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id D408E1C1FD for ; Thu, 24 Oct 2019 19:46:34 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Oct 2019 10:46:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,225,1569308400"; d="scan'208";a="228601683" Received: from silpixa00381635.ir.intel.com (HELO silpixa00381635.ger.corp.intel.com) ([10.237.223.229]) by fmsmga002.fm.intel.com with ESMTP; 24 Oct 2019 10:46:33 -0700 From: Jasvinder Singh To: dev@dpdk.org Cc: cristian.dumitrescu@intel.com, Lukasz Krakowiak Date: Thu, 24 Oct 2019 19:46:17 +0100 Message-Id: <20191024184630.66881-3-jasvinder.singh@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191024184630.66881-1-jasvinder.singh@intel.com> References: <20191014172347.139114-1-jasvinder.singh@intel.com> <20191024184630.66881-1-jasvinder.singh@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v6 02/15] sched: modify internal structs for config flexibility X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Update internal structures related to port and subport to allow different subports of the same port to have different configuration in terms of number of pipes, pipe queue sizes, etc. Signed-off-by: Jasvinder Singh Signed-off-by: Lukasz Krakowiak --- lib/librte_sched/rte_sched.c | 106 ++++++++++++++++++++++++++--------- 1 file changed, 78 insertions(+), 28 deletions(-) diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c index d8ab21d64..672412b77 100644 --- a/lib/librte_sched/rte_sched.c +++ b/lib/librte_sched/rte_sched.c @@ -47,33 +47,6 @@ */ #define RTE_SCHED_TIME_SHIFT 8 -struct rte_sched_subport { - /* Token bucket (TB) */ - uint64_t tb_time; /* time of last update */ - uint32_t tb_period; - uint32_t tb_credits_per_period; - uint32_t tb_size; - uint32_t tb_credits; - - /* Traffic classes (TCs) */ - uint64_t tc_time; /* time of next update */ - uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; - uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; - uint32_t tc_period; - - /* TC oversubscription */ - uint32_t tc_ov_wm; - uint32_t tc_ov_wm_min; - uint32_t tc_ov_wm_max; - uint8_t tc_ov_period_id; - uint8_t tc_ov; - uint32_t tc_ov_n; - double tc_ov_rate; - - /* Statistics */ - struct rte_sched_subport_stats stats; -}; - struct rte_sched_pipe_profile { /* Token bucket (TB) */ uint32_t tb_period; @@ -107,7 +80,6 @@ struct rte_sched_pipe { /* TC oversubscription */ uint32_t tc_ov_credits; uint8_t tc_ov_period_id; - uint8_t reserved[3]; } __rte_cache_aligned; struct rte_sched_queue { @@ -166,6 +138,72 @@ struct rte_sched_grinder { uint8_t wrr_cost[RTE_SCHED_BE_QUEUES_PER_PIPE]; }; +struct rte_sched_subport { + /* Token bucket (TB) */ + uint64_t tb_time; /* time of last update */ + uint32_t tb_period; + uint32_t tb_credits_per_period; + uint32_t tb_size; + uint32_t tb_credits; + + /* Traffic classes (TCs) */ + uint64_t tc_time; /* time of next update */ + uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; + uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; + uint32_t tc_period; + + /* TC oversubscription */ + uint32_t tc_ov_wm; + uint32_t tc_ov_wm_min; + uint32_t tc_ov_wm_max; + uint8_t tc_ov_period_id; + uint8_t tc_ov; + uint32_t tc_ov_n; + double tc_ov_rate; + + /* Statistics */ + struct rte_sched_subport_stats stats; + + /* Subport pipes */ + uint32_t n_pipes_per_subport_enabled; + uint32_t n_pipe_profiles; + uint32_t n_max_pipe_profiles; + + /* Pipe best-effort TC rate */ + uint32_t pipe_tc_be_rate_max; + + /* Pipe queues size */ + uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; + +#ifdef RTE_SCHED_RED + struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][RTE_COLORS]; +#endif + + /* Scheduling loop detection */ + uint32_t pipe_loop; + uint32_t pipe_exhaustion; + + /* Bitmap */ + struct rte_bitmap *bmp; + uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16; + + /* Grinders */ + struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS]; + uint32_t busy_grinders; + + /* Queue base calculation */ + uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE]; + uint32_t qsize_sum; + + struct rte_sched_pipe *pipe; + struct rte_sched_queue *queue; + struct rte_sched_queue_extra *queue_extra; + struct rte_sched_pipe_profile *pipe_profiles; + uint8_t *bmp_array; + struct rte_mbuf **queue_array; + uint8_t memory[0] __rte_cache_aligned; +} __rte_cache_aligned; + struct rte_sched_port { /* User parameters */ uint32_t n_subports_per_port; @@ -177,6 +215,7 @@ struct rte_sched_port { uint32_t rate; uint32_t mtu; uint32_t frame_overhead; + int socket; uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; uint32_t n_pipe_profiles; uint32_t n_max_pipe_profiles; @@ -210,6 +249,7 @@ struct rte_sched_port { uint32_t qsize_sum; /* Large data structures */ + struct rte_sched_subport *subports[0]; struct rte_sched_subport *subport; struct rte_sched_pipe *pipe; struct rte_sched_queue *queue; @@ -231,6 +271,16 @@ enum rte_sched_port_array { e_RTE_SCHED_PORT_ARRAY_TOTAL, }; +enum rte_sched_subport_array { + e_RTE_SCHED_SUBPORT_ARRAY_PIPE = 0, + e_RTE_SCHED_SUBPORT_ARRAY_QUEUE, + e_RTE_SCHED_SUBPORT_ARRAY_QUEUE_EXTRA, + e_RTE_SCHED_SUBPORT_ARRAY_PIPE_PROFILES, + e_RTE_SCHED_SUBPORT_ARRAY_BMP_ARRAY, + e_RTE_SCHED_SUBPORT_ARRAY_QUEUE_ARRAY, + e_RTE_SCHED_SUBPORT_ARRAY_TOTAL, +}; + #ifdef RTE_SCHED_COLLECT_STATS static inline uint32_t From patchwork Thu Oct 24 18:46:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jasvinder Singh X-Patchwork-Id: 61921 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A003A1EBD5; Thu, 24 Oct 2019 19:46:49 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 290BA1C1FD for ; Thu, 24 Oct 2019 19:46:36 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Oct 2019 10:46:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,225,1569308400"; d="scan'208";a="228601698" Received: from silpixa00381635.ir.intel.com (HELO silpixa00381635.ger.corp.intel.com) ([10.237.223.229]) by fmsmga002.fm.intel.com with ESMTP; 24 Oct 2019 10:46:34 -0700 From: Jasvinder Singh To: dev@dpdk.org Cc: cristian.dumitrescu@intel.com, Lukasz Krakowiak Date: Thu, 24 Oct 2019 19:46:18 +0100 Message-Id: <20191024184630.66881-4-jasvinder.singh@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191024184630.66881-1-jasvinder.singh@intel.com> References: <20191014172347.139114-1-jasvinder.singh@intel.com> <20191024184630.66881-1-jasvinder.singh@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v6 03/15] sched: remove pipe params config from port level X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Remove pipes configuration from the port level to allow different subports of the same port to have different configuration in terms of number of pipes, pipe queue sizes, etc. Signed-off-by: Jasvinder Singh Signed-off-by: Lukasz Krakowiak --- lib/librte_sched/rte_sched.c | 254 ++++++++++------------------------- 1 file changed, 71 insertions(+), 183 deletions(-) diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c index 672412b77..952e449f7 100644 --- a/lib/librte_sched/rte_sched.c +++ b/lib/librte_sched/rte_sched.c @@ -291,6 +291,31 @@ rte_sched_port_queues_per_subport(struct rte_sched_port *port) #endif +static inline uint32_t +rte_sched_subport_pipe_queues(struct rte_sched_subport *subport) +{ + return RTE_SCHED_QUEUES_PER_PIPE * subport->n_pipes_per_subport_enabled; +} + +static inline struct rte_mbuf ** +rte_sched_subport_pipe_qbase(struct rte_sched_subport *subport, uint32_t qindex) +{ + uint32_t pindex = qindex >> 4; + uint32_t qpos = qindex & (RTE_SCHED_QUEUES_PER_PIPE - 1); + + return (subport->queue_array + pindex * + subport->qsize_sum + subport->qsize_add[qpos]); +} + +static inline uint16_t +rte_sched_subport_pipe_qsize(struct rte_sched_port *port, +struct rte_sched_subport *subport, uint32_t qindex) +{ + uint32_t tc = port->pipe_tc[qindex & (RTE_SCHED_QUEUES_PER_PIPE - 1)]; + + return subport->qsize[tc]; +} + static inline uint32_t rte_sched_port_queues_per_port(struct rte_sched_port *port) { @@ -414,8 +439,6 @@ pipe_profile_check(struct rte_sched_pipe_params *params, static int rte_sched_port_check_params(struct rte_sched_port_params *params) { - uint32_t i; - if (params == NULL) { RTE_LOG(ERR, SCHED, "%s: Incorrect value for parameter params\n", __func__); @@ -456,45 +479,10 @@ rte_sched_port_check_params(struct rte_sched_port_params *params) if (params->n_pipes_per_subport == 0 || !rte_is_power_of_2(params->n_pipes_per_subport)) { RTE_LOG(ERR, SCHED, - "%s: Incorrect value for pipes number\n", __func__); - return -EINVAL; - } - - /* qsize: if non-zero, power of 2, - * no bigger than 32K (due to 16-bit read/write pointers) - */ - for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) { - uint16_t qsize = params->qsize[i]; - - if ((qsize != 0 && !rte_is_power_of_2(qsize)) || - ((i == RTE_SCHED_TRAFFIC_CLASS_BE) && (qsize == 0))) { - RTE_LOG(ERR, SCHED, - "%s: Incorrect value for tc rate\n", __func__); - return -EINVAL; - } - } - - /* pipe_profiles and n_pipe_profiles */ - if (params->pipe_profiles == NULL || - params->n_pipe_profiles == 0 || - params->n_pipe_profiles > params->n_max_pipe_profiles) { - RTE_LOG(ERR, SCHED, - "%s: Incorrect value for number of pipe profiles\n", __func__); + "%s: Incorrect value for maximum pipes number\n", __func__); return -EINVAL; } - for (i = 0; i < params->n_pipe_profiles; i++) { - struct rte_sched_pipe_params *p = params->pipe_profiles + i; - int status; - - status = pipe_profile_check(p, params->rate, ¶ms->qsize[0]); - if (status != 0) { - RTE_LOG(ERR, SCHED, - "%s: Pipe profile check failed(%d)\n", __func__, status); - return -EINVAL; - } - } - return 0; } @@ -582,32 +570,6 @@ rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params) return size0 + size1; } -static void -rte_sched_port_config_qsize(struct rte_sched_port *port) -{ - uint32_t i; - - port->qsize_add[0] = 0; - - /* Strict prority traffic class */ - for (i = 1; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) - port->qsize_add[i] = port->qsize_add[i-1] + port->qsize[i-1]; - - /* Best-effort traffic class */ - port->qsize_add[RTE_SCHED_TRAFFIC_CLASS_BE + 1] = - port->qsize_add[RTE_SCHED_TRAFFIC_CLASS_BE] + - port->qsize[RTE_SCHED_TRAFFIC_CLASS_BE]; - port->qsize_add[RTE_SCHED_TRAFFIC_CLASS_BE + 2] = - port->qsize_add[RTE_SCHED_TRAFFIC_CLASS_BE + 1] + - port->qsize[RTE_SCHED_TRAFFIC_CLASS_BE]; - port->qsize_add[RTE_SCHED_TRAFFIC_CLASS_BE + 3] = - port->qsize_add[RTE_SCHED_TRAFFIC_CLASS_BE + 2] + - port->qsize[RTE_SCHED_TRAFFIC_CLASS_BE]; - - port->qsize_sum = port->qsize_add[RTE_SCHED_TRAFFIC_CLASS_BE + 3] + - port->qsize[RTE_SCHED_TRAFFIC_CLASS_BE]; -} - static void rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i) { @@ -717,56 +679,41 @@ rte_sched_pipe_profile_convert(struct rte_sched_port *port, dst->wrr_cost[3] = (uint8_t) wrr_cost[3]; } -static void -rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port, - struct rte_sched_port_params *params) -{ - uint32_t i; - - for (i = 0; i < port->n_pipe_profiles; i++) { - struct rte_sched_pipe_params *src = params->pipe_profiles + i; - struct rte_sched_pipe_profile *dst = port->pipe_profiles + i; - - rte_sched_pipe_profile_convert(port, src, dst, params->rate); - rte_sched_port_log_pipe_profile(port, i); - } - - port->pipe_tc_be_rate_max = 0; - for (i = 0; i < port->n_pipe_profiles; i++) { - struct rte_sched_pipe_params *src = params->pipe_profiles + i; - uint32_t pipe_tc_be_rate = src->tc_rate[RTE_SCHED_TRAFFIC_CLASS_BE]; - - if (port->pipe_tc_be_rate_max < pipe_tc_be_rate) - port->pipe_tc_be_rate_max = pipe_tc_be_rate; - } -} - struct rte_sched_port * rte_sched_port_config(struct rte_sched_port_params *params) { struct rte_sched_port *port = NULL; - uint32_t mem_size, bmp_mem_size, n_queues_per_port, i, j, cycles_per_byte; + uint32_t size0, size1; + uint32_t cycles_per_byte; + uint32_t i, j; + int status; - /* Check user parameters. Determine the amount of memory to allocate */ - mem_size = rte_sched_port_get_memory_footprint(params); - if (mem_size == 0) + status = rte_sched_port_check_params(params); + if (status != 0) { + RTE_LOG(ERR, SCHED, + "%s: Port scheduler params check failed (%d)\n", + __func__, status); return NULL; + } + + size0 = sizeof(struct rte_sched_port); + size1 = params->n_subports_per_port * sizeof(struct rte_sched_subport *); /* Allocate memory to store the data structures */ - port = rte_zmalloc_socket("qos_params", mem_size, RTE_CACHE_LINE_SIZE, + port = rte_zmalloc_socket("qos_params", size0 + size1, RTE_CACHE_LINE_SIZE, params->socket); - if (port == NULL) - return NULL; + if (port == NULL) { + RTE_LOG(ERR, SCHED, "%s: Memory allocation fails\n", __func__); - /* compile time checks */ - RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS == 0); - RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1)); + return NULL; + } /* User parameters */ port->n_subports_per_port = params->n_subports_per_port; port->n_pipes_per_subport = params->n_pipes_per_subport; port->n_pipes_per_subport_log2 = __builtin_ctz(params->n_pipes_per_subport); + port->socket = params->socket; for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) port->pipe_queue[i] = i; @@ -787,32 +734,6 @@ rte_sched_port_config(struct rte_sched_port_params *params) port->rate = params->rate; port->mtu = params->mtu + params->frame_overhead; port->frame_overhead = params->frame_overhead; - memcpy(port->qsize, params->qsize, sizeof(params->qsize)); - port->n_pipe_profiles = params->n_pipe_profiles; - port->n_max_pipe_profiles = params->n_max_pipe_profiles; - -#ifdef RTE_SCHED_RED - for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) { - uint32_t j; - - for (j = 0; j < RTE_COLORS; j++) { - /* if min/max are both zero, then RED is disabled */ - if ((params->red_params[i][j].min_th | - params->red_params[i][j].max_th) == 0) { - continue; - } - - if (rte_red_config_init(&port->red_config[i][j], - params->red_params[i][j].wq_log2, - params->red_params[i][j].min_th, - params->red_params[i][j].max_th, - params->red_params[i][j].maxp_inv) != 0) { - rte_free(port); - return NULL; - } - } - } -#endif /* Timing */ port->time_cpu_cycles = rte_get_tsc_cycles(); @@ -823,79 +744,32 @@ rte_sched_port_config(struct rte_sched_port_params *params) / params->rate; port->inv_cycles_per_byte = rte_reciprocal_value(cycles_per_byte); - /* Scheduling loop detection */ - port->pipe_loop = RTE_SCHED_PIPE_INVALID; - port->pipe_exhaustion = 0; - /* Grinders */ - port->busy_grinders = 0; port->pkts_out = NULL; port->n_pkts_out = 0; - /* Queue base calculation */ - rte_sched_port_config_qsize(port); - - /* Large data structures */ - port->subport = (struct rte_sched_subport *) - (port->memory + rte_sched_port_get_array_base(params, - e_RTE_SCHED_PORT_ARRAY_SUBPORT)); - port->pipe = (struct rte_sched_pipe *) - (port->memory + rte_sched_port_get_array_base(params, - e_RTE_SCHED_PORT_ARRAY_PIPE)); - port->queue = (struct rte_sched_queue *) - (port->memory + rte_sched_port_get_array_base(params, - e_RTE_SCHED_PORT_ARRAY_QUEUE)); - port->queue_extra = (struct rte_sched_queue_extra *) - (port->memory + rte_sched_port_get_array_base(params, - e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA)); - port->pipe_profiles = (struct rte_sched_pipe_profile *) - (port->memory + rte_sched_port_get_array_base(params, - e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES)); - port->bmp_array = port->memory - + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY); - port->queue_array = (struct rte_mbuf **) - (port->memory + rte_sched_port_get_array_base(params, - e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY)); - - /* Pipe profile table */ - rte_sched_port_config_pipe_profile_table(port, params); - - /* Bitmap */ - n_queues_per_port = rte_sched_port_queues_per_port(port); - bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port); - port->bmp = rte_bitmap_init(n_queues_per_port, port->bmp_array, - bmp_mem_size); - if (port->bmp == NULL) { - RTE_LOG(ERR, SCHED, "Bitmap init error\n"); - rte_free(port); - return NULL; - } - - for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++) - port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID; - - return port; } -void -rte_sched_port_free(struct rte_sched_port *port) +static inline void +rte_sched_subport_free(struct rte_sched_port *port, + struct rte_sched_subport *subport) { + uint32_t n_subport_pipe_queues; uint32_t qindex; - uint32_t n_queues_per_port; - /* Check user parameters */ - if (port == NULL) + if (subport == NULL) return; - n_queues_per_port = rte_sched_port_queues_per_port(port); + n_subport_pipe_queues = rte_sched_subport_pipe_queues(subport); /* Free enqueued mbufs */ - for (qindex = 0; qindex < n_queues_per_port; qindex++) { - struct rte_mbuf **mbufs = rte_sched_port_qbase(port, qindex); - uint16_t qsize = rte_sched_port_qsize(port, qindex); + for (qindex = 0; qindex < n_subport_pipe_queues; qindex++) { + struct rte_mbuf **mbufs = + rte_sched_subport_pipe_qbase(subport, qindex); + uint16_t qsize = rte_sched_subport_pipe_qsize(port, subport, qindex); if (qsize != 0) { - struct rte_sched_queue *queue = port->queue + qindex; + struct rte_sched_queue *queue = subport->queue + qindex; uint16_t qr = queue->qr & (qsize - 1); uint16_t qw = queue->qw & (qsize - 1); @@ -904,7 +778,21 @@ rte_sched_port_free(struct rte_sched_port *port) } } - rte_bitmap_free(port->bmp); + rte_bitmap_free(subport->bmp); +} + +void +rte_sched_port_free(struct rte_sched_port *port) +{ + uint32_t i; + + /* Check user parameters */ + if (port == NULL) + return; + + for (i = 0; i < port->n_subports_per_port; i++) + rte_sched_subport_free(port, port->subports[i]); + rte_free(port); } From patchwork Thu Oct 24 18:46:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jasvinder Singh X-Patchwork-Id: 61922 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A27531EBD7; Thu, 24 Oct 2019 19:46:55 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 8D4A21EB64 for ; Thu, 24 Oct 2019 19:46:37 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Oct 2019 10:46:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,225,1569308400"; d="scan'208";a="228601703" Received: from silpixa00381635.ir.intel.com (HELO silpixa00381635.ger.corp.intel.com) ([10.237.223.229]) by fmsmga002.fm.intel.com with ESMTP; 24 Oct 2019 10:46:35 -0700 From: Jasvinder Singh To: dev@dpdk.org Cc: cristian.dumitrescu@intel.com, Lukasz Krakowiak Date: Thu, 24 Oct 2019 19:46:19 +0100 Message-Id: <20191024184630.66881-5-jasvinder.singh@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191024184630.66881-1-jasvinder.singh@intel.com> References: <20191014172347.139114-1-jasvinder.singh@intel.com> <20191024184630.66881-1-jasvinder.singh@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v6 04/15] sched: add pipe config to subport level X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add pipes configuration from the port level to allow different subports of the same port to have different configuration in terms of number of pipes, pipe queue sizes, etc. Signed-off-by: Jasvinder Singh Signed-off-by: Lukasz Krakowiak --- lib/librte_sched/rte_sched.c | 388 ++++++++++++++++++++++++++++++----- 1 file changed, 332 insertions(+), 56 deletions(-) diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c index 952e449f7..60dfc6232 100644 --- a/lib/librte_sched/rte_sched.c +++ b/lib/librte_sched/rte_sched.c @@ -550,24 +550,91 @@ rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sch return base; } -uint32_t -rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params) +static uint32_t +rte_sched_subport_get_array_base(struct rte_sched_subport_params *params, + enum rte_sched_subport_array array) { - uint32_t size0, size1; - int status; + uint32_t n_pipes_per_subport = params->n_pipes_per_subport_enabled; + uint32_t n_subport_pipe_queues = + RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport; - status = rte_sched_port_check_params(params); - if (status != 0) { - RTE_LOG(NOTICE, SCHED, - "Port scheduler params check failed (%d)\n", status); + uint32_t size_pipe = n_pipes_per_subport * sizeof(struct rte_sched_pipe); + uint32_t size_queue = + n_subport_pipe_queues * sizeof(struct rte_sched_queue); + uint32_t size_queue_extra + = n_subport_pipe_queues * sizeof(struct rte_sched_queue_extra); + uint32_t size_pipe_profiles = params->n_max_pipe_profiles * + sizeof(struct rte_sched_pipe_profile); + uint32_t size_bmp_array = + rte_bitmap_get_memory_footprint(n_subport_pipe_queues); + uint32_t size_per_pipe_queue_array, size_queue_array; - return 0; + uint32_t base, i; + + size_per_pipe_queue_array = 0; + for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) { + if (i < RTE_SCHED_TRAFFIC_CLASS_BE) + size_per_pipe_queue_array += + params->qsize[i] * sizeof(struct rte_mbuf *); + else + size_per_pipe_queue_array += RTE_SCHED_MAX_QUEUES_PER_TC * + params->qsize[i] * sizeof(struct rte_mbuf *); } + size_queue_array = n_pipes_per_subport * size_per_pipe_queue_array; - size0 = sizeof(struct rte_sched_port); - size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL); + base = 0; - return size0 + size1; + if (array == e_RTE_SCHED_SUBPORT_ARRAY_PIPE) + return base; + base += RTE_CACHE_LINE_ROUNDUP(size_pipe); + + if (array == e_RTE_SCHED_SUBPORT_ARRAY_QUEUE) + return base; + base += RTE_CACHE_LINE_ROUNDUP(size_queue); + + if (array == e_RTE_SCHED_SUBPORT_ARRAY_QUEUE_EXTRA) + return base; + base += RTE_CACHE_LINE_ROUNDUP(size_queue_extra); + + if (array == e_RTE_SCHED_SUBPORT_ARRAY_PIPE_PROFILES) + return base; + base += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles); + + if (array == e_RTE_SCHED_SUBPORT_ARRAY_BMP_ARRAY) + return base; + base += RTE_CACHE_LINE_ROUNDUP(size_bmp_array); + + if (array == e_RTE_SCHED_SUBPORT_ARRAY_QUEUE_ARRAY) + return base; + base += RTE_CACHE_LINE_ROUNDUP(size_queue_array); + + return base; +} + +static void +rte_sched_subport_config_qsize(struct rte_sched_subport *subport) +{ + uint32_t i; + + subport->qsize_add[0] = 0; + + /* Strict prority traffic class */ + for (i = 1; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) + subport->qsize_add[i] = subport->qsize_add[i-1] + subport->qsize[i-1]; + + /* Best-effort traffic class */ + subport->qsize_add[RTE_SCHED_TRAFFIC_CLASS_BE + 1] = + subport->qsize_add[RTE_SCHED_TRAFFIC_CLASS_BE] + + subport->qsize[RTE_SCHED_TRAFFIC_CLASS_BE]; + subport->qsize_add[RTE_SCHED_TRAFFIC_CLASS_BE + 2] = + subport->qsize_add[RTE_SCHED_TRAFFIC_CLASS_BE + 1] + + subport->qsize[RTE_SCHED_TRAFFIC_CLASS_BE]; + subport->qsize_add[RTE_SCHED_TRAFFIC_CLASS_BE + 3] = + subport->qsize_add[RTE_SCHED_TRAFFIC_CLASS_BE + 2] + + subport->qsize[RTE_SCHED_TRAFFIC_CLASS_BE]; + + subport->qsize_sum = subport->qsize_add[RTE_SCHED_TRAFFIC_CLASS_BE + 3] + + subport->qsize[RTE_SCHED_TRAFFIC_CLASS_BE]; } static void @@ -679,6 +746,126 @@ rte_sched_pipe_profile_convert(struct rte_sched_port *port, dst->wrr_cost[3] = (uint8_t) wrr_cost[3]; } +static int +rte_sched_subport_check_params(struct rte_sched_subport_params *params, + uint32_t n_max_pipes_per_subport, + uint32_t rate) +{ + uint32_t i; + + /* Check user parameters */ + if (params == NULL) { + RTE_LOG(ERR, SCHED, + "%s: Incorrect value for parameter params\n", __func__); + return -EINVAL; + } + + if (params->tb_rate == 0 || params->tb_rate > rate) { + RTE_LOG(ERR, SCHED, + "%s: Incorrect value for tb rate\n", __func__); + return -EINVAL; + } + + if (params->tb_size == 0) { + RTE_LOG(ERR, SCHED, + "%s: Incorrect value for tb size\n", __func__); + return -EINVAL; + } + + /* qsize: if non-zero, power of 2, + * no bigger than 32K (due to 16-bit read/write pointers) + */ + for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) { + uint16_t qsize = params->qsize[i]; + + if (qsize != 0 && !rte_is_power_of_2(qsize)) { + RTE_LOG(ERR, SCHED, + "%s: Incorrect value for qsize\n", __func__); + return -EINVAL; + } + } + + for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) { + uint32_t tc_rate = params->tc_rate[i]; + uint16_t qsize = params->qsize[i]; + + if ((qsize == 0 && tc_rate != 0) || + (qsize != 0 && tc_rate == 0) || + (tc_rate > params->tb_rate)) { + RTE_LOG(ERR, SCHED, + "%s: Incorrect value for tc rate\n", __func__); + return -EINVAL; + } + } + + if (params->qsize[RTE_SCHED_TRAFFIC_CLASS_BE] == 0 || + params->tc_rate[RTE_SCHED_TRAFFIC_CLASS_BE] == 0) { + RTE_LOG(ERR, SCHED, + "%s: Incorrect qsize or tc rate(best effort)\n", __func__); + return -EINVAL; + } + + if (params->tc_period == 0) { + RTE_LOG(ERR, SCHED, + "%s: Incorrect value for tc period\n", __func__); + return -EINVAL; + } + + /* n_pipes_per_subport: non-zero, power of 2 */ + if (params->n_pipes_per_subport_enabled == 0 || + params->n_pipes_per_subport_enabled > n_max_pipes_per_subport || + !rte_is_power_of_2(params->n_pipes_per_subport_enabled)) { + RTE_LOG(ERR, SCHED, + "%s: Incorrect value for pipes number\n", __func__); + return -EINVAL; + } + + /* pipe_profiles and n_pipe_profiles */ + if (params->pipe_profiles == NULL || + params->n_pipe_profiles == 0 || + params->n_max_pipe_profiles == 0 || + params->n_pipe_profiles > params->n_max_pipe_profiles) { + RTE_LOG(ERR, SCHED, + "%s: Incorrect value for pipe profiles\n", __func__); + return -EINVAL; + } + + for (i = 0; i < params->n_pipe_profiles; i++) { + struct rte_sched_pipe_params *p = params->pipe_profiles + i; + int status; + + status = pipe_profile_check(p, rate, ¶ms->qsize[0]); + if (status != 0) { + RTE_LOG(ERR, SCHED, + "%s: Pipe profile check failed(%d)\n", __func__, status); + return -EINVAL; + } + } + + return 0; +} + +uint32_t +rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params) +{ + uint32_t size0, size1; + int status; + + status = rte_sched_port_check_params(params); + if (status != 0) { + RTE_LOG(NOTICE, SCHED, + "Port scheduler params check failed (%d)\n", status); + + return 0; + } + + size0 = sizeof(struct rte_sched_port); + size1 = rte_sched_port_get_array_base(params, + e_RTE_SCHED_PORT_ARRAY_TOTAL); + + return size0 + size1; +} + struct rte_sched_port * rte_sched_port_config(struct rte_sched_port_params *params) { @@ -799,7 +986,7 @@ rte_sched_port_free(struct rte_sched_port *port) static void rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i) { - struct rte_sched_subport *s = port->subport + i; + struct rte_sched_subport *s = port->subports[i]; RTE_LOG(DEBUG, SCHED, "Low level config for subport %u:\n" " Token bucket: period = %u, credits per period = %u, size = %u\n" @@ -834,72 +1021,78 @@ rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i) s->tc_ov_wm_max); } +static void +rte_sched_free_memory(struct rte_sched_port *port, uint32_t n_subports) +{ + uint32_t i; + + for (i = 0; i < n_subports; i++) { + struct rte_sched_subport *subport = port->subports[i]; + + rte_sched_subport_free(port, subport); + } + + rte_free(port); +} + int rte_sched_subport_config(struct rte_sched_port *port, uint32_t subport_id, struct rte_sched_subport_params *params) { - struct rte_sched_subport *s; - uint32_t i; + struct rte_sched_subport *s = NULL; + uint32_t n_subports = subport_id; + uint32_t n_subport_pipe_queues, i; + uint32_t size0, size1, bmp_mem_size; + int status; /* Check user parameters */ if (port == NULL) { RTE_LOG(ERR, SCHED, "%s: Incorrect value for parameter port\n", __func__); - return -EINVAL; + return 0; } if (subport_id >= port->n_subports_per_port) { RTE_LOG(ERR, SCHED, "%s: Incorrect value for subport id\n", __func__); - return -EINVAL; - } - if (params == NULL) { - RTE_LOG(ERR, SCHED, - "%s: Incorrect value for parameter params\n", __func__); + rte_sched_free_memory(port, n_subports); return -EINVAL; } - if (params->tb_rate == 0 || params->tb_rate > port->rate) { - RTE_LOG(ERR, SCHED, - "%s: Incorrect value for tb rate\n", __func__); - return -EINVAL; - } + status = rte_sched_subport_check_params(params, + port->n_pipes_per_subport, + port->rate); + if (status != 0) { + RTE_LOG(NOTICE, SCHED, + "%s: Port scheduler params check failed (%d)\n", + __func__, status); - if (params->tb_size == 0) { - RTE_LOG(ERR, SCHED, - "%s: Incorrect value for tb size\n", __func__); + rte_sched_free_memory(port, n_subports); return -EINVAL; } - for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) { - uint32_t tc_rate = params->tc_rate[i]; - uint16_t qsize = port->qsize[i]; + /* Determine the amount of memory to allocate */ + size0 = sizeof(struct rte_sched_subport); + size1 = rte_sched_subport_get_array_base(params, + e_RTE_SCHED_SUBPORT_ARRAY_TOTAL); - if ((qsize == 0 && tc_rate != 0) || - (qsize != 0 && tc_rate == 0) || - (tc_rate > params->tb_rate)) { - RTE_LOG(ERR, SCHED, - "%s: Incorrect value for tc rate\n", __func__); - return -EINVAL; - } - } - - if (port->qsize[RTE_SCHED_TRAFFIC_CLASS_BE] == 0 || - params->tc_rate[RTE_SCHED_TRAFFIC_CLASS_BE] == 0) { + /* Allocate memory to store the data structures */ + s = rte_zmalloc_socket("subport_params", size0 + size1, + RTE_CACHE_LINE_SIZE, port->socket); + if (s == NULL) { RTE_LOG(ERR, SCHED, - "%s: Incorrect value for tc rate(best effort)\n", __func__); - return -EINVAL; - } + "%s: Memory allocation fails\n", __func__); - if (params->tc_period == 0) { - RTE_LOG(ERR, SCHED, - "%s: Incorrect value for tc period\n", __func__); - return -EINVAL; + rte_sched_free_memory(port, n_subports); + return -ENOMEM; } - s = port->subport + subport_id; + n_subports++; + + /* Port */ + port->subports[subport_id] = s; /* Token Bucket (TB) */ if (params->tb_rate == port->rate) { @@ -919,26 +1112,109 @@ rte_sched_subport_config(struct rte_sched_port *port, /* Traffic Classes (TCs) */ s->tc_period = rte_sched_time_ms_to_bytes(params->tc_period, port->rate); for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) { - if (port->qsize[i]) + if (params->qsize[i]) s->tc_credits_per_period[i] = rte_sched_time_ms_to_bytes(params->tc_period, - params->tc_rate[i]); - + params->tc_rate[i]); } s->tc_time = port->time + s->tc_period; for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) - if (port->qsize[i]) + if (params->qsize[i]) s->tc_credits[i] = s->tc_credits_per_period[i]; + /* compile time checks */ + RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS == 0); + RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS & + (RTE_SCHED_PORT_N_GRINDERS - 1)); + + /* User parameters */ + s->n_pipes_per_subport_enabled = params->n_pipes_per_subport_enabled; + memcpy(s->qsize, params->qsize, sizeof(params->qsize)); + s->n_pipe_profiles = params->n_pipe_profiles; + s->n_max_pipe_profiles = params->n_max_pipe_profiles; + +#ifdef RTE_SCHED_RED + for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) { + uint32_t j; + + for (j = 0; j < RTE_COLORS; j++) { + /* if min/max are both zero, then RED is disabled */ + if ((params->red_params[i][j].min_th | + params->red_params[i][j].max_th) == 0) { + continue; + } + + if (rte_red_config_init(&s->red_config[i][j], + params->red_params[i][j].wq_log2, + params->red_params[i][j].min_th, + params->red_params[i][j].max_th, + params->red_params[i][j].maxp_inv) != 0) { + rte_sched_free_memory(port, n_subports); + + RTE_LOG(NOTICE, SCHED, + "%s: RED configuration init fails\n", __func__); + return -EINVAL; + } + } + } +#endif + + /* Scheduling loop detection */ + s->pipe_loop = RTE_SCHED_PIPE_INVALID; + s->pipe_exhaustion = 0; + + /* Grinders */ + s->busy_grinders = 0; + + /* Queue base calculation */ + rte_sched_subport_config_qsize(s); + + /* Large data structures */ + s->pipe = (struct rte_sched_pipe *) + (s->memory + rte_sched_subport_get_array_base(params, + e_RTE_SCHED_SUBPORT_ARRAY_PIPE)); + s->queue = (struct rte_sched_queue *) + (s->memory + rte_sched_subport_get_array_base(params, + e_RTE_SCHED_SUBPORT_ARRAY_QUEUE)); + s->queue_extra = (struct rte_sched_queue_extra *) + (s->memory + rte_sched_subport_get_array_base(params, + e_RTE_SCHED_SUBPORT_ARRAY_QUEUE_EXTRA)); + s->pipe_profiles = (struct rte_sched_pipe_profile *) + (s->memory + rte_sched_subport_get_array_base(params, + e_RTE_SCHED_SUBPORT_ARRAY_PIPE_PROFILES)); + s->bmp_array = s->memory + rte_sched_subport_get_array_base(params, + e_RTE_SCHED_SUBPORT_ARRAY_BMP_ARRAY); + s->queue_array = (struct rte_mbuf **) + (s->memory + rte_sched_subport_get_array_base(params, + e_RTE_SCHED_SUBPORT_ARRAY_QUEUE_ARRAY)); + + /* Bitmap */ + n_subport_pipe_queues = rte_sched_subport_pipe_queues(s); + bmp_mem_size = rte_bitmap_get_memory_footprint(n_subport_pipe_queues); + s->bmp = rte_bitmap_init(n_subport_pipe_queues, s->bmp_array, + bmp_mem_size); + if (s->bmp == NULL) { + RTE_LOG(ERR, SCHED, + "%s: Subport bitmap init error\n", __func__); + + rte_sched_free_memory(port, n_subports); + return -EINVAL; + } + + for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++) + s->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID; + +#ifdef RTE_SCHED_SUBPORT_TC_OV /* TC oversubscription */ s->tc_ov_wm_min = port->mtu; s->tc_ov_wm_max = rte_sched_time_ms_to_bytes(params->tc_period, - port->pipe_tc_be_rate_max); + s->pipe_tc_be_rate_max); s->tc_ov_wm = s->tc_ov_wm_max; s->tc_ov_period_id = 0; s->tc_ov = 0; s->tc_ov_n = 0; s->tc_ov_rate = 0; +#endif rte_sched_port_log_subport_config(port, subport_id); From patchwork Thu Oct 24 18:46:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jasvinder Singh X-Patchwork-Id: 61923 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6FF7B1EBE2; Thu, 24 Oct 2019 19:46:58 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id EA09C1EB7C for ; Thu, 24 Oct 2019 19:46:38 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Oct 2019 10:46:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,225,1569308400"; d="scan'208";a="228601710" Received: from silpixa00381635.ir.intel.com (HELO silpixa00381635.ger.corp.intel.com) ([10.237.223.229]) by fmsmga002.fm.intel.com with ESMTP; 24 Oct 2019 10:46:37 -0700 From: Jasvinder Singh To: dev@dpdk.org Cc: cristian.dumitrescu@intel.com, Lukasz Krakowiak Date: Thu, 24 Oct 2019 19:46:20 +0100 Message-Id: <20191024184630.66881-6-jasvinder.singh@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191024184630.66881-1-jasvinder.singh@intel.com> References: <20191014172347.139114-1-jasvinder.singh@intel.com> <20191024184630.66881-1-jasvinder.singh@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v6 05/15] sched: modify pipe functions for config flexibility X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Modify pipe level functions to allow different subports of the same port to have different configuration in terms of number of pipes, pipe queue sizes, etc. Signed-off-by: Jasvinder Singh Signed-off-by: Lukasz Krakowiak --- lib/librte_sched/rte_sched.c | 103 +++++++++++++++++-------- lib/librte_sched/rte_sched.h | 7 +- lib/librte_sched/rte_sched_version.map | 2 +- 3 files changed, 76 insertions(+), 36 deletions(-) diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c index 60dfc6232..6b6219e45 100644 --- a/lib/librte_sched/rte_sched.c +++ b/lib/librte_sched/rte_sched.c @@ -638,9 +638,9 @@ rte_sched_subport_config_qsize(struct rte_sched_subport *subport) } static void -rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i) +rte_sched_port_log_pipe_profile(struct rte_sched_subport *subport, uint32_t i) { - struct rte_sched_pipe_profile *p = port->pipe_profiles + i; + struct rte_sched_pipe_profile *p = subport->pipe_profiles + i; RTE_LOG(DEBUG, SCHED, "Low level config for pipe profile %u:\n" " Token bucket: period = %u, credits per period = %u, size = %u\n" @@ -689,7 +689,7 @@ rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate) } static void -rte_sched_pipe_profile_convert(struct rte_sched_port *port, +rte_sched_pipe_profile_convert(struct rte_sched_subport *subport, struct rte_sched_pipe_params *src, struct rte_sched_pipe_profile *dst, uint32_t rate) @@ -718,7 +718,7 @@ rte_sched_pipe_profile_convert(struct rte_sched_port *port, rate); for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) - if (port->qsize[i]) + if (subport->qsize[i]) dst->tc_credits_per_period[i] = rte_sched_time_ms_to_bytes(src->tc_period, src->tc_rate[i]); @@ -746,6 +746,30 @@ rte_sched_pipe_profile_convert(struct rte_sched_port *port, dst->wrr_cost[3] = (uint8_t) wrr_cost[3]; } +static void +rte_sched_subport_config_pipe_profile_table(struct rte_sched_subport *subport, + struct rte_sched_subport_params *params, uint32_t rate) +{ + uint32_t i; + + for (i = 0; i < subport->n_pipe_profiles; i++) { + struct rte_sched_pipe_params *src = params->pipe_profiles + i; + struct rte_sched_pipe_profile *dst = subport->pipe_profiles + i; + + rte_sched_pipe_profile_convert(subport, src, dst, rate); + rte_sched_port_log_pipe_profile(subport, i); + } + + subport->pipe_tc_be_rate_max = 0; + for (i = 0; i < subport->n_pipe_profiles; i++) { + struct rte_sched_pipe_params *src = params->pipe_profiles + i; + uint32_t pipe_tc_be_rate = src->tc_rate[RTE_SCHED_TRAFFIC_CLASS_BE]; + + if (subport->pipe_tc_be_rate_max < pipe_tc_be_rate) + subport->pipe_tc_be_rate_max = pipe_tc_be_rate; + } +} + static int rte_sched_subport_check_params(struct rte_sched_subport_params *params, uint32_t n_max_pipes_per_subport, @@ -1188,6 +1212,9 @@ rte_sched_subport_config(struct rte_sched_port *port, (s->memory + rte_sched_subport_get_array_base(params, e_RTE_SCHED_SUBPORT_ARRAY_QUEUE_ARRAY)); + /* Pipe profile table */ + rte_sched_subport_config_pipe_profile_table(s, params, port->rate); + /* Bitmap */ n_subport_pipe_queues = rte_sched_subport_pipe_queues(s); bmp_mem_size = rte_bitmap_get_memory_footprint(n_subport_pipe_queues); @@ -1230,6 +1257,7 @@ rte_sched_pipe_config(struct rte_sched_port *port, struct rte_sched_subport *s; struct rte_sched_pipe *p; struct rte_sched_pipe_profile *params; + uint32_t n_subports = subport_id + 1; uint32_t deactivate, profile, i; /* Check user parameters */ @@ -1245,34 +1273,32 @@ rte_sched_pipe_config(struct rte_sched_port *port, if (subport_id >= port->n_subports_per_port) { RTE_LOG(ERR, SCHED, "%s: Incorrect value for parameter subport id\n", __func__); + + rte_sched_free_memory(port, n_subports); return -EINVAL; } - if (pipe_id >= port->n_pipes_per_subport) { + s = port->subports[subport_id]; + if (pipe_id >= s->n_pipes_per_subport_enabled) { RTE_LOG(ERR, SCHED, "%s: Incorrect value for parameter pipe id\n", __func__); + + rte_sched_free_memory(port, n_subports); return -EINVAL; } - if (!deactivate && profile >= port->n_pipe_profiles) { + if (!deactivate && profile >= s->n_pipe_profiles) { RTE_LOG(ERR, SCHED, "%s: Incorrect value for parameter pipe profile\n", __func__); - return -EINVAL; - } - /* Check that subport configuration is valid */ - s = port->subport + subport_id; - if (s->tb_period == 0) { - RTE_LOG(ERR, SCHED, - "%s: Subport configuration invalid\n", __func__); + rte_sched_free_memory(port, n_subports); return -EINVAL; } - p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id); - /* Handle the case when pipe already has a valid configuration */ + p = s->pipe + pipe_id; if (p->tb_time) { - params = port->pipe_profiles + p->profile; + params = s->pipe_profiles + p->profile; double subport_tc_be_rate = (double) s->tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASS_BE] @@ -1302,7 +1328,7 @@ rte_sched_pipe_config(struct rte_sched_port *port, /* Apply the new pipe configuration */ p->profile = profile; - params = port->pipe_profiles + p->profile; + params = s->pipe_profiles + p->profile; /* Token Bucket (TB) */ p->tb_time = port->time; @@ -1312,7 +1338,7 @@ rte_sched_pipe_config(struct rte_sched_port *port, p->tc_time = port->time + params->tc_period; for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) - if (port->qsize[i]) + if (s->qsize[i]) p->tc_credits[i] = params->tc_credits_per_period[i]; { @@ -1342,10 +1368,12 @@ rte_sched_pipe_config(struct rte_sched_port *port, } int -rte_sched_port_pipe_profile_add(struct rte_sched_port *port, +rte_sched_subport_pipe_profile_add(struct rte_sched_port *port, + uint32_t subport_id, struct rte_sched_pipe_params *params, uint32_t *pipe_profile_id) { + struct rte_sched_subport *s; struct rte_sched_pipe_profile *pp; uint32_t i; int status; @@ -1357,40 +1385,49 @@ rte_sched_port_pipe_profile_add(struct rte_sched_port *port, return -EINVAL; } - /* Pipe profiles not exceeds the max limit */ - if (port->n_pipe_profiles >= port->n_max_pipe_profiles) { + /* Subport id not exceeds the max limit */ + if (subport_id > port->n_subports_per_port) { + RTE_LOG(ERR, SCHED, + "%s: Incorrect value for subport id\n", __func__); + return -EINVAL; + } + + s = port->subports[subport_id]; + + /* Pipe profiles exceeds the max limit */ + if (s->n_pipe_profiles >= s->n_max_pipe_profiles) { RTE_LOG(ERR, SCHED, "%s: Number of pipe profiles exceeds the max limit\n", __func__); return -EINVAL; } /* Pipe params */ - status = pipe_profile_check(params, port->rate, &port->qsize[0]); + status = pipe_profile_check(params, port->rate, &s->qsize[0]); if (status != 0) { RTE_LOG(ERR, SCHED, "%s: Pipe profile check failed(%d)\n", __func__, status); return -EINVAL; } - pp = &port->pipe_profiles[port->n_pipe_profiles]; - rte_sched_pipe_profile_convert(port, params, pp, port->rate); + pp = &s->pipe_profiles[s->n_pipe_profiles]; + rte_sched_pipe_profile_convert(s, params, pp, port->rate); - /* Pipe profile not exists */ - for (i = 0; i < port->n_pipe_profiles; i++) - if (memcmp(port->pipe_profiles + i, pp, sizeof(*pp)) == 0) { + /* Pipe profile should not exists */ + for (i = 0; i < s->n_pipe_profiles; i++) + if (memcmp(s->pipe_profiles + i, pp, sizeof(*pp)) == 0) { RTE_LOG(ERR, SCHED, - "%s: Pipe profile doesn't exist\n", __func__); + "%s: Pipe profile exists\n", __func__); return -EINVAL; } /* Pipe profile commit */ - *pipe_profile_id = port->n_pipe_profiles; - port->n_pipe_profiles++; + *pipe_profile_id = s->n_pipe_profiles; + s->n_pipe_profiles++; - if (port->pipe_tc_be_rate_max < params->tc_rate[RTE_SCHED_TRAFFIC_CLASS_BE]) - port->pipe_tc_be_rate_max = params->tc_rate[RTE_SCHED_TRAFFIC_CLASS_BE]; + if (s->pipe_tc_be_rate_max < params->tc_rate[RTE_SCHED_TRAFFIC_CLASS_BE]) + s->pipe_tc_be_rate_max = params->tc_rate[RTE_SCHED_TRAFFIC_CLASS_BE]; - rte_sched_port_log_pipe_profile(port, *pipe_profile_id); + rte_sched_port_log_pipe_profile(s, *pipe_profile_id); return 0; } diff --git a/lib/librte_sched/rte_sched.h b/lib/librte_sched/rte_sched.h index fbb0e23fa..5001f09ed 100644 --- a/lib/librte_sched/rte_sched.h +++ b/lib/librte_sched/rte_sched.h @@ -317,6 +317,8 @@ rte_sched_port_free(struct rte_sched_port *port); * * @param port * Handle to port scheduler instance + * @param subport_id + * Subport ID * @param params * Pipe profile parameters * @param pipe_profile_id @@ -326,7 +328,8 @@ rte_sched_port_free(struct rte_sched_port *port); */ __rte_experimental int -rte_sched_port_pipe_profile_add(struct rte_sched_port *port, +rte_sched_subport_pipe_profile_add(struct rte_sched_port *port, + uint32_t subport_id, struct rte_sched_pipe_params *params, uint32_t *pipe_profile_id); @@ -357,7 +360,7 @@ rte_sched_subport_config(struct rte_sched_port *port, * @param pipe_id * Pipe ID within subport * @param pipe_profile - * ID of port-level pre-configured pipe profile + * ID of subport-level pre-configured pipe profile * @return * 0 upon success, error code otherwise */ diff --git a/lib/librte_sched/rte_sched_version.map b/lib/librte_sched/rte_sched_version.map index 729588794..f33761e63 100644 --- a/lib/librte_sched/rte_sched_version.map +++ b/lib/librte_sched/rte_sched_version.map @@ -33,5 +33,5 @@ DPDK_2.1 { EXPERIMENTAL { global: - rte_sched_port_pipe_profile_add; + rte_sched_subport_pipe_profile_add; }; From patchwork Thu Oct 24 18:46:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jasvinder Singh X-Patchwork-Id: 61924 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C92191EC04; Thu, 24 Oct 2019 19:47:06 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 829C81EB7E for ; Thu, 24 Oct 2019 19:46:40 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Oct 2019 10:46:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,225,1569308400"; d="scan'208";a="228601720" Received: from silpixa00381635.ir.intel.com (HELO silpixa00381635.ger.corp.intel.com) ([10.237.223.229]) by fmsmga002.fm.intel.com with ESMTP; 24 Oct 2019 10:46:38 -0700 From: Jasvinder Singh To: dev@dpdk.org Cc: cristian.dumitrescu@intel.com, Lukasz Krakowiak Date: Thu, 24 Oct 2019 19:46:21 +0100 Message-Id: <20191024184630.66881-7-jasvinder.singh@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191024184630.66881-1-jasvinder.singh@intel.com> References: <20191014172347.139114-1-jasvinder.singh@intel.com> <20191024184630.66881-1-jasvinder.singh@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v6 06/15] sched: modify pkt enqueue for config flexibility X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Modify scheduler packet enqueue operation of the scheduler to allow different subports of the same port to have different configuration in terms of number of pipes, pipe queue sizes, etc. Signed-off-by: Jasvinder Singh Signed-off-by: Lukasz Krakowiak --- lib/librte_sched/rte_sched.c | 277 ++++++++++++++++++++++------------- 1 file changed, 178 insertions(+), 99 deletions(-) diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c index 6b6219e45..a8174afad 100644 --- a/lib/librte_sched/rte_sched.c +++ b/lib/librte_sched/rte_sched.c @@ -1440,10 +1440,11 @@ rte_sched_port_qindex(struct rte_sched_port *port, uint32_t queue) { return ((subport & (port->n_subports_per_port - 1)) << - (port->n_pipes_per_subport_log2 + 4)) | - ((pipe & (port->n_pipes_per_subport - 1)) << 4) | - ((rte_sched_port_pipe_queue(port, traffic_class) + queue) & - (RTE_SCHED_QUEUES_PER_PIPE - 1)); + (port->n_pipes_per_subport_log2 + 4)) | + ((pipe & + (port->subports[subport]->n_pipes_per_subport_enabled - 1)) << 4) | + ((rte_sched_port_pipe_queue(port, traffic_class) + queue) & + (RTE_SCHED_QUEUES_PER_PIPE - 1)); } void @@ -1468,7 +1469,8 @@ rte_sched_port_pkt_read_tree_path(struct rte_sched_port *port, uint32_t queue_id = rte_mbuf_sched_queue_get(pkt); *subport = queue_id >> (port->n_pipes_per_subport_log2 + 4); - *pipe = (queue_id >> 4) & (port->n_pipes_per_subport - 1); + *pipe = (queue_id >> 4) & + (port->subports[*subport]->n_pipes_per_subport_enabled - 1); *traffic_class = rte_sched_port_pipe_tc(port, queue_id); *queue = rte_sched_port_tc_queue(port, queue_id); } @@ -1512,7 +1514,7 @@ rte_sched_subport_read_stats(struct rte_sched_port *port, return -EINVAL; } - s = port->subport + subport_id; + s = port->subports[subport_id]; /* Copy subport stats and clear */ memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats)); @@ -1585,43 +1587,50 @@ rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex) #ifdef RTE_SCHED_COLLECT_STATS static inline void -rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt) +rte_sched_port_update_subport_stats(struct rte_sched_port *port, + struct rte_sched_subport *subport, + uint32_t qindex, + struct rte_mbuf *pkt) { - struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port)); uint32_t tc_index = rte_sched_port_pipe_tc(port, qindex); uint32_t pkt_len = pkt->pkt_len; - s->stats.n_pkts_tc[tc_index] += 1; - s->stats.n_bytes_tc[tc_index] += pkt_len; + subport->stats.n_pkts_tc[tc_index] += 1; + subport->stats.n_bytes_tc[tc_index] += pkt_len; } #ifdef RTE_SCHED_RED static inline void rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port, - uint32_t qindex, - struct rte_mbuf *pkt, uint32_t red) + struct rte_sched_subport *subport, + uint32_t qindex, + struct rte_mbuf *pkt, + uint32_t red) #else static inline void rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port, - uint32_t qindex, - struct rte_mbuf *pkt, __rte_unused uint32_t red) + struct rte_sched_subport *subport, + uint32_t qindex, + struct rte_mbuf *pkt, + __rte_unused uint32_t red) #endif { - struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port)); uint32_t tc_index = rte_sched_port_pipe_tc(port, qindex); uint32_t pkt_len = pkt->pkt_len; - s->stats.n_pkts_tc_dropped[tc_index] += 1; - s->stats.n_bytes_tc_dropped[tc_index] += pkt_len; + subport->stats.n_pkts_tc_dropped[tc_index] += 1; + subport->stats.n_bytes_tc_dropped[tc_index] += pkt_len; #ifdef RTE_SCHED_RED - s->stats.n_pkts_red_dropped[tc_index] += red; + subport->stats.n_pkts_red_dropped[tc_index] += red; #endif } static inline void -rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt) +rte_sched_port_update_queue_stats(struct rte_sched_subport *subport, + uint32_t qindex, + struct rte_mbuf *pkt) { - struct rte_sched_queue_extra *qe = port->queue_extra + qindex; + struct rte_sched_queue_extra *qe = subport->queue_extra + qindex; uint32_t pkt_len = pkt->pkt_len; qe->stats.n_pkts += 1; @@ -1630,17 +1639,19 @@ rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, #ifdef RTE_SCHED_RED static inline void -rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port, - uint32_t qindex, - struct rte_mbuf *pkt, uint32_t red) +rte_sched_port_update_queue_stats_on_drop(struct rte_sched_subport *subport, + uint32_t qindex, + struct rte_mbuf *pkt, + uint32_t red) #else static inline void -rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port, - uint32_t qindex, - struct rte_mbuf *pkt, __rte_unused uint32_t red) +rte_sched_port_update_queue_stats_on_drop(struct rte_sched_subport *subport, + uint32_t qindex, + struct rte_mbuf *pkt, + __rte_unused uint32_t red) #endif { - struct rte_sched_queue_extra *qe = port->queue_extra + qindex; + struct rte_sched_queue_extra *qe = subport->queue_extra + qindex; uint32_t pkt_len = pkt->pkt_len; qe->stats.n_pkts_dropped += 1; @@ -1655,7 +1666,11 @@ rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port, #ifdef RTE_SCHED_RED static inline int -rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen) +rte_sched_port_red_drop(struct rte_sched_port *port, + struct rte_sched_subport *subport, + struct rte_mbuf *pkt, + uint32_t qindex, + uint16_t qlen) { struct rte_sched_queue_extra *qe; struct rte_red_config *red_cfg; @@ -1665,12 +1680,12 @@ rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint3 tc_index = rte_sched_port_pipe_tc(port, qindex); color = rte_sched_port_pkt_read_color(pkt); - red_cfg = &port->red_config[tc_index][color]; + red_cfg = &subport->red_config[tc_index][color]; if ((red_cfg->min_th | red_cfg->max_th) == 0) return 0; - qe = port->queue_extra + qindex; + qe = subport->queue_extra + qindex; red = &qe->red; return rte_red_enqueue(red_cfg, red, qlen, port->time); @@ -1687,7 +1702,14 @@ rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t q #else -#define rte_sched_port_red_drop(port, pkt, qindex, qlen) 0 +static inline int rte_sched_port_red_drop(struct rte_sched_port *port __rte_unused, + struct rte_sched_subport *subport __rte_unused, + struct rte_mbuf *pkt __rte_unused, + uint32_t qindex __rte_unused, + uint16_t qlen __rte_unused) +{ + return 0; +} #define rte_sched_port_set_queue_empty_timestamp(port, qindex) @@ -1722,63 +1744,79 @@ debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos, #endif /* RTE_SCHED_DEBUG */ +static inline struct rte_sched_subport * +rte_sched_port_subport(struct rte_sched_port *port, + struct rte_mbuf *pkt) +{ + uint32_t queue_id = rte_mbuf_sched_queue_get(pkt); + uint32_t subport_id = queue_id >> (port->n_pipes_per_subport_log2 + 4); + + return port->subports[subport_id]; +} + static inline uint32_t -rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port, - struct rte_mbuf *pkt) +rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_subport *subport, + struct rte_mbuf *pkt, uint32_t subport_qmask) { struct rte_sched_queue *q; #ifdef RTE_SCHED_COLLECT_STATS struct rte_sched_queue_extra *qe; #endif uint32_t qindex = rte_mbuf_sched_queue_get(pkt); + uint32_t subport_queue_id = subport_qmask & qindex; - q = port->queue + qindex; + q = subport->queue + subport_queue_id; rte_prefetch0(q); #ifdef RTE_SCHED_COLLECT_STATS - qe = port->queue_extra + qindex; + qe = subport->queue_extra + subport_queue_id; rte_prefetch0(qe); #endif - return qindex; + return subport_queue_id; } static inline void rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port, - uint32_t qindex, struct rte_mbuf **qbase) + struct rte_sched_subport *subport, + uint32_t qindex, + struct rte_mbuf **qbase) { struct rte_sched_queue *q; struct rte_mbuf **q_qw; uint16_t qsize; - q = port->queue + qindex; - qsize = rte_sched_port_qsize(port, qindex); + q = subport->queue + qindex; + qsize = rte_sched_subport_pipe_qsize(port, subport, qindex); q_qw = qbase + (q->qw & (qsize - 1)); rte_prefetch0(q_qw); - rte_bitmap_prefetch0(port->bmp, qindex); + rte_bitmap_prefetch0(subport->bmp, qindex); } static inline int -rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex, - struct rte_mbuf **qbase, struct rte_mbuf *pkt) +rte_sched_port_enqueue_qwa(struct rte_sched_port *port, + struct rte_sched_subport *subport, + uint32_t qindex, + struct rte_mbuf **qbase, + struct rte_mbuf *pkt) { struct rte_sched_queue *q; uint16_t qsize; uint16_t qlen; - q = port->queue + qindex; - qsize = rte_sched_port_qsize(port, qindex); + q = subport->queue + qindex; + qsize = rte_sched_subport_pipe_qsize(port, subport, qindex); qlen = q->qw - q->qr; /* Drop the packet (and update drop stats) when queue is full */ - if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) || + if (unlikely(rte_sched_port_red_drop(port, subport, pkt, qindex, qlen) || (qlen >= qsize))) { rte_pktmbuf_free(pkt); #ifdef RTE_SCHED_COLLECT_STATS - rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt, - qlen < qsize); - rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt, - qlen < qsize); + rte_sched_port_update_subport_stats_on_drop(port, subport, + qindex, pkt, qlen < qsize); + rte_sched_port_update_queue_stats_on_drop(subport, qindex, pkt, + qlen < qsize); #endif return 0; } @@ -1787,13 +1825,13 @@ rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex, qbase[q->qw & (qsize - 1)] = pkt; q->qw++; - /* Activate queue in the port bitmap */ - rte_bitmap_set(port->bmp, qindex); + /* Activate queue in the subport bitmap */ + rte_bitmap_set(subport->bmp, qindex); /* Statistics */ #ifdef RTE_SCHED_COLLECT_STATS - rte_sched_port_update_subport_stats(port, qindex, pkt); - rte_sched_port_update_queue_stats(port, qindex, pkt); + rte_sched_port_update_subport_stats(port, subport, qindex, pkt); + rte_sched_port_update_queue_stats(subport, qindex, pkt); #endif return 1; @@ -1821,17 +1859,22 @@ rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts, *pkt30, *pkt31, *pkt_last; struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base, **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base; + struct rte_sched_subport *subport00, *subport01, *subport10, *subport11, + *subport20, *subport21, *subport30, *subport31, *subport_last; uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last; uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last; + uint32_t subport_qmask; uint32_t result, i; result = 0; + subport_qmask = (1 << (port->n_pipes_per_subport_log2 + 4)) - 1; /* * Less then 6 input packets available, which is not enough to * feed the pipeline */ if (unlikely(n_pkts < 6)) { + struct rte_sched_subport *subports[5]; struct rte_mbuf **q_base[5]; uint32_t q[5]; @@ -1839,22 +1882,26 @@ rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts, for (i = 0; i < n_pkts; i++) rte_prefetch0(pkts[i]); + /* Prefetch the subport structure for each packet */ + for (i = 0; i < n_pkts; i++) + subports[i] = rte_sched_port_subport(port, pkts[i]); + /* Prefetch the queue structure for each queue */ for (i = 0; i < n_pkts; i++) - q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port, - pkts[i]); + q[i] = rte_sched_port_enqueue_qptrs_prefetch0(subports[i], + pkts[i], subport_qmask); /* Prefetch the write pointer location of each queue */ for (i = 0; i < n_pkts; i++) { - q_base[i] = rte_sched_port_qbase(port, q[i]); - rte_sched_port_enqueue_qwa_prefetch0(port, q[i], - q_base[i]); + q_base[i] = rte_sched_subport_pipe_qbase(subports[i], q[i]); + rte_sched_port_enqueue_qwa_prefetch0(port, subports[i], + q[i], q_base[i]); } /* Write each packet to its queue */ for (i = 0; i < n_pkts; i++) - result += rte_sched_port_enqueue_qwa(port, q[i], - q_base[i], pkts[i]); + result += rte_sched_port_enqueue_qwa(port, subports[i], + q[i], q_base[i], pkts[i]); return result; } @@ -1870,21 +1917,29 @@ rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts, rte_prefetch0(pkt10); rte_prefetch0(pkt11); - q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20); - q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21); + subport20 = rte_sched_port_subport(port, pkt20); + subport21 = rte_sched_port_subport(port, pkt21); + q20 = rte_sched_port_enqueue_qptrs_prefetch0(subport20, + pkt20, subport_qmask); + q21 = rte_sched_port_enqueue_qptrs_prefetch0(subport21, + pkt21, subport_qmask); pkt00 = pkts[4]; pkt01 = pkts[5]; rte_prefetch0(pkt00); rte_prefetch0(pkt01); - q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10); - q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11); + subport10 = rte_sched_port_subport(port, pkt10); + subport11 = rte_sched_port_subport(port, pkt11); + q10 = rte_sched_port_enqueue_qptrs_prefetch0(subport10, + pkt10, subport_qmask); + q11 = rte_sched_port_enqueue_qptrs_prefetch0(subport11, + pkt11, subport_qmask); - q20_base = rte_sched_port_qbase(port, q20); - q21_base = rte_sched_port_qbase(port, q21); - rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base); - rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base); + q20_base = rte_sched_subport_pipe_qbase(subport20, q20); + q21_base = rte_sched_subport_pipe_qbase(subport21, q21); + rte_sched_port_enqueue_qwa_prefetch0(port, subport20, q20, q20_base); + rte_sched_port_enqueue_qwa_prefetch0(port, subport21, q21, q21_base); /* Run the pipeline */ for (i = 6; i < (n_pkts & (~1)); i += 2) { @@ -1899,6 +1954,10 @@ rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts, q31 = q21; q20 = q10; q21 = q11; + subport30 = subport20; + subport31 = subport21; + subport20 = subport10; + subport21 = subport11; q30_base = q20_base; q31_base = q21_base; @@ -1908,19 +1967,25 @@ rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts, rte_prefetch0(pkt00); rte_prefetch0(pkt01); - /* Stage 1: Prefetch queue structure storing queue pointers */ - q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10); - q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11); + /* Stage 1: Prefetch subport and queue structure storing queue pointers */ + subport10 = rte_sched_port_subport(port, pkt10); + subport11 = rte_sched_port_subport(port, pkt11); + q10 = rte_sched_port_enqueue_qptrs_prefetch0(subport10, + pkt10, subport_qmask); + q11 = rte_sched_port_enqueue_qptrs_prefetch0(subport11, + pkt11, subport_qmask); /* Stage 2: Prefetch queue write location */ - q20_base = rte_sched_port_qbase(port, q20); - q21_base = rte_sched_port_qbase(port, q21); - rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base); - rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base); + q20_base = rte_sched_subport_pipe_qbase(subport20, q20); + q21_base = rte_sched_subport_pipe_qbase(subport21, q21); + rte_sched_port_enqueue_qwa_prefetch0(port, subport20, q20, q20_base); + rte_sched_port_enqueue_qwa_prefetch0(port, subport21, q21, q21_base); /* Stage 3: Write packet to queue and activate queue */ - r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30); - r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31); + r30 = rte_sched_port_enqueue_qwa(port, subport30, + q30, q30_base, pkt30); + r31 = rte_sched_port_enqueue_qwa(port, subport31, + q31, q31_base, pkt31); result += r30 + r31; } @@ -1932,38 +1997,52 @@ rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts, pkt_last = pkts[n_pkts - 1]; rte_prefetch0(pkt_last); - q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00); - q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01); - - q10_base = rte_sched_port_qbase(port, q10); - q11_base = rte_sched_port_qbase(port, q11); - rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base); - rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base); - - r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20); - r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21); + subport00 = rte_sched_port_subport(port, pkt00); + subport01 = rte_sched_port_subport(port, pkt01); + q00 = rte_sched_port_enqueue_qptrs_prefetch0(subport00, + pkt00, subport_qmask); + q01 = rte_sched_port_enqueue_qptrs_prefetch0(subport01, + pkt01, subport_qmask); + + q10_base = rte_sched_subport_pipe_qbase(subport10, q10); + q11_base = rte_sched_subport_pipe_qbase(subport11, q11); + rte_sched_port_enqueue_qwa_prefetch0(port, subport10, q10, q10_base); + rte_sched_port_enqueue_qwa_prefetch0(port, subport11, q11, q11_base); + + r20 = rte_sched_port_enqueue_qwa(port, subport20, + q20, q20_base, pkt20); + r21 = rte_sched_port_enqueue_qwa(port, subport21, + q21, q21_base, pkt21); result += r20 + r21; - q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last); + subport_last = rte_sched_port_subport(port, pkt_last); + q_last = rte_sched_port_enqueue_qptrs_prefetch0(subport_last, + pkt_last, subport_qmask); - q00_base = rte_sched_port_qbase(port, q00); - q01_base = rte_sched_port_qbase(port, q01); - rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base); - rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base); + q00_base = rte_sched_subport_pipe_qbase(subport00, q00); + q01_base = rte_sched_subport_pipe_qbase(subport01, q01); + rte_sched_port_enqueue_qwa_prefetch0(port, subport00, q00, q00_base); + rte_sched_port_enqueue_qwa_prefetch0(port, subport01, q01, q01_base); - r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10); - r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11); + r10 = rte_sched_port_enqueue_qwa(port, subport10, q10, + q10_base, pkt10); + r11 = rte_sched_port_enqueue_qwa(port, subport11, q11, + q11_base, pkt11); result += r10 + r11; - q_last_base = rte_sched_port_qbase(port, q_last); - rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base); + q_last_base = rte_sched_subport_pipe_qbase(subport_last, q_last); + rte_sched_port_enqueue_qwa_prefetch0(port, subport_last, + q_last, q_last_base); - r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00); - r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01); + r00 = rte_sched_port_enqueue_qwa(port, subport00, q00, + q00_base, pkt00); + r01 = rte_sched_port_enqueue_qwa(port, subport01, q01, + q01_base, pkt01); result += r00 + r01; if (n_pkts & 1) { - r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last); + r_last = rte_sched_port_enqueue_qwa(port, subport_last, + q_last, q_last_base, pkt_last); result += r_last; } From patchwork Thu Oct 24 18:46:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jasvinder Singh X-Patchwork-Id: 61925 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 160CD1EC12; Thu, 24 Oct 2019 19:47:09 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id A712C1EBC8 for ; Thu, 24 Oct 2019 19:46:41 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Oct 2019 10:46:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,225,1569308400"; d="scan'208";a="228601725" Received: from silpixa00381635.ir.intel.com (HELO silpixa00381635.ger.corp.intel.com) ([10.237.223.229]) by fmsmga002.fm.intel.com with ESMTP; 24 Oct 2019 10:46:40 -0700 From: Jasvinder Singh To: dev@dpdk.org Cc: cristian.dumitrescu@intel.com, Lukasz Krakowiak Date: Thu, 24 Oct 2019 19:46:22 +0100 Message-Id: <20191024184630.66881-8-jasvinder.singh@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191024184630.66881-1-jasvinder.singh@intel.com> References: <20191014172347.139114-1-jasvinder.singh@intel.com> <20191024184630.66881-1-jasvinder.singh@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v6 07/15] sched: update memory compute to support flexiblity X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Update memory footprint compute function for allowing subports of the same port to have different configuration in terms of number of pipes, pipe queue sizes, etc. Signed-off-by: Jasvinder Singh Signed-off-by: Lukasz Krakowiak --- lib/librte_sched/rte_sched.c | 110 +++++++++-------------------------- lib/librte_sched/rte_sched.h | 8 ++- 2 files changed, 34 insertions(+), 84 deletions(-) diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c index a8174afad..fdcbb214e 100644 --- a/lib/librte_sched/rte_sched.c +++ b/lib/librte_sched/rte_sched.c @@ -281,16 +281,6 @@ enum rte_sched_subport_array { e_RTE_SCHED_SUBPORT_ARRAY_TOTAL, }; -#ifdef RTE_SCHED_COLLECT_STATS - -static inline uint32_t -rte_sched_port_queues_per_subport(struct rte_sched_port *port) -{ - return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport; -} - -#endif - static inline uint32_t rte_sched_subport_pipe_queues(struct rte_sched_subport *subport) { @@ -486,70 +476,6 @@ rte_sched_port_check_params(struct rte_sched_port_params *params) return 0; } -static uint32_t -rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array) -{ - uint32_t n_subports_per_port = params->n_subports_per_port; - uint32_t n_pipes_per_subport = params->n_pipes_per_subport; - uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port; - uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port; - - uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport); - uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe); - uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue); - uint32_t size_queue_extra - = n_queues_per_port * sizeof(struct rte_sched_queue_extra); - uint32_t size_pipe_profiles - = params->n_max_pipe_profiles * sizeof(struct rte_sched_pipe_profile); - uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port); - uint32_t size_per_pipe_queue_array, size_queue_array; - - uint32_t base, i; - - size_per_pipe_queue_array = 0; - for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) { - if (i < RTE_SCHED_TRAFFIC_CLASS_BE) - size_per_pipe_queue_array += - params->qsize[i] * sizeof(struct rte_mbuf *); - else - size_per_pipe_queue_array += RTE_SCHED_MAX_QUEUES_PER_TC * - params->qsize[i] * sizeof(struct rte_mbuf *); - } - size_queue_array = n_pipes_per_port * size_per_pipe_queue_array; - - base = 0; - - if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT) - return base; - base += RTE_CACHE_LINE_ROUNDUP(size_subport); - - if (array == e_RTE_SCHED_PORT_ARRAY_PIPE) - return base; - base += RTE_CACHE_LINE_ROUNDUP(size_pipe); - - if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE) - return base; - base += RTE_CACHE_LINE_ROUNDUP(size_queue); - - if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA) - return base; - base += RTE_CACHE_LINE_ROUNDUP(size_queue_extra); - - if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES) - return base; - base += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles); - - if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY) - return base; - base += RTE_CACHE_LINE_ROUNDUP(size_bmp_array); - - if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY) - return base; - base += RTE_CACHE_LINE_ROUNDUP(size_queue_array); - - return base; -} - static uint32_t rte_sched_subport_get_array_base(struct rte_sched_subport_params *params, enum rte_sched_subport_array array) @@ -870,22 +796,44 @@ rte_sched_subport_check_params(struct rte_sched_subport_params *params, } uint32_t -rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params) +rte_sched_port_get_memory_footprint(struct rte_sched_port_params *port_params, + struct rte_sched_subport_params **subport_params) { - uint32_t size0, size1; + uint32_t size0 = 0, size1 = 0, i; int status; - status = rte_sched_port_check_params(params); + status = rte_sched_port_check_params(port_params); if (status != 0) { - RTE_LOG(NOTICE, SCHED, - "Port scheduler params check failed (%d)\n", status); + RTE_LOG(ERR, SCHED, + "%s: Port scheduler port params check failed (%d)\n", + __func__, status); return 0; } + for (i = 0; i < port_params->n_subports_per_port; i++) { + struct rte_sched_subport_params *sp = subport_params[i]; + + status = rte_sched_subport_check_params(sp, + port_params->n_pipes_per_subport, + port_params->rate); + if (status != 0) { + RTE_LOG(ERR, SCHED, + "%s: Port scheduler subport params check failed (%d)\n", + __func__, status); + + return 0; + } + } + size0 = sizeof(struct rte_sched_port); - size1 = rte_sched_port_get_array_base(params, - e_RTE_SCHED_PORT_ARRAY_TOTAL); + + for (i = 0; i < port_params->n_subports_per_port; i++) { + struct rte_sched_subport_params *sp = subport_params[i]; + + size1 += rte_sched_subport_get_array_base(sp, + e_RTE_SCHED_SUBPORT_ARRAY_TOTAL); + } return size0 + size1; } diff --git a/lib/librte_sched/rte_sched.h b/lib/librte_sched/rte_sched.h index 5001f09ed..40f02f124 100644 --- a/lib/librte_sched/rte_sched.h +++ b/lib/librte_sched/rte_sched.h @@ -373,14 +373,16 @@ rte_sched_pipe_config(struct rte_sched_port *port, /** * Hierarchical scheduler memory footprint size per port * - * @param params + * @param port_params * Port scheduler configuration parameter structure + * @param subport_params + * Array of subport parameter structures * @return * Memory footprint size in bytes upon success, 0 otherwise */ uint32_t -rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params); - +rte_sched_port_get_memory_footprint(struct rte_sched_port_params *port_params, + struct rte_sched_subport_params **subport_params); /* * Statistics * From patchwork Thu Oct 24 18:46:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jasvinder Singh X-Patchwork-Id: 61926 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id AFF431EC1A; Thu, 24 Oct 2019 19:47:11 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 47ED81EB2D for ; Thu, 24 Oct 2019 19:46:43 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Oct 2019 10:46:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,225,1569308400"; d="scan'208";a="228601732" Received: from silpixa00381635.ir.intel.com (HELO silpixa00381635.ger.corp.intel.com) ([10.237.223.229]) by fmsmga002.fm.intel.com with ESMTP; 24 Oct 2019 10:46:41 -0700 From: Jasvinder Singh To: dev@dpdk.org Cc: cristian.dumitrescu@intel.com, Lukasz Krakowiak Date: Thu, 24 Oct 2019 19:46:23 +0100 Message-Id: <20191024184630.66881-9-jasvinder.singh@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191024184630.66881-1-jasvinder.singh@intel.com> References: <20191014172347.139114-1-jasvinder.singh@intel.com> <20191024184630.66881-1-jasvinder.singh@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v6 08/15] sched: update grinder functions for config flexibility X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Modify packet grinder functions of the schedule to allow different subports of the same port to have different configuration in terms of number of pipes, pipe queue sizes, etc. Signed-off-by: Jasvinder Singh Signed-off-by: Lukasz Krakowiak --- lib/librte_sched/rte_sched.c | 223 +++++++++++++++++------------------ 1 file changed, 106 insertions(+), 117 deletions(-) diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c index fdcbb214e..6eba69d99 100644 --- a/lib/librte_sched/rte_sched.c +++ b/lib/librte_sched/rte_sched.c @@ -312,24 +312,6 @@ rte_sched_port_queues_per_port(struct rte_sched_port *port) return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port; } -static inline struct rte_mbuf ** -rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex) -{ - uint32_t pindex = qindex >> 4; - uint32_t qpos = qindex & 0xF; - - return (port->queue_array + pindex * - port->qsize_sum + port->qsize_add[qpos]); -} - -static inline uint16_t -rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex) -{ - uint32_t tc = port->pipe_tc[qindex & (RTE_SCHED_QUEUES_PER_PIPE - 1)]; - - return port->qsize[tc]; -} - static inline uint16_t rte_sched_port_pipe_queue(struct rte_sched_port *port, uint32_t traffic_class) { @@ -1523,9 +1505,10 @@ rte_sched_queue_read_stats(struct rte_sched_port *port, #ifdef RTE_SCHED_DEBUG static inline int -rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex) +rte_sched_port_queue_is_empty(struct rte_sched_subport *subport, + uint32_t qindex) { - struct rte_sched_queue *queue = port->queue + qindex; + struct rte_sched_queue *queue = subport->queue + qindex; return queue->qr == queue->qw; } @@ -1640,9 +1623,10 @@ rte_sched_port_red_drop(struct rte_sched_port *port, } static inline void -rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex) +rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, + struct rte_sched_subport *subport, uint32_t qindex) { - struct rte_sched_queue_extra *qe = port->queue_extra + qindex; + struct rte_sched_queue_extra *qe = subport->queue_extra + qindex; struct rte_red *red = &qe->red; rte_red_mark_queue_empty(red, port->time); @@ -1659,14 +1643,14 @@ static inline int rte_sched_port_red_drop(struct rte_sched_port *port __rte_unus return 0; } -#define rte_sched_port_set_queue_empty_timestamp(port, qindex) +#define rte_sched_port_set_queue_empty_timestamp(port, subport, qindex) #endif /* RTE_SCHED_RED */ #ifdef RTE_SCHED_DEBUG static inline void -debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos, +debug_check_queue_slab(struct rte_sched_subport *subport, uint32_t bmp_pos, uint64_t bmp_slab) { uint64_t mask; @@ -1678,7 +1662,7 @@ debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos, panic = 0; for (i = 0, mask = 1; i < 64; i++, mask <<= 1) { if (mask & bmp_slab) { - if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) { + if (rte_sched_port_queue_is_empty(subport, bmp_pos + i)) { printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i); panic = 1; } @@ -2000,10 +1984,10 @@ rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts, #ifndef RTE_SCHED_SUBPORT_TC_OV static inline void -grinder_credits_update(struct rte_sched_port *port, uint32_t pos) +grinder_credits_update(struct rte_sched_port *port, + struct rte_sched_subport *subport, uint32_t pos) { - struct rte_sched_grinder *grinder = port->grinder + pos; - struct rte_sched_subport *subport = grinder->subport; + struct rte_sched_grinder *grinder = subport->grinder + pos; struct rte_sched_pipe *pipe = grinder->pipe; struct rte_sched_pipe_profile *params = grinder->pipe_params; uint64_t n_periods; @@ -2041,10 +2025,9 @@ grinder_credits_update(struct rte_sched_port *port, uint32_t pos) #else static inline uint32_t -grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos) +grinder_tc_ov_credits_update(struct rte_sched_port *port, + struct rte_sched_subport *subport) { - struct rte_sched_grinder *grinder = port->grinder + pos; - struct rte_sched_subport *subport = grinder->subport; uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; uint32_t tc_consumption = 0, tc_ov_consumption_max; uint32_t tc_ov_wm = subport->tc_ov_wm; @@ -2084,10 +2067,10 @@ grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos) } static inline void -grinder_credits_update(struct rte_sched_port *port, uint32_t pos) +grinder_credits_update(struct rte_sched_port *port, + struct rte_sched_subport *subport, uint32_t pos) { - struct rte_sched_grinder *grinder = port->grinder + pos; - struct rte_sched_subport *subport = grinder->subport; + struct rte_sched_grinder *grinder = subport->grinder + pos; struct rte_sched_pipe *pipe = grinder->pipe; struct rte_sched_pipe_profile *params = grinder->pipe_params; uint64_t n_periods; @@ -2107,7 +2090,7 @@ grinder_credits_update(struct rte_sched_port *port, uint32_t pos) /* Subport TCs */ if (unlikely(port->time >= subport->tc_time)) { - subport->tc_ov_wm = grinder_tc_ov_credits_update(port, pos); + subport->tc_ov_wm = grinder_tc_ov_credits_update(port, subport); for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) subport->tc_credits[i] = subport->tc_credits_per_period[i]; @@ -2137,10 +2120,10 @@ grinder_credits_update(struct rte_sched_port *port, uint32_t pos) #ifndef RTE_SCHED_SUBPORT_TC_OV static inline int -grinder_credits_check(struct rte_sched_port *port, uint32_t pos) +grinder_credits_check(struct rte_sched_port *port, + struct rte_sched_subport *subport, uint32_t pos) { - struct rte_sched_grinder *grinder = port->grinder + pos; - struct rte_sched_subport *subport = grinder->subport; + struct rte_sched_grinder *grinder = subport->grinder + pos; struct rte_sched_pipe *pipe = grinder->pipe; struct rte_mbuf *pkt = grinder->pkt; uint32_t tc_index = grinder->tc_index; @@ -2172,10 +2155,10 @@ grinder_credits_check(struct rte_sched_port *port, uint32_t pos) #else static inline int -grinder_credits_check(struct rte_sched_port *port, uint32_t pos) +grinder_credits_check(struct rte_sched_port *port, + struct rte_sched_subport *subport, uint32_t pos) { - struct rte_sched_grinder *grinder = port->grinder + pos; - struct rte_sched_subport *subport = grinder->subport; + struct rte_sched_grinder *grinder = subport->grinder + pos; struct rte_sched_pipe *pipe = grinder->pipe; struct rte_mbuf *pkt = grinder->pkt; uint32_t tc_index = grinder->tc_index; @@ -2220,15 +2203,16 @@ grinder_credits_check(struct rte_sched_port *port, uint32_t pos) static inline int -grinder_schedule(struct rte_sched_port *port, uint32_t pos) +grinder_schedule(struct rte_sched_port *port, + struct rte_sched_subport *subport, uint32_t pos) { - struct rte_sched_grinder *grinder = port->grinder + pos; + struct rte_sched_grinder *grinder = subport->grinder + pos; struct rte_sched_queue *queue = grinder->queue[grinder->qpos]; struct rte_mbuf *pkt = grinder->pkt; uint32_t pkt_len = pkt->pkt_len + port->frame_overhead; uint32_t be_tc_active; - if (!grinder_credits_check(port, pos)) + if (!grinder_credits_check(port, subport, pos)) return 0; /* Advance port time */ @@ -2245,15 +2229,15 @@ grinder_schedule(struct rte_sched_port *port, uint32_t pos) if (queue->qr == queue->qw) { uint32_t qindex = grinder->qindex[grinder->qpos]; - rte_bitmap_clear(port->bmp, qindex); + rte_bitmap_clear(subport->bmp, qindex); grinder->qmask &= ~(1 << grinder->qpos); if (be_tc_active) grinder->wrr_mask[grinder->qpos] = 0; - rte_sched_port_set_queue_empty_timestamp(port, qindex); + rte_sched_port_set_queue_empty_timestamp(port, subport, qindex); } /* Reset pipe loop detection */ - port->pipe_loop = RTE_SCHED_PIPE_INVALID; + subport->pipe_loop = RTE_SCHED_PIPE_INVALID; grinder->productive = 1; return 1; @@ -2262,13 +2246,13 @@ grinder_schedule(struct rte_sched_port *port, uint32_t pos) #ifdef SCHED_VECTOR_SSE4 static inline int -grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe) +grinder_pipe_exists(struct rte_sched_subport *subport, uint32_t base_pipe) { __m128i index = _mm_set1_epi32(base_pipe); - __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos); + __m128i pipes = _mm_load_si128((__m128i *)subport->grinder_base_bmp_pos); __m128i res = _mm_cmpeq_epi32(pipes, index); - pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4)); + pipes = _mm_load_si128((__m128i *)(subport->grinder_base_bmp_pos + 4)); pipes = _mm_cmpeq_epi32(pipes, index); res = _mm_or_si128(res, pipes); @@ -2281,10 +2265,10 @@ grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe) #elif defined(SCHED_VECTOR_NEON) static inline int -grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe) +grinder_pipe_exists(struct rte_sched_subport *subport, uint32_t base_pipe) { uint32x4_t index, pipes; - uint32_t *pos = (uint32_t *)port->grinder_base_bmp_pos; + uint32_t *pos = (uint32_t *)subport->grinder_base_bmp_pos; index = vmovq_n_u32(base_pipe); pipes = vld1q_u32(pos); @@ -2301,12 +2285,12 @@ grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe) #else static inline int -grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe) +grinder_pipe_exists(struct rte_sched_subport *subport, uint32_t base_pipe) { uint32_t i; for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++) { - if (port->grinder_base_bmp_pos[i] == base_pipe) + if (subport->grinder_base_bmp_pos[i] == base_pipe) return 1; } @@ -2316,9 +2300,10 @@ grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe) #endif /* RTE_SCHED_OPTIMIZATIONS */ static inline void -grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab) +grinder_pcache_populate(struct rte_sched_subport *subport, + uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab) { - struct rte_sched_grinder *grinder = port->grinder + pos; + struct rte_sched_grinder *grinder = subport->grinder + pos; uint16_t w[4]; grinder->pcache_w = 0; @@ -2347,9 +2332,10 @@ grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_ } static inline void -grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask) +grinder_tccache_populate(struct rte_sched_subport *subport, + uint32_t pos, uint32_t qindex, uint16_t qmask) { - struct rte_sched_grinder *grinder = port->grinder + pos; + struct rte_sched_grinder *grinder = subport->grinder + pos; uint8_t b, i; grinder->tccache_w = 0; @@ -2370,9 +2356,10 @@ grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qin } static inline int -grinder_next_tc(struct rte_sched_port *port, uint32_t pos) +grinder_next_tc(struct rte_sched_port *port, + struct rte_sched_subport *subport, uint32_t pos) { - struct rte_sched_grinder *grinder = port->grinder + pos; + struct rte_sched_grinder *grinder = subport->grinder + pos; struct rte_mbuf **qbase; uint32_t qindex; uint16_t qsize; @@ -2381,15 +2368,15 @@ grinder_next_tc(struct rte_sched_port *port, uint32_t pos) return 0; qindex = grinder->tccache_qindex[grinder->tccache_r]; - qbase = rte_sched_port_qbase(port, qindex); - qsize = rte_sched_port_qsize(port, qindex); + qbase = rte_sched_subport_pipe_qbase(subport, qindex); + qsize = rte_sched_subport_pipe_qsize(port, subport, qindex); grinder->tc_index = rte_sched_port_pipe_tc(port, qindex); grinder->qmask = grinder->tccache_qmask[grinder->tccache_r]; grinder->qsize = qsize; if (grinder->tc_index < RTE_SCHED_TRAFFIC_CLASS_BE) { - grinder->queue[0] = port->queue + qindex; + grinder->queue[0] = subport->queue + qindex; grinder->qbase[0] = qbase; grinder->qindex[0] = qindex; grinder->tccache_r++; @@ -2397,10 +2384,10 @@ grinder_next_tc(struct rte_sched_port *port, uint32_t pos) return 1; } - grinder->queue[0] = port->queue + qindex; - grinder->queue[1] = port->queue + qindex + 1; - grinder->queue[2] = port->queue + qindex + 2; - grinder->queue[3] = port->queue + qindex + 3; + grinder->queue[0] = subport->queue + qindex; + grinder->queue[1] = subport->queue + qindex + 1; + grinder->queue[2] = subport->queue + qindex + 2; + grinder->queue[3] = subport->queue + qindex + 3; grinder->qbase[0] = qbase; grinder->qbase[1] = qbase + qsize; @@ -2417,9 +2404,10 @@ grinder_next_tc(struct rte_sched_port *port, uint32_t pos) } static inline int -grinder_next_pipe(struct rte_sched_port *port, uint32_t pos) +grinder_next_pipe(struct rte_sched_port *port, + struct rte_sched_subport *subport, uint32_t pos) { - struct rte_sched_grinder *grinder = port->grinder + pos; + struct rte_sched_grinder *grinder = subport->grinder + pos; uint32_t pipe_qindex; uint16_t pipe_qmask; @@ -2432,22 +2420,22 @@ grinder_next_pipe(struct rte_sched_port *port, uint32_t pos) uint32_t bmp_pos = 0; /* Get another non-empty pipe group */ - if (unlikely(rte_bitmap_scan(port->bmp, &bmp_pos, &bmp_slab) <= 0)) + if (unlikely(rte_bitmap_scan(subport->bmp, &bmp_pos, &bmp_slab) <= 0)) return 0; #ifdef RTE_SCHED_DEBUG - debug_check_queue_slab(port, bmp_pos, bmp_slab); + debug_check_queue_slab(subport, bmp_pos, bmp_slab); #endif /* Return if pipe group already in one of the other grinders */ - port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID; - if (unlikely(grinder_pipe_exists(port, bmp_pos))) + subport->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID; + if (unlikely(grinder_pipe_exists(subport, bmp_pos))) return 0; - port->grinder_base_bmp_pos[pos] = bmp_pos; + subport->grinder_base_bmp_pos[pos] = bmp_pos; /* Install new pipe group into grinder's pipe cache */ - grinder_pcache_populate(port, pos, bmp_pos, bmp_slab); + grinder_pcache_populate(subport, pos, bmp_pos, bmp_slab); pipe_qmask = grinder->pcache_qmask[0]; pipe_qindex = grinder->pcache_qindex[0]; @@ -2456,18 +2444,18 @@ grinder_next_pipe(struct rte_sched_port *port, uint32_t pos) /* Install new pipe in the grinder */ grinder->pindex = pipe_qindex >> 4; - grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport); - grinder->pipe = port->pipe + grinder->pindex; + grinder->subport = subport; + grinder->pipe = subport->pipe + grinder->pindex; grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */ grinder->productive = 0; - grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask); - grinder_next_tc(port, pos); + grinder_tccache_populate(subport, pos, pipe_qindex, pipe_qmask); + grinder_next_tc(port, subport, pos); /* Check for pipe exhaustion */ - if (grinder->pindex == port->pipe_loop) { - port->pipe_exhaustion = 1; - port->pipe_loop = RTE_SCHED_PIPE_INVALID; + if (grinder->pindex == subport->pipe_loop) { + subport->pipe_exhaustion = 1; + subport->pipe_loop = RTE_SCHED_PIPE_INVALID; } return 1; @@ -2475,9 +2463,9 @@ grinder_next_pipe(struct rte_sched_port *port, uint32_t pos) static inline void -grinder_wrr_load(struct rte_sched_port *port, uint32_t pos) +grinder_wrr_load(struct rte_sched_subport *subport, uint32_t pos) { - struct rte_sched_grinder *grinder = port->grinder + pos; + struct rte_sched_grinder *grinder = subport->grinder + pos; struct rte_sched_pipe *pipe = grinder->pipe; struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params; uint32_t qmask = grinder->qmask; @@ -2503,9 +2491,9 @@ grinder_wrr_load(struct rte_sched_port *port, uint32_t pos) } static inline void -grinder_wrr_store(struct rte_sched_port *port, uint32_t pos) +grinder_wrr_store(struct rte_sched_subport *subport, uint32_t pos) { - struct rte_sched_grinder *grinder = port->grinder + pos; + struct rte_sched_grinder *grinder = subport->grinder + pos; struct rte_sched_pipe *pipe = grinder->pipe; pipe->wrr_tokens[0] = @@ -2523,9 +2511,9 @@ grinder_wrr_store(struct rte_sched_port *port, uint32_t pos) } static inline void -grinder_wrr(struct rte_sched_port *port, uint32_t pos) +grinder_wrr(struct rte_sched_subport *subport, uint32_t pos) { - struct rte_sched_grinder *grinder = port->grinder + pos; + struct rte_sched_grinder *grinder = subport->grinder + pos; uint16_t wrr_tokens_min; grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0]; @@ -2543,21 +2531,21 @@ grinder_wrr(struct rte_sched_port *port, uint32_t pos) } -#define grinder_evict(port, pos) +#define grinder_evict(subport, pos) static inline void -grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos) +grinder_prefetch_pipe(struct rte_sched_subport *subport, uint32_t pos) { - struct rte_sched_grinder *grinder = port->grinder + pos; + struct rte_sched_grinder *grinder = subport->grinder + pos; rte_prefetch0(grinder->pipe); rte_prefetch0(grinder->queue[0]); } static inline void -grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos) +grinder_prefetch_tc_queue_arrays(struct rte_sched_subport *subport, uint32_t pos) { - struct rte_sched_grinder *grinder = port->grinder + pos; + struct rte_sched_grinder *grinder = subport->grinder + pos; uint16_t qsize, qr[RTE_SCHED_MAX_QUEUES_PER_TC]; qsize = grinder->qsize; @@ -2578,17 +2566,17 @@ grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos) rte_prefetch0(grinder->qbase[0] + qr[0]); rte_prefetch0(grinder->qbase[1] + qr[1]); - grinder_wrr_load(port, pos); - grinder_wrr(port, pos); + grinder_wrr_load(subport, pos); + grinder_wrr(subport, pos); rte_prefetch0(grinder->qbase[2] + qr[2]); rte_prefetch0(grinder->qbase[3] + qr[3]); } static inline void -grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos) +grinder_prefetch_mbuf(struct rte_sched_subport *subport, uint32_t pos) { - struct rte_sched_grinder *grinder = port->grinder + pos; + struct rte_sched_grinder *grinder = subport->grinder + pos; uint32_t qpos = grinder->qpos; struct rte_mbuf **qbase = grinder->qbase[qpos]; uint16_t qsize = grinder->qsize; @@ -2607,14 +2595,15 @@ grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos) static inline uint32_t grinder_handle(struct rte_sched_port *port, uint32_t pos) { - struct rte_sched_grinder *grinder = port->grinder + pos; + struct rte_sched_subport *subport = port->subport; + struct rte_sched_grinder *grinder = subport->grinder + pos; switch (grinder->state) { case e_GRINDER_PREFETCH_PIPE: { - if (grinder_next_pipe(port, pos)) { - grinder_prefetch_pipe(port, pos); - port->busy_grinders++; + if (grinder_next_pipe(port, subport, pos)) { + grinder_prefetch_pipe(subport, pos); + subport->busy_grinders++; grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS; return 0; @@ -2627,9 +2616,9 @@ grinder_handle(struct rte_sched_port *port, uint32_t pos) { struct rte_sched_pipe *pipe = grinder->pipe; - grinder->pipe_params = port->pipe_profiles + pipe->profile; - grinder_prefetch_tc_queue_arrays(port, pos); - grinder_credits_update(port, pos); + grinder->pipe_params = subport->pipe_profiles + pipe->profile; + grinder_prefetch_tc_queue_arrays(subport, pos); + grinder_credits_update(port, subport, pos); grinder->state = e_GRINDER_PREFETCH_MBUF; return 0; @@ -2637,7 +2626,7 @@ grinder_handle(struct rte_sched_port *port, uint32_t pos) case e_GRINDER_PREFETCH_MBUF: { - grinder_prefetch_mbuf(port, pos); + grinder_prefetch_mbuf(subport, pos); grinder->state = e_GRINDER_READ_MBUF; return 0; @@ -2647,47 +2636,47 @@ grinder_handle(struct rte_sched_port *port, uint32_t pos) { uint32_t wrr_active, result = 0; - result = grinder_schedule(port, pos); + result = grinder_schedule(port, subport, pos); wrr_active = (grinder->tc_index == RTE_SCHED_TRAFFIC_CLASS_BE); /* Look for next packet within the same TC */ if (result && grinder->qmask) { if (wrr_active) - grinder_wrr(port, pos); + grinder_wrr(subport, pos); - grinder_prefetch_mbuf(port, pos); + grinder_prefetch_mbuf(subport, pos); return 1; } if (wrr_active) - grinder_wrr_store(port, pos); + grinder_wrr_store(subport, pos); /* Look for another active TC within same pipe */ - if (grinder_next_tc(port, pos)) { - grinder_prefetch_tc_queue_arrays(port, pos); + if (grinder_next_tc(port, subport, pos)) { + grinder_prefetch_tc_queue_arrays(subport, pos); grinder->state = e_GRINDER_PREFETCH_MBUF; return result; } if (grinder->productive == 0 && - port->pipe_loop == RTE_SCHED_PIPE_INVALID) - port->pipe_loop = grinder->pindex; + subport->pipe_loop == RTE_SCHED_PIPE_INVALID) + subport->pipe_loop = grinder->pindex; - grinder_evict(port, pos); + grinder_evict(subport, pos); /* Look for another active pipe */ - if (grinder_next_pipe(port, pos)) { - grinder_prefetch_pipe(port, pos); + if (grinder_next_pipe(port, subport, pos)) { + grinder_prefetch_pipe(subport, pos); grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS; return result; } /* No active pipe found */ - port->busy_grinders--; + subport->busy_grinders--; grinder->state = e_GRINDER_PREFETCH_PIPE; return result; From patchwork Thu Oct 24 18:46:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jasvinder Singh X-Patchwork-Id: 61927 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 2D16D1EC2D; Thu, 24 Oct 2019 19:47:14 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 5FB6C1EB2D for ; Thu, 24 Oct 2019 19:46:44 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Oct 2019 10:46:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,225,1569308400"; d="scan'208";a="228601736" Received: from silpixa00381635.ir.intel.com (HELO silpixa00381635.ger.corp.intel.com) ([10.237.223.229]) by fmsmga002.fm.intel.com with ESMTP; 24 Oct 2019 10:46:42 -0700 From: Jasvinder Singh To: dev@dpdk.org Cc: cristian.dumitrescu@intel.com, Lukasz Krakowiak Date: Thu, 24 Oct 2019 19:46:24 +0100 Message-Id: <20191024184630.66881-10-jasvinder.singh@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191024184630.66881-1-jasvinder.singh@intel.com> References: <20191014172347.139114-1-jasvinder.singh@intel.com> <20191024184630.66881-1-jasvinder.singh@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v6 09/15] sched: update pkt dequeue for flexible config X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Modify scheduler packet dequeue operation to allow different subports of the same port to have different configuration in terms of number of pipes, pipe queue sizes, etc. Signed-off-by: Jasvinder Singh Signed-off-by: Lukasz Krakowiak --- lib/librte_sched/rte_sched.c | 51 ++++++++++++++++++++++++++++-------- 1 file changed, 40 insertions(+), 11 deletions(-) diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c index 6eba69d99..28df34447 100644 --- a/lib/librte_sched/rte_sched.c +++ b/lib/librte_sched/rte_sched.c @@ -243,6 +243,7 @@ struct rte_sched_port { uint32_t busy_grinders; struct rte_mbuf **pkts_out; uint32_t n_pkts_out; + uint32_t subport_id; /* Queue base calculation */ uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE]; @@ -888,6 +889,7 @@ rte_sched_port_config(struct rte_sched_port_params *params) /* Grinders */ port->pkts_out = NULL; port->n_pkts_out = 0; + port->subport_id = 0; return port; } @@ -2593,9 +2595,9 @@ grinder_prefetch_mbuf(struct rte_sched_subport *subport, uint32_t pos) } static inline uint32_t -grinder_handle(struct rte_sched_port *port, uint32_t pos) +grinder_handle(struct rte_sched_port *port, + struct rte_sched_subport *subport, uint32_t pos) { - struct rte_sched_subport *subport = port->subport; struct rte_sched_grinder *grinder = subport->grinder + pos; switch (grinder->state) { @@ -2694,6 +2696,7 @@ rte_sched_port_time_resync(struct rte_sched_port *port) uint64_t cycles = rte_get_tsc_cycles(); uint64_t cycles_diff = cycles - port->time_cpu_cycles; uint64_t bytes_diff; + uint32_t i; /* Compute elapsed time in bytes */ bytes_diff = rte_reciprocal_divide(cycles_diff << RTE_SCHED_TIME_SHIFT, @@ -2706,20 +2709,21 @@ rte_sched_port_time_resync(struct rte_sched_port *port) port->time = port->time_cpu_bytes; /* Reset pipe loop detection */ - port->pipe_loop = RTE_SCHED_PIPE_INVALID; + for (i = 0; i < port->n_subports_per_port; i++) + port->subports[i]->pipe_loop = RTE_SCHED_PIPE_INVALID; } static inline int -rte_sched_port_exceptions(struct rte_sched_port *port, int second_pass) +rte_sched_port_exceptions(struct rte_sched_subport *subport, int second_pass) { int exceptions; /* Check if any exception flag is set */ - exceptions = (second_pass && port->busy_grinders == 0) || - (port->pipe_exhaustion == 1); + exceptions = (second_pass && subport->busy_grinders == 0) || + (subport->pipe_exhaustion == 1); /* Clear exception flags */ - port->pipe_exhaustion = 0; + subport->pipe_exhaustion = 0; return exceptions; } @@ -2727,7 +2731,9 @@ rte_sched_port_exceptions(struct rte_sched_port *port, int second_pass) int rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts) { - uint32_t i, count; + struct rte_sched_subport *subport; + uint32_t subport_id = port->subport_id; + uint32_t i, n_subports = 0, count; port->pkts_out = pkts; port->n_pkts_out = 0; @@ -2736,9 +2742,32 @@ rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint /* Take each queue in the grinder one step further */ for (i = 0, count = 0; ; i++) { - count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1)); - if ((count == n_pkts) || - rte_sched_port_exceptions(port, i >= RTE_SCHED_PORT_N_GRINDERS)) { + subport = port->subports[subport_id]; + + count += grinder_handle(port, subport, + i & (RTE_SCHED_PORT_N_GRINDERS - 1)); + + if (count == n_pkts) { + subport_id++; + + if (subport_id == port->n_subports_per_port) + subport_id = 0; + + port->subport_id = subport_id; + break; + } + + if (rte_sched_port_exceptions(subport, i >= RTE_SCHED_PORT_N_GRINDERS)) { + i = 0; + subport_id++; + n_subports++; + } + + if (subport_id == port->n_subports_per_port) + subport_id = 0; + + if (n_subports == port->n_subports_per_port) { + port->subport_id = subport_id; break; } } From patchwork Thu Oct 24 18:46:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jasvinder Singh X-Patchwork-Id: 61928 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 502611EC29; Thu, 24 Oct 2019 19:47:17 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 5F6451EBCC for ; Thu, 24 Oct 2019 19:46:45 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Oct 2019 10:46:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,225,1569308400"; d="scan'208";a="228601739" Received: from silpixa00381635.ir.intel.com (HELO silpixa00381635.ger.corp.intel.com) ([10.237.223.229]) by fmsmga002.fm.intel.com with ESMTP; 24 Oct 2019 10:46:44 -0700 From: Jasvinder Singh To: dev@dpdk.org Cc: cristian.dumitrescu@intel.com, Lukasz Krakowiak Date: Thu, 24 Oct 2019 19:46:25 +0100 Message-Id: <20191024184630.66881-11-jasvinder.singh@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191024184630.66881-1-jasvinder.singh@intel.com> References: <20191014172347.139114-1-jasvinder.singh@intel.com> <20191024184630.66881-1-jasvinder.singh@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v6 10/15] sched: update queue stats read for config flexibility X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Modify pipe queue stats read function to allow different subports of the same port to have different configuration in terms of number of pipes, pipe queue sizes, etc. Signed-off-by: Jasvinder Singh Signed-off-by: Lukasz Krakowiak --- lib/librte_sched/rte_sched.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c index 28df34447..1faa580d0 100644 --- a/lib/librte_sched/rte_sched.c +++ b/lib/librte_sched/rte_sched.c @@ -310,7 +310,12 @@ struct rte_sched_subport *subport, uint32_t qindex) static inline uint32_t rte_sched_port_queues_per_port(struct rte_sched_port *port) { - return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port; + uint32_t n_queues = 0, i; + + for (i = 0; i < port->n_subports_per_port; i++) + n_queues += rte_sched_subport_pipe_queues(port->subports[i]); + + return n_queues; } static inline uint16_t @@ -1464,8 +1469,10 @@ rte_sched_queue_read_stats(struct rte_sched_port *port, struct rte_sched_queue_stats *stats, uint16_t *qlen) { + struct rte_sched_subport *s; struct rte_sched_queue *q; struct rte_sched_queue_extra *qe; + uint32_t subport_id, subport_qmask, subport_qindex; /* Check user parameters */ if (port == NULL) { @@ -1491,8 +1498,13 @@ rte_sched_queue_read_stats(struct rte_sched_port *port, "%s: Incorrect value for parameter qlen\n", __func__); return -EINVAL; } - q = port->queue + queue_id; - qe = port->queue_extra + queue_id; + subport_qmask = port->n_pipes_per_subport_log2 + 4; + subport_id = (queue_id >> subport_qmask) & (port->n_subports_per_port - 1); + + s = port->subports[subport_id]; + subport_qindex = ((1 << subport_qmask) - 1) & queue_id; + q = s->queue + subport_qindex; + qe = s->queue_extra + subport_qindex; /* Copy queue stats and clear */ memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats)); From patchwork Thu Oct 24 18:46:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jasvinder Singh X-Patchwork-Id: 61929 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 088441EC3E; Thu, 24 Oct 2019 19:47:20 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 8EED91EBD1 for ; Thu, 24 Oct 2019 19:46:46 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Oct 2019 10:46:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,225,1569308400"; d="scan'208";a="228601743" Received: from silpixa00381635.ir.intel.com (HELO silpixa00381635.ger.corp.intel.com) ([10.237.223.229]) by fmsmga002.fm.intel.com with ESMTP; 24 Oct 2019 10:46:45 -0700 From: Jasvinder Singh To: dev@dpdk.org Cc: cristian.dumitrescu@intel.com, Lukasz Krakowiak Date: Thu, 24 Oct 2019 19:46:26 +0100 Message-Id: <20191024184630.66881-12-jasvinder.singh@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191024184630.66881-1-jasvinder.singh@intel.com> References: <20191014172347.139114-1-jasvinder.singh@intel.com> <20191024184630.66881-1-jasvinder.singh@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v6 11/15] test/sched: modify tests for subport config flexibility X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Modify tests function to allow different subports of the same port to have different configuration in terms of number of pipes, pipe queue sizes, etc. Signed-off-by: Jasvinder Singh Signed-off-by: Lukasz Krakowiak --- app/test/test_sched.c | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/app/test/test_sched.c b/app/test/test_sched.c index afe0b0765..fc31080ef 100644 --- a/app/test/test_sched.c +++ b/app/test/test_sched.c @@ -22,18 +22,6 @@ #define TC 2 #define QUEUE 0 -static struct rte_sched_subport_params subport_param[] = { - { - .tb_rate = 1250000000, - .tb_size = 1000000, - - .tc_rate = {1250000000, 1250000000, 1250000000, 1250000000, - 1250000000, 1250000000, 1250000000, 1250000000, 1250000000, - 1250000000, 1250000000, 1250000000, 1250000000}, - .tc_period = 10, - }, -}; - static struct rte_sched_pipe_params pipe_profile[] = { { /* Profile #0 */ .tb_rate = 305175, @@ -48,6 +36,23 @@ static struct rte_sched_pipe_params pipe_profile[] = { }, }; +static struct rte_sched_subport_params subport_param[] = { + { + .tb_rate = 1250000000, + .tb_size = 1000000, + + .tc_rate = {1250000000, 1250000000, 1250000000, 1250000000, + 1250000000, 1250000000, 1250000000, 1250000000, 1250000000, + 1250000000, 1250000000, 1250000000, 1250000000}, + .tc_period = 10, + .n_pipes_per_subport_enabled = 1024, + .qsize = {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, + .pipe_profiles = pipe_profile, + .n_pipe_profiles = 1, + .n_max_pipe_profiles = 1, + }, +}; + static struct rte_sched_port_params port_param = { .socket = 0, /* computed */ .rate = 0, /* computed */ @@ -55,10 +60,6 @@ static struct rte_sched_port_params port_param = { .frame_overhead = RTE_SCHED_FRAME_OVERHEAD_DEFAULT, .n_subports_per_port = 1, .n_pipes_per_subport = 1024, - .qsize = {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32}, - .pipe_profiles = pipe_profile, - .n_pipe_profiles = 1, - .n_max_pipe_profiles = 1, }; #define NB_MBUF 32 @@ -140,7 +141,7 @@ test_sched(void) err = rte_sched_subport_config(port, SUBPORT, subport_param); TEST_ASSERT_SUCCESS(err, "Error config sched, err=%d\n", err); - for (pipe = 0; pipe < port_param.n_pipes_per_subport; pipe ++) { + for (pipe = 0; pipe < subport_param[0].n_pipes_per_subport_enabled; pipe++) { err = rte_sched_pipe_config(port, SUBPORT, pipe, 0); TEST_ASSERT_SUCCESS(err, "Error config sched pipe %u, err=%d\n", pipe, err); } From patchwork Thu Oct 24 18:46:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jasvinder Singh X-Patchwork-Id: 61930 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5C5D21EC49; Thu, 24 Oct 2019 19:47:22 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id BC5821EBD5 for ; Thu, 24 Oct 2019 19:46:47 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Oct 2019 10:46:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,225,1569308400"; d="scan'208";a="228601749" Received: from silpixa00381635.ir.intel.com (HELO silpixa00381635.ger.corp.intel.com) ([10.237.223.229]) by fmsmga002.fm.intel.com with ESMTP; 24 Oct 2019 10:46:46 -0700 From: Jasvinder Singh To: dev@dpdk.org Cc: cristian.dumitrescu@intel.com, Lukasz Krakowiak Date: Thu, 24 Oct 2019 19:46:27 +0100 Message-Id: <20191024184630.66881-13-jasvinder.singh@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191024184630.66881-1-jasvinder.singh@intel.com> References: <20191014172347.139114-1-jasvinder.singh@intel.com> <20191024184630.66881-1-jasvinder.singh@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v6 12/15] net/softnic: add subport config flexibility to TM X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Modify softnic traffic management function to allow different subports of the same port to have different configuration in terms of number of pipes, pipe queue sizes, etc. Signed-off-by: Jasvinder Singh Signed-off-by: Lukasz Krakowiak --- drivers/net/softnic/rte_eth_softnic_tm.c | 54 ++++++++++++------------ 1 file changed, 28 insertions(+), 26 deletions(-) diff --git a/drivers/net/softnic/rte_eth_softnic_tm.c b/drivers/net/softnic/rte_eth_softnic_tm.c index 61c3adc82..80a470c9e 100644 --- a/drivers/net/softnic/rte_eth_softnic_tm.c +++ b/drivers/net/softnic/rte_eth_softnic_tm.c @@ -85,7 +85,8 @@ softnic_tmgr_port_create(struct pmd_internals *p, /* Subport */ n_subports = t->port_params.n_subports_per_port; for (subport_id = 0; subport_id < n_subports; subport_id++) { - uint32_t n_pipes_per_subport = t->port_params.n_pipes_per_subport; + uint32_t n_pipes_per_subport = + t->subport_params[subport_id].n_pipes_per_subport_enabled; uint32_t pipe_id; int status; @@ -2211,10 +2212,11 @@ tm_tc_wred_profile_get(struct rte_eth_dev *dev, uint32_t tc_id) #ifdef RTE_SCHED_RED static void -wred_profiles_set(struct rte_eth_dev *dev) +wred_profiles_set(struct rte_eth_dev *dev, uint32_t subport_id) { struct pmd_internals *p = dev->data->dev_private; - struct rte_sched_port_params *pp = &p->soft.tm.params.port_params; + struct rte_sched_subport_params *pp = + &p->soft.tm.params.subport_params[subport_id]; uint32_t tc_id; enum rte_color color; @@ -2234,7 +2236,7 @@ wred_profiles_set(struct rte_eth_dev *dev) #else -#define wred_profiles_set(dev) +#define wred_profiles_set(dev, subport_id) #endif @@ -2526,29 +2528,9 @@ hierarchy_blueprints_create(struct rte_eth_dev *dev) .frame_overhead = root->shaper_profile->params.pkt_length_adjust, .n_subports_per_port = root->n_children, - .n_pipes_per_subport = h->n_tm_nodes[TM_NODE_LEVEL_PIPE] / - h->n_tm_nodes[TM_NODE_LEVEL_SUBPORT], - .qsize = {p->params.tm.qsize[0], - p->params.tm.qsize[1], - p->params.tm.qsize[2], - p->params.tm.qsize[3], - p->params.tm.qsize[4], - p->params.tm.qsize[5], - p->params.tm.qsize[6], - p->params.tm.qsize[7], - p->params.tm.qsize[8], - p->params.tm.qsize[9], - p->params.tm.qsize[10], - p->params.tm.qsize[11], - p->params.tm.qsize[12], - }, - .pipe_profiles = t->pipe_profiles, - .n_pipe_profiles = t->n_pipe_profiles, - .n_max_pipe_profiles = TM_MAX_PIPE_PROFILE, + .n_pipes_per_subport = TM_MAX_PIPES_PER_SUBPORT, }; - wred_profiles_set(dev); - subport_id = 0; TAILQ_FOREACH(n, nl, node) { uint64_t tc_rate[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; @@ -2588,8 +2570,28 @@ hierarchy_blueprints_create(struct rte_eth_dev *dev) tc_rate[12], }, .tc_period = SUBPORT_TC_PERIOD, + .n_pipes_per_subport_enabled = + h->n_tm_nodes[TM_NODE_LEVEL_PIPE] / + h->n_tm_nodes[TM_NODE_LEVEL_SUBPORT], + .qsize = {p->params.tm.qsize[0], + p->params.tm.qsize[1], + p->params.tm.qsize[2], + p->params.tm.qsize[3], + p->params.tm.qsize[4], + p->params.tm.qsize[5], + p->params.tm.qsize[6], + p->params.tm.qsize[7], + p->params.tm.qsize[8], + p->params.tm.qsize[9], + p->params.tm.qsize[10], + p->params.tm.qsize[11], + p->params.tm.qsize[12], + }, + .pipe_profiles = t->pipe_profiles, + .n_pipe_profiles = t->n_pipe_profiles, + .n_max_pipe_profiles = TM_MAX_PIPE_PROFILE, }; - + wred_profiles_set(dev, subport_id); subport_id++; } } From patchwork Thu Oct 24 18:46:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jasvinder Singh X-Patchwork-Id: 61931 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 483DF1EC5E; Thu, 24 Oct 2019 19:47:25 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 010771EA5A for ; Thu, 24 Oct 2019 19:46:48 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Oct 2019 10:46:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,225,1569308400"; d="scan'208";a="228601756" Received: from silpixa00381635.ir.intel.com (HELO silpixa00381635.ger.corp.intel.com) ([10.237.223.229]) by fmsmga002.fm.intel.com with ESMTP; 24 Oct 2019 10:46:47 -0700 From: Jasvinder Singh To: dev@dpdk.org Cc: cristian.dumitrescu@intel.com, Lukasz Krakowiak Date: Thu, 24 Oct 2019 19:46:28 +0100 Message-Id: <20191024184630.66881-14-jasvinder.singh@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191024184630.66881-1-jasvinder.singh@intel.com> References: <20191014172347.139114-1-jasvinder.singh@intel.com> <20191024184630.66881-1-jasvinder.singh@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v6 13/15] ip_pipeline: add subport config flexibility to TM X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Modify ip pipeline traffic management function to allow different subports of the same port to have different configuration in terms of number of pipes, pipe queue sizes, etc. Signed-off-by: Jasvinder Singh Signed-off-by: Lukasz Krakowiak --- examples/ip_pipeline/cli.c | 71 ++++++++++++++++++------------------- examples/ip_pipeline/tmgr.c | 25 +++++++------ examples/ip_pipeline/tmgr.h | 7 ++-- 3 files changed, 51 insertions(+), 52 deletions(-) diff --git a/examples/ip_pipeline/cli.c b/examples/ip_pipeline/cli.c index 02dc11495..c72030682 100644 --- a/examples/ip_pipeline/cli.c +++ b/examples/ip_pipeline/cli.c @@ -393,7 +393,12 @@ static const char cmd_tmgr_subport_profile_help[] = " " " " " \n" -" \n"; +" \n" +" pps \n" +" qsize " +" " +" " +" "; static void cmd_tmgr_subport_profile(char **tokens, @@ -404,7 +409,7 @@ cmd_tmgr_subport_profile(char **tokens, struct rte_sched_subport_params p; int status, i; - if (n_tokens != 19) { + if (n_tokens != 35) { snprintf(out, out_size, MSG_ARG_MISMATCH, tokens[0]); return; } @@ -430,6 +435,27 @@ cmd_tmgr_subport_profile(char **tokens, return; } + if (strcmp(tokens[19], "pps") != 0) { + snprintf(out, out_size, MSG_ARG_NOT_FOUND, "pps"); + return; + } + + if (parser_read_uint32(&p.n_pipes_per_subport_enabled, tokens[20]) != 0) { + snprintf(out, out_size, MSG_ARG_INVALID, "n_pipes_per_subport"); + return; + } + + if (strcmp(tokens[21], "qsize") != 0) { + snprintf(out, out_size, MSG_ARG_NOT_FOUND, "qsize"); + return; + } + + for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) + if (parser_read_uint16(&p.qsize[i], tokens[22 + i]) != 0) { + snprintf(out, out_size, MSG_ARG_INVALID, "qsize"); + return; + } + status = tmgr_subport_profile_add(&p); if (status != 0) { snprintf(out, out_size, MSG_CMD_FAIL, tokens[0]); @@ -504,11 +530,6 @@ static const char cmd_tmgr_help[] = "tmgr \n" " rate \n" " spp \n" -" pps \n" -" qsize " -" " -" " -" \n" " fo \n" " mtu \n" " cpu \n"; @@ -522,9 +543,8 @@ cmd_tmgr(char **tokens, struct tmgr_port_params p; char *name; struct tmgr_port *tmgr_port; - int i; - if (n_tokens != 28) { + if (n_tokens != 12) { snprintf(out, out_size, MSG_ARG_MISMATCH, tokens[0]); return; } @@ -551,53 +571,32 @@ cmd_tmgr(char **tokens, return; } - if (strcmp(tokens[6], "pps") != 0) { - snprintf(out, out_size, MSG_ARG_NOT_FOUND, "pps"); - return; - } - - if (parser_read_uint32(&p.n_pipes_per_subport, tokens[7]) != 0) { - snprintf(out, out_size, MSG_ARG_INVALID, "n_pipes_per_subport"); - return; - } - - if (strcmp(tokens[8], "qsize") != 0) { - snprintf(out, out_size, MSG_ARG_NOT_FOUND, "qsize"); - return; - } - - for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) - if (parser_read_uint16(&p.qsize[i], tokens[9 + i]) != 0) { - snprintf(out, out_size, MSG_ARG_INVALID, "qsize"); - return; - } - - if (strcmp(tokens[22], "fo") != 0) { + if (strcmp(tokens[6], "fo") != 0) { snprintf(out, out_size, MSG_ARG_NOT_FOUND, "fo"); return; } - if (parser_read_uint32(&p.frame_overhead, tokens[23]) != 0) { + if (parser_read_uint32(&p.frame_overhead, tokens[7]) != 0) { snprintf(out, out_size, MSG_ARG_INVALID, "frame_overhead"); return; } - if (strcmp(tokens[24], "mtu") != 0) { + if (strcmp(tokens[8], "mtu") != 0) { snprintf(out, out_size, MSG_ARG_NOT_FOUND, "mtu"); return; } - if (parser_read_uint32(&p.mtu, tokens[25]) != 0) { + if (parser_read_uint32(&p.mtu, tokens[9]) != 0) { snprintf(out, out_size, MSG_ARG_INVALID, "mtu"); return; } - if (strcmp(tokens[26], "cpu") != 0) { + if (strcmp(tokens[10], "cpu") != 0) { snprintf(out, out_size, MSG_ARG_NOT_FOUND, "cpu"); return; } - if (parser_read_uint32(&p.cpu_id, tokens[27]) != 0) { + if (parser_read_uint32(&p.cpu_id, tokens[11]) != 0) { snprintf(out, out_size, MSG_ARG_INVALID, "cpu_id"); return; } diff --git a/examples/ip_pipeline/tmgr.c b/examples/ip_pipeline/tmgr.c index 40cbf1d0a..91ccbf60f 100644 --- a/examples/ip_pipeline/tmgr.c +++ b/examples/ip_pipeline/tmgr.c @@ -47,7 +47,8 @@ int tmgr_subport_profile_add(struct rte_sched_subport_params *p) { /* Check input params */ - if (p == NULL) + if (p == NULL || + p->n_pipes_per_subport_enabled == 0) return -1; /* Save profile */ @@ -90,7 +91,6 @@ tmgr_port_create(const char *name, struct tmgr_port_params *params) tmgr_port_find(name) || (params == NULL) || (params->n_subports_per_port == 0) || - (params->n_pipes_per_subport == 0) || (params->cpu_id >= RTE_MAX_NUMA_NODES) || (n_subport_profiles == 0) || (n_pipe_profiles == 0)) @@ -103,18 +103,16 @@ tmgr_port_create(const char *name, struct tmgr_port_params *params) p.mtu = params->mtu; p.frame_overhead = params->frame_overhead; p.n_subports_per_port = params->n_subports_per_port; - p.n_pipes_per_subport = params->n_pipes_per_subport; - - for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) - p.qsize[i] = params->qsize[i]; - - p.pipe_profiles = pipe_profile; - p.n_pipe_profiles = n_pipe_profiles; + p.n_pipes_per_subport = TMGR_PIPE_SUBPORT_MAX; s = rte_sched_port_config(&p); if (s == NULL) return NULL; + subport_profile[0].pipe_profiles = pipe_profile; + subport_profile[0].n_pipe_profiles = n_pipe_profiles; + subport_profile[0].n_max_pipe_profiles = TMGR_PIPE_PROFILE_MAX; + for (i = 0; i < params->n_subports_per_port; i++) { int status; @@ -128,7 +126,7 @@ tmgr_port_create(const char *name, struct tmgr_port_params *params) return NULL; } - for (j = 0; j < params->n_pipes_per_subport; j++) { + for (j = 0; j < subport_profile[0].n_pipes_per_subport_enabled; j++) { status = rte_sched_pipe_config( s, i, @@ -153,7 +151,6 @@ tmgr_port_create(const char *name, struct tmgr_port_params *params) strlcpy(tmgr_port->name, name, sizeof(tmgr_port->name)); tmgr_port->s = s; tmgr_port->n_subports_per_port = params->n_subports_per_port; - tmgr_port->n_pipes_per_subport = params->n_pipes_per_subport; /* Node add to list */ TAILQ_INSERT_TAIL(&tmgr_port_list, tmgr_port, node); @@ -205,8 +202,10 @@ tmgr_pipe_config(const char *port_name, port = tmgr_port_find(port_name); if ((port == NULL) || (subport_id >= port->n_subports_per_port) || - (pipe_id_first >= port->n_pipes_per_subport) || - (pipe_id_last >= port->n_pipes_per_subport) || + (pipe_id_first >= + subport_profile[subport_id].n_pipes_per_subport_enabled) || + (pipe_id_last >= + subport_profile[subport_id].n_pipes_per_subport_enabled) || (pipe_id_first > pipe_id_last) || (pipe_profile_id >= n_pipe_profiles)) return -1; diff --git a/examples/ip_pipeline/tmgr.h b/examples/ip_pipeline/tmgr.h index 8703a2e00..1fcf66ee1 100644 --- a/examples/ip_pipeline/tmgr.h +++ b/examples/ip_pipeline/tmgr.h @@ -12,6 +12,10 @@ #include "common.h" +#ifndef TMGR_PIPE_SUBPORT_MAX +#define TMGR_PIPE_SUBPORT_MAX 4096 +#endif + #ifndef TMGR_SUBPORT_PROFILE_MAX #define TMGR_SUBPORT_PROFILE_MAX 256 #endif @@ -25,7 +29,6 @@ struct tmgr_port { char name[NAME_SIZE]; struct rte_sched_port *s; uint32_t n_subports_per_port; - uint32_t n_pipes_per_subport; }; TAILQ_HEAD(tmgr_port_list, tmgr_port); @@ -42,8 +45,6 @@ struct tmgr_port_params { uint32_t frame_overhead; uint32_t mtu; uint32_t cpu_id; - uint32_t n_pipes_per_subport; - uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; }; int From patchwork Thu Oct 24 18:46:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jasvinder Singh X-Patchwork-Id: 61932 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 0A4C01EC69; Thu, 24 Oct 2019 19:47:28 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id C03F91EBDB for ; Thu, 24 Oct 2019 19:46:50 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Oct 2019 10:46:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,225,1569308400"; d="scan'208";a="228601769" Received: from silpixa00381635.ir.intel.com (HELO silpixa00381635.ger.corp.intel.com) ([10.237.223.229]) by fmsmga002.fm.intel.com with ESMTP; 24 Oct 2019 10:46:48 -0700 From: Jasvinder Singh To: dev@dpdk.org Cc: cristian.dumitrescu@intel.com, Lukasz Krakowiak Date: Thu, 24 Oct 2019 19:46:29 +0100 Message-Id: <20191024184630.66881-15-jasvinder.singh@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191024184630.66881-1-jasvinder.singh@intel.com> References: <20191014172347.139114-1-jasvinder.singh@intel.com> <20191024184630.66881-1-jasvinder.singh@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v6 14/15] examples/qos_sched: add subport configuration flexibility X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Modify qos sample app to allow different subports of the same port to have different configuration in terms of number of pipes, pipe queue sizes, etc. Signed-off-by: Jasvinder Singh Signed-off-by: Lukasz Krakowiak --- examples/qos_sched/app_thread.c | 20 ++- examples/qos_sched/cfg_file.c | 229 ++++++++++++++++-------------- examples/qos_sched/init.c | 54 +++---- examples/qos_sched/main.h | 1 + examples/qos_sched/profile.cfg | 5 +- examples/qos_sched/profile_ov.cfg | 5 +- examples/qos_sched/stats.c | 44 +++--- 7 files changed, 203 insertions(+), 155 deletions(-) diff --git a/examples/qos_sched/app_thread.c b/examples/qos_sched/app_thread.c index 18b734a14..dbc878b55 100644 --- a/examples/qos_sched/app_thread.c +++ b/examples/qos_sched/app_thread.c @@ -35,15 +35,25 @@ get_pkt_sched(struct rte_mbuf *m, uint32_t *subport, uint32_t *pipe, uint16_t *pdata = rte_pktmbuf_mtod(m, uint16_t *); uint16_t pipe_queue; + /* Outer VLAN ID*/ *subport = (rte_be_to_cpu_16(pdata[SUBPORT_OFFSET]) & 0x0FFF) & - (port_params.n_subports_per_port - 1); /* Outer VLAN ID*/ + (port_params.n_subports_per_port - 1); + + /* Inner VLAN ID */ *pipe = (rte_be_to_cpu_16(pdata[PIPE_OFFSET]) & 0x0FFF) & - (port_params.n_pipes_per_subport - 1); /* Inner VLAN ID */ + (subport_params[*subport].n_pipes_per_subport_enabled - 1); + pipe_queue = active_queues[(pdata[QUEUE_OFFSET] >> 8) % n_active_queues]; + + /* Traffic class (Destination IP) */ *traffic_class = pipe_queue > RTE_SCHED_TRAFFIC_CLASS_BE ? - RTE_SCHED_TRAFFIC_CLASS_BE : pipe_queue; /* Destination IP */ - *queue = pipe_queue - *traffic_class; /* Destination IP */ - *color = pdata[COLOR_OFFSET] & 0x03; /* Destination IP */ + RTE_SCHED_TRAFFIC_CLASS_BE : pipe_queue; + + /* Traffic class queue (Destination IP) */ + *queue = pipe_queue - *traffic_class; + + /* Color (Destination IP) */ + *color = pdata[COLOR_OFFSET] & 0x03; return 0; } diff --git a/examples/qos_sched/cfg_file.c b/examples/qos_sched/cfg_file.c index 45bf599e4..c6d3f5ab6 100644 --- a/examples/qos_sched/cfg_file.c +++ b/examples/qos_sched/cfg_file.c @@ -24,14 +24,10 @@ int cfg_load_port(struct rte_cfgfile *cfg, struct rte_sched_port_params *port_params) { const char *entry; - int j; if (!cfg || !port_params) return -1; - memset(active_queues, 0, sizeof(active_queues)); - n_active_queues = 0; - entry = rte_cfgfile_get_entry(cfg, "port", "frame overhead"); if (entry) port_params->frame_overhead = (uint32_t)atoi(entry); @@ -40,106 +36,6 @@ cfg_load_port(struct rte_cfgfile *cfg, struct rte_sched_port_params *port_params if (entry) port_params->n_subports_per_port = (uint32_t)atoi(entry); - entry = rte_cfgfile_get_entry(cfg, "port", "number of pipes per subport"); - if (entry) - port_params->n_pipes_per_subport = (uint32_t)atoi(entry); - - entry = rte_cfgfile_get_entry(cfg, "port", "queue sizes"); - if (entry) { - char *next; - - for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) { - port_params->qsize[j] = (uint16_t)strtol(entry, &next, 10); - if (next == NULL) - break; - entry = next; - } - - for (j = 0; j < RTE_SCHED_TRAFFIC_CLASS_BE; j++) - if (port_params->qsize[j]) { - active_queues[n_active_queues] = j; - n_active_queues++; - } - - if (port_params->qsize[RTE_SCHED_TRAFFIC_CLASS_BE]) - for (j = 0; j < RTE_SCHED_BE_QUEUES_PER_PIPE; j++) { - active_queues[n_active_queues] = - RTE_SCHED_TRAFFIC_CLASS_BE + j; - n_active_queues++; - } - } - -#ifdef RTE_SCHED_RED - for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) { - char str[32]; - - /* Parse WRED min thresholds */ - snprintf(str, sizeof(str), "tc %d wred min", j); - entry = rte_cfgfile_get_entry(cfg, "red", str); - if (entry) { - char *next; - int k; - /* for each packet colour (green, yellow, red) */ - for (k = 0; k < RTE_COLORS; k++) { - port_params->red_params[j][k].min_th - = (uint16_t)strtol(entry, &next, 10); - if (next == NULL) - break; - entry = next; - } - } - - /* Parse WRED max thresholds */ - snprintf(str, sizeof(str), "tc %d wred max", j); - entry = rte_cfgfile_get_entry(cfg, "red", str); - if (entry) { - char *next; - int k; - /* for each packet colour (green, yellow, red) */ - for (k = 0; k < RTE_COLORS; k++) { - port_params->red_params[j][k].max_th - = (uint16_t)strtol(entry, &next, 10); - if (next == NULL) - break; - entry = next; - } - } - - /* Parse WRED inverse mark probabilities */ - snprintf(str, sizeof(str), "tc %d wred inv prob", j); - entry = rte_cfgfile_get_entry(cfg, "red", str); - if (entry) { - char *next; - int k; - /* for each packet colour (green, yellow, red) */ - for (k = 0; k < RTE_COLORS; k++) { - port_params->red_params[j][k].maxp_inv - = (uint8_t)strtol(entry, &next, 10); - - if (next == NULL) - break; - entry = next; - } - } - - /* Parse WRED EWMA filter weights */ - snprintf(str, sizeof(str), "tc %d wred weight", j); - entry = rte_cfgfile_get_entry(cfg, "red", str); - if (entry) { - char *next; - int k; - /* for each packet colour (green, yellow, red) */ - for (k = 0; k < RTE_COLORS; k++) { - port_params->red_params[j][k].wq_log2 - = (uint8_t)strtol(entry, &next, 10); - if (next == NULL) - break; - entry = next; - } - } - } -#endif /* RTE_SCHED_RED */ - return 0; } @@ -155,7 +51,7 @@ cfg_load_pipe(struct rte_cfgfile *cfg, struct rte_sched_pipe_params *pipe_params return -1; profiles = rte_cfgfile_num_sections(cfg, "pipe profile", sizeof("pipe profile") - 1); - port_params.n_pipe_profiles = profiles; + subport_params[0].n_pipe_profiles = profiles; for (j = 0; j < profiles; j++) { char pipe_name[32]; @@ -253,12 +149,121 @@ cfg_load_subport(struct rte_cfgfile *cfg, struct rte_sched_subport_params *subpo return -1; memset(app_pipe_to_profile, -1, sizeof(app_pipe_to_profile)); + memset(active_queues, 0, sizeof(active_queues)); + n_active_queues = 0; + +#ifdef RTE_SCHED_RED + char sec_name[CFG_NAME_LEN]; + struct rte_red_params red_params[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][RTE_COLORS]; + + snprintf(sec_name, sizeof(sec_name), "red"); + + if (rte_cfgfile_has_section(cfg, sec_name)) { + + for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) { + char str[32]; + + /* Parse WRED min thresholds */ + snprintf(str, sizeof(str), "tc %d wred min", i); + entry = rte_cfgfile_get_entry(cfg, sec_name, str); + if (entry) { + char *next; + /* for each packet colour (green, yellow, red) */ + for (j = 0; j < RTE_COLORS; j++) { + red_params[i][j].min_th + = (uint16_t)strtol(entry, &next, 10); + if (next == NULL) + break; + entry = next; + } + } + + /* Parse WRED max thresholds */ + snprintf(str, sizeof(str), "tc %d wred max", i); + entry = rte_cfgfile_get_entry(cfg, "red", str); + if (entry) { + char *next; + /* for each packet colour (green, yellow, red) */ + for (j = 0; j < RTE_COLORS; j++) { + red_params[i][j].max_th + = (uint16_t)strtol(entry, &next, 10); + if (next == NULL) + break; + entry = next; + } + } + + /* Parse WRED inverse mark probabilities */ + snprintf(str, sizeof(str), "tc %d wred inv prob", i); + entry = rte_cfgfile_get_entry(cfg, "red", str); + if (entry) { + char *next; + /* for each packet colour (green, yellow, red) */ + for (j = 0; j < RTE_COLORS; j++) { + red_params[i][j].maxp_inv + = (uint8_t)strtol(entry, &next, 10); + + if (next == NULL) + break; + entry = next; + } + } + + /* Parse WRED EWMA filter weights */ + snprintf(str, sizeof(str), "tc %d wred weight", i); + entry = rte_cfgfile_get_entry(cfg, "red", str); + if (entry) { + char *next; + /* for each packet colour (green, yellow, red) */ + for (j = 0; j < RTE_COLORS; j++) { + red_params[i][j].wq_log2 + = (uint8_t)strtol(entry, &next, 10); + if (next == NULL) + break; + entry = next; + } + } + } + } +#endif /* RTE_SCHED_RED */ for (i = 0; i < MAX_SCHED_SUBPORTS; i++) { char sec_name[CFG_NAME_LEN]; snprintf(sec_name, sizeof(sec_name), "subport %d", i); if (rte_cfgfile_has_section(cfg, sec_name)) { + entry = rte_cfgfile_get_entry(cfg, sec_name, + "number of pipes per subport"); + if (entry) + subport_params[i].n_pipes_per_subport_enabled = + (uint32_t)atoi(entry); + + entry = rte_cfgfile_get_entry(cfg, sec_name, "queue sizes"); + if (entry) { + char *next; + + for (j = 0; j < RTE_SCHED_TRAFFIC_CLASS_BE; j++) { + subport_params[i].qsize[j] = + (uint16_t)strtol(entry, &next, 10); + if (subport_params[i].qsize[j] != 0) { + active_queues[n_active_queues] = j; + n_active_queues++; + } + if (next == NULL) + break; + entry = next; + } + + subport_params[i].qsize[RTE_SCHED_TRAFFIC_CLASS_BE] = + (uint16_t)strtol(entry, &next, 10); + + for (j = 0; j < RTE_SCHED_BE_QUEUES_PER_PIPE; j++) { + active_queues[n_active_queues] = + RTE_SCHED_TRAFFIC_CLASS_BE + j; + n_active_queues++; + } + } + entry = rte_cfgfile_get_entry(cfg, sec_name, "tb rate"); if (entry) subport_params[i].tb_rate = (uint32_t)atoi(entry); @@ -362,6 +367,20 @@ cfg_load_subport(struct rte_cfgfile *cfg, struct rte_sched_subport_params *subpo } } } +#ifdef RTE_SCHED_RED + for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) { + for (k = 0; k < RTE_COLORS; k++) { + subport_params[i].red_params[j][k].min_th = + red_params[j][k].min_th; + subport_params[i].red_params[j][k].max_th = + red_params[j][k].max_th; + subport_params[i].red_params[j][k].maxp_inv = + red_params[j][k].maxp_inv; + subport_params[i].red_params[j][k].wq_log2 = + red_params[j][k].wq_log2; + } + } +#endif } } diff --git a/examples/qos_sched/init.c b/examples/qos_sched/init.c index 32e6e1ba2..0a17e0d4d 100644 --- a/examples/qos_sched/init.c +++ b/examples/qos_sched/init.c @@ -180,18 +180,6 @@ app_init_port(uint16_t portid, struct rte_mempool *mp) return 0; } -static struct rte_sched_subport_params subport_params[MAX_SCHED_SUBPORTS] = { - { - .tb_rate = 1250000000, - .tb_size = 1000000, - - .tc_rate = {1250000000, 1250000000, 1250000000, 1250000000, - 1250000000, 1250000000, 1250000000, 1250000000, 1250000000, - 1250000000, 1250000000, 1250000000, 1250000000}, - .tc_period = 10, - }, -}; - static struct rte_sched_pipe_params pipe_profiles[MAX_SCHED_PIPE_PROFILES] = { { /* Profile #0 */ .tb_rate = 305175, @@ -208,19 +196,21 @@ static struct rte_sched_pipe_params pipe_profiles[MAX_SCHED_PIPE_PROFILES] = { }, }; -struct rte_sched_port_params port_params = { - .name = "port_scheduler_0", - .socket = 0, /* computed */ - .rate = 0, /* computed */ - .mtu = 6 + 6 + 4 + 4 + 2 + 1500, - .frame_overhead = RTE_SCHED_FRAME_OVERHEAD_DEFAULT, - .n_subports_per_port = 1, - .n_pipes_per_subport = 4096, - .qsize = {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, - .pipe_profiles = pipe_profiles, - .n_pipe_profiles = sizeof(pipe_profiles) / sizeof(struct rte_sched_pipe_params), - .n_max_pipe_profiles = MAX_SCHED_PIPE_PROFILES, +struct rte_sched_subport_params subport_params[MAX_SCHED_SUBPORTS] = { + { + .tb_rate = 1250000000, + .tb_size = 1000000, + .tc_rate = {1250000000, 1250000000, 1250000000, 1250000000, + 1250000000, 1250000000, 1250000000, 1250000000, 1250000000, + 1250000000, 1250000000, 1250000000, 1250000000}, + .tc_period = 10, + .n_pipes_per_subport_enabled = 4096, + .qsize = {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64}, + .pipe_profiles = pipe_profiles, + .n_pipe_profiles = sizeof(pipe_profiles) / + sizeof(struct rte_sched_pipe_params), + .n_max_pipe_profiles = MAX_SCHED_PIPE_PROFILES, #ifdef RTE_SCHED_RED .red_params = { /* Traffic Class 0 Colors Green / Yellow / Red */ @@ -289,6 +279,17 @@ struct rte_sched_port_params port_params = { [12][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9}, }, #endif /* RTE_SCHED_RED */ + }, +}; + +struct rte_sched_port_params port_params = { + .name = "port_scheduler_0", + .socket = 0, /* computed */ + .rate = 0, /* computed */ + .mtu = 6 + 6 + 4 + 4 + 2 + 1500, + .frame_overhead = RTE_SCHED_FRAME_OVERHEAD_DEFAULT, + .n_subports_per_port = 1, + .n_pipes_per_subport = MAX_SCHED_PIPES, }; static struct rte_sched_port * @@ -323,7 +324,10 @@ app_init_sched_port(uint32_t portid, uint32_t socketid) subport, err); } - for (pipe = 0; pipe < port_params.n_pipes_per_subport; pipe++) { + uint32_t n_pipes_per_subport = + subport_params[subport].n_pipes_per_subport_enabled; + + for (pipe = 0; pipe < n_pipes_per_subport; pipe++) { if (app_pipe_to_profile[subport][pipe] != -1) { err = rte_sched_pipe_config(port, subport, pipe, app_pipe_to_profile[subport][pipe]); diff --git a/examples/qos_sched/main.h b/examples/qos_sched/main.h index d8f890b64..baa2b3ead 100644 --- a/examples/qos_sched/main.h +++ b/examples/qos_sched/main.h @@ -152,6 +152,7 @@ uint32_t active_queues[RTE_SCHED_QUEUES_PER_PIPE]; uint32_t n_active_queues; extern struct rte_sched_port_params port_params; +extern struct rte_sched_subport_params subport_params[MAX_SCHED_SUBPORTS]; int app_parse_args(int argc, char **argv); int app_init(void); diff --git a/examples/qos_sched/profile.cfg b/examples/qos_sched/profile.cfg index 335561370..61b8b7071 100644 --- a/examples/qos_sched/profile.cfg +++ b/examples/qos_sched/profile.cfg @@ -20,11 +20,12 @@ [port] frame overhead = 24 number of subports per port = 1 -number of pipes per subport = 4096 -queue sizes = 64 64 64 64 64 64 64 64 64 64 64 64 64 ; Subport configuration [subport 0] +number of pipes per subport = 4096 +queue sizes = 64 64 64 64 64 64 64 64 64 64 64 64 64 + tb rate = 1250000000 ; Bytes per second tb size = 1000000 ; Bytes diff --git a/examples/qos_sched/profile_ov.cfg b/examples/qos_sched/profile_ov.cfg index 394987399..ab509d28d 100644 --- a/examples/qos_sched/profile_ov.cfg +++ b/examples/qos_sched/profile_ov.cfg @@ -5,11 +5,12 @@ [port] frame overhead = 24 number of subports per port = 1 -number of pipes per subport = 32 -queue sizes = 64 64 64 64 64 64 64 64 64 64 64 64 64 ; Subport configuration [subport 0] +number of pipes per subport = 32 +queue sizes = 64 64 64 64 64 64 64 64 64 64 64 64 64 + tb rate = 8400000 ; Bytes per second tb size = 100000 ; Bytes diff --git a/examples/qos_sched/stats.c b/examples/qos_sched/stats.c index e62e4a2f6..ce34b6c7c 100644 --- a/examples/qos_sched/stats.c +++ b/examples/qos_sched/stats.c @@ -24,7 +24,7 @@ qavg_q(uint16_t port_id, uint32_t subport_id, uint32_t pipe_id, uint8_t tc, if (i == nb_pfc || subport_id >= port_params.n_subports_per_port || - pipe_id >= port_params.n_pipes_per_subport || + pipe_id >= subport_params[subport_id].n_pipes_per_subport_enabled || tc >= RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE || q >= RTE_SCHED_BE_QUEUES_PER_PIPE || (tc < RTE_SCHED_TRAFFIC_CLASS_BE && q > 0)) @@ -32,7 +32,7 @@ qavg_q(uint16_t port_id, uint32_t subport_id, uint32_t pipe_id, uint8_t tc, port = qos_conf[i].sched_port; for (i = 0; i < subport_id; i++) - queue_id += port_params.n_pipes_per_subport * + queue_id += subport_params[i].n_pipes_per_subport_enabled * RTE_SCHED_QUEUES_PER_PIPE; if (tc < RTE_SCHED_TRAFFIC_CLASS_BE) queue_id += pipe_id * RTE_SCHED_QUEUES_PER_PIPE + tc; @@ -69,14 +69,16 @@ qavg_tcpipe(uint16_t port_id, uint32_t subport_id, uint32_t pipe_id, } if (i == nb_pfc || subport_id >= port_params.n_subports_per_port || - pipe_id >= port_params.n_pipes_per_subport || + pipe_id >= subport_params[subport_id].n_pipes_per_subport_enabled || tc >= RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE) return -1; port = qos_conf[i].sched_port; for (i = 0; i < subport_id; i++) - queue_id += port_params.n_pipes_per_subport * RTE_SCHED_QUEUES_PER_PIPE; + queue_id += + subport_params[i].n_pipes_per_subport_enabled * + RTE_SCHED_QUEUES_PER_PIPE; queue_id += pipe_id * RTE_SCHED_QUEUES_PER_PIPE + tc; @@ -123,13 +125,13 @@ qavg_pipe(uint16_t port_id, uint32_t subport_id, uint32_t pipe_id) if (i == nb_pfc || subport_id >= port_params.n_subports_per_port || - pipe_id >= port_params.n_pipes_per_subport) + pipe_id >= subport_params[subport_id].n_pipes_per_subport_enabled) return -1; port = qos_conf[i].sched_port; for (i = 0; i < subport_id; i++) - queue_id += port_params.n_pipes_per_subport * + queue_id += subport_params[i].n_pipes_per_subport_enabled * RTE_SCHED_QUEUES_PER_PIPE; queue_id += pipe_id * RTE_SCHED_QUEUES_PER_PIPE; @@ -177,13 +179,17 @@ qavg_tcsubport(uint16_t port_id, uint32_t subport_id, uint8_t tc) for (i = 0; i < subport_id; i++) subport_queue_id += - port_params.n_pipes_per_subport * RTE_SCHED_QUEUES_PER_PIPE; + subport_params[i].n_pipes_per_subport_enabled * + RTE_SCHED_QUEUES_PER_PIPE; average = 0; for (count = 0; count < qavg_ntimes; count++) { + uint32_t n_pipes_per_subport = + subport_params[subport_id].n_pipes_per_subport_enabled; + part_average = 0; - for (i = 0; i < port_params.n_pipes_per_subport; i++) { + for (i = 0; i < n_pipes_per_subport; i++) { if (tc < RTE_SCHED_TRAFFIC_CLASS_BE) { queue_id = subport_queue_id + i * RTE_SCHED_QUEUES_PER_PIPE + tc; @@ -203,10 +209,11 @@ qavg_tcsubport(uint16_t port_id, uint32_t subport_id, uint8_t tc) } if (tc < RTE_SCHED_TRAFFIC_CLASS_BE) - average += part_average / (port_params.n_pipes_per_subport); + average += part_average / + (subport_params[subport_id].n_pipes_per_subport_enabled); else - average += - part_average / (port_params.n_pipes_per_subport) * + average += part_average / + (subport_params[subport_id].n_pipes_per_subport_enabled) * RTE_SCHED_BE_QUEUES_PER_PIPE; usleep(qavg_period); @@ -240,14 +247,17 @@ qavg_subport(uint16_t port_id, uint32_t subport_id) port = qos_conf[i].sched_port; for (i = 0; i < subport_id; i++) - subport_queue_id += port_params.n_pipes_per_subport * + subport_queue_id += subport_params[i].n_pipes_per_subport_enabled * RTE_SCHED_QUEUES_PER_PIPE; average = 0; for (count = 0; count < qavg_ntimes; count++) { + uint32_t n_pipes_per_subport = + subport_params[subport_id].n_pipes_per_subport_enabled; + part_average = 0; - for (i = 0; i < port_params.n_pipes_per_subport; i++) { + for (i = 0; i < n_pipes_per_subport; i++) { queue_id = subport_queue_id + i * RTE_SCHED_QUEUES_PER_PIPE; for (j = 0; j < RTE_SCHED_QUEUES_PER_PIPE; j++) { @@ -258,7 +268,8 @@ qavg_subport(uint16_t port_id, uint32_t subport_id) } average += part_average / - (port_params.n_pipes_per_subport * RTE_SCHED_QUEUES_PER_PIPE); + (subport_params[subport_id].n_pipes_per_subport_enabled * + RTE_SCHED_QUEUES_PER_PIPE); usleep(qavg_period); } @@ -322,12 +333,13 @@ pipe_stat(uint16_t port_id, uint32_t subport_id, uint32_t pipe_id) if (i == nb_pfc || subport_id >= port_params.n_subports_per_port || - pipe_id >= port_params.n_pipes_per_subport) + pipe_id >= subport_params[subport_id].n_pipes_per_subport_enabled) return -1; port = qos_conf[i].sched_port; for (i = 0; i < subport_id; i++) - queue_id += port_params.n_pipes_per_subport * RTE_SCHED_QUEUES_PER_PIPE; + queue_id += subport_params[i].n_pipes_per_subport_enabled * + RTE_SCHED_QUEUES_PER_PIPE; queue_id += pipe_id * RTE_SCHED_QUEUES_PER_PIPE; From patchwork Thu Oct 24 18:46:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jasvinder Singh X-Patchwork-Id: 61933 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id AB3351EC7D; Thu, 24 Oct 2019 19:47:30 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 6CA061EA5A for ; Thu, 24 Oct 2019 19:46:52 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Oct 2019 10:46:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,225,1569308400"; d="scan'208";a="228601781" Received: from silpixa00381635.ir.intel.com (HELO silpixa00381635.ger.corp.intel.com) ([10.237.223.229]) by fmsmga002.fm.intel.com with ESMTP; 24 Oct 2019 10:46:50 -0700 From: Jasvinder Singh To: dev@dpdk.org Cc: cristian.dumitrescu@intel.com, Lukasz Krakowiak Date: Thu, 24 Oct 2019 19:46:30 +0100 Message-Id: <20191024184630.66881-16-jasvinder.singh@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191024184630.66881-1-jasvinder.singh@intel.com> References: <20191014172347.139114-1-jasvinder.singh@intel.com> <20191024184630.66881-1-jasvinder.singh@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v6 15/15] sched: remove redundant code X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Remove redundant data structure fields from port level data structures and update the release notes. Signed-off-by: Jasvinder Singh Signed-off-by: Lukasz Krakowiak --- doc/guides/rel_notes/release_19_11.rst | 7 ++++- lib/librte_sched/rte_sched.c | 42 +------------------------- lib/librte_sched/rte_sched.h | 22 -------------- 3 files changed, 7 insertions(+), 64 deletions(-) diff --git a/doc/guides/rel_notes/release_19_11.rst b/doc/guides/rel_notes/release_19_11.rst index f59a28307..524fb338b 100644 --- a/doc/guides/rel_notes/release_19_11.rst +++ b/doc/guides/rel_notes/release_19_11.rst @@ -228,6 +228,11 @@ API Changes has been introduced in this release is used when used when all the packets enqueued in the tx adapter are destined for the same Ethernet port & Tx queue. +* sched: The pipe nodes configuration parameters such as number of pipes, + pipe queue sizes, pipe profiles, etc., are moved from port level structure + to subport level. This allows different subports of the same port to + have different configuration for the pipe nodes. + ABI Changes ----------- @@ -315,7 +320,7 @@ The libraries prepended with a plus sign were incremented in this version. librte_rcu.so.1 librte_reorder.so.1 librte_ring.so.2 - librte_sched.so.3 + + librte_sched.so.4 librte_security.so.2 librte_stack.so.1 librte_table.so.3 diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c index 1faa580d0..710ecf65a 100644 --- a/lib/librte_sched/rte_sched.c +++ b/lib/librte_sched/rte_sched.c @@ -216,13 +216,6 @@ struct rte_sched_port { uint32_t mtu; uint32_t frame_overhead; int socket; - uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; - uint32_t n_pipe_profiles; - uint32_t n_max_pipe_profiles; - uint32_t pipe_tc_be_rate_max; -#ifdef RTE_SCHED_RED - struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][RTE_COLORS]; -#endif /* Timing */ uint64_t time_cpu_cycles; /* Current CPU time measured in CPU cyles */ @@ -230,48 +223,15 @@ struct rte_sched_port { uint64_t time; /* Current NIC TX time measured in bytes */ struct rte_reciprocal inv_cycles_per_byte; /* CPU cycles per byte */ - /* Scheduling loop detection */ - uint32_t pipe_loop; - uint32_t pipe_exhaustion; - - /* Bitmap */ - struct rte_bitmap *bmp; - uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16; - /* Grinders */ - struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS]; - uint32_t busy_grinders; struct rte_mbuf **pkts_out; uint32_t n_pkts_out; uint32_t subport_id; - /* Queue base calculation */ - uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE]; - uint32_t qsize_sum; - /* Large data structures */ - struct rte_sched_subport *subports[0]; - struct rte_sched_subport *subport; - struct rte_sched_pipe *pipe; - struct rte_sched_queue *queue; - struct rte_sched_queue_extra *queue_extra; - struct rte_sched_pipe_profile *pipe_profiles; - uint8_t *bmp_array; - struct rte_mbuf **queue_array; - uint8_t memory[0] __rte_cache_aligned; + struct rte_sched_subport *subports[0] __rte_cache_aligned; } __rte_cache_aligned; -enum rte_sched_port_array { - e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0, - e_RTE_SCHED_PORT_ARRAY_PIPE, - e_RTE_SCHED_PORT_ARRAY_QUEUE, - e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA, - e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES, - e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY, - e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY, - e_RTE_SCHED_PORT_ARRAY_TOTAL, -}; - enum rte_sched_subport_array { e_RTE_SCHED_SUBPORT_ARRAY_PIPE = 0, e_RTE_SCHED_SUBPORT_ARRAY_QUEUE, diff --git a/lib/librte_sched/rte_sched.h b/lib/librte_sched/rte_sched.h index 40f02f124..c82c23c14 100644 --- a/lib/librte_sched/rte_sched.h +++ b/lib/librte_sched/rte_sched.h @@ -260,28 +260,6 @@ struct rte_sched_port_params { * the subports of the same port. */ uint32_t n_pipes_per_subport; - - /** Packet queue size for each traffic class. - * All the pipes within the same subport share the similar - * configuration for the queues. - */ - uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE]; - - /** Pipe profile table. - * Every pipe is configured using one of the profiles from this table. - */ - struct rte_sched_pipe_params *pipe_profiles; - - /** Profiles in the pipe profile table */ - uint32_t n_pipe_profiles; - - /** Max profiles allowed in the pipe profile table */ - uint32_t n_max_pipe_profiles; - -#ifdef RTE_SCHED_RED - /** RED parameters */ - struct rte_red_params red_params[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][RTE_COLORS]; -#endif }; /*