From patchwork Tue Jun 18 07:11:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141232 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0C77C45489; Tue, 18 Jun 2024 09:12:28 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2051940E12; Tue, 18 Jun 2024 09:12:28 +0200 (CEST) Received: from smtpbgbr1.qq.com (smtpbgbr1.qq.com [54.207.19.206]) by mails.dpdk.org (Postfix) with ESMTP id 27C4840DD6; Tue, 18 Jun 2024 09:12:03 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694719tzsoa2y X-QQ-Originating-IP: nOtVHhQPe9Hkw0XJy/UauUidIgO5/rL8hIY2Q+GafbE= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:11:58 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 10674138909745781408 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 01/19] net/txgbe: fix to parse tunnel packets Date: Tue, 18 Jun 2024 15:11:32 +0800 Message-Id: <20240618071150.21564-2-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The outer-ipv6 tunnel packet was parsed to the wrong packet type, remove the default RTE_PTYPE_L2_ETHER and RTE_PTYPE_L3_IPV4 flags for tunnel packets. And correct the calculation of tunnel length for GRE and GENEVE packets. Fixes: ca46fcd753b1 ("net/txgbe: support Tx with hardware offload") Fixes: e5ece1f467aa ("net/txgbe: fix VXLAN-GPE packet checksum") Fixes: 0e32d6edd479 ("net/txgbe: fix packet type to parse from offload flags") Fixes: 5bbaf75ed6df ("net/txgbe: fix GRE tunnel packet checksum") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/txgbe_rxtx.c | 69 ++++++++++++++++++---------------- 1 file changed, 37 insertions(+), 32 deletions(-) diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c index 4b78e68a40..7731ad8491 100644 --- a/drivers/net/txgbe/txgbe_rxtx.c +++ b/drivers/net/txgbe/txgbe_rxtx.c @@ -586,26 +586,17 @@ tx_desc_ol_flags_to_ptype(uint64_t oflags) switch (oflags & RTE_MBUF_F_TX_TUNNEL_MASK) { case RTE_MBUF_F_TX_TUNNEL_VXLAN: case RTE_MBUF_F_TX_TUNNEL_VXLAN_GPE: - ptype |= RTE_PTYPE_L2_ETHER | - RTE_PTYPE_L3_IPV4 | - RTE_PTYPE_TUNNEL_GRENAT; + ptype |= RTE_PTYPE_TUNNEL_GRENAT; break; case RTE_MBUF_F_TX_TUNNEL_GRE: - ptype |= RTE_PTYPE_L2_ETHER | - RTE_PTYPE_L3_IPV4 | - RTE_PTYPE_TUNNEL_GRE; + ptype |= RTE_PTYPE_TUNNEL_GRE; break; case RTE_MBUF_F_TX_TUNNEL_GENEVE: - ptype |= RTE_PTYPE_L2_ETHER | - RTE_PTYPE_L3_IPV4 | - RTE_PTYPE_TUNNEL_GENEVE; - ptype |= RTE_PTYPE_INNER_L2_ETHER; + ptype |= RTE_PTYPE_TUNNEL_GENEVE; break; case RTE_MBUF_F_TX_TUNNEL_IPIP: case RTE_MBUF_F_TX_TUNNEL_IP: - ptype |= RTE_PTYPE_L2_ETHER | - RTE_PTYPE_L3_IPV4 | - RTE_PTYPE_TUNNEL_IP; + ptype |= RTE_PTYPE_TUNNEL_IP; break; } @@ -689,11 +680,20 @@ txgbe_xmit_cleanup(struct txgbe_tx_queue *txq) return 0; } +#define GRE_CHECKSUM_PRESENT 0x8000 +#define GRE_KEY_PRESENT 0x2000 +#define GRE_SEQUENCE_PRESENT 0x1000 +#define GRE_EXT_LEN 4 +#define GRE_SUPPORTED_FIELDS (GRE_CHECKSUM_PRESENT | GRE_KEY_PRESENT |\ + GRE_SEQUENCE_PRESENT) + static inline uint8_t txgbe_get_tun_len(struct rte_mbuf *mbuf) { struct txgbe_genevehdr genevehdr; const struct txgbe_genevehdr *gh; + const struct txgbe_grehdr *grh; + struct txgbe_grehdr grehdr; uint8_t tun_len; switch (mbuf->ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) { @@ -706,11 +706,16 @@ txgbe_get_tun_len(struct rte_mbuf *mbuf) + sizeof(struct txgbe_vxlanhdr); break; case RTE_MBUF_F_TX_TUNNEL_GRE: - tun_len = sizeof(struct txgbe_nvgrehdr); + tun_len = sizeof(struct txgbe_grehdr); + grh = rte_pktmbuf_read(mbuf, + mbuf->outer_l2_len + mbuf->outer_l3_len, + sizeof(grehdr), &grehdr); + if (grh->flags & rte_cpu_to_be_16(GRE_SUPPORTED_FIELDS)) + tun_len += GRE_EXT_LEN; break; case RTE_MBUF_F_TX_TUNNEL_GENEVE: - gh = rte_pktmbuf_read(mbuf, - mbuf->outer_l2_len + mbuf->outer_l3_len, + gh = rte_pktmbuf_read(mbuf, mbuf->outer_l2_len + + mbuf->outer_l3_len + sizeof(struct txgbe_udphdr), sizeof(genevehdr), &genevehdr); tun_len = sizeof(struct txgbe_udphdr) + sizeof(struct txgbe_genevehdr) @@ -724,27 +729,26 @@ txgbe_get_tun_len(struct rte_mbuf *mbuf) } static inline uint8_t -txgbe_parse_tun_ptid(struct rte_mbuf *tx_pkt) +txgbe_parse_tun_ptid(struct rte_mbuf *tx_pkt, uint8_t tun_len) { - uint64_t l2_vxlan, l2_vxlan_mac, l2_vxlan_mac_vlan; - uint64_t l2_gre, l2_gre_mac, l2_gre_mac_vlan; + uint64_t inner_l2_len; uint8_t ptid = 0; - l2_vxlan = sizeof(struct txgbe_udphdr) + sizeof(struct txgbe_vxlanhdr); - l2_vxlan_mac = l2_vxlan + sizeof(struct rte_ether_hdr); - l2_vxlan_mac_vlan = l2_vxlan_mac + sizeof(struct rte_vlan_hdr); + inner_l2_len = tx_pkt->l2_len - tun_len; - l2_gre = sizeof(struct txgbe_grehdr); - l2_gre_mac = l2_gre + sizeof(struct rte_ether_hdr); - l2_gre_mac_vlan = l2_gre_mac + sizeof(struct rte_vlan_hdr); - - if (tx_pkt->l2_len == l2_vxlan || tx_pkt->l2_len == l2_gre) + switch (inner_l2_len) { + case 0: ptid = TXGBE_PTID_TUN_EIG; - else if (tx_pkt->l2_len == l2_vxlan_mac || tx_pkt->l2_len == l2_gre_mac) + break; + case sizeof(struct rte_ether_hdr): ptid = TXGBE_PTID_TUN_EIGM; - else if (tx_pkt->l2_len == l2_vxlan_mac_vlan || - tx_pkt->l2_len == l2_gre_mac_vlan) + break; + case sizeof(struct rte_ether_hdr) + sizeof(struct rte_vlan_hdr): ptid = TXGBE_PTID_TUN_EIGMV; + break; + default: + ptid = TXGBE_PTID_TUN_EI; + } return ptid; } @@ -811,8 +815,6 @@ txgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, tx_ol_req = ol_flags & TXGBE_TX_OFFLOAD_MASK; if (tx_ol_req) { tx_offload.ptid = tx_desc_ol_flags_to_ptid(tx_ol_req); - if (tx_offload.ptid & TXGBE_PTID_PKT_TUN) - tx_offload.ptid |= txgbe_parse_tun_ptid(tx_pkt); tx_offload.l2_len = tx_pkt->l2_len; tx_offload.l3_len = tx_pkt->l3_len; tx_offload.l4_len = tx_pkt->l4_len; @@ -821,6 +823,9 @@ txgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, tx_offload.outer_l2_len = tx_pkt->outer_l2_len; tx_offload.outer_l3_len = tx_pkt->outer_l3_len; tx_offload.outer_tun_len = txgbe_get_tun_len(tx_pkt); + if (tx_offload.ptid & TXGBE_PTID_PKT_TUN) + tx_offload.ptid |= txgbe_parse_tun_ptid(tx_pkt, + tx_offload.outer_tun_len); #ifdef RTE_LIB_SECURITY if (use_ipsec) { From patchwork Tue Jun 18 07:11:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141234 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BB69345489; Tue, 18 Jun 2024 09:12:47 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9F08640E22; Tue, 18 Jun 2024 09:12:30 +0200 (CEST) Received: from smtpbg151.qq.com (smtpbg151.qq.com [18.169.211.239]) by mails.dpdk.org (Postfix) with ESMTP id CF5FC40DD6; Tue, 18 Jun 2024 09:12:07 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694722tde17h7 X-QQ-Originating-IP: mkrSwiwLounduFCLfjzafATilLyOLyNdBR4I4Fm05HE= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:01 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 6709781638083641308 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 02/19] net/txgbe: fix flow filters in VT mode Date: Tue, 18 Jun 2024 15:11:33 +0800 Message-Id: <20240618071150.21564-3-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org In virtualization mode, target pool should be determined for the filters. For ether type filter, virtualization mode must be enabled to filter broadcast/multicast packets due to hardware limitations. Fixes: f8e2cfc7702b ("net/txgbe: support ethertype filter add and delete") Fixes: 77a72b4d9dc0 ("net/txgbe: support ntuple filter add and delete") Fixes: 983a4ef2265b ("net/txgbe: support syn filter add and delete") Fixes: 08d61139be0a ("net/txgbe: support flow director filter add and delete") Fixes: 9fdfed08a5e3 ("net/txgbe: restore RSS filter") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/txgbe_ethdev.c | 24 +++++++++++++++++++++--- drivers/net/txgbe/txgbe_fdir.c | 3 +++ drivers/net/txgbe/txgbe_rxtx.c | 8 +++++++- 3 files changed, 31 insertions(+), 4 deletions(-) diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index 6d11412616..fa68a5d2ca 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -4011,6 +4011,7 @@ txgbe_syn_filter_set(struct rte_eth_dev *dev, struct txgbe_filter_info *filter_info = TXGBE_DEV_FILTER(dev); uint32_t syn_info; uint32_t synqf; + uint16_t queue; if (filter->queue >= TXGBE_MAX_RX_QUEUE_NUM) return -EINVAL; @@ -4020,7 +4021,11 @@ txgbe_syn_filter_set(struct rte_eth_dev *dev, if (add) { if (syn_info & TXGBE_SYNCLS_ENA) return -EINVAL; - synqf = (uint32_t)TXGBE_SYNCLS_QPID(filter->queue); + if (RTE_ETH_DEV_SRIOV(dev).active) + queue = RTE_ETH_DEV_SRIOV(dev).def_pool_q_idx + filter->queue; + else + queue = filter->queue; + synqf = (uint32_t)TXGBE_SYNCLS_QPID(queue); synqf |= TXGBE_SYNCLS_ENA; if (filter->hig_pri) @@ -4089,7 +4094,10 @@ txgbe_inject_5tuple_filter(struct rte_eth_dev *dev, wr32(hw, TXGBE_5TFPORT(i), sdpqf); wr32(hw, TXGBE_5TFCTL0(i), ftqf); - l34timir |= TXGBE_5TFCTL1_QP(filter->queue); + if (RTE_ETH_DEV_SRIOV(dev).active) + l34timir |= TXGBE_5TFCTL1_QP(RTE_ETH_DEV_SRIOV(dev).def_pool_q_idx + filter->queue); + else + l34timir |= TXGBE_5TFCTL1_QP(filter->queue); wr32(hw, TXGBE_5TFCTL1(i), l34timir); } @@ -4373,7 +4381,17 @@ txgbe_add_del_ethertype_filter(struct rte_eth_dev *dev, if (add) { etqf = TXGBE_ETFLT_ENA; etqf |= TXGBE_ETFLT_ETID(filter->ether_type); - etqs |= TXGBE_ETCLS_QPID(filter->queue); + if (RTE_ETH_DEV_SRIOV(dev).active) { + int pool, queue; + + pool = RTE_ETH_DEV_SRIOV(dev).def_vmdq_idx; + queue = RTE_ETH_DEV_SRIOV(dev).def_pool_q_idx + filter->queue; + etqf |= TXGBE_ETFLT_POOLENA; + etqf |= TXGBE_ETFLT_POOL(pool); + etqs |= TXGBE_ETCLS_QPID(queue); + } else { + etqs |= TXGBE_ETCLS_QPID(filter->queue); + } etqs |= TXGBE_ETCLS_QENA; ethertype_filter.ethertype = filter->ether_type; diff --git a/drivers/net/txgbe/txgbe_fdir.c b/drivers/net/txgbe/txgbe_fdir.c index a198b6781b..f627ab681d 100644 --- a/drivers/net/txgbe/txgbe_fdir.c +++ b/drivers/net/txgbe/txgbe_fdir.c @@ -844,6 +844,9 @@ txgbe_fdir_filter_program(struct rte_eth_dev *dev, return -EINVAL; } + if (RTE_ETH_DEV_SRIOV(dev).active) + queue = RTE_ETH_DEV_SRIOV(dev).def_pool_q_idx + queue; + node = txgbe_fdir_filter_lookup(info, &rule->input); if (node) { if (!update) { diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c index 7731ad8491..35f80d73ac 100644 --- a/drivers/net/txgbe/txgbe_rxtx.c +++ b/drivers/net/txgbe/txgbe_rxtx.c @@ -5160,6 +5160,7 @@ txgbe_config_rss_filter(struct rte_eth_dev *dev, uint32_t reta; uint16_t i; uint16_t j; + uint16_t queue; struct rte_eth_rss_conf rss_conf = { .rss_key = conf->conf.key_len ? (void *)(uintptr_t)conf->conf.key : NULL, @@ -5192,7 +5193,12 @@ txgbe_config_rss_filter(struct rte_eth_dev *dev, for (i = 0, j = 0; i < RTE_ETH_RSS_RETA_SIZE_128; i++, j++) { if (j == conf->conf.queue_num) j = 0; - reta = (reta >> 8) | LS32(conf->conf.queue[j], 24, 0xFF); + if (RTE_ETH_DEV_SRIOV(dev).active) + queue = RTE_ETH_DEV_SRIOV(dev).def_pool_q_idx + + conf->conf.queue[j]; + else + queue = conf->conf.queue[j]; + reta = (reta >> 8) | LS32(queue, 24, 0xFF); if ((i & 3) == 3) wr32at(hw, TXGBE_REG_RSSTBL, i >> 2, reta); } From patchwork Tue Jun 18 07:11:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141233 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1AB1645489; Tue, 18 Jun 2024 09:12:35 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2A9FC40E18; Tue, 18 Jun 2024 09:12:29 +0200 (CEST) Received: from smtpbgeu2.qq.com (smtpbgeu2.qq.com [18.194.254.142]) by mails.dpdk.org (Postfix) with ESMTP id A1FFB40DD6; Tue, 18 Jun 2024 09:12:06 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694724tn13pkk X-QQ-Originating-IP: Sjcr0FFoUBFaCoRxIA+iDG1jkQq4L6mEZ9GRrcPSrBo= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:03 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 239661238938237319 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 03/19] net/txgbe: fix Tx hang on queue disable Date: Tue, 18 Jun 2024 15:11:34 +0800 Message-Id: <20240618071150.21564-4-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The problem of Tx hang also occurs on Wangxun 10Gb NICs, when stop device under heavy traffic. refer to commit ac6c5e9af56a ("net/ngbe: fix Tx hang on queue disable") Disable PCIe bus master to clear BME when stop hardware, and verify there are no pending requests. Move disabling Tx queue after disabling PCIe bus master to ensure that there are no packets left to cause Tx hang. Fixes: b1f596677d8e ("net/txgbe: support device start") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/base/meson.build | 2 +- drivers/net/txgbe/base/txgbe_hw.c | 60 +++++++++++++++++++++++----- drivers/net/txgbe/base/txgbe_hw.h | 1 + drivers/net/txgbe/base/txgbe_osdep.h | 1 + drivers/net/txgbe/base/txgbe_regs.h | 3 ++ drivers/net/txgbe/base/txgbe_type.h | 1 + drivers/net/txgbe/txgbe_ethdev.c | 7 ++++ 7 files changed, 65 insertions(+), 10 deletions(-) diff --git a/drivers/net/txgbe/base/meson.build b/drivers/net/txgbe/base/meson.build index a81d6890fe..4cf90a394a 100644 --- a/drivers/net/txgbe/base/meson.build +++ b/drivers/net/txgbe/base/meson.build @@ -22,6 +22,6 @@ foreach flag: error_cflags endforeach base_lib = static_library('txgbe_base', sources, - dependencies: [static_rte_eal, static_rte_net], + dependencies: [static_rte_eal, static_rte_net, static_rte_bus_pci], c_args: c_args) base_objs = base_lib.extract_all_objects(recursive: true) diff --git a/drivers/net/txgbe/base/txgbe_hw.c b/drivers/net/txgbe/base/txgbe_hw.c index d19fd0065d..7094551fee 100644 --- a/drivers/net/txgbe/base/txgbe_hw.c +++ b/drivers/net/txgbe/base/txgbe_hw.c @@ -462,7 +462,7 @@ void txgbe_set_lan_id_multi_port(struct txgbe_hw *hw) **/ s32 txgbe_stop_hw(struct txgbe_hw *hw) { - u32 reg_val; + s32 status = 0; u16 i; /* @@ -484,16 +484,26 @@ s32 txgbe_stop_hw(struct txgbe_hw *hw) wr32(hw, TXGBE_ICR(0), TXGBE_ICR_MASK); wr32(hw, TXGBE_ICR(1), TXGBE_ICR_MASK); - /* Disable the transmit unit. Each queue must be disabled. */ - for (i = 0; i < hw->mac.max_tx_queues; i++) - wr32(hw, TXGBE_TXCFG(i), TXGBE_TXCFG_FLUSH); + wr32(hw, TXGBE_BMECTL, 0x3); /* Disable the receive unit by stopping each queue */ - for (i = 0; i < hw->mac.max_rx_queues; i++) { - reg_val = rd32(hw, TXGBE_RXCFG(i)); - reg_val &= ~TXGBE_RXCFG_ENA; - wr32(hw, TXGBE_RXCFG(i), reg_val); - } + for (i = 0; i < hw->mac.max_rx_queues; i++) + wr32(hw, TXGBE_RXCFG(i), 0); + + /* flush all queues disables */ + txgbe_flush(hw); + msec_delay(2); + + /* Prevent the PCI-E bus from hanging by disabling PCI-E master + * access and verify no pending requests + */ + status = txgbe_set_pcie_master(hw, false); + if (status) + return status; + + /* Disable the transmit unit. Each queue must be disabled. */ + for (i = 0; i < hw->mac.max_tx_queues; i++) + wr32(hw, TXGBE_TXCFG(i), 0); /* flush all queues disables */ txgbe_flush(hw); @@ -1174,6 +1184,38 @@ void txgbe_fc_autoneg(struct txgbe_hw *hw) } } +s32 txgbe_set_pcie_master(struct txgbe_hw *hw, bool enable) +{ + struct rte_pci_device *pci_dev = (struct rte_pci_device *)hw->back; + s32 status = 0; + u32 i; + + if (rte_pci_set_bus_master(pci_dev, enable) < 0) { + DEBUGOUT("Cannot configure PCI bus master."); + return -1; + } + + if (enable) + goto out; + + /* Exit if master requests are blocked */ + if (!(rd32(hw, TXGBE_BMEPEND))) + goto out; + + /* Poll for master request bit to clear */ + for (i = 0; i < TXGBE_PCI_MASTER_DISABLE_TIMEOUT; i++) { + usec_delay(100); + if (!(rd32(hw, TXGBE_BMEPEND))) + goto out; + } + + DEBUGOUT("PCIe transaction pending bit also did not clear."); + status = TXGBE_ERR_MASTER_REQUESTS_PENDING; + +out: + return status; +} + /** * txgbe_acquire_swfw_sync - Acquire SWFW semaphore * @hw: pointer to hardware structure diff --git a/drivers/net/txgbe/base/txgbe_hw.h b/drivers/net/txgbe/base/txgbe_hw.h index 7031589f7c..4bf9da2d4c 100644 --- a/drivers/net/txgbe/base/txgbe_hw.h +++ b/drivers/net/txgbe/base/txgbe_hw.h @@ -40,6 +40,7 @@ s32 txgbe_setup_fc(struct txgbe_hw *hw); s32 txgbe_validate_mac_addr(u8 *mac_addr); s32 txgbe_acquire_swfw_sync(struct txgbe_hw *hw, u32 mask); void txgbe_release_swfw_sync(struct txgbe_hw *hw, u32 mask); +s32 txgbe_set_pcie_master(struct txgbe_hw *hw, bool enable); s32 txgbe_get_san_mac_addr(struct txgbe_hw *hw, u8 *san_mac_addr); s32 txgbe_set_san_mac_addr(struct txgbe_hw *hw, u8 *san_mac_addr); diff --git a/drivers/net/txgbe/base/txgbe_osdep.h b/drivers/net/txgbe/base/txgbe_osdep.h index 4fce355000..62d16a6abb 100644 --- a/drivers/net/txgbe/base/txgbe_osdep.h +++ b/drivers/net/txgbe/base/txgbe_osdep.h @@ -19,6 +19,7 @@ #include #include #include +#include #include "../txgbe_logs.h" diff --git a/drivers/net/txgbe/base/txgbe_regs.h b/drivers/net/txgbe/base/txgbe_regs.h index 79290a7afe..86896d11dc 100644 --- a/drivers/net/txgbe/base/txgbe_regs.h +++ b/drivers/net/txgbe/base/txgbe_regs.h @@ -1236,6 +1236,9 @@ enum txgbe_5tuple_protocol { #define TXGBE_TCPTMR 0x000170 #define TXGBE_ITRSEL 0x000180 +#define TXGBE_BMECTL 0x012020 +#define TXGBE_BMEPEND 0x000168 + /* P2V Mailbox */ #define TXGBE_MBMEM(i) (0x005000 + 0x40 * (i)) /* 0-63 */ #define TXGBE_MBCTL(i) (0x000600 + 4 * (i)) /* 0-63 */ diff --git a/drivers/net/txgbe/base/txgbe_type.h b/drivers/net/txgbe/base/txgbe_type.h index 75e839b7de..f52736cae9 100644 --- a/drivers/net/txgbe/base/txgbe_type.h +++ b/drivers/net/txgbe/base/txgbe_type.h @@ -29,6 +29,7 @@ #define TXGBE_FDIRCMD_CMD_POLL 10 #define TXGBE_VF_INIT_TIMEOUT 200 /* Number of retries to clear RSTI */ #define TXGBE_SPI_TIMEOUT 10000 +#define TXGBE_PCI_MASTER_DISABLE_TIMEOUT 800 #define TXGBE_ALIGN 128 /* as intel did */ diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index fa68a5d2ca..121dccb5eb 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -601,6 +601,7 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused) hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; /* Vendor and Device ID need to be set before init of shared code */ + hw->back = pci_dev; hw->device_id = pci_dev->id.device_id; hw->vendor_id = pci_dev->id.vendor_id; if (pci_dev->id.subsystem_vendor_id == PCI_VENDOR_ID_WANGXUN) { @@ -1717,6 +1718,8 @@ txgbe_dev_start(struct rte_eth_dev *dev) hw->mac.get_link_status = true; hw->dev_start = true; + txgbe_set_pcie_master(hw, true); + /* workaround for GPIO intr lost when mng_veto bit is set */ if (txgbe_check_reset_blocked(hw)) txgbe_reinit_gpio_intr(hw); @@ -1980,6 +1983,8 @@ txgbe_dev_stop(struct rte_eth_dev *dev) adapter->rss_reta_updated = 0; wr32m(hw, TXGBE_LEDCTL, 0xFFFFFFFF, TXGBE_LEDCTL_SEL_MASK); + txgbe_set_pcie_master(hw, true); + hw->adapter_stopped = true; dev->data->dev_started = 0; hw->dev_start = false; @@ -2062,6 +2067,8 @@ txgbe_dev_close(struct rte_eth_dev *dev) txgbe_dev_free_queues(dev); + txgbe_set_pcie_master(hw, false); + /* reprogram the RAR[0] in case user changed it. */ txgbe_set_rar(hw, 0, hw->mac.addr, 0, true); From patchwork Tue Jun 18 07:11:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141235 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1183A45489; Tue, 18 Jun 2024 09:12:58 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id ED55C40E2B; Tue, 18 Jun 2024 09:12:31 +0200 (CEST) Received: from smtpbguseast3.qq.com (smtpbguseast3.qq.com [54.243.244.52]) by mails.dpdk.org (Postfix) with ESMTP id 57A1440DDC; Tue, 18 Jun 2024 09:12:08 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694725t6jqg2a X-QQ-Originating-IP: tThOidqsedJn+tKhUUv4SALJn6FQ6yKcqzvMETbVOQI= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:05 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 18275039777203525470 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 04/19] net/txgbe: restrict the configuration of VLAN strip offload Date: Tue, 18 Jun 2024 15:11:35 +0800 Message-Id: <20240618071150.21564-5-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org There is a hardware limitation that Rx ring config register is not writable when Rx ring is enabled, i.e. the TXGBE_RXCFG_ENA bit is set. But disabling the ring when there is traffic will cause ring get stuck. So restrict the configuration of VLAN strip offload only if device is started. Fixes: 220b0e49bc47 ("net/txgbe: support VLAN") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/txgbe_ethdev.c | 49 +++++++++++++------------------- 1 file changed, 20 insertions(+), 29 deletions(-) diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index 121dccb5eb..a59d964a5b 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -1000,41 +1000,25 @@ txgbe_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) } static void -txgbe_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on) +txgbe_vlan_strip_q_set(struct rte_eth_dev *dev, uint16_t queue, int on) { - struct txgbe_hw *hw = TXGBE_DEV_HW(dev); - struct txgbe_rx_queue *rxq; - bool restart; - uint32_t rxcfg, rxbal, rxbah; - if (on) txgbe_vlan_hw_strip_enable(dev, queue); else txgbe_vlan_hw_strip_disable(dev, queue); +} - rxq = dev->data->rx_queues[queue]; - rxbal = rd32(hw, TXGBE_RXBAL(rxq->reg_idx)); - rxbah = rd32(hw, TXGBE_RXBAH(rxq->reg_idx)); - rxcfg = rd32(hw, TXGBE_RXCFG(rxq->reg_idx)); - if (rxq->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP) { - restart = (rxcfg & TXGBE_RXCFG_ENA) && - !(rxcfg & TXGBE_RXCFG_VLAN); - rxcfg |= TXGBE_RXCFG_VLAN; - } else { - restart = (rxcfg & TXGBE_RXCFG_ENA) && - (rxcfg & TXGBE_RXCFG_VLAN); - rxcfg &= ~TXGBE_RXCFG_VLAN; - } - rxcfg &= ~TXGBE_RXCFG_ENA; +static void +txgbe_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on) +{ + struct txgbe_hw *hw = TXGBE_DEV_HW(dev); - if (restart) { - /* set vlan strip for ring */ - txgbe_dev_rx_queue_stop(dev, queue); - wr32(hw, TXGBE_RXBAL(rxq->reg_idx), rxbal); - wr32(hw, TXGBE_RXBAH(rxq->reg_idx), rxbah); - wr32(hw, TXGBE_RXCFG(rxq->reg_idx), rxcfg); - txgbe_dev_rx_queue_start(dev, queue); + if (!hw->adapter_stopped) { + PMD_DRV_LOG(ERR, "Please stop port first"); + return; } + + txgbe_vlan_strip_q_set(dev, queue, on); } static int @@ -1259,9 +1243,9 @@ txgbe_vlan_hw_strip_config(struct rte_eth_dev *dev) rxq = dev->data->rx_queues[i]; if (rxq->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP) - txgbe_vlan_strip_queue_set(dev, i, 1); + txgbe_vlan_strip_q_set(dev, i, 1); else - txgbe_vlan_strip_queue_set(dev, i, 0); + txgbe_vlan_strip_q_set(dev, i, 0); } } @@ -1323,6 +1307,13 @@ txgbe_vlan_offload_config(struct rte_eth_dev *dev, int mask) static int txgbe_vlan_offload_set(struct rte_eth_dev *dev, int mask) { + struct txgbe_hw *hw = TXGBE_DEV_HW(dev); + + if (!hw->adapter_stopped && (mask & RTE_ETH_VLAN_STRIP_MASK)) { + PMD_DRV_LOG(ERR, "Please stop port first"); + return -EPERM; + } + txgbe_config_vlan_strip_on_all_queues(dev, mask); txgbe_vlan_offload_config(dev, mask); From patchwork Tue Jun 18 07:11:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141237 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 391AE45489; Tue, 18 Jun 2024 09:13:24 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9B00840E4F; Tue, 18 Jun 2024 09:12:34 +0200 (CEST) Received: from smtpbg156.qq.com (smtpbg156.qq.com [15.184.82.18]) by mails.dpdk.org (Postfix) with ESMTP id ABF0D40DD5; Tue, 18 Jun 2024 09:12:13 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694727te4km8p X-QQ-Originating-IP: AaCu6zUn+hlM1m2XqaPyPaMerjnzIOItKuE858i75U4= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:07 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 14862118706944177189 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 05/19] net/txgbe: reconfigure more MAC Rx registers Date: Tue, 18 Jun 2024 15:11:36 +0800 Message-Id: <20240618071150.21564-6-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org When link status changes, there is a probability that no more packets can be received on the port, due to hardware defects. These MAC Rx registers should be reconfigured to fix this problem. Fixes: 950a6954df13 ("net/txgbe: reconfigure MAC Rx when link update") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/base/txgbe_regs.h | 2 ++ drivers/net/txgbe/txgbe_ethdev.c | 8 +++++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/net/txgbe/base/txgbe_regs.h b/drivers/net/txgbe/base/txgbe_regs.h index 86896d11dc..a2984f1106 100644 --- a/drivers/net/txgbe/base/txgbe_regs.h +++ b/drivers/net/txgbe/base/txgbe_regs.h @@ -1022,6 +1022,8 @@ enum txgbe_5tuple_protocol { #define TXGBE_MACRXFLT_CTL_PASS LS(3, 6, 0x3) #define TXGBE_MACRXFLT_RXALL MS(31, 0x1) +#define TXGBE_MAC_WDG_TIMEOUT 0x01100C + /****************************************************************************** * Statistic Registers ******************************************************************************/ diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index a59d964a5b..699ff1c920 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -2879,6 +2879,7 @@ txgbe_dev_link_update_share(struct rte_eth_dev *dev, bool link_up; int err; int wait = 1; + u32 reg; memset(&link, 0, sizeof(link)); link.link_status = RTE_ETH_LINK_DOWN; @@ -2968,9 +2969,14 @@ txgbe_dev_link_update_share(struct rte_eth_dev *dev, } /* Re configure MAC RX */ - if (hw->mac.type == txgbe_mac_raptor) + if (hw->mac.type == txgbe_mac_raptor) { + reg = rd32(hw, TXGBE_MACRXCFG); + wr32(hw, TXGBE_MACRXCFG, reg); wr32m(hw, TXGBE_MACRXFLT, TXGBE_MACRXFLT_PROMISC, TXGBE_MACRXFLT_PROMISC); + reg = rd32(hw, TXGBE_MAC_WDG_TIMEOUT); + wr32(hw, TXGBE_MAC_WDG_TIMEOUT, reg); + } return rte_eth_linkstatus_set(dev, &link); } From patchwork Tue Jun 18 07:11:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141238 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B502345489; Tue, 18 Jun 2024 09:13:41 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 61707410E6; Tue, 18 Jun 2024 09:12:38 +0200 (CEST) Received: from smtpbgsg1.qq.com (smtpbgsg1.qq.com [54.254.200.92]) by mails.dpdk.org (Postfix) with ESMTP id 1084040DD6; Tue, 18 Jun 2024 09:12:14 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694729tbfl3bm X-QQ-Originating-IP: 2X2eGURbHlpx3Ob+nFhxyIXAVTTorA4SmBtTMqKIfWg= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:09 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 17287546606216993335 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 06/19] net/txgbe: fix VF promiscuous and allmulticast Date: Tue, 18 Jun 2024 15:11:37 +0800 Message-Id: <20240618071150.21564-7-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The configuration of allmulti and promiscuous modes conflicts together. For instance, if we enable promiscuous mode, then enable and disable allmulti, then the promiscuous mode is wrongly disabled. Fix this behavior by: - doing nothing when we set/unset allmulti if promiscuous mode is on - restorting the proper mode (none or allmulti) when we disable promiscuous mode Fixes: 29072d593fe4 ("net/txgbe: support VF promiscuous and allmulticast") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/txgbe_ethdev_vf.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/net/txgbe/txgbe_ethdev_vf.c b/drivers/net/txgbe/txgbe_ethdev_vf.c index ec40419289..6ac34058ab 100644 --- a/drivers/net/txgbe/txgbe_ethdev_vf.c +++ b/drivers/net/txgbe/txgbe_ethdev_vf.c @@ -1202,9 +1202,13 @@ static int txgbevf_dev_promiscuous_disable(struct rte_eth_dev *dev) { struct txgbe_hw *hw = TXGBE_DEV_HW(dev); + int mode = TXGBEVF_XCAST_MODE_NONE; int ret; - switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_NONE)) { + if (dev->data->all_multicast) + mode = TXGBEVF_XCAST_MODE_ALLMULTI; + + switch (hw->mac.update_xcast_mode(hw, mode)) { case 0: ret = 0; break; @@ -1225,6 +1229,9 @@ txgbevf_dev_allmulticast_enable(struct rte_eth_dev *dev) struct txgbe_hw *hw = TXGBE_DEV_HW(dev); int ret; + if (dev->data->promiscuous) + return 0; + switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_ALLMULTI)) { case 0: ret = 0; @@ -1246,6 +1253,9 @@ txgbevf_dev_allmulticast_disable(struct rte_eth_dev *dev) struct txgbe_hw *hw = TXGBE_DEV_HW(dev); int ret; + if (dev->data->promiscuous) + return 0; + switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_MULTI)) { case 0: ret = 0; From patchwork Tue Jun 18 07:11:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141236 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 751C345489; Tue, 18 Jun 2024 09:13:11 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4548940E35; Tue, 18 Jun 2024 09:12:33 +0200 (CEST) Received: from smtpbg151.qq.com (smtpbg151.qq.com [18.169.211.239]) by mails.dpdk.org (Postfix) with ESMTP id E1F9540DD6; Tue, 18 Jun 2024 09:12:13 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694731tn3cyko X-QQ-Originating-IP: wbnitRnMeLb9cIZ1XNSmN3rSg9VpV2CTDBIvhL2uroA= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:10 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 7557259968748814712 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 07/19] net/ngbe: special config for YT8531SH-CA PHY Date: Tue, 18 Jun 2024 15:11:38 +0800 Message-Id: <20240618071150.21564-8-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org YT8531SH-CA PHY will switch to SDS space automatically when UTP and SDS media are not present, causing failure to link up. Add the special configuration to fix it. Fixes: 3d0af7066759 ("net/ngbe: setup PHY link") Fixes: 1c44384fce76 ("net/ngbe: support custom PHY interfaces") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/ngbe/base/ngbe_phy_yt.c | 4 ++++ drivers/net/ngbe/base/ngbe_phy_yt.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/drivers/net/ngbe/base/ngbe_phy_yt.c b/drivers/net/ngbe/base/ngbe_phy_yt.c index ea313cd9a5..a374b015fd 100644 --- a/drivers/net/ngbe/base/ngbe_phy_yt.c +++ b/drivers/net/ngbe/base/ngbe_phy_yt.c @@ -320,6 +320,10 @@ s32 ngbe_setup_phy_link_yt(struct ngbe_hw *hw, u32 speed, value |= value_r4; ngbe_write_phy_reg_mdi(hw, YT_ANA, 0, value); + /* config for yt8531sh-ca */ + ngbe_write_phy_reg_ext_yt(hw, YT_SPEC_CONF, 0, + YT_SPEC_CONF_8531SH_CA); + /* software reset to make the above configuration * take effect */ diff --git a/drivers/net/ngbe/base/ngbe_phy_yt.h b/drivers/net/ngbe/base/ngbe_phy_yt.h index ddf992e79a..c45bec7ce7 100644 --- a/drivers/net/ngbe/base/ngbe_phy_yt.h +++ b/drivers/net/ngbe/base/ngbe_phy_yt.h @@ -32,6 +32,8 @@ #define YT_MISC 0xA006 #define YT_MISC_FIBER_PRIO MS16(8, 0x1) /* 0 for UTP */ #define YT_MISC_RESV MS16(0, 0x1) +#define YT_SPEC_CONF 0xA023 +#define YT_SPEC_CONF_8531SH_CA 0x4031 /* SDS EXT */ #define YT_AUTO 0xA5 From patchwork Tue Jun 18 07:11:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141239 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0364F45489; Tue, 18 Jun 2024 09:13:52 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9632D4111B; Tue, 18 Jun 2024 09:12:39 +0200 (CEST) Received: from smtpbg150.qq.com (smtpbg150.qq.com [18.132.163.193]) by mails.dpdk.org (Postfix) with ESMTP id 7949540DDC; Tue, 18 Jun 2024 09:12:15 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694733tdy3299 X-QQ-Originating-IP: 3XqmPrY5VkTF85zHkJjgSuJkxsWDxiOyAE4CZRVWPhQ= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:12 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 6266101814820005736 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 08/19] net/ngbe: keep PHY power down while device probing Date: Tue, 18 Jun 2024 15:11:39 +0800 Message-Id: <20240618071150.21564-9-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The internal PHY will be set to default power down after LAN reset, but the external PHY will not. To keep the PHY behavior consistent, set PHY power down uniformly here. Fixes: 708ebe7d0399 ("net/ngbe: fix external PHY power down") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/ngbe/base/ngbe_devids.h | 1 + drivers/net/ngbe/base/ngbe_hw.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/drivers/net/ngbe/base/ngbe_devids.h b/drivers/net/ngbe/base/ngbe_devids.h index 83eedf423e..e1efa62015 100644 --- a/drivers/net/ngbe/base/ngbe_devids.h +++ b/drivers/net/ngbe/base/ngbe_devids.h @@ -83,6 +83,7 @@ #define NGBE_YT8521S_SFP_GPIO 0x0062 #define NGBE_INTERNAL_YT8521S_SFP_GPIO 0x0064 #define NGBE_LY_YT8521S_SFP 0x0070 +#define NGBE_RGMII_FPGA 0x0080 #define NGBE_WOL_SUP 0x4000 #define NGBE_NCSI_SUP 0x8000 diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c index 22ccdb0b7d..4dced0d328 100644 --- a/drivers/net/ngbe/base/ngbe_hw.c +++ b/drivers/net/ngbe/base/ngbe_hw.c @@ -173,6 +173,9 @@ s32 ngbe_reset_hw_em(struct ngbe_hw *hw) ngbe_reset_misc_em(hw); hw->mac.clear_hw_cntrs(hw); + if (!((hw->sub_device_id & NGBE_OEM_MASK) == NGBE_RGMII_FPGA)) + hw->phy.set_phy_power(hw, false); + msec_delay(50); /* Store the permanent mac address */ From patchwork Tue Jun 18 07:11:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141240 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id F212A45489; Tue, 18 Jun 2024 09:14:03 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E1EFC4275B; Tue, 18 Jun 2024 09:12:40 +0200 (CEST) Received: from smtpbgau1.qq.com (smtpbgau1.qq.com [54.206.16.166]) by mails.dpdk.org (Postfix) with ESMTP id 12D2040DFB for ; Tue, 18 Jun 2024 09:12:18 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694734tippogc X-QQ-Originating-IP: 7VSY8p6HXZKj9pXrHppI/poob5ciIPd/CnKqqZjyVI4= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:14 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 9706031144020329201 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Subject: [PATCH 09/19] net/ngbe: add WOL and NCSI capability Date: Tue, 18 Jun 2024 15:11:40 +0800 Message-Id: <20240618071150.21564-10-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Support WOL and NCSI capability for devices. And there is one OEM NCSI NIC which can not be identified from sub-system ID, it needs to check NCSI pin status in firmware. Signed-off-by: Jiawen Wu --- drivers/net/ngbe/base/ngbe_hw.c | 30 ++++++++++++++++++++++++++-- drivers/net/ngbe/base/ngbe_hw.h | 1 + drivers/net/ngbe/base/ngbe_mng.h | 1 + drivers/net/ngbe/base/ngbe_phy.c | 6 ++++++ drivers/net/ngbe/base/ngbe_phy_rtl.c | 5 ++++- drivers/net/ngbe/base/ngbe_phy_yt.c | 3 +++ drivers/net/ngbe/base/ngbe_type.h | 2 ++ drivers/net/ngbe/ngbe_ethdev.c | 20 ++++++++++++------- drivers/net/ngbe/ngbe_rxtx.c | 5 ++++- 9 files changed, 62 insertions(+), 11 deletions(-) diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c index 4dced0d328..0f1a5b9f8d 100644 --- a/drivers/net/ngbe/base/ngbe_hw.c +++ b/drivers/net/ngbe/base/ngbe_hw.c @@ -173,7 +173,8 @@ s32 ngbe_reset_hw_em(struct ngbe_hw *hw) ngbe_reset_misc_em(hw); hw->mac.clear_hw_cntrs(hw); - if (!((hw->sub_device_id & NGBE_OEM_MASK) == NGBE_RGMII_FPGA)) + if (!(((hw->sub_device_id & NGBE_OEM_MASK) == NGBE_RGMII_FPGA) || + hw->ncsi_enabled || hw->wol_enabled)) hw->phy.set_phy_power(hw, false); msec_delay(50); @@ -1709,7 +1710,8 @@ void ngbe_disable_rx(struct ngbe_hw *hw) } wr32m(hw, NGBE_PBRXCTL, NGBE_PBRXCTL_ENA, 0); - wr32m(hw, NGBE_MACRXCFG, NGBE_MACRXCFG_ENA, 0); + if (!(hw->ncsi_enabled || hw->wol_enabled)) + wr32m(hw, NGBE_MACRXCFG, NGBE_MACRXCFG_ENA, 0); } void ngbe_enable_rx(struct ngbe_hw *hw) @@ -1925,6 +1927,10 @@ void ngbe_map_device_id(struct ngbe_hw *hw) oem == NGBE_INTERNAL_YT8521S_SFP_GPIO || oem == NGBE_LY_YT8521S_SFP) hw->gpio_ctl = true; + + hw->wol_enabled = (hw->sub_system_id & NGBE_WOL_SUP_MASK) ? true : false; + hw->ncsi_enabled = (hw->sub_system_id & NGBE_NCSI_SUP_MASK || + hw->sub_system_id & NGBE_OCP_CARD) ? true : false; } /** @@ -2065,3 +2071,23 @@ s32 ngbe_init_shared_code(struct ngbe_hw *hw) return status; } +void ngbe_set_ncsi_status(struct ngbe_hw *hw) +{ + u16 ncsi_pin = 0; + s32 err = 0; + + /* need to check ncsi pin status for oem ncsi card */ + if (hw->ncsi_enabled || hw->wol_enabled) + return; + + err = hw->rom.readw_buffer(hw, FW_READ_SHADOW_RAM_GPIO, 1, &ncsi_pin); + if (err) { + DEBUGOUT("get ncsi pin status failed"); + return; + } + + if (ncsi_pin == 1) { + hw->ncsi_enabled = true; + hw->wol_enabled = true; + } +} diff --git a/drivers/net/ngbe/base/ngbe_hw.h b/drivers/net/ngbe/base/ngbe_hw.h index b92a691fa0..b9805af499 100644 --- a/drivers/net/ngbe/base/ngbe_hw.h +++ b/drivers/net/ngbe/base/ngbe_hw.h @@ -86,5 +86,6 @@ void ngbe_map_device_id(struct ngbe_hw *hw); void ngbe_read_efuse(struct ngbe_hw *hw); u32 ngbe_fmgr_cmd_op(struct ngbe_hw *hw, u32 cmd, u32 cmd_addr); u32 ngbe_flash_read_dword(struct ngbe_hw *hw, u32 addr); +void ngbe_set_ncsi_status(struct ngbe_hw *hw); #endif /* _NGBE_HW_H_ */ diff --git a/drivers/net/ngbe/base/ngbe_mng.h b/drivers/net/ngbe/base/ngbe_mng.h index 36257d6e5e..7dee6053f9 100644 --- a/drivers/net/ngbe/base/ngbe_mng.h +++ b/drivers/net/ngbe/base/ngbe_mng.h @@ -27,6 +27,7 @@ #define FW_NVM_DATA_OFFSET 3 #define FW_EEPROM_CHECK_STATUS 0xE9 #define FW_PHY_LED_CONF 0xF1 +#define FW_READ_SHADOW_RAM_GPIO 0xB4 #define FW_CHECKSUM_CAP_ST_PASS 0x80658383 #define FW_CHECKSUM_CAP_ST_FAIL 0x70657376 diff --git a/drivers/net/ngbe/base/ngbe_phy.c b/drivers/net/ngbe/base/ngbe_phy.c index acff7bfebf..6b5c1e47df 100644 --- a/drivers/net/ngbe/base/ngbe_phy.c +++ b/drivers/net/ngbe/base/ngbe_phy.c @@ -210,6 +210,9 @@ s32 ngbe_reset_phy(struct ngbe_hw *hw) if (err != 0 || hw->phy.type == ngbe_phy_none) return err; + if (hw->ncsi_enabled) + return err; + /* Don't reset PHY if it's shut down due to overtemp. */ if (hw->mac.check_overtemp(hw) == NGBE_ERR_OVERTEMP) return err; @@ -428,6 +431,9 @@ s32 ngbe_init_phy(struct ngbe_hw *hw) break; } + if (hw->wol_enabled || hw->ncsi_enabled) + hw->phy.reset_disable = true; + init_phy_ops_out: return err; } diff --git a/drivers/net/ngbe/base/ngbe_phy_rtl.c b/drivers/net/ngbe/base/ngbe_phy_rtl.c index ba63a8058a..9312bd300b 100644 --- a/drivers/net/ngbe/base/ngbe_phy_rtl.c +++ b/drivers/net/ngbe/base/ngbe_phy_rtl.c @@ -295,7 +295,10 @@ s32 ngbe_setup_phy_link_rtl(struct ngbe_hw *hw, } /* restart AN and wait AN done interrupt */ - autoneg_reg = RTL_BMCR_RESTART_AN | RTL_BMCR_ANE; + if (!hw->ncsi_enabled) + autoneg_reg = RTL_BMCR_RESTART_AN | RTL_BMCR_ANE; + else + autoneg_reg = RTL_BMCR_ANE; hw->phy.write_reg(hw, RTL_BMCR, RTL_DEV_ZERO, autoneg_reg); skip_an: diff --git a/drivers/net/ngbe/base/ngbe_phy_yt.c b/drivers/net/ngbe/base/ngbe_phy_yt.c index a374b015fd..d110fbc8b2 100644 --- a/drivers/net/ngbe/base/ngbe_phy_yt.c +++ b/drivers/net/ngbe/base/ngbe_phy_yt.c @@ -126,6 +126,9 @@ s32 ngbe_setup_phy_link_yt(struct ngbe_hw *hw, u32 speed, UNREFERENCED_PARAMETER(autoneg_wait_to_complete); + if (hw->ncsi_enabled) + return 0; + hw->phy.autoneg_advertised = 0; /* check chip_mode first */ diff --git a/drivers/net/ngbe/base/ngbe_type.h b/drivers/net/ngbe/base/ngbe_type.h index 8a7d2cd331..1b74b7a61f 100644 --- a/drivers/net/ngbe/base/ngbe_type.h +++ b/drivers/net/ngbe/base/ngbe_type.h @@ -457,6 +457,8 @@ struct ngbe_hw { u32 eeprom_id; u8 revision_id; bool adapter_stopped; + bool wol_enabled; + bool ncsi_enabled; uint64_t isb_dma; void IOMEM *isb_mem; diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c index c2e186c3d6..2a858b76d0 100644 --- a/drivers/net/ngbe/ngbe_ethdev.c +++ b/drivers/net/ngbe/ngbe_ethdev.c @@ -406,6 +406,7 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused) /* Unlock any pending hardware semaphore */ ngbe_swfw_lock_reset(hw); + ngbe_set_ncsi_status(hw); /* Get Hardware Flow Control setting */ hw->fc.requested_mode = ngbe_fc_full; @@ -1092,10 +1093,12 @@ ngbe_dev_start(struct rte_eth_dev *dev) speed |= NGBE_LINK_SPEED_10M_FULL; } - err = hw->phy.init_hw(hw); - if (err != 0) { - PMD_INIT_LOG(ERR, "PHY init failed"); - goto error; + if (!hw->ncsi_enabled) { + err = hw->phy.init_hw(hw); + if (err != 0) { + PMD_INIT_LOG(ERR, "PHY init failed"); + goto error; + } } err = hw->mac.setup_link(hw, speed, link_up); if (err != 0) @@ -1218,7 +1221,8 @@ ngbe_dev_stop(struct rte_eth_dev *dev) out: /* close phy to prevent reset in dev_close from restarting physical link */ - hw->phy.set_phy_power(hw, false); + if (!(hw->wol_enabled || hw->ncsi_enabled)) + hw->phy.set_phy_power(hw, false); return 0; } @@ -1231,7 +1235,8 @@ ngbe_dev_set_link_up(struct rte_eth_dev *dev) { struct ngbe_hw *hw = ngbe_dev_hw(dev); - hw->phy.set_phy_power(hw, true); + if (!(hw->ncsi_enabled || hw->wol_enabled)) + hw->phy.set_phy_power(hw, true); return 0; } @@ -1244,7 +1249,8 @@ ngbe_dev_set_link_down(struct rte_eth_dev *dev) { struct ngbe_hw *hw = ngbe_dev_hw(dev); - hw->phy.set_phy_power(hw, false); + if (!(hw->ncsi_enabled || hw->wol_enabled)) + hw->phy.set_phy_power(hw, false); return 0; } diff --git a/drivers/net/ngbe/ngbe_rxtx.c b/drivers/net/ngbe/ngbe_rxtx.c index 9de12767df..c54c67f7ee 100644 --- a/drivers/net/ngbe/ngbe_rxtx.c +++ b/drivers/net/ngbe/ngbe_rxtx.c @@ -2943,7 +2943,10 @@ ngbe_dev_rx_init(struct rte_eth_dev *dev) * Make sure receives are disabled while setting * up the Rx context (registers, descriptor rings, etc.). */ - wr32m(hw, NGBE_MACRXCFG, NGBE_MACRXCFG_ENA, 0); + + if (!(hw->ncsi_enabled || hw->wol_enabled)) + wr32m(hw, NGBE_MACRXCFG, NGBE_MACRXCFG_ENA, 0); + wr32m(hw, NGBE_PBRXCTL, NGBE_PBRXCTL_ENA, 0); /* Enable receipt of broadcasted frames */ From patchwork Tue Jun 18 07:11:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141241 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3B13645489; Tue, 18 Jun 2024 09:14:14 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2CF4140DDC; Tue, 18 Jun 2024 09:12:49 +0200 (CEST) Received: from smtpbguseast1.qq.com (smtpbguseast1.qq.com [54.204.34.129]) by mails.dpdk.org (Postfix) with ESMTP id 0CCD840E01; Tue, 18 Jun 2024 09:12:19 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694736tzaizjz X-QQ-Originating-IP: j1PKeV/1akiC9+mtRXhSH69nYLBi1AAySuk5YO9EPBQ= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:15 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 4612918135905253922 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 10/19] net/txgbe: fix hotplug remove Date: Tue, 18 Jun 2024 15:11:41 +0800 Message-Id: <20240618071150.21564-11-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This bug occurs in OpenvSwitch. After adding a port bound to vfio-pci to ovs, detach it from ovs and then unbind it from vfio-pci(that is hotplug) will cause operating system to get stuck. Fixes: 7dc117068a7c ("net/txgbe: support probe and remove") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/txgbe_ethdev.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index 699ff1c920..20fa0a5b05 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -964,7 +964,7 @@ static int eth_txgbe_pci_remove(struct rte_pci_device *pci_dev) if (!ethdev) return 0; - return rte_eth_dev_destroy(ethdev, eth_txgbe_dev_uninit); + return rte_eth_dev_pci_generic_remove(pci_dev, eth_txgbe_dev_uninit); } static struct rte_pci_driver rte_txgbe_pmd = { From patchwork Tue Jun 18 07:11:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141242 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9275345489; Tue, 18 Jun 2024 09:14:24 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 86F1742791; Tue, 18 Jun 2024 09:12:50 +0200 (CEST) Received: from smtpbg150.qq.com (smtpbg150.qq.com [18.132.163.193]) by mails.dpdk.org (Postfix) with ESMTP id 7160440DFB; Tue, 18 Jun 2024 09:12:20 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694738te1du7o X-QQ-Originating-IP: +30Xz4CBaDf3K22MKboavPkDRMV2R0h2dcDnAyD45rY= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:17 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 6171117367589274429 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 11/19] net/ngbe: fix hotplug remove Date: Tue, 18 Jun 2024 15:11:42 +0800 Message-Id: <20240618071150.21564-12-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This bug occurs in OpenvSwitch. After adding a port bound to vfio-pci to ovs, detach it from ovs and then unbind it from vfio-pci(that is hotplug) will cause operating system to get stuck. Fixes: 6ee7e574cd48 ("net/ngbe: support probe and remove") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/ngbe/ngbe_ethdev.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c index 2a858b76d0..9d75e222c3 100644 --- a/drivers/net/ngbe/ngbe_ethdev.c +++ b/drivers/net/ngbe/ngbe_ethdev.c @@ -547,7 +547,7 @@ static int eth_ngbe_pci_remove(struct rte_pci_device *pci_dev) if (ethdev == NULL) return 0; - return rte_eth_dev_destroy(ethdev, eth_ngbe_dev_uninit); + return rte_eth_dev_pci_generic_remove(pci_dev, eth_ngbe_dev_uninit); } static struct rte_pci_driver rte_ngbe_pmd = { From patchwork Tue Jun 18 07:11:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141243 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3FFEE45489; Tue, 18 Jun 2024 09:14:36 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 068A0427B4; Tue, 18 Jun 2024 09:12:52 +0200 (CEST) Received: from smtpbgsg2.qq.com (smtpbgsg2.qq.com [54.254.200.128]) by mails.dpdk.org (Postfix) with ESMTP id 86D0240DFB; Tue, 18 Jun 2024 09:12:23 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694740tf6lbcf X-QQ-Originating-IP: g5ND8Zar4+EqjNsRyQ4v9nfCHhPVYIyC9+qBThUyt4k= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:19 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 15333027653939455559 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 12/19] net/txgbe: correct valid MTU range Date: Tue, 18 Jun 2024 15:11:43 +0800 Message-Id: <20240618071150.21564-13-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The valid range of MTU is 68 to 9414. Set min_mtu and max_mtu in dev_info. Fixes: 3926214fd80d ("net/txgbe: support MTU set") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/txgbe_ethdev.c | 12 +++++------- drivers/net/txgbe/txgbe_ethdev.h | 2 +- 2 files changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index 20fa0a5b05..c2df5a314b 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -2670,7 +2670,9 @@ txgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) dev_info->max_rx_queues = (uint16_t)hw->mac.max_rx_queues; dev_info->max_tx_queues = (uint16_t)hw->mac.max_tx_queues; dev_info->min_rx_bufsize = 1024; - dev_info->max_rx_pktlen = 15872; + dev_info->max_rx_pktlen = TXGBE_MAX_MTU + TXGBE_ETH_OVERHEAD; + dev_info->min_mtu = RTE_ETHER_MIN_MTU; + dev_info->max_mtu = TXGBE_MAX_MTU; dev_info->max_mac_addrs = hw->mac.num_rar_entries; dev_info->max_hash_mac_addrs = TXGBE_VMDQ_NUM_UC_MAC; dev_info->max_vfs = pci_dev->max_vfs; @@ -3694,12 +3696,8 @@ txgbe_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) return -EINVAL; } - if (hw->mode) - wr32m(hw, TXGBE_FRMSZ, TXGBE_FRMSZ_MAX_MASK, - TXGBE_FRAME_SIZE_MAX); - else - wr32m(hw, TXGBE_FRMSZ, TXGBE_FRMSZ_MAX_MASK, - TXGBE_FRMSZ_MAX(frame_size)); + wr32m(hw, TXGBE_FRMSZ, TXGBE_FRMSZ_MAX_MASK, + TXGBE_FRMSZ_MAX(frame_size)); return 0; } diff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h index 050acd967f..f0f4ced5b0 100644 --- a/drivers/net/txgbe/txgbe_ethdev.h +++ b/drivers/net/txgbe/txgbe_ethdev.h @@ -56,7 +56,7 @@ #define TXGBE_5TUPLE_MAX_PRI 7 #define TXGBE_5TUPLE_MIN_PRI 1 - +#define TXGBE_MAX_MTU 9414 /* The overhead from MTU to max frame size. */ #define TXGBE_ETH_OVERHEAD (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN) From patchwork Tue Jun 18 07:11:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141244 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0473C45489; Tue, 18 Jun 2024 09:14:48 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 62E8D427C3; Tue, 18 Jun 2024 09:12:53 +0200 (CEST) Received: from smtpbg153.qq.com (smtpbg153.qq.com [13.245.218.24]) by mails.dpdk.org (Postfix) with ESMTP id 75D5440DC9; Tue, 18 Jun 2024 09:12:25 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694742tjzfhnp X-QQ-Originating-IP: TMnKUGlSRaP9ejCz1LApkjRp1y2gZ2SfYp/VYE9sP+c= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:21 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 15857877801893655916 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 13/19] net/ngbe: correct valid MTU range Date: Tue, 18 Jun 2024 15:11:44 +0800 Message-Id: <20240618071150.21564-14-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The valid range of MTU is 68 to 9414. Set min_mtu and max_mtu in dev_info. Fixes: 07baabb6a51a ("net/ngbe: support MTU set") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/ngbe/ngbe_ethdev.c | 4 +++- drivers/net/ngbe/ngbe_ethdev.h | 1 + 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c index 9d75e222c3..d7fc4bc70b 100644 --- a/drivers/net/ngbe/ngbe_ethdev.c +++ b/drivers/net/ngbe/ngbe_ethdev.c @@ -1818,7 +1818,9 @@ ngbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) dev_info->max_rx_queues = (uint16_t)hw->mac.max_rx_queues; dev_info->max_tx_queues = (uint16_t)hw->mac.max_tx_queues; dev_info->min_rx_bufsize = 1024; - dev_info->max_rx_pktlen = 15872; + dev_info->max_rx_pktlen = NGBE_MAX_MTU + NGBE_ETH_OVERHEAD; + dev_info->min_mtu = RTE_ETHER_MIN_MTU; + dev_info->max_mtu = NGBE_MAX_MTU; dev_info->max_mac_addrs = hw->mac.num_rar_entries; dev_info->max_hash_mac_addrs = NGBE_VMDQ_NUM_UC_MAC; dev_info->max_vfs = pci_dev->max_vfs; diff --git a/drivers/net/ngbe/ngbe_ethdev.h b/drivers/net/ngbe/ngbe_ethdev.h index c748bfbe4d..7af58a57ac 100644 --- a/drivers/net/ngbe/ngbe_ethdev.h +++ b/drivers/net/ngbe/ngbe_ethdev.h @@ -32,6 +32,7 @@ #define NGBE_QUEUE_ITR_INTERVAL_DEFAULT 500 /* 500us */ +#define NGBE_MAX_MTU 9414 /* The overhead from MTU to max frame size. */ #define NGBE_ETH_OVERHEAD (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN) From patchwork Tue Jun 18 07:11:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141245 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EE16645489; Tue, 18 Jun 2024 09:14:58 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id EE9CE40E11; Tue, 18 Jun 2024 09:13:10 +0200 (CEST) Received: from smtpbg154.qq.com (smtpbg154.qq.com [15.184.224.54]) by mails.dpdk.org (Postfix) with ESMTP id 9770940E15; Tue, 18 Jun 2024 09:12:28 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694744tvhgpxx X-QQ-Originating-IP: GcLRAbwycfS2GdEjbDiw9JpFYLjsJfaeAb5aXnOzwIE= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:23 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 9049734315216521835 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 14/19] net/txgbe: fix memory leak Date: Tue, 18 Jun 2024 15:11:45 +0800 Message-Id: <20240618071150.21564-15-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Fix some memory leaks caused by not release resource in time. Fixes: e1698e383c2a ("net/txgbe: add device init and uninit") Fixes: 635c21354f9a ("net/txgbe: add flow director filter init and uninit") Fixes: c13f84a71b2d ("net/txgbe: add L2 tunnel filter init and uninit") Fixes: 3a123ba60a71 ("net/txgbe: support VF start and stop") Fixes: 039b769f7c01 ("net/txgbe: support VF MAC address") Fixes: 226bf98eda87 ("net/txgbe: add Rx and Tx queues setup and release") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/txgbe_ethdev.c | 4 ++++ drivers/net/txgbe/txgbe_ethdev_vf.c | 7 ++++++- drivers/net/txgbe/txgbe_rxtx.c | 8 ++++++++ drivers/net/txgbe/txgbe_rxtx.h | 2 ++ 4 files changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index c2df5a314b..26cf7632c3 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -735,6 +735,8 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused) PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to store MAC addresses", RTE_ETHER_ADDR_LEN * TXGBE_VMDQ_NUM_UC_MAC); + rte_free(eth_dev->data->mac_addrs); + eth_dev->data->mac_addrs = NULL; return -ENOMEM; } @@ -902,6 +904,7 @@ static int txgbe_fdir_filter_init(struct rte_eth_dev *eth_dev) if (!fdir_info->hash_map) { PMD_INIT_LOG(ERR, "Failed to allocate memory for fdir hash map!"); + rte_hash_free(fdir_info->hash_handle); return -ENOMEM; } fdir_info->mask_added = FALSE; @@ -937,6 +940,7 @@ static int txgbe_l2_tn_filter_init(struct rte_eth_dev *eth_dev) if (!l2_tn_info->hash_map) { PMD_INIT_LOG(ERR, "Failed to allocate memory for L2 TN hash map!"); + rte_hash_free(l2_tn_info->hash_handle); return -ENOMEM; } l2_tn_info->e_tag_en = FALSE; diff --git a/drivers/net/txgbe/txgbe_ethdev_vf.c b/drivers/net/txgbe/txgbe_ethdev_vf.c index 6ac34058ab..87f76673d7 100644 --- a/drivers/net/txgbe/txgbe_ethdev_vf.c +++ b/drivers/net/txgbe/txgbe_ethdev_vf.c @@ -295,6 +295,8 @@ eth_txgbevf_dev_init(struct rte_eth_dev *eth_dev) err = hw->mac.start_hw(hw); if (err) { PMD_INIT_LOG(ERR, "VF Initialization Failure: %d", err); + rte_free(eth_dev->data->mac_addrs); + eth_dev->data->mac_addrs = NULL; return -EIO; } @@ -671,8 +673,10 @@ txgbevf_dev_start(struct rte_eth_dev *dev) * now only one vector is used for Rx queue */ intr_vector = 1; - if (rte_intr_efd_enable(intr_handle, intr_vector)) + if (rte_intr_efd_enable(intr_handle, intr_vector)) { + txgbe_dev_clear_queues(dev); return -1; + } } if (rte_intr_dp_is_en(intr_handle)) { @@ -680,6 +684,7 @@ txgbevf_dev_start(struct rte_eth_dev *dev) dev->data->nb_rx_queues)) { PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues" " intr_vec", dev->data->nb_rx_queues); + txgbe_dev_clear_queues(dev); return -ENOMEM; } } diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c index 35f80d73ac..a10cbb447d 100644 --- a/drivers/net/txgbe/txgbe_rxtx.c +++ b/drivers/net/txgbe/txgbe_rxtx.c @@ -2157,6 +2157,7 @@ txgbe_tx_queue_release(struct txgbe_tx_queue *txq) if (txq != NULL && txq->ops != NULL) { txq->ops->release_mbufs(txq); txq->ops->free_swring(txq); + rte_memzone_free(txq->mz); rte_free(txq); } } @@ -2376,6 +2377,7 @@ txgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, return -ENOMEM; } + txq->mz = tz; txq->nb_tx_desc = nb_desc; txq->tx_free_thresh = tx_free_thresh; txq->pthresh = tx_conf->tx_thresh.pthresh; @@ -2499,6 +2501,7 @@ txgbe_rx_queue_release(struct txgbe_rx_queue *rxq) txgbe_rx_queue_release_mbufs(rxq); rte_free(rxq->sw_ring); rte_free(rxq->sw_sc_ring); + rte_memzone_free(rxq->mz); rte_free(rxq); } } @@ -2592,6 +2595,10 @@ txgbe_reset_rx_queue(struct txgbe_adapter *adapter, struct txgbe_rx_queue *rxq) rxq->rx_free_trigger = (uint16_t)(rxq->rx_free_thresh - 1); rxq->rx_tail = 0; rxq->nb_rx_hold = 0; + + if (rxq->pkt_first_seg != NULL) + rte_pktmbuf_free(rxq->pkt_first_seg); + rxq->pkt_first_seg = NULL; rxq->pkt_last_seg = NULL; @@ -2677,6 +2684,7 @@ txgbe_dev_rx_queue_setup(struct rte_eth_dev *dev, return -ENOMEM; } + rxq->mz = rz; /* * Zero init all the descriptors in the ring. */ diff --git a/drivers/net/txgbe/txgbe_rxtx.h b/drivers/net/txgbe/txgbe_rxtx.h index 336f060633..9155eb1f70 100644 --- a/drivers/net/txgbe/txgbe_rxtx.h +++ b/drivers/net/txgbe/txgbe_rxtx.h @@ -322,6 +322,7 @@ struct txgbe_rx_queue { struct rte_mbuf fake_mbuf; /** hold packets to return to application */ struct rte_mbuf *rx_stage[RTE_PMD_TXGBE_RX_MAX_BURST * 2]; + const struct rte_memzone *mz; }; /** @@ -410,6 +411,7 @@ struct txgbe_tx_queue { uint8_t using_ipsec; /**< indicates that IPsec TX feature is in use */ #endif + const struct rte_memzone *mz; }; struct txgbe_txq_ops { From patchwork Tue Jun 18 07:11:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141247 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5062D45489; Tue, 18 Jun 2024 09:15:21 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DCDDE42D0C; Tue, 18 Jun 2024 09:13:13 +0200 (CEST) Received: from smtpbgbr1.qq.com (smtpbgbr1.qq.com [54.207.19.206]) by mails.dpdk.org (Postfix) with ESMTP id D5A9240E11; Tue, 18 Jun 2024 09:12:30 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694746tiyaf01 X-QQ-Originating-IP: 1M2mU2BdYrY1KTRXKbig+Wo5CBx0DZPyIPfViVxa6wQ= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:25 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 15075437092877475305 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 15/19] net/ngbe: fix memory leak Date: Tue, 18 Jun 2024 15:11:46 +0800 Message-Id: <20240618071150.21564-16-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Fix some memory leaks caused by not release resource in time. Fixes: 43b7e5ea60ac ("net/ngbe: support Rx queue setup/release") Fixes: a58e7c312c6b ("net/ngbe: support Tx queue setup/release") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/ngbe/ngbe_rxtx.c | 8 ++++++++ drivers/net/ngbe/ngbe_rxtx.h | 2 ++ 2 files changed, 10 insertions(+) diff --git a/drivers/net/ngbe/ngbe_rxtx.c b/drivers/net/ngbe/ngbe_rxtx.c index c54c67f7ee..507bd3d526 100644 --- a/drivers/net/ngbe/ngbe_rxtx.c +++ b/drivers/net/ngbe/ngbe_rxtx.c @@ -1813,6 +1813,7 @@ ngbe_tx_queue_release(struct ngbe_tx_queue *txq) if (txq->ops != NULL) { txq->ops->release_mbufs(txq); txq->ops->free_swring(txq); + rte_memzone_free(txq->mz); } rte_free(txq); } @@ -2030,6 +2031,7 @@ ngbe_dev_tx_queue_setup(struct rte_eth_dev *dev, return -ENOMEM; } + txq->mz = tz; txq->nb_tx_desc = nb_desc; txq->tx_free_thresh = tx_free_thresh; txq->pthresh = tx_conf->tx_thresh.pthresh; @@ -2138,6 +2140,7 @@ ngbe_rx_queue_release(struct ngbe_rx_queue *rxq) ngbe_rx_queue_release_mbufs(rxq); rte_free(rxq->sw_ring); rte_free(rxq->sw_sc_ring); + rte_memzone_free(rxq->mz); rte_free(rxq); } } @@ -2228,6 +2231,10 @@ ngbe_reset_rx_queue(struct ngbe_adapter *adapter, struct ngbe_rx_queue *rxq) rxq->rx_free_trigger = (uint16_t)(rxq->rx_free_thresh - 1); rxq->rx_tail = 0; rxq->nb_rx_hold = 0; + + if (rxq->pkt_first_seg != NULL) + rte_pktmbuf_free(rxq->pkt_first_seg); + rxq->pkt_first_seg = NULL; rxq->pkt_last_seg = NULL; @@ -2323,6 +2330,7 @@ ngbe_dev_rx_queue_setup(struct rte_eth_dev *dev, return -ENOMEM; } + rxq->mz = rz; /* * Zero init all the descriptors in the ring. */ diff --git a/drivers/net/ngbe/ngbe_rxtx.h b/drivers/net/ngbe/ngbe_rxtx.h index 41580ba0b9..7574db32d8 100644 --- a/drivers/net/ngbe/ngbe_rxtx.h +++ b/drivers/net/ngbe/ngbe_rxtx.h @@ -291,6 +291,7 @@ struct ngbe_rx_queue { struct rte_mbuf fake_mbuf; /** hold packets to return to application */ struct rte_mbuf *rx_stage[RTE_PMD_NGBE_RX_MAX_BURST * 2]; + const struct rte_memzone *mz; }; /** @@ -373,6 +374,7 @@ struct ngbe_tx_queue { uint8_t tx_deferred_start; /**< not in global dev start */ const struct ngbe_txq_ops *ops; /**< txq ops */ + const struct rte_memzone *mz; }; struct ngbe_txq_ops { From patchwork Tue Jun 18 07:11:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141246 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7978345489; Tue, 18 Jun 2024 09:15:09 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 79189427E1; Tue, 18 Jun 2024 09:13:12 +0200 (CEST) Received: from smtpbgjp3.qq.com (smtpbgjp3.qq.com [54.92.39.34]) by mails.dpdk.org (Postfix) with ESMTP id 26E1840E1F; Tue, 18 Jun 2024 09:12:30 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694748trw4xqo X-QQ-Originating-IP: bZOf6qidJVcswWHhdnGW5+nqTu8wB3YFIAJH66mgz+M= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:27 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 11714324669690390713 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH 16/19] net/txgbe: fix Rx interrupt Date: Tue, 18 Jun 2024 15:11:47 +0800 Message-Id: <20240618071150.21564-17-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Fix Rx interrupt enable failure. Fixes: a5682d28f134 ("net/txgbe: support Rx interrupt") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/txgbe_ethdev.c | 18 +++++++++--------- drivers/net/txgbe/txgbe_ethdev_vf.c | 2 +- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index 26cf7632c3..700be8f83c 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -3852,13 +3852,13 @@ txgbe_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) struct txgbe_hw *hw = TXGBE_DEV_HW(dev); if (queue_id < 32) { - mask = rd32(hw, TXGBE_IMS(0)); - mask &= (1 << queue_id); - wr32(hw, TXGBE_IMS(0), mask); + mask = rd32(hw, TXGBE_IMC(0)); + mask |= (1 << queue_id); + wr32(hw, TXGBE_IMC(0), mask); } else if (queue_id < 64) { - mask = rd32(hw, TXGBE_IMS(1)); - mask &= (1 << (queue_id - 32)); - wr32(hw, TXGBE_IMS(1), mask); + mask = rd32(hw, TXGBE_IMC(1)); + mask |= (1 << (queue_id - 32)); + wr32(hw, TXGBE_IMC(1), mask); } rte_intr_enable(intr_handle); @@ -3873,11 +3873,11 @@ txgbe_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) if (queue_id < 32) { mask = rd32(hw, TXGBE_IMS(0)); - mask &= ~(1 << queue_id); + mask |= (1 << queue_id); wr32(hw, TXGBE_IMS(0), mask); } else if (queue_id < 64) { mask = rd32(hw, TXGBE_IMS(1)); - mask &= ~(1 << (queue_id - 32)); + mask |= (1 << (queue_id - 32)); wr32(hw, TXGBE_IMS(1), mask); } @@ -3911,7 +3911,7 @@ txgbe_set_ivar_map(struct txgbe_hw *hw, int8_t direction, wr32(hw, TXGBE_IVARMISC, tmp); } else { /* rx or tx causes */ - /* Workaround for ICR lost */ + msix_vector |= TXGBE_IVAR_VLD; /* Workaround for ICR lost */ idx = ((16 * (queue & 1)) + (8 * direction)); tmp = rd32(hw, TXGBE_IVAR(queue >> 1)); tmp &= ~(0xFF << idx); diff --git a/drivers/net/txgbe/txgbe_ethdev_vf.c b/drivers/net/txgbe/txgbe_ethdev_vf.c index 87f76673d7..d075f9d232 100644 --- a/drivers/net/txgbe/txgbe_ethdev_vf.c +++ b/drivers/net/txgbe/txgbe_ethdev_vf.c @@ -971,7 +971,7 @@ txgbevf_set_ivar_map(struct txgbe_hw *hw, int8_t direction, wr32(hw, TXGBE_VFIVARMISC, tmp); } else { /* rx or tx cause */ - /* Workaround for ICR lost */ + msix_vector |= TXGBE_VFIVAR_VLD; /* Workaround for ICR lost */ idx = ((16 * (queue & 1)) + (8 * direction)); tmp = rd32(hw, TXGBE_VFIVAR(queue >> 1)); tmp &= ~(0xFF << idx); From patchwork Tue Jun 18 07:11:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141248 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D8AFD45489; Tue, 18 Jun 2024 09:15:32 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 33DDB427E6; Tue, 18 Jun 2024 09:13:15 +0200 (CEST) Received: from smtpbg153.qq.com (smtpbg153.qq.com [13.245.218.24]) by mails.dpdk.org (Postfix) with ESMTP id 83F9A40E3F for ; Tue, 18 Jun 2024 09:12:33 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694749t1aljvv X-QQ-Originating-IP: ZSjL6JBwJYUB4q0Xx5pgQhw5pIdEM7q81Pl5pJ+19xo= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:29 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 8176884446149523819 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Subject: [PATCH 17/19] net/ngbe: support Rx interrupt Date: Tue, 18 Jun 2024 15:11:48 +0800 Message-Id: <20240618071150.21564-18-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Implement Rx queue interrupt enable/disable functions. Signed-off-by: Jiawen Wu --- doc/guides/nics/features/ngbe.ini | 1 + doc/guides/nics/ngbe.rst | 1 + drivers/net/ngbe/ngbe_ethdev.c | 33 ++++++++++++++++++++++++++++++- 3 files changed, 34 insertions(+), 1 deletion(-) diff --git a/doc/guides/nics/features/ngbe.ini b/doc/guides/nics/features/ngbe.ini index 1dfd92e96b..7b1f12bf95 100644 --- a/doc/guides/nics/features/ngbe.ini +++ b/doc/guides/nics/features/ngbe.ini @@ -8,6 +8,7 @@ Speed capabilities = Y Link speed configuration = Y Link status = Y Link status event = Y +Rx interrupt = Y Free Tx mbuf on demand = Y Queue start/stop = Y Burst mode info = Y diff --git a/doc/guides/nics/ngbe.rst b/doc/guides/nics/ngbe.rst index 44d34197a6..e31600c95a 100644 --- a/doc/guides/nics/ngbe.rst +++ b/doc/guides/nics/ngbe.rst @@ -27,6 +27,7 @@ Features - Scattered and gather for TX and RX - IEEE 1588 - FW version +- Interrupt mode for RX Prerequisites diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c index d7fc4bc70b..b9618cc074 100644 --- a/drivers/net/ngbe/ngbe_ethdev.c +++ b/drivers/net/ngbe/ngbe_ethdev.c @@ -2743,6 +2743,35 @@ ngbe_uc_all_hash_table_set(struct rte_eth_dev *dev, uint8_t on) return 0; } +static int +ngbe_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) +{ + struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); + struct rte_intr_handle *intr_handle = pci_dev->intr_handle; + struct ngbe_hw *hw = ngbe_dev_hw(dev); + uint32_t mask; + + mask = rd32(hw, NGBE_IMC(0)); + mask |= (1 << queue_id); + wr32(hw, NGBE_IMC(0), mask); + rte_intr_enable(intr_handle); + + return 0; +} + +static int +ngbe_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) +{ + struct ngbe_hw *hw = ngbe_dev_hw(dev); + uint32_t mask; + + mask = rd32(hw, NGBE_IMS(0)); + mask |= (1 << queue_id); + wr32(hw, NGBE_IMS(0), mask); + + return 0; +} + /** * Set the IVAR registers, mapping interrupt causes to vectors * @param hw @@ -2770,7 +2799,7 @@ ngbe_set_ivar_map(struct ngbe_hw *hw, int8_t direction, wr32(hw, NGBE_IVARMISC, tmp); } else { /* rx or tx causes */ - /* Workaround for ICR lost */ + msix_vector |= NGBE_IVAR_VLD; /* Workaround for ICR lost */ idx = ((16 * (queue & 1)) + (8 * direction)); tmp = rd32(hw, NGBE_IVAR(queue >> 1)); tmp &= ~(0xFF << idx); @@ -3202,6 +3231,8 @@ static const struct eth_dev_ops ngbe_eth_dev_ops = { .rx_queue_release = ngbe_dev_rx_queue_release, .tx_queue_setup = ngbe_dev_tx_queue_setup, .tx_queue_release = ngbe_dev_tx_queue_release, + .rx_queue_intr_enable = ngbe_dev_rx_queue_intr_enable, + .rx_queue_intr_disable = ngbe_dev_rx_queue_intr_disable, .dev_led_on = ngbe_dev_led_on, .dev_led_off = ngbe_dev_led_off, .flow_ctrl_get = ngbe_flow_ctrl_get, From patchwork Tue Jun 18 07:11:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141250 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9DC0B424CD; Tue, 18 Jun 2024 09:15:52 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9435642D35; Tue, 18 Jun 2024 09:13:17 +0200 (CEST) Received: from smtpbg153.qq.com (smtpbg153.qq.com [13.245.218.24]) by mails.dpdk.org (Postfix) with ESMTP id 3857A4042F for ; Tue, 18 Jun 2024 09:12:34 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694751tncbq9h X-QQ-Originating-IP: AmSQHBdH0OzkFEWA3izK0XVj/d+Bm+w812kNhjtoJYE= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:30 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 6589130553408551772 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Subject: [PATCH 18/19] net/txgbe: disable LLDP by default Date: Tue, 18 Jun 2024 15:11:49 +0800 Message-Id: <20240618071150.21564-19-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org In the new firmware versions, LLDP is enabled by default to implement new features in other drivers. But it is useless in DPDK. So disable it in device initialization to prevent it from affecting hardware default behavior. Signed-off-by: Jiawen Wu --- drivers/net/txgbe/base/txgbe_eeprom.h | 3 ++ drivers/net/txgbe/base/txgbe_hw.c | 68 ++++++++++++++++++++++++--- drivers/net/txgbe/base/txgbe_hw.h | 4 +- drivers/net/txgbe/base/txgbe_mng.c | 46 ++++++++++++++++++ drivers/net/txgbe/base/txgbe_mng.h | 13 +++++ drivers/net/txgbe/base/txgbe_regs.h | 2 + drivers/net/txgbe/base/txgbe_type.h | 2 + drivers/net/txgbe/txgbe_ethdev.c | 7 +-- 8 files changed, 133 insertions(+), 12 deletions(-) diff --git a/drivers/net/txgbe/base/txgbe_eeprom.h b/drivers/net/txgbe/base/txgbe_eeprom.h index 0d89ca9ebf..c10ad45ec8 100644 --- a/drivers/net/txgbe/base/txgbe_eeprom.h +++ b/drivers/net/txgbe/base/txgbe_eeprom.h @@ -12,6 +12,9 @@ #define TXGBE_FW_VER_LEN 32 #define TXGBE_FW_N_TXEQ 0x0002000A +#define TXGBE_FW_SUPPORT_LLDP 0x0F +#define TXGBE_FW_GET_LLDP 0x11 +#define TXGBE_FW_MASK 0xFF #define TXGBE_FW_PTR 0x0F #define TXGBE_PBANUM0_PTR 0x05 diff --git a/drivers/net/txgbe/base/txgbe_hw.c b/drivers/net/txgbe/base/txgbe_hw.c index 7094551fee..dd5d3ea1fe 100644 --- a/drivers/net/txgbe/base/txgbe_hw.c +++ b/drivers/net/txgbe/base/txgbe_hw.c @@ -27,6 +27,56 @@ static s32 txgbe_mta_vector(struct txgbe_hw *hw, u8 *mc_addr); static s32 txgbe_get_san_mac_addr_offset(struct txgbe_hw *hw, u16 *san_mac_offset); +static s32 txgbe_is_lldp(struct txgbe_hw *hw) +{ + u32 tmp = 0, lldp_flash_data = 0, i; + s32 err = 0; + + if ((hw->fw_version & TXGBE_FW_MASK) >= TXGBE_FW_GET_LLDP) { + err = txgbe_hic_get_lldp(hw); + if (err == 0) + return 0; + } + + for (i = 0; i < 1024; i++) { + err = txgbe_flash_read_dword(hw, TXGBE_LLDP_REG + i * 4, &tmp); + if (err) + return err; + + if (tmp == BIT_MASK32) + break; + lldp_flash_data = tmp; + } + + if (lldp_flash_data & MS(hw->bus.lan_id, 1)) + hw->lldp_enabled = true; + else + hw->lldp_enabled = false; + + return 0; +} + +static void txgbe_disable_lldp(struct txgbe_hw *hw) +{ + s32 status = 0; + + if ((hw->fw_version & TXGBE_FW_MASK) < TXGBE_FW_SUPPORT_LLDP) + return; + + status = txgbe_is_lldp(hw); + if (status) { + PMD_INIT_LOG(INFO, "Can not get LLDP status."); + } else if (hw->lldp_enabled) { + status = txgbe_hic_set_lldp(hw, false); + if (!status) + PMD_INIT_LOG(INFO, + "LLDP detected on port %d, turn it off by default.", + hw->port_id); + else + PMD_INIT_LOG(INFO, "Can not set LLDP status."); + } +} + /** * txgbe_device_supports_autoneg_fc - Check if device supports autonegotiation * of flow control @@ -272,6 +322,8 @@ s32 txgbe_init_hw(struct txgbe_hw *hw) /* Get firmware version */ hw->phy.get_fw_version(hw, &hw->fw_version); + txgbe_disable_lldp(hw); + /* Reset the hardware */ status = hw->mac.reset_hw(hw); if (status == 0 || status == TXGBE_ERR_SFP_NOT_PRESENT) { @@ -2668,9 +2720,9 @@ s32 txgbe_prot_autoc_write_raptor(struct txgbe_hw *hw, bool locked, u64 autoc) * 1. to be sector address, when implemented erase sector command * 2. to be flash address when implemented read, write flash address * - * Return 0 on success, return 1 on failure. + * Return 0 on success, return TXGBE_ERR_TIMEOUT on failure. */ -u32 txgbe_fmgr_cmd_op(struct txgbe_hw *hw, u32 cmd, u32 cmd_addr) +s32 txgbe_fmgr_cmd_op(struct txgbe_hw *hw, u32 cmd, u32 cmd_addr) { u32 cmd_val, i; @@ -2685,22 +2737,24 @@ u32 txgbe_fmgr_cmd_op(struct txgbe_hw *hw, u32 cmd, u32 cmd_addr) } if (i == TXGBE_SPI_TIMEOUT) - return 1; + return TXGBE_ERR_TIMEOUT; return 0; } -u32 txgbe_flash_read_dword(struct txgbe_hw *hw, u32 addr) +s32 txgbe_flash_read_dword(struct txgbe_hw *hw, u32 addr, u32 *data) { - u32 status; + s32 status; status = txgbe_fmgr_cmd_op(hw, 1, addr); - if (status == 0x1) { + if (status < 0) { DEBUGOUT("Read flash timeout."); return status; } - return rd32(hw, TXGBE_SPIDAT); + *data = rd32(hw, TXGBE_SPIDAT); + + return 0; } /** diff --git a/drivers/net/txgbe/base/txgbe_hw.h b/drivers/net/txgbe/base/txgbe_hw.h index 4bf9da2d4c..1ed2892f61 100644 --- a/drivers/net/txgbe/base/txgbe_hw.h +++ b/drivers/net/txgbe/base/txgbe_hw.h @@ -112,6 +112,6 @@ s32 txgbe_prot_autoc_read_raptor(struct txgbe_hw *hw, bool *locked, u64 *value); s32 txgbe_prot_autoc_write_raptor(struct txgbe_hw *hw, bool locked, u64 value); s32 txgbe_reinit_fdir_tables(struct txgbe_hw *hw); bool txgbe_verify_lesm_fw_enabled_raptor(struct txgbe_hw *hw); -u32 txgbe_fmgr_cmd_op(struct txgbe_hw *hw, u32 cmd, u32 cmd_addr); -u32 txgbe_flash_read_dword(struct txgbe_hw *hw, u32 addr); +s32 txgbe_fmgr_cmd_op(struct txgbe_hw *hw, u32 cmd, u32 cmd_addr); +s32 txgbe_flash_read_dword(struct txgbe_hw *hw, u32 addr, u32 *data); #endif /* _TXGBE_HW_H_ */ diff --git a/drivers/net/txgbe/base/txgbe_mng.c b/drivers/net/txgbe/base/txgbe_mng.c index 029a0a1fe1..20db982891 100644 --- a/drivers/net/txgbe/base/txgbe_mng.c +++ b/drivers/net/txgbe/base/txgbe_mng.c @@ -439,3 +439,49 @@ txgbe_mng_enabled(struct txgbe_hw *hw) /* firmware does not control laser */ return false; } + +s32 txgbe_hic_get_lldp(struct txgbe_hw *hw) +{ + struct txgbe_hic_write_lldp buffer; + s32 err = 0; + + buffer.hdr.cmd = FW_LLDP_GET_CMD; + buffer.hdr.buf_len = 0x1; + buffer.hdr.cmd_or_resp.cmd_resv = FW_CEM_CMD_RESERVED; + buffer.hdr.checksum = FW_DEFAULT_CHECKSUM; + buffer.func = hw->bus.lan_id; + + err = txgbe_host_interface_command(hw, (u32 *)&buffer, sizeof(buffer), + TXGBE_HI_COMMAND_TIMEOUT, true); + if (err) + return err; + + if (buffer.hdr.cmd_or_resp.ret_status == FW_CEM_RESP_STATUS_SUCCESS) { + /* this field returns the status of LLDP */ + if (buffer.func) + hw->lldp_enabled = true; + else + hw->lldp_enabled = false; + } else { + err = TXGBE_ERR_HOST_INTERFACE_COMMAND; + } + + return err; +} + +s32 txgbe_hic_set_lldp(struct txgbe_hw *hw, bool on) +{ + struct txgbe_hic_write_lldp buffer; + + if (on) + buffer.hdr.cmd = FW_LLDP_SET_CMD_ON; + else + buffer.hdr.cmd = FW_LLDP_SET_CMD_OFF; + buffer.hdr.buf_len = 0x1; + buffer.hdr.cmd_or_resp.cmd_resv = FW_CEM_CMD_RESERVED; + buffer.hdr.checksum = FW_DEFAULT_CHECKSUM; + buffer.func = hw->bus.lan_id; + + return txgbe_host_interface_command(hw, (u32 *)&buffer, sizeof(buffer), + TXGBE_HI_COMMAND_TIMEOUT, false); +} diff --git a/drivers/net/txgbe/base/txgbe_mng.h b/drivers/net/txgbe/base/txgbe_mng.h index 24d938fecf..16775862d6 100644 --- a/drivers/net/txgbe/base/txgbe_mng.h +++ b/drivers/net/txgbe/base/txgbe_mng.h @@ -53,6 +53,9 @@ #define FW_PHY_TOKEN_RETRIES ((FW_PHY_TOKEN_WAIT * 1000) / FW_PHY_TOKEN_DELAY) #define FW_DW_OPEN_NOTIFY 0xE9 #define FW_DW_CLOSE_NOTIFY 0xEA +#define FW_LLDP_GET_CMD 0xF2 +#define FW_LLDP_SET_CMD_OFF 0xF1 +#define FW_LLDP_SET_CMD_ON 0xF0 #define TXGBE_CHECKSUM_CAP_ST_PASS 0x80658383 #define TXGBE_CHECKSUM_CAP_ST_FAIL 0x70657376 @@ -171,6 +174,13 @@ struct txgbe_hic_upg_verify { u32 action_flag; }; +struct txgbe_hic_write_lldp { + struct txgbe_hic_hdr hdr; + u8 func; + u8 pad2; + u16 pad3; +}; + s32 txgbe_hic_sr_read(struct txgbe_hw *hw, u32 addr, u8 *buf, int len); s32 txgbe_hic_sr_write(struct txgbe_hw *hw, u32 addr, u8 *buf, int len); s32 txgbe_close_notify(struct txgbe_hw *hw); @@ -181,4 +191,7 @@ s32 txgbe_hic_set_drv_ver(struct txgbe_hw *hw, u8 maj, u8 min, u8 build, s32 txgbe_hic_reset(struct txgbe_hw *hw); bool txgbe_mng_present(struct txgbe_hw *hw); bool txgbe_mng_enabled(struct txgbe_hw *hw); +s32 txgbe_hic_get_lldp(struct txgbe_hw *hw); +s32 txgbe_hic_set_lldp(struct txgbe_hw *hw, bool on); + #endif /* _TXGBE_MNG_H_ */ diff --git a/drivers/net/txgbe/base/txgbe_regs.h b/drivers/net/txgbe/base/txgbe_regs.h index a2984f1106..4ea4a2e3d8 100644 --- a/drivers/net/txgbe/base/txgbe_regs.h +++ b/drivers/net/txgbe/base/txgbe_regs.h @@ -1684,6 +1684,8 @@ enum txgbe_5tuple_protocol { #define TXGBE_ISBADDRL 0x000160 #define TXGBE_ISBADDRH 0x000164 +#define TXGBE_LLDP_REG 0x0F1000 + #define NVM_OROM_OFFSET 0x17 #define NVM_OROM_BLK_LOW 0x83 #define NVM_OROM_BLK_HI 0x84 diff --git a/drivers/net/txgbe/base/txgbe_type.h b/drivers/net/txgbe/base/txgbe_type.h index f52736cae9..4371876649 100644 --- a/drivers/net/txgbe/base/txgbe_type.h +++ b/drivers/net/txgbe/base/txgbe_type.h @@ -778,10 +778,12 @@ struct txgbe_hw { u16 vendor_id; u16 subsystem_device_id; u16 subsystem_vendor_id; + u8 port_id; u8 revision_id; bool adapter_stopped; int api_version; bool allow_unsupported_sfp; + bool lldp_enabled; bool need_crosstalk_fix; bool dev_start; bool autoneg; diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index 700be8f83c..2fabb9fc4e 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -602,15 +602,16 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused) /* Vendor and Device ID need to be set before init of shared code */ hw->back = pci_dev; + hw->port_id = eth_dev->data->port_id; hw->device_id = pci_dev->id.device_id; hw->vendor_id = pci_dev->id.vendor_id; if (pci_dev->id.subsystem_vendor_id == PCI_VENDOR_ID_WANGXUN) { hw->subsystem_device_id = pci_dev->id.subsystem_device_id; } else { - u32 ssid; + u32 ssid = 0; - ssid = txgbe_flash_read_dword(hw, 0xFFFDC); - if (ssid == 0x1) { + err = txgbe_flash_read_dword(hw, 0xFFFDC, &ssid); + if (err) { PMD_INIT_LOG(ERR, "Read of internal subsystem device id failed\n"); return -ENODEV; From patchwork Tue Jun 18 07:11:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 141249 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B9EC3424CD; Tue, 18 Jun 2024 09:15:43 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5AC5E42D27; Tue, 18 Jun 2024 09:13:16 +0200 (CEST) Received: from smtpbg150.qq.com (smtpbg150.qq.com [18.132.163.193]) by mails.dpdk.org (Postfix) with ESMTP id 4A53340E40 for ; Tue, 18 Jun 2024 09:12:35 +0200 (CEST) X-QQ-mid: bizesmtpsz1t1718694753t2u11ym X-QQ-Originating-IP: Ln+akrKQRM5eXa2pUf5hW6y3NyUaioJAhFErIcDN05s= Received: from lap-jiawenwu.trustnetic.com ( [183.159.97.141]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 18 Jun 2024 15:12:32 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 332114035339143530 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Subject: [PATCH 19/19] net/ngbe: disable LLDP by default Date: Tue, 18 Jun 2024 15:11:50 +0800 Message-Id: <20240618071150.21564-20-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20240618071150.21564-1-jiawenwu@trustnetic.com> References: <20240618071150.21564-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtpsz:trustnetic.com:qybglogicsvrgz:qybglogicsvrgz8a-1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org In the new firmware versions, LLDP is enabled by default to implement new features in other drivers. But it is useless in DPDK. So disable it in device initialization to prevent it from affecting hardware default behavior. Signed-off-by: Jiawen Wu --- drivers/net/ngbe/base/ngbe_eeprom.h | 4 ++ drivers/net/ngbe/base/ngbe_hw.c | 75 ++++++++++++++++++++++++---- drivers/net/ngbe/base/ngbe_hw.h | 4 +- drivers/net/ngbe/base/ngbe_mng.c | 46 +++++++++++++++++ drivers/net/ngbe/base/ngbe_mng.h | 13 +++++ drivers/net/ngbe/base/ngbe_phy_mvl.c | 2 +- drivers/net/ngbe/base/ngbe_regs.h | 2 + drivers/net/ngbe/base/ngbe_type.h | 2 + drivers/net/ngbe/ngbe_ethdev.c | 7 +-- 9 files changed, 138 insertions(+), 17 deletions(-) diff --git a/drivers/net/ngbe/base/ngbe_eeprom.h b/drivers/net/ngbe/base/ngbe_eeprom.h index 26ac686723..68c4296b50 100644 --- a/drivers/net/ngbe/base/ngbe_eeprom.h +++ b/drivers/net/ngbe/base/ngbe_eeprom.h @@ -11,6 +11,10 @@ #define NGBE_CALSUM_CAP_STATUS 0x10224 #define NGBE_EEPROM_VERSION_STORE_REG 0x1022C +#define NGBE_FW_SUPPORT_LLDP 0x19 +#define NGBE_FW_GET_LLDP 0x1B +#define NGBE_FW_MASK 0xFF + s32 ngbe_init_eeprom_params(struct ngbe_hw *hw); s32 ngbe_validate_eeprom_checksum_em(struct ngbe_hw *hw, u16 *checksum_val); s32 ngbe_get_eeprom_semaphore(struct ngbe_hw *hw); diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c index 0f1a5b9f8d..e8dda8d460 100644 --- a/drivers/net/ngbe/base/ngbe_hw.c +++ b/drivers/net/ngbe/base/ngbe_hw.c @@ -10,6 +10,56 @@ #include "ngbe_mng.h" #include "ngbe_hw.h" +static s32 ngbe_is_lldp(struct ngbe_hw *hw) +{ + u32 tmp = 0, lldp_flash_data = 0, i; + s32 err = 0; + + if ((hw->eeprom_id & NGBE_FW_MASK) >= NGBE_FW_GET_LLDP) { + err = ngbe_hic_get_lldp(hw); + if (err == 0) + return 0; + } + + for (i = 0; i < 1024; i++) { + err = ngbe_flash_read_dword(hw, NGBE_LLDP_REG + i * 4, &tmp); + if (err) + return err; + + if (tmp == BIT_MASK32) + break; + lldp_flash_data = tmp; + } + + if (lldp_flash_data & MS(hw->bus.lan_id, 1)) + hw->lldp_enabled = true; + else + hw->lldp_enabled = false; + + return 0; +} + +static void ngbe_disable_lldp(struct ngbe_hw *hw) +{ + s32 err = 0; + + if ((hw->eeprom_id & NGBE_FW_MASK) < NGBE_FW_SUPPORT_LLDP) + return; + + err = ngbe_is_lldp(hw); + if (err) { + PMD_INIT_LOG(INFO, "Can not get LLDP status."); + } else if (hw->lldp_enabled) { + err = ngbe_hic_set_lldp(hw, false); + if (!err) + PMD_INIT_LOG(INFO, + "LLDP detected on port %d, turn it off by default.", + hw->port_id); + else + PMD_INIT_LOG(INFO, "Can not set LLDP status."); + } +} + /** * ngbe_start_hw - Prepare hardware for Tx/Rx * @hw: pointer to hardware structure @@ -55,6 +105,7 @@ s32 ngbe_init_hw(struct ngbe_hw *hw) ngbe_read_efuse(hw); ngbe_save_eeprom_version(hw); + ngbe_disable_lldp(hw); /* Reset the hardware */ status = hw->mac.reset_hw(hw); @@ -1816,9 +1867,9 @@ s32 ngbe_enable_rx_dma(struct ngbe_hw *hw, u32 regval) * 1. to be sector address, when implemented erase sector command * 2. to be flash address when implemented read, write flash address * - * Return 0 on success, return 1 on failure. + * Return 0 on success, return NGBE_ERR_TIMEOUT on failure. */ -u32 ngbe_fmgr_cmd_op(struct ngbe_hw *hw, u32 cmd, u32 cmd_addr) +s32 ngbe_fmgr_cmd_op(struct ngbe_hw *hw, u32 cmd, u32 cmd_addr) { u32 cmd_val, i; @@ -1832,33 +1883,35 @@ u32 ngbe_fmgr_cmd_op(struct ngbe_hw *hw, u32 cmd, u32 cmd_addr) usec_delay(10); } if (i == NGBE_SPI_TIMEOUT) - return 1; + return NGBE_ERR_TIMEOUT; return 0; } -u32 ngbe_flash_read_dword(struct ngbe_hw *hw, u32 addr) +s32 ngbe_flash_read_dword(struct ngbe_hw *hw, u32 addr, u32 *data) { - u32 status; + s32 status; status = ngbe_fmgr_cmd_op(hw, 1, addr); - if (status == 0x1) { + if (status < 0) { DEBUGOUT("Read flash timeout."); return status; } - return rd32(hw, NGBE_SPIDAT); + *data = rd32(hw, NGBE_SPIDAT); + + return 0; } void ngbe_read_efuse(struct ngbe_hw *hw) { - u32 efuse[2]; + u32 efuse[2] = {0, 0}; u8 lan_id = hw->bus.lan_id; - efuse[0] = ngbe_flash_read_dword(hw, 0xfe010 + lan_id * 8); - efuse[1] = ngbe_flash_read_dword(hw, 0xfe010 + lan_id * 8 + 4); + ngbe_flash_read_dword(hw, 0xfe010 + lan_id * 8, &efuse[0]); + ngbe_flash_read_dword(hw, 0xfe010 + lan_id * 8 + 4, &efuse[1]); - DEBUGOUT("port %d efuse[0] = %08x, efuse[1] = %08x\n", + DEBUGOUT("port %d efuse[0] = %08x, efuse[1] = %08x", lan_id, efuse[0], efuse[1]); hw->gphy_efuse[0] = efuse[0]; diff --git a/drivers/net/ngbe/base/ngbe_hw.h b/drivers/net/ngbe/base/ngbe_hw.h index b9805af499..26a7ff4e83 100644 --- a/drivers/net/ngbe/base/ngbe_hw.h +++ b/drivers/net/ngbe/base/ngbe_hw.h @@ -84,8 +84,8 @@ s32 ngbe_enable_rx_dma(struct ngbe_hw *hw, u32 regval); void ngbe_map_device_id(struct ngbe_hw *hw); void ngbe_read_efuse(struct ngbe_hw *hw); -u32 ngbe_fmgr_cmd_op(struct ngbe_hw *hw, u32 cmd, u32 cmd_addr); -u32 ngbe_flash_read_dword(struct ngbe_hw *hw, u32 addr); +s32 ngbe_fmgr_cmd_op(struct ngbe_hw *hw, u32 cmd, u32 cmd_addr); +s32 ngbe_flash_read_dword(struct ngbe_hw *hw, u32 addr, u32 *data); void ngbe_set_ncsi_status(struct ngbe_hw *hw); #endif /* _NGBE_HW_H_ */ diff --git a/drivers/net/ngbe/base/ngbe_mng.c b/drivers/net/ngbe/base/ngbe_mng.c index ad9372bec2..df6f60c443 100644 --- a/drivers/net/ngbe/base/ngbe_mng.c +++ b/drivers/net/ngbe/base/ngbe_mng.c @@ -379,3 +379,49 @@ s32 ngbe_phy_led_oem_chk(struct ngbe_hw *hw, u32 *data) return err; } + +s32 ngbe_hic_get_lldp(struct ngbe_hw *hw) +{ + struct ngbe_hic_write_lldp buffer; + s32 err = 0; + + buffer.hdr.cmd = FW_LLDP_GET_CMD; + buffer.hdr.buf_len = 0x1; + buffer.hdr.cmd_or_resp.cmd_resv = FW_CEM_CMD_RESERVED; + buffer.hdr.checksum = FW_DEFAULT_CHECKSUM; + buffer.func = hw->bus.lan_id; + + err = ngbe_host_interface_command(hw, (u32 *)&buffer, sizeof(buffer), + NGBE_HI_COMMAND_TIMEOUT, true); + if (err) + return err; + + if (buffer.hdr.cmd_or_resp.ret_status == FW_CEM_RESP_STATUS_SUCCESS) { + /* this field returns the status of LLDP */ + if (buffer.func) + hw->lldp_enabled = true; + else + hw->lldp_enabled = false; + } else { + err = NGBE_ERR_HOST_INTERFACE_COMMAND; + } + + return err; +} + +s32 ngbe_hic_set_lldp(struct ngbe_hw *hw, bool on) +{ + struct ngbe_hic_write_lldp buffer; + + if (on) + buffer.hdr.cmd = FW_LLDP_SET_CMD_ON; + else + buffer.hdr.cmd = FW_LLDP_SET_CMD_OFF; + buffer.hdr.buf_len = 0x1; + buffer.hdr.cmd_or_resp.cmd_resv = FW_CEM_CMD_RESERVED; + buffer.hdr.checksum = FW_DEFAULT_CHECKSUM; + buffer.func = hw->bus.lan_id; + + return ngbe_host_interface_command(hw, (u32 *)&buffer, sizeof(buffer), + NGBE_HI_COMMAND_TIMEOUT, false); +} diff --git a/drivers/net/ngbe/base/ngbe_mng.h b/drivers/net/ngbe/base/ngbe_mng.h index 7dee6053f9..081ca5977a 100644 --- a/drivers/net/ngbe/base/ngbe_mng.h +++ b/drivers/net/ngbe/base/ngbe_mng.h @@ -28,6 +28,10 @@ #define FW_EEPROM_CHECK_STATUS 0xE9 #define FW_PHY_LED_CONF 0xF1 #define FW_READ_SHADOW_RAM_GPIO 0xB4 +#define FW_LLDP_GET_CMD 0xF5 +#define FW_LLDP_SET_CMD_OFF 0xF3 +#define FW_LLDP_SET_CMD_ON 0xF2 +#define FW_CEM_CMD_RESERVED 0X0 #define FW_CHECKSUM_CAP_ST_PASS 0x80658383 #define FW_CHECKSUM_CAP_ST_FAIL 0x70657376 @@ -97,6 +101,13 @@ struct ngbe_hic_write_pcie { u32 data; }; +struct ngbe_hic_write_lldp { + struct ngbe_hic_hdr hdr; + u8 func; + u8 pad2; + u16 pad3; +}; + s32 ngbe_hic_sr_read(struct ngbe_hw *hw, u32 addr, u8 *buf, int len); s32 ngbe_hic_sr_write(struct ngbe_hw *hw, u32 addr, u8 *buf, int len); s32 ngbe_hic_pcie_read(struct ngbe_hw *hw, u16 addr, u32 *buf, int len); @@ -104,5 +115,7 @@ s32 ngbe_hic_pcie_write(struct ngbe_hw *hw, u16 addr, u32 *buf, int len); s32 ngbe_hic_check_cap(struct ngbe_hw *hw); s32 ngbe_phy_led_oem_chk(struct ngbe_hw *hw, u32 *data); +s32 ngbe_hic_get_lldp(struct ngbe_hw *hw); +s32 ngbe_hic_set_lldp(struct ngbe_hw *hw, bool on); #endif /* _NGBE_MNG_H_ */ diff --git a/drivers/net/ngbe/base/ngbe_phy_mvl.c b/drivers/net/ngbe/base/ngbe_phy_mvl.c index 8746a72eb3..36128265fd 100644 --- a/drivers/net/ngbe/base/ngbe_phy_mvl.c +++ b/drivers/net/ngbe/base/ngbe_phy_mvl.c @@ -53,7 +53,7 @@ s32 ngbe_check_phy_mode_mvl(struct ngbe_hw *hw) u8 value = 0; u32 phy_mode = 0; - phy_mode = ngbe_flash_read_dword(hw, 0xFF010); + ngbe_flash_read_dword(hw, 0xFF010, &phy_mode); value = (u8)(phy_mode >> (hw->bus.lan_id * 8)); if (MVL_GEN_CTL_MODE(value) == MVL_GEN_CTL_MODE_COPPER) { diff --git a/drivers/net/ngbe/base/ngbe_regs.h b/drivers/net/ngbe/base/ngbe_regs.h index c0e79a2ba7..8a6776b0e6 100644 --- a/drivers/net/ngbe/base/ngbe_regs.h +++ b/drivers/net/ngbe/base/ngbe_regs.h @@ -1257,6 +1257,8 @@ enum ngbe_5tuple_protocol { #define NGBE_MDIOMODE_PRT1CL22 MS(1, 0x1) #define NGBE_MDIOMODE_PRT0CL22 MS(0, 0x1) +#define NGBE_LLDP_REG 0x0F1000 + #define NVM_OROM_OFFSET 0x17 #define NVM_OROM_BLK_LOW 0x83 #define NVM_OROM_BLK_HI 0x84 diff --git a/drivers/net/ngbe/base/ngbe_type.h b/drivers/net/ngbe/base/ngbe_type.h index 1b74b7a61f..a987bbe25b 100644 --- a/drivers/net/ngbe/base/ngbe_type.h +++ b/drivers/net/ngbe/base/ngbe_type.h @@ -455,10 +455,12 @@ struct ngbe_hw { u16 sub_device_id; u16 sub_system_id; u32 eeprom_id; + u8 port_id; u8 revision_id; bool adapter_stopped; bool wol_enabled; bool ncsi_enabled; + bool lldp_enabled; uint64_t isb_dma; void IOMEM *isb_mem; diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c index b9618cc074..23a452cacd 100644 --- a/drivers/net/ngbe/ngbe_ethdev.c +++ b/drivers/net/ngbe/ngbe_ethdev.c @@ -371,15 +371,16 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused) /* Vendor and Device ID need to be set before init of shared code */ hw->back = pci_dev; + hw->port_id = eth_dev->data->port_id; hw->device_id = pci_dev->id.device_id; hw->vendor_id = pci_dev->id.vendor_id; if (pci_dev->id.subsystem_vendor_id == PCI_VENDOR_ID_WANGXUN) { hw->sub_system_id = pci_dev->id.subsystem_device_id; } else { - u32 ssid; + u32 ssid = 0; - ssid = ngbe_flash_read_dword(hw, 0xFFFDC); - if (ssid == 0x1) { + err = ngbe_flash_read_dword(hw, 0xFFFDC, &ssid); + if (err) { PMD_INIT_LOG(ERR, "Read of internal subsystem device id failed\n"); return -ENODEV;