From patchwork Mon Mar 4 12:33:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Bhansali X-Patchwork-Id: 137913 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 036DA43B9B; Mon, 4 Mar 2024 13:34:49 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 87BC942E28; Mon, 4 Mar 2024 13:33:51 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 194CA42E28 for ; Mon, 4 Mar 2024 13:33:49 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 4247a7NN025200 for ; Mon, 4 Mar 2024 04:33:49 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding:content-type; s=pfpt0220; bh=pE3iT1xj kJGGdySh8RSPzUtP/pAy5ghJWP/2rgiLz+Y=; b=JEDdulA9/mMBDgDJnVHwve5o rIpnjBnkabmX8OcZpbv/XdiQ3TyuH2lsuo+lKjsyucT8qfK1ZHaLx7cQGGraKctr rWQn9OgkdeoO02boe4/2Ael2017tR89Cd2F47FLDu1BueIwvpX/nX2W6uGZSKMaw xZH6Pd3SvM8dqJYG8ePzf+hUY49UUlr1Zem6eAZKtQgqD3gZVO64KTZ4IuT3/uBF oWbIpheQJo+76rVXVo2/4edg3e/xz2h8o8QFCVj3SZd5Ztq1hbvIz3ahA7oS/3vw 7cvp7uAT1x3aGSHVirbb3ciprYlqfH6vtLP+TXv4l+hHgE/44rF/g1r+I/+A/Q== Received: from dc6wp-exch02.marvell.com ([4.21.29.225]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3wm4gmmudw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Mon, 04 Mar 2024 04:33:49 -0800 (PST) Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Mon, 4 Mar 2024 04:33:48 -0800 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Mon, 4 Mar 2024 04:33:48 -0800 Received: from localhost.localdomain (unknown [10.28.36.158]) by maili.marvell.com (Postfix) with ESMTP id B31643F703F; Mon, 4 Mar 2024 04:33:45 -0800 (PST) From: Rahul Bhansali To: , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Harman Kalra CC: , Rahul Bhansali Subject: [PATCH] common/cnxk: fix loopback port dataflow issue Date: Mon, 4 Mar 2024 18:03:35 +0530 Message-ID: <20240304123335.1769854-1-rbhansali@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: Yi-WptnDOkRPV3IOxmYiDpUbWZpGe-uF X-Proofpoint-GUID: Yi-WptnDOkRPV3IOxmYiDpUbWZpGe-uF X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-04_08,2024-03-04_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org With loopback interface and IPsec Inbound traffic, getting NIX_CQERRINT_CPT_DROP interrupt and dataflow is stopped. This is due to flow control configuration is skipped as roc_nix_is_esw() returns true for loopback device also. Fixes: 978dc3a13f7b ("common/cnxk: base support for eswitch VF") Fixes: f812768a9e66 ("net/cnxk: support eswitch VF as ethernet device") Signed-off-by: Rahul Bhansali --- drivers/common/cnxk/roc_nix.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/common/cnxk/roc_nix.c b/drivers/common/cnxk/roc_nix.c index 20202788b5..041621dfaa 100644 --- a/drivers/common/cnxk/roc_nix.c +++ b/drivers/common/cnxk/roc_nix.c @@ -385,8 +385,9 @@ sdp_lbk_id_update(struct plt_pci_device *pci_dev, struct nix *nix) nix->sdp_link = true; break; case PCI_DEVID_CNXK_RVU_AF_VF: - case PCI_DEVID_CNXK_RVU_ESWITCH_VF: nix->lbk_link = true; + break; + case PCI_DEVID_CNXK_RVU_ESWITCH_VF: nix->esw_link = true; break; default: