From patchwork Thu Feb 22 12:45:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 137034 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0455143B74; Thu, 22 Feb 2024 13:45:26 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B67B040A79; Thu, 22 Feb 2024 13:45:21 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 50CAC402CE for ; Thu, 22 Feb 2024 13:45:19 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 41MBBwiJ015702; Thu, 22 Feb 2024 04:45:16 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=Y87XeKrPwl614i1t1cdfBLuGRp1LARhaurVPMTiH2Bk=; b=G+Y 8cleQDkYr2v2QLeANyfgWNcjCk3feNjdFbIhMWXqts2J42bpr79JF17l5E05RRKT OYc5Qh2zQ2mh4t9ZhOHWMER5i0wTNKBpXN8tJqMiPm8+cuJFaL/HcvuhaQ+yWLwY JiMfl1L7WLjtGLDHgYeztUFQEgrsuYpbuR85ekWIC48bGs4LSv2ml/P7q9LXL71f bOS7RIPiOxH3Fnn8OV/ZP3aVUnEzKOsOdXivTjdvBZHlKd2qvVR3ZqQWDCU14FUw t2IVe1YL/mATGFWaiAmU02Pp7NBjlJGIs8GhIlEzZewVK4HLRs1RsoTWqe2QdmgO YgpGLqnwRviyDWsGR+Q== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3wd21kge2k-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 22 Feb 2024 04:45:16 -0800 (PST) Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Thu, 22 Feb 2024 04:45:10 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Thu, 22 Feb 2024 04:45:10 -0800 Received: from MININT-80QBFE8.corp.innovium.com (unknown [10.28.164.106]) by maili.marvell.com (Postfix) with ESMTP id 2633D3F725B; Thu, 22 Feb 2024 04:45:07 -0800 (PST) From: To: , , , , Ruifeng Wang , "Bruce Richardson" CC: , Pavan Nikhilesh Subject: [PATCH v5 1/3] config/arm: avoid mcpu and march conflicts Date: Thu, 22 Feb 2024 18:15:01 +0530 Message-ID: <20240222124503.17043-1-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240221202018.14179-1-pbhagavatula@marvell.com> References: <20240221202018.14179-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: _NsVrb2P-X7XRdmopDeNZpI_BsoyW4Vl X-Proofpoint-ORIG-GUID: _NsVrb2P-X7XRdmopDeNZpI_BsoyW4Vl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-22_09,2024-02-22_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh The compiler options march and mtune are a subset of mcpu and will lead to conflicts if improper march is chosen for a given mcpu. To avoid conflicts, discard part number march when mcpu is available and is supported by the compiler. Example: march = armv9-a mcpu = neoverse-n2 mcpu supported, march supported machine_args = ['-mcpu=neoverse-n2'] mcpu supported, march not supported machine_args = ['-mcpu=neoverse-n2'] mcpu not supported, march supported machine_args = ['-march=armv9-a'] mcpu not supported, march not supported machine_args = ['-march=armv8.6-a'] Signed-off-by: Pavan Nikhilesh Reviewed-by: Juraj Linkeš --- v2 Changes: - Cleanup march inconsistencies. (Juraj Linkes) - Unify fallback march selection. (Juraj Linkes) - Tag along ARM WFE patch. v3 Changes: - Fix missing 'fallback_march' key check. v4 Changes: - Discard march when mcpu is supported. v5 Changes: - Consolidate mcpu and march checks. (Juraj Linkes) - Fix unintentionally skipping fallback march (Juraj Linkes) config/arm/meson.build | 116 +++++++++++++++++++++++++---------------- 1 file changed, 71 insertions(+), 45 deletions(-) -- 2.25.1 diff --git a/config/arm/meson.build b/config/arm/meson.build index 36f21d2259..d05d54b564 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -58,18 +58,18 @@ implementer_generic = { } part_number_config_arm = { - '0xd03': {'compiler_options': ['-mcpu=cortex-a53']}, - '0xd04': {'compiler_options': ['-mcpu=cortex-a35']}, - '0xd05': {'compiler_options': ['-mcpu=cortex-a55']}, - '0xd07': {'compiler_options': ['-mcpu=cortex-a57']}, - '0xd08': {'compiler_options': ['-mcpu=cortex-a72']}, - '0xd09': {'compiler_options': ['-mcpu=cortex-a73']}, - '0xd0a': {'compiler_options': ['-mcpu=cortex-a75']}, - '0xd0b': {'compiler_options': ['-mcpu=cortex-a76']}, + '0xd03': {'mcpu': 'cortex-a53'}, + '0xd04': {'mcpu': 'cortex-a35'}, + '0xd05': {'mcpu': 'cortex-a55'}, + '0xd07': {'mcpu': 'cortex-a57'}, + '0xd08': {'mcpu': 'cortex-a72'}, + '0xd09': {'mcpu': 'cortex-a73'}, + '0xd0a': {'mcpu': 'cortex-a75'}, + '0xd0b': {'mcpu': 'cortex-a76'}, '0xd0c': { 'march': 'armv8.2-a', 'march_features': ['crypto', 'rcpc'], - 'compiler_options': ['-mcpu=neoverse-n1'], + 'mcpu': 'neoverse-n1', 'flags': [ ['RTE_MACHINE', '"neoverse-n1"'], ['RTE_ARM_FEATURE_ATOMICS', true], @@ -81,7 +81,7 @@ part_number_config_arm = { '0xd40': { 'march': 'armv8.4-a', 'march_features': ['sve'], - 'compiler_options': ['-mcpu=neoverse-v1'], + 'mcpu': 'neoverse-v1', 'flags': [ ['RTE_MACHINE', '"neoverse-v1"'], ['RTE_ARM_FEATURE_ATOMICS', true], @@ -92,8 +92,9 @@ part_number_config_arm = { 'march': 'armv8.4-a', }, '0xd49': { + 'march': 'armv9-a', 'march_features': ['sve2'], - 'compiler_options': ['-mcpu=neoverse-n2'], + 'mcpu': 'neoverse-n2', 'flags': [ ['RTE_MACHINE', '"neoverse-n2"'], ['RTE_ARM_FEATURE_ATOMICS', true], @@ -127,21 +128,23 @@ implementer_cavium = { ], 'part_number_config': { '0xa1': { - 'compiler_options': ['-mcpu=thunderxt88'], + 'mcpu': 'thunderxt88', 'flags': flags_part_number_thunderx }, '0xa2': { - 'compiler_options': ['-mcpu=thunderxt81'], + 'mcpu': 'thunderxt81', 'flags': flags_part_number_thunderx }, '0xa3': { - 'compiler_options': ['-march=armv8-a+crc', '-mcpu=thunderxt83'], + 'march': 'armv8-a', + 'march_features': ['crc'], + 'mcpu': 'thunderxt83', 'flags': flags_part_number_thunderx }, '0xaf': { 'march': 'armv8.1-a', 'march_features': ['crc', 'crypto'], - 'compiler_options': ['-mcpu=thunderx2t99'], + 'mcpu': 'thunderx2t99', 'flags': [ ['RTE_MACHINE', '"thunderx2"'], ['RTE_ARM_FEATURE_ATOMICS', true], @@ -153,7 +156,7 @@ implementer_cavium = { '0xb2': { 'march': 'armv8.2-a', 'march_features': ['crc', 'crypto', 'lse'], - 'compiler_options': ['-mcpu=octeontx2'], + 'mcpu': 'octeontx2', 'flags': [ ['RTE_MACHINE', '"cn9k"'], ['RTE_ARM_FEATURE_ATOMICS', true], @@ -176,7 +179,7 @@ implementer_ampere = { '0x0': { 'march': 'armv8-a', 'march_features': ['crc', 'crypto'], - 'compiler_options': ['-mtune=emag'], + 'mcpu': 'emag', 'flags': [ ['RTE_MACHINE', '"eMAG"'], ['RTE_MAX_LCORE', 32], @@ -186,7 +189,7 @@ implementer_ampere = { '0xac3': { 'march': 'armv8.6-a', 'march_features': ['crc', 'crypto'], - 'compiler_options': ['-mcpu=ampere1'], + 'mcpu': 'ampere1', 'flags': [ ['RTE_MACHINE', '"AmpereOne"'], ['RTE_MAX_LCORE', 320], @@ -206,7 +209,7 @@ implementer_hisilicon = { '0xd01': { 'march': 'armv8.2-a', 'march_features': ['crypto'], - 'compiler_options': ['-mtune=tsv110'], + 'mcpu': 'tsv110', 'flags': [ ['RTE_MACHINE', '"Kunpeng 920"'], ['RTE_ARM_FEATURE_ATOMICS', true], @@ -695,13 +698,37 @@ if update_flags machine_args = [] # Clear previous machine args - # probe supported archs and their features + march_features = [] + if part_number_config.has_key('march_features') + march_features += part_number_config['march_features'] + endif + if soc_config.has_key('extra_march_features') + march_features += soc_config['extra_march_features'] + endif + + candidate_mcpu = '' candidate_march = '' - if part_number_config.has_key('march') + + if part_number_config.has_key('mcpu') and + cc.has_argument('-mcpu=' + part_number_config['mcpu']) + candidate_mcpu = '-mcpu=' + part_number_config['mcpu'] + foreach feature: march_features + if cc.has_argument('+'.join([candidate_mcpu, feature])) + candidate_mcpu = '+'.join([candidate_mcpu, feature]) + else + warning('The compiler does not support feature @0@' + .format(feature)) + endif + endforeach + machine_args += candidate_mcpu + elif part_number_config.has_key('march') + # probe supported archs and their features if part_number_config.get('force_march', false) - candidate_march = part_number_config['march'] + if cc.has_argument('-march=' + part_number_config['march']) + candidate_march = part_number_config['march'] + endif else - supported_marchs = ['armv8.6-a', 'armv8.5-a', 'armv8.4-a', 'armv8.3-a', + supported_marchs = ['armv9-a', 'armv8.6-a', 'armv8.5-a', 'armv8.4-a', 'armv8.3-a', 'armv8.2-a', 'armv8.1-a', 'armv8-a'] check_compiler_support = false foreach supported_march: supported_marchs @@ -717,32 +744,31 @@ if update_flags endif endforeach endif - if candidate_march == '' - error('No suitable armv8 march version found.') - endif + if candidate_march != part_number_config['march'] - warning('Configuration march version is ' + - '@0@, but the compiler supports only @1@.' - .format(part_number_config['march'], candidate_march)) + warning('Configuration march version is @0@, not supported.' + .format(part_number_config['march'])) + if candidate_march != '' + warning('Using march version @0@.'.format(candidate_march)) + endif endif - candidate_march = '-march=' + candidate_march - march_features = [] - if part_number_config.has_key('march_features') - march_features += part_number_config['march_features'] - endif - if soc_config.has_key('extra_march_features') - march_features += soc_config['extra_march_features'] + if candidate_march != '' + candidate_march = '-march=' + candidate_march + foreach feature: march_features + if cc.has_argument('+'.join([candidate_march, feature])) + candidate_march = '+'.join([candidate_march, feature]) + else + warning('The compiler does not support feature @0@' + .format(feature)) + endif + endforeach + machine_args += candidate_march endif - foreach feature: march_features - if cc.has_argument('+'.join([candidate_march, feature])) - candidate_march = '+'.join([candidate_march, feature]) - else - warning('The compiler does not support feature @0@' - .format(feature)) - endif - endforeach - machine_args += candidate_march + endif + + if candidate_mcpu == '' and candidate_march == '' + error('No suitable ARM march/mcpu version found.') endif # apply supported compiler options From patchwork Thu Feb 22 12:45:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 137033 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CDA5543B74; Thu, 22 Feb 2024 13:45:20 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9F967402CE; Thu, 22 Feb 2024 13:45:20 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 4C17C40281 for ; Thu, 22 Feb 2024 13:45:19 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 41MB9Bcj010408; Thu, 22 Feb 2024 04:45:16 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=HN9zh2njKahMsQMLCfrvUF8HhcV7BPKZiQe/F+ky3iQ=; b=IOB 95+NW41K5CV/P9yLHTdbLHJXykpPwkHgKDGin3ipx0ufVDErtPcU28UBCrCHFFxd KHcdf9PJI+iX8G2kWY/A4MvGkjLR6uByJyvvqJQ3WMg+r/jw2aB5/yNRZJZYdgQ8 vo3HiaJAZaqpJtIUYjvXWtCKWOjmIIqmdZCI6lnY/OUDCr8+FK3GadpxsZ7HhvJk fF01Ax2gjOcanxXS3UBh7Pp4W26/vnfESZxdQdxPTvbtjHWgQwjcnNTmkWEqmN63 Oc9q7b/keW9u8NiDdXDQMTQGedgitw8Vy2vfxrombbQprgq9EyIBpffRP4Ubb7s1 GcgoZtn6ojAEDAiyRFQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3wd21kge2r-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 22 Feb 2024 04:45:15 -0800 (PST) Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Thu, 22 Feb 2024 04:45:13 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Thu, 22 Feb 2024 04:45:13 -0800 Received: from MININT-80QBFE8.corp.innovium.com (unknown [10.28.164.106]) by maili.marvell.com (Postfix) with ESMTP id 4992A3F725A; Thu, 22 Feb 2024 04:45:11 -0800 (PST) From: To: , , , , Ruifeng Wang , "Bruce Richardson" CC: , Pavan Nikhilesh Subject: [PATCH v5 2/3] config/arm: add support for fallback march Date: Thu, 22 Feb 2024 18:15:02 +0530 Message-ID: <20240222124503.17043-2-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240222124503.17043-1-pbhagavatula@marvell.com> References: <20240221202018.14179-1-pbhagavatula@marvell.com> <20240222124503.17043-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: Lz0QFzUi_0gsIl7rxepxC0suIwlcpNza X-Proofpoint-ORIG-GUID: Lz0QFzUi_0gsIl7rxepxC0suIwlcpNza X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-22_09,2024-02-22_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Some ARM CPUs have specific march requirements and are not compatible with the supported march list. Add fallback march in case the mcpu and the march advertised in the part_number_config are not supported by the compiler. Example mcpu = neoverse-n2 march = armv9-a fallback_march = armv8.5-a mcpu, march not supported machine_args = ['-march=armv8.5-a'] mcpu, march, fallback_march not supported least march supported = armv8-a machine_args = ['-march=armv8-a'] Signed-off-by: Pavan Nikhilesh Reviewed-by: Juraj Linkeš --- config/arm/meson.build | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index d05d54b564..87ff5039f6 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -94,6 +94,7 @@ part_number_config_arm = { '0xd49': { 'march': 'armv9-a', 'march_features': ['sve2'], + 'fallback_march': 'armv8.5-a', 'mcpu': 'neoverse-n2', 'flags': [ ['RTE_MACHINE', '"neoverse-n2"'], @@ -708,6 +709,7 @@ if update_flags candidate_mcpu = '' candidate_march = '' + fallback_march = '' if part_number_config.has_key('mcpu') and cc.has_argument('-mcpu=' + part_number_config['mcpu']) @@ -736,16 +738,22 @@ if update_flags # start checking from this version downwards check_compiler_support = true endif - if (check_compiler_support and + if (check_compiler_support and candidate_march == '' and cc.has_argument('-march=' + supported_march)) candidate_march = supported_march - # highest supported march version found - break + endif + if (part_number_config.has_key('fallback_march') and + supported_march == part_number_config['fallback_march'] and + cc.has_argument('-march=' + supported_march)) + fallback_march = supported_march endif endforeach endif if candidate_march != part_number_config['march'] + if fallback_march != '' + candidate_march = fallback_march + endif warning('Configuration march version is @0@, not supported.' .format(part_number_config['march'])) if candidate_march != '' From patchwork Thu Feb 22 12:45:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 137035 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E433743B74; Thu, 22 Feb 2024 13:45:33 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 81C5B40DCE; Thu, 22 Feb 2024 13:45:28 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id D98F840281 for ; Thu, 22 Feb 2024 13:45:22 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 41M9BLVi021857; Thu, 22 Feb 2024 04:45:19 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; 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Thu, 22 Feb 2024 04:45:17 -0800 Received: from MININT-80QBFE8.corp.innovium.com (unknown [10.28.164.106]) by maili.marvell.com (Postfix) with ESMTP id 6E9A93F725B; Thu, 22 Feb 2024 04:45:14 -0800 (PST) From: To: , , , , Ruifeng Wang , "Bruce Richardson" CC: , Pavan Nikhilesh , Chengwen Feng , Honnappa Nagarahalli Subject: [PATCH v5 3/3] config/arm: allow WFE to be enabled config time Date: Thu, 22 Feb 2024 18:15:03 +0530 Message-ID: <20240222124503.17043-3-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240222124503.17043-1-pbhagavatula@marvell.com> References: <20240221202018.14179-1-pbhagavatula@marvell.com> <20240222124503.17043-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: nblaq-bHza4YpuVWfChGICbwMG55OxvF X-Proofpoint-ORIG-GUID: nblaq-bHza4YpuVWfChGICbwMG55OxvF X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-22_10,2024-02-22_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Allow RTE_ARM_USE_WFE to be enabled at meson configuration time by passing it via c_args instead of modifying `config/arm/meson.build`. Example usage: meson build -Dc_args='-DRTE_ARM_USE_WFE' \ --cross-file config/arm/arm64_cn10k_linux_gcc Signed-off-by: Pavan Nikhilesh Acked-by: Chengwen Feng Acked-by: Ruifeng Wang Reviewed-by: Honnappa Nagarahalli Reviewed-by: Wathsala Vithanage --- config/arm/meson.build | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 87ff5039f6..c26b8fb975 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -17,7 +17,9 @@ flags_common = [ # ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF], # ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false], - ['RTE_ARM_USE_WFE', false], + # Enable use of ARM wait for event instruction. + # ['RTE_ARM_USE_WFE', false], + ['RTE_ARCH_ARM64', true], ['RTE_CACHE_LINE_SIZE', 128] ]