From patchwork Wed Feb 21 20:20:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 136975 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D8F8D43B62; Wed, 21 Feb 2024 21:20:30 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 634A840297; Wed, 21 Feb 2024 21:20:30 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id C45B74013F for ; Wed, 21 Feb 2024 21:20:28 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 41LF7euf007606; Wed, 21 Feb 2024 12:20:25 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=m+Q6mYvMb+YRM+RAyr+Wkc2Jazb69VcyBXm4EfnCtRI=; b=AwD rHgMcNn9Q9oE/+b7i8JoKRdLZLjQfNzn1z6ortTBtuznAQXUkR7J8y7j9OqGQFon pHRARF8yxn6y7s4yJv5UtngL6hbE4qrfIAy1Te2glFKEQS4YxBCH+piQcLr1889V q+jYhnvNaDRAJfa2VrmLGDV9ZMsey7eB2T1FK4Nt203YH0FCSVM2OzCZK5Ci+Zem jPklEgpUg5ZSMXNHYZJtzzVqTrKppM9W/W3IPVSPDdyknkIC5rJcYDhAdgvS+jrj nd0Xz+Q8j0mreYa0onsG34a1P9NQ3xR+Ig06f8hBUkpUC0Apf1db5xGsM5+T2CsP SKvhYfTkmeTqwEbAjIw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3wd21kdrfp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 21 Feb 2024 12:20:25 -0800 (PST) Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 21 Feb 2024 12:20:23 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 21 Feb 2024 12:20:23 -0800 Received: from MININT-80QBFE8.corp.innovium.com (unknown [10.28.164.106]) by maili.marvell.com (Postfix) with ESMTP id E2ACB3F70AA; Wed, 21 Feb 2024 12:20:20 -0800 (PST) From: To: , , , , Ruifeng Wang , "Bruce Richardson" CC: , Pavan Nikhilesh Subject: [PATCH v4 1/3] config/arm: avoid mcpu and march conflicts Date: Thu, 22 Feb 2024 01:50:16 +0530 Message-ID: <20240221202018.14179-1-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240202085031.10237-1-pbhagavatula@marvell.com> References: <20240202085031.10237-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: 8Bphpt5611-7u5T6f6q4BZT7rpzTdQtM X-Proofpoint-ORIG-GUID: 8Bphpt5611-7u5T6f6q4BZT7rpzTdQtM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-21_07,2024-02-21_02,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh The compiler options march and mtune are a subset of mcpu and will lead to conflicts if improper march is chosen for a given mcpu. To avoid conflicts, discard part number march when mcpu is available and is supported by the compiler. Example: march = armv9-a mcpu = neoverse-n2 mcpu supported, march supported machine_args = ['-mcpu=neoverse-n2'] mcpu supported, march not supported machine_args = ['-mcpu=neoverse-n2'] mcpu not supported, march supported machine_args = ['-march=armv9-a'] mcpu not supported, march not supported machine_args = ['-march=armv8.6-a'] Signed-off-by: Pavan Nikhilesh --- v2 Changes: - Cleanup march inconsistencies. (Juraj Linkes) - Unify fallback march selection. (Juraj Linkes) - Tag along ARM WFE patch. v3 Changes: - Fix missing 'fallback_march' key check. v4 Changes: - Discard march when mcpu is supported. config/arm/meson.build | 107 +++++++++++++++++++++++++++-------------- 1 file changed, 70 insertions(+), 37 deletions(-) -- 2.25.1 diff --git a/config/arm/meson.build b/config/arm/meson.build index 36f21d2259..e77b696d8e 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -58,18 +58,18 @@ implementer_generic = { } part_number_config_arm = { - '0xd03': {'compiler_options': ['-mcpu=cortex-a53']}, - '0xd04': {'compiler_options': ['-mcpu=cortex-a35']}, - '0xd05': {'compiler_options': ['-mcpu=cortex-a55']}, - '0xd07': {'compiler_options': ['-mcpu=cortex-a57']}, - '0xd08': {'compiler_options': ['-mcpu=cortex-a72']}, - '0xd09': {'compiler_options': ['-mcpu=cortex-a73']}, - '0xd0a': {'compiler_options': ['-mcpu=cortex-a75']}, - '0xd0b': {'compiler_options': ['-mcpu=cortex-a76']}, + '0xd03': {'mcpu': 'cortex-a53'}, + '0xd04': {'mcpu': 'cortex-a35'}, + '0xd05': {'mcpu': 'cortex-a55'}, + '0xd07': {'mcpu': 'cortex-a57'}, + '0xd08': {'mcpu': 'cortex-a72'}, + '0xd09': {'mcpu': 'cortex-a73'}, + '0xd0a': {'mcpu': 'cortex-a75'}, + '0xd0b': {'mcpu': 'cortex-a76'}, '0xd0c': { 'march': 'armv8.2-a', 'march_features': ['crypto', 'rcpc'], - 'compiler_options': ['-mcpu=neoverse-n1'], + 'mcpu': 'neoverse-n1', 'flags': [ ['RTE_MACHINE', '"neoverse-n1"'], ['RTE_ARM_FEATURE_ATOMICS', true], @@ -81,7 +81,7 @@ part_number_config_arm = { '0xd40': { 'march': 'armv8.4-a', 'march_features': ['sve'], - 'compiler_options': ['-mcpu=neoverse-v1'], + 'mcpu': 'neoverse-v1', 'flags': [ ['RTE_MACHINE', '"neoverse-v1"'], ['RTE_ARM_FEATURE_ATOMICS', true], @@ -92,8 +92,9 @@ part_number_config_arm = { 'march': 'armv8.4-a', }, '0xd49': { + 'march': 'armv9-a', 'march_features': ['sve2'], - 'compiler_options': ['-mcpu=neoverse-n2'], + 'mcpu': 'neoverse-n2', 'flags': [ ['RTE_MACHINE', '"neoverse-n2"'], ['RTE_ARM_FEATURE_ATOMICS', true], @@ -127,21 +128,23 @@ implementer_cavium = { ], 'part_number_config': { '0xa1': { - 'compiler_options': ['-mcpu=thunderxt88'], + 'mcpu': 'thunderxt88', 'flags': flags_part_number_thunderx }, '0xa2': { - 'compiler_options': ['-mcpu=thunderxt81'], + 'mcpu': 'thunderxt81', 'flags': flags_part_number_thunderx }, '0xa3': { - 'compiler_options': ['-march=armv8-a+crc', '-mcpu=thunderxt83'], + 'march': 'armv8-a', + 'march_features': ['crc'], + 'mcpu': 'thunderxt83', 'flags': flags_part_number_thunderx }, '0xaf': { 'march': 'armv8.1-a', 'march_features': ['crc', 'crypto'], - 'compiler_options': ['-mcpu=thunderx2t99'], + 'mcpu': 'thunderx2t99', 'flags': [ ['RTE_MACHINE', '"thunderx2"'], ['RTE_ARM_FEATURE_ATOMICS', true], @@ -153,7 +156,7 @@ implementer_cavium = { '0xb2': { 'march': 'armv8.2-a', 'march_features': ['crc', 'crypto', 'lse'], - 'compiler_options': ['-mcpu=octeontx2'], + 'mcpu': 'octeontx2', 'flags': [ ['RTE_MACHINE', '"cn9k"'], ['RTE_ARM_FEATURE_ATOMICS', true], @@ -176,7 +179,7 @@ implementer_ampere = { '0x0': { 'march': 'armv8-a', 'march_features': ['crc', 'crypto'], - 'compiler_options': ['-mtune=emag'], + 'mcpu': 'emag', 'flags': [ ['RTE_MACHINE', '"eMAG"'], ['RTE_MAX_LCORE', 32], @@ -186,7 +189,7 @@ implementer_ampere = { '0xac3': { 'march': 'armv8.6-a', 'march_features': ['crc', 'crypto'], - 'compiler_options': ['-mcpu=ampere1'], + 'mcpu': 'ampere1', 'flags': [ ['RTE_MACHINE', '"AmpereOne"'], ['RTE_MAX_LCORE', 320], @@ -206,7 +209,7 @@ implementer_hisilicon = { '0xd01': { 'march': 'armv8.2-a', 'march_features': ['crypto'], - 'compiler_options': ['-mtune=tsv110'], + 'mcpu': 'tsv110', 'flags': [ ['RTE_MACHINE', '"Kunpeng 920"'], ['RTE_ARM_FEATURE_ATOMICS', true], @@ -695,13 +698,31 @@ if update_flags machine_args = [] # Clear previous machine args + candidate_mcpu = '' + if part_number_config.has_key('mcpu') + mcpu = part_number_config['mcpu'] + if (cc.has_argument('-mcpu=' + mcpu)) + candidate_mcpu = mcpu + endif + endif + + march_features = [] + if part_number_config.has_key('march_features') + march_features += part_number_config['march_features'] + endif + if soc_config.has_key('extra_march_features') + march_features += soc_config['extra_march_features'] + endif + # probe supported archs and their features candidate_march = '' - if part_number_config.has_key('march') + if part_number_config.has_key('march') and candidate_mcpu == '' if part_number_config.get('force_march', false) - candidate_march = part_number_config['march'] + if cc.has_argument('-march=' + part_number_config['march']) + candidate_march = part_number_config['march'] + endif else - supported_marchs = ['armv8.6-a', 'armv8.5-a', 'armv8.4-a', 'armv8.3-a', + supported_marchs = ['armv9-a', 'armv8.6-a', 'armv8.5-a', 'armv8.4-a', 'armv8.3-a', 'armv8.2-a', 'armv8.1-a', 'armv8-a'] check_compiler_support = false foreach supported_march: supported_marchs @@ -717,32 +738,44 @@ if update_flags endif endforeach endif - if candidate_march == '' - error('No suitable armv8 march version found.') - endif + if candidate_march != part_number_config['march'] - warning('Configuration march version is ' + - '@0@, but the compiler supports only @1@.' - .format(part_number_config['march'], candidate_march)) + warning('Configuration march version is @0@, not supported.' + .format(part_number_config['march'])) + if candidate_march != '' + warning('Using march version @0@.'.format(candidate_march)) + endif endif - candidate_march = '-march=' + candidate_march - march_features = [] - if part_number_config.has_key('march_features') - march_features += part_number_config['march_features'] + if candidate_march == '' and candidate_mcpu == '' + error('No suitable ARM march/mcpu version found.') endif - if soc_config.has_key('extra_march_features') - march_features += soc_config['extra_march_features'] + + if candidate_march != '' + candidate_march = '-march=' + candidate_march + foreach feature: march_features + if cc.has_argument('+'.join([candidate_march, feature])) + candidate_march = '+'.join([candidate_march, feature]) + else + warning('The compiler does not support feature @0@' + .format(feature)) + endif + endforeach + machine_args += candidate_march endif + endif + + if candidate_mcpu != '' + candidate_mcpu = '-mcpu=' + candidate_mcpu foreach feature: march_features - if cc.has_argument('+'.join([candidate_march, feature])) - candidate_march = '+'.join([candidate_march, feature]) + if cc.has_argument('+'.join([candidate_mcpu, feature])) + candidate_mcpu = '+'.join([candidate_mcpu, feature]) else warning('The compiler does not support feature @0@' .format(feature)) endif endforeach - machine_args += candidate_march + machine_args += candidate_mcpu endif # apply supported compiler options From patchwork Wed Feb 21 20:20:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 136976 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 727AC43B62; Wed, 21 Feb 2024 21:20:39 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 298ED4067D; Wed, 21 Feb 2024 21:20:35 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id DD7C140698 for ; Wed, 21 Feb 2024 21:20:32 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 41LHe4q4014835; Wed, 21 Feb 2024 12:20:28 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=lY+AzVlPDXUEYeRnlhmu4wi+Ga9MP9cXb6XlGZXdE5g=; b=VsQ K2o5qj9svgqX7Ie8T/Yrv+V3PRc0D35eXKMRogaxsHqbSFDCDaKxklJeTkjutys1 RRZQTIxmOutjcBxxsMzucmUTKKvhYdmb/KR86ElMt8T4L15wCeeTBksyV1FGfU/i dU5NB3oVWm8r/EKnI83afol0ZwjNtzEjvc2t0iyVI6ZC9kkZUQNULHSCEseMxFvD LrTTKnZKru5t67sxdEA1NvUTQiTdVFTAuV5i+rSb3UnWnuQp7suryzANNt092GYK OOepqIjYcTknX05VyLabr8FXamO+qzyfFmWO+Oi/Wnc0DYR6abhvt/1HvIC4tGHs kJ45O1WJh4GA2yJRGQQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3wdns38kcx-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 21 Feb 2024 12:20:28 -0800 (PST) Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 21 Feb 2024 12:20:26 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 21 Feb 2024 12:20:26 -0800 Received: from MININT-80QBFE8.corp.innovium.com (unknown [10.28.164.106]) by maili.marvell.com (Postfix) with ESMTP id 490C93F70A9; Wed, 21 Feb 2024 12:20:24 -0800 (PST) From: To: , , , , Ruifeng Wang , "Bruce Richardson" CC: , Pavan Nikhilesh Subject: [PATCH v4 2/3] config/arm: add support for fallback march Date: Thu, 22 Feb 2024 01:50:17 +0530 Message-ID: <20240221202018.14179-2-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240221202018.14179-1-pbhagavatula@marvell.com> References: <20240202085031.10237-1-pbhagavatula@marvell.com> <20240221202018.14179-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: mAjDjr9iJDglamRxvIX_IP-i-5mLlUfc X-Proofpoint-ORIG-GUID: mAjDjr9iJDglamRxvIX_IP-i-5mLlUfc X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-21_07,2024-02-21_02,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Some ARM CPUs have specific march requirements and are not compatible with the supported march list. Add fallback march in case the mcpu and the march advertised in the part_number_config are not supported by the compiler. Example mcpu = neoverse-n2 march = armv9-a fallback_march = armv8.5-a mcpu, march not supported machine_args = ['-march=armv8.5-a'] mcpu, march, fallback_march not supported least march supported = armv8-a machine_args = ['-march=armv8-a'] Signed-off-by: Pavan Nikhilesh --- config/arm/meson.build | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/config/arm/meson.build b/config/arm/meson.build index e77b696d8e..f6521653c8 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -94,6 +94,7 @@ part_number_config_arm = { '0xd49': { 'march': 'armv9-a', 'march_features': ['sve2'], + 'fallback_march': 'armv8.5-a', 'mcpu': 'neoverse-n2', 'flags': [ ['RTE_MACHINE', '"neoverse-n2"'], @@ -716,6 +717,7 @@ if update_flags # probe supported archs and their features candidate_march = '' + fallback_march = '' if part_number_config.has_key('march') and candidate_mcpu == '' if part_number_config.get('force_march', false) if cc.has_argument('-march=' + part_number_config['march']) @@ -736,10 +738,18 @@ if update_flags # highest supported march version found break endif + if (part_number_config.has_key('fallback_march') and + supported_march == part_number_config['fallback_march'] and + cc.has_argument('-march=' + supported_march)) + fallback_march = supported_march + endif endforeach endif if candidate_march != part_number_config['march'] + if fallback_march != '' + candidate_march = fallback_march + endif warning('Configuration march version is @0@, not supported.' .format(part_number_config['march'])) if candidate_march != '' From patchwork Wed Feb 21 20:20:18 2024 Content-Type: text/plain; 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Wed, 21 Feb 2024 12:20:30 -0800 Received: from MININT-80QBFE8.corp.innovium.com (unknown [10.28.164.106]) by maili.marvell.com (Postfix) with ESMTP id 89C943F70AD; Wed, 21 Feb 2024 12:20:27 -0800 (PST) From: To: , , , , Ruifeng Wang , "Bruce Richardson" CC: , Pavan Nikhilesh , Chengwen Feng , Honnappa Nagarahalli Subject: [PATCH v4 3/3] config/arm: allow WFE to be enabled config time Date: Thu, 22 Feb 2024 01:50:18 +0530 Message-ID: <20240221202018.14179-3-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240221202018.14179-1-pbhagavatula@marvell.com> References: <20240202085031.10237-1-pbhagavatula@marvell.com> <20240221202018.14179-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: wUbIHixBVZwdCitYl71K7O_503SLjAan X-Proofpoint-ORIG-GUID: wUbIHixBVZwdCitYl71K7O_503SLjAan X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-21_07,2024-02-21_02,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Allow RTE_ARM_USE_WFE to be enabled at meson configuration time by passing it via c_args instead of modifying `config/arm/meson.build`. Example usage: meson build -Dc_args='-DRTE_ARM_USE_WFE' \ --cross-file config/arm/arm64_cn10k_linux_gcc Signed-off-by: Pavan Nikhilesh Acked-by: Chengwen Feng Acked-by: Ruifeng Wang Reviewed-by: Honnappa Nagarahalli Reviewed-by: Wathsala Vithanage --- config/arm/meson.build | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index f6521653c8..78e80f6699 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -17,7 +17,9 @@ flags_common = [ # ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF], # ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false], - ['RTE_ARM_USE_WFE', false], + # Enable use of ARM wait for event instruction. + # ['RTE_ARM_USE_WFE', false], + ['RTE_ARCH_ARM64', true], ['RTE_CACHE_LINE_SIZE', 128] ]