From patchwork Tue Jan 16 13:01:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Duszynski X-Patchwork-Id: 135889 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 93B7F438DD; Tue, 16 Jan 2024 14:01:55 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1989840278; Tue, 16 Jan 2024 14:01:55 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 6C05540042 for ; Tue, 16 Jan 2024 14:01:53 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 40G8ZMcf021326 for ; Tue, 16 Jan 2024 05:01:51 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding:content-type; s=pfpt0220; bh=X8LbKxzg Ru1k0QQDWRAXGK21cKC8DNQvDmWB8FfvHPA=; b=S6x0I82Pu578ADRmt7gg6a0d 8PPipqXwmdktfRrA2RTjQzvL9Oi7IfF6bIw98UmW3KlHr2sTHaY8j+D3y+l1EFgf PC1q/8BqLSZZErEDC6MBBrXRYaudy2JqF/jj/N8K96R0x7yXSgQSIB92OCXnuyLX YujXCM1I4TRoihZ+q8Wa2C2GXCjE0uu+26yTKxCSRdMVdOFZGYlt8GbsVhNS0hr3 WlgHUWA9QbBOdNZOxZD6Y89kslHvyZHuXZf2zsix35rbSjFxCjsHtxqwPl0oMOA0 IkiL63dirmWA9QO/zV5B8OR4gOK6TnCGs28+N7PxktwlvX2OR5dqhigmsppfTA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3vnpdx8pv0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 16 Jan 2024 05:01:50 -0800 (PST) Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Tue, 16 Jan 2024 05:01:36 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Tue, 16 Jan 2024 05:01:36 -0800 Received: from localhost.localdomain (unknown [10.28.34.39]) by maili.marvell.com (Postfix) with ESMTP id CE9A63F706A; Tue, 16 Jan 2024 05:01:34 -0800 (PST) From: Tomasz Duszynski To: CC: , Tomasz Duszynski Subject: [PATCH] raw/cnxk_bphy: extend link state capabilities Date: Tue, 16 Jan 2024 14:01:28 +0100 Message-ID: <20240116130128.1700172-1-tduszynski@marvell.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Proofpoint-GUID: WPxpKTznH8niJ91B_rEELuqAUVB5atp9 X-Proofpoint-ORIG-GUID: WPxpKTznH8niJ91B_rEELuqAUVB5atp9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-09_02,2023-12-07_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Recent version of firmware extended capabilities of setting link state by adding two extra parameters i.e. timeout and flag disabling auto enable of rx/tx during linkup. This change adds supports for both. Signed-off-by: Tomasz Duszynski --- drivers/common/cnxk/roc_bphy_cgx.c | 11 ++++++++--- drivers/common/cnxk/roc_bphy_cgx.h | 8 +++++++- drivers/common/cnxk/roc_bphy_cgx_priv.h | 4 ++++ drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c | 7 +++++-- drivers/raw/cnxk_bphy/cnxk_bphy_cgx_test.c | 9 +++++++-- drivers/raw/cnxk_bphy/rte_pmd_bphy.h | 14 ++++++++------ 6 files changed, 39 insertions(+), 14 deletions(-) -- 2.34.1 diff --git a/drivers/common/cnxk/roc_bphy_cgx.c b/drivers/common/cnxk/roc_bphy_cgx.c index e966494e21..4f43605e10 100644 --- a/drivers/common/cnxk/roc_bphy_cgx.c +++ b/drivers/common/cnxk/roc_bphy_cgx.c @@ -311,7 +311,7 @@ roc_bphy_cgx_stop_rxtx(struct roc_bphy_cgx *roc_cgx, unsigned int lmac) int roc_bphy_cgx_set_link_state(struct roc_bphy_cgx *roc_cgx, unsigned int lmac, - bool state) + struct roc_bphy_cgx_link_state *state) { uint64_t scr1, scr0; @@ -321,8 +321,13 @@ roc_bphy_cgx_set_link_state(struct roc_bphy_cgx *roc_cgx, unsigned int lmac, if (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac)) return -ENODEV; - scr1 = state ? FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_LINK_BRING_UP) : - FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_LINK_BRING_DOWN); + if (!state) + return -EINVAL; + + scr1 = (state->state ? FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_LINK_BRING_UP) : + FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_LINK_BRING_DOWN)) | + FIELD_PREP(SCR1_CGX_LINK_BRINGUP_ARGS_TIMEOUT, state->timeout) | + FIELD_PREP(SCR1_CGX_LINK_BRINGUP_ARGS_RX_TX_DIS, state->rx_tx_dis); return roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0); } diff --git a/drivers/common/cnxk/roc_bphy_cgx.h b/drivers/common/cnxk/roc_bphy_cgx.h index 2b9a23f5b1..18bf3185bb 100644 --- a/drivers/common/cnxk/roc_bphy_cgx.h +++ b/drivers/common/cnxk/roc_bphy_cgx.h @@ -144,6 +144,12 @@ struct roc_bphy_cgx_cpri_mode_misc { int flags; }; +struct roc_bphy_cgx_link_state { + bool state; + int timeout; + bool rx_tx_dis; +}; + __roc_api int roc_bphy_cgx_dev_init(struct roc_bphy_cgx *roc_cgx); __roc_api int roc_bphy_cgx_dev_fini(struct roc_bphy_cgx *roc_cgx); @@ -152,7 +158,7 @@ __roc_api int roc_bphy_cgx_start_rxtx(struct roc_bphy_cgx *roc_cgx, __roc_api int roc_bphy_cgx_stop_rxtx(struct roc_bphy_cgx *roc_cgx, unsigned int lmac); __roc_api int roc_bphy_cgx_set_link_state(struct roc_bphy_cgx *roc_cgx, - unsigned int lmac, bool state); + unsigned int lmac, struct roc_bphy_cgx_link_state *state); __roc_api int roc_bphy_cgx_get_linkinfo(struct roc_bphy_cgx *roc_cgx, unsigned int lmac, struct roc_bphy_cgx_link_info *info); diff --git a/drivers/common/cnxk/roc_bphy_cgx_priv.h b/drivers/common/cnxk/roc_bphy_cgx_priv.h index 78fa1eaa6b..bbcf622156 100644 --- a/drivers/common/cnxk/roc_bphy_cgx_priv.h +++ b/drivers/common/cnxk/roc_bphy_cgx_priv.h @@ -102,6 +102,10 @@ enum eth_cmd_own { #define SCR1_CPRI_MODE_MISC_ARGS_LANE_IDX GENMASK_ULL(15, 12) #define SCR1_CPRI_MODE_MISC_ARGS_FLAGS GENMASK_ULL(17, 16) +/* struct cgx_link_bringup_args */ +#define SCR1_CGX_LINK_BRINGUP_ARGS_TIMEOUT GENMASK_ULL(21, 8) +#define SCR1_CGX_LINK_BRINGUP_ARGS_RX_TX_DIS BIT_ULL(22) + #define SCR1_OWN_STATUS GENMASK_ULL(1, 0) #endif /* _ROC_BPHY_CGX_PRIV_H_ */ diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c index 9eb0da9ed4..e30e76b1c0 100644 --- a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c +++ b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c @@ -67,6 +67,7 @@ cnxk_bphy_cgx_process_buf(struct cnxk_bphy_cgx *cgx, unsigned int queue, struct roc_bphy_cgx_cpri_mode_change rcpri_mode; struct roc_bphy_cgx_cpri_mode_misc rmode_misc; struct roc_bphy_cgx_cpri_mode_tx_ctrl rtx_ctrl; + struct roc_bphy_cgx_link_state rlink_state; struct roc_bphy_cgx_link_info rlink_info; struct roc_bphy_cgx_link_mode rlink_mode; enum roc_bphy_cgx_eth_link_fec *fec; @@ -135,8 +136,10 @@ cnxk_bphy_cgx_process_buf(struct cnxk_bphy_cgx *cgx, unsigned int queue, break; case CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_STATE: link_state = msg->data; - ret = roc_bphy_cgx_set_link_state(cgx->rcgx, lmac, - link_state->state); + rlink_state.state = link_state->state; + rlink_state.timeout = link_state->timeout; + rlink_state.rx_tx_dis = link_state->rx_tx_dis; + ret = roc_bphy_cgx_set_link_state(cgx->rcgx, lmac, &rlink_state); break; case CNXK_BPHY_CGX_MSG_TYPE_START_RXTX: ret = roc_bphy_cgx_start_rxtx(cgx->rcgx, lmac); diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx_test.c b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx_test.c index 5d2a53be31..58a29f183f 100644 --- a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx_test.c +++ b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx_test.c @@ -36,6 +36,7 @@ cnxk_bphy_cgx_link_cond(uint16_t dev_id, unsigned int queue, int cond) int cnxk_bphy_cgx_dev_selftest(uint16_t dev_id) { + struct cnxk_bphy_cgx_msg_set_link_state link_state = { }; unsigned int queues, i; int ret; @@ -75,7 +76,8 @@ cnxk_bphy_cgx_dev_selftest(uint16_t dev_id) break; } - ret = rte_pmd_bphy_cgx_set_link_state(dev_id, i, false); + link_state.state = false; + ret = rte_pmd_bphy_cgx_set_link_state(dev_id, i, &link_state); if (ret) { BPHY_CGX_LOG(ERR, "Failed to set link down"); break; @@ -85,7 +87,10 @@ cnxk_bphy_cgx_dev_selftest(uint16_t dev_id) if (ret != 0) BPHY_CGX_LOG(ERR, "Timed out waiting for a link down"); - ret = rte_pmd_bphy_cgx_set_link_state(dev_id, i, true); + link_state.state = true; + link_state.timeout = 1500; + link_state.rx_tx_dis = true; + ret = rte_pmd_bphy_cgx_set_link_state(dev_id, i, &link_state); if (ret) { BPHY_CGX_LOG(ERR, "Failed to set link up"); break; diff --git a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h index ebb85bd869..1a50bdbcc7 100644 --- a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h +++ b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h @@ -231,6 +231,10 @@ struct cnxk_bphy_cgx_msg_link_info { struct cnxk_bphy_cgx_msg_set_link_state { /** Defines link state result */ bool state; /* up or down */ + /** Timeout in ms */ + int timeout; + /** Set if Rx/Tx should not be enabled during link up config */ + bool rx_tx_dis; }; struct cnxk_bphy_cgx_msg_cpri_mode_change { @@ -676,21 +680,19 @@ rte_pmd_bphy_cgx_set_link_mode(uint16_t dev_id, uint16_t lmac, * The identifier of the device * @param lmac * LMAC number for operation - * @param up + * @param state * Link state to set * * @return * Returns 0 on success, negative error code otherwise */ static __rte_always_inline int -rte_pmd_bphy_cgx_set_link_state(uint16_t dev_id, uint16_t lmac, bool up) +rte_pmd_bphy_cgx_set_link_state(uint16_t dev_id, uint16_t lmac, + struct cnxk_bphy_cgx_msg_set_link_state *state) { - struct cnxk_bphy_cgx_msg_set_link_state state = { - .state = up, - }; struct cnxk_bphy_cgx_msg msg = { .type = CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_STATE, - .data = &state, + .data = state, }; return __rte_pmd_bphy_enq_deq(dev_id, lmac, &msg, NULL, 0);