From patchwork Wed Nov 15 16:14:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ciara Power X-Patchwork-Id: 134402 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C33004333A; Wed, 15 Nov 2023 17:15:51 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 60FA1402B7; Wed, 15 Nov 2023 17:15:51 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) by mails.dpdk.org (Postfix) with ESMTP id 86D3B402B0; Wed, 15 Nov 2023 17:15:49 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700064951; x=1731600951; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=XkXqKThZ+VbePwkEYBvhuEnt1Lc6POKQEBoqdw4PrZI=; b=JkRY+JItLHS5lyMsET3YklkL9TBXsqxqQbAwZTQ5urNJaLM5wqIQ5WL8 BE0xb2tzii3ZiSM/3OmsVHo7qpXLR1NqdSg/3u9xn3KY7jS1R03sTSzVt 2+dwQhGYvb9G+Tj8nbVIfXctwJwR7f+IOdBwYmtEXahB4DW+Vpr2p693R 3YSLcwp/8OS0ia/3FqYfQrUiRvsT0r8DtB35Ps3Ha5FrftifiDAPeYRg9 oeko8iwGeqsXl6yyuazfkDip/o5ZhYXlp1vSwmkJ2wIjxk0JwB1y7R3/g 1JYwjK3niVekQ+ZD+HCUyh/Et+cq7THbfpNhERMIjJYNHbvGZm8BK6hcN Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10895"; a="4022179" X-IronPort-AV: E=Sophos;i="6.03,305,1694761200"; d="scan'208";a="4022179" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Nov 2023 08:15:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10895"; a="768622710" X-IronPort-AV: E=Sophos;i="6.03,305,1694761200"; d="scan'208";a="768622710" Received: from silpixa00400355.ir.intel.com (HELO silpixa00400355.ger.corp.intel.com) ([10.237.222.80]) by fmsmga007.fm.intel.com with ESMTP; 15 Nov 2023 08:14:15 -0800 From: Ciara Power To: dev@dpdk.org Cc: arkadiuszx.kusztal@intel.com, Ciara Power , stable@dpdk.org, Kai Ji Subject: [PATCH v2] crypto/qat: fix gen3 legacy capabilities Date: Wed, 15 Nov 2023 16:14:13 +0000 Message-Id: <20231115161413.2520429-1-ciara.power@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231115160554.2451510-1-brian.dooley@intel.com> References: <20231115160554.2451510-1-brian.dooley@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org When the legacy capability flag was enabled for QAT GEN3, in the case of the last legacy capability in the list being SM3 or SM4, when no slice is on the device, the loop continues instead of checking if the end of the legacy capbilities list has been met. To fix this, the check for the end of the legacy capabilities list is moved to the top of the loop, so it is detected when the last legacy element is SM and no SM slice exists. Fixes: cffb726b7797 ("crypto/qat: enable insecure algorithms") Cc: stable@dpdk.org Signed-off-by: Ciara Power Acked-by: Kai Ji --- v2: updating sender email --- drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c index 0a939161f9..150f77ab0c 100644 --- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c +++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c @@ -232,6 +232,13 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_private *internals, } for (i = 0; i < capa_num; i++, iter++) { + if (unlikely(qat_legacy_capa) && (i == legacy_capa_num)) { + capabilities = qat_sym_crypto_caps_gen3; + addr += curr_capa; + curr_capa = 0; + iter = 0; + } + if (slice_map & ICP_ACCEL_MASK_SM4_SLICE && ( check_cipher_capa(&capabilities[iter], RTE_CRYPTO_CIPHER_SM4_ECB) || @@ -249,13 +256,6 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_private *internals, memcpy(addr + curr_capa, capabilities + iter, sizeof(struct rte_cryptodev_capabilities)); curr_capa++; - - if (unlikely(qat_legacy_capa) && (i == legacy_capa_num-1)) { - capabilities = qat_sym_crypto_caps_gen3; - addr += curr_capa; - curr_capa = 0; - iter = -1; - } } internals->qat_dev_capabilities = internals->capa_mz->addr;