From patchwork Wed Sep 20 13:01:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Coquelin X-Patchwork-Id: 131728 X-Patchwork-Delegate: maxime.coquelin@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A1064425F3; Wed, 20 Sep 2023 15:02:03 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8F11A40A89; Wed, 20 Sep 2023 15:02:03 +0200 (CEST) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mails.dpdk.org (Postfix) with ESMTP id 78C0E40A79 for ; Wed, 20 Sep 2023 15:02:01 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1695214921; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=rWGiBOcnyExQ2ruyMxNr6jD4zNX/a5FvjIbj0MIeOhI=; b=WIMymhHG7Cd7mZESNTHZlMOGQiGIoB0PrdGuiKobjPUUv6TcQfSlCIOdLH15IIwGxPmZeH 2izHFgjtgM5t4erCZBINOJTaexpKtJ+OUGwQBl6LpDsVof9FVCAgtN/jNlp8pb9a2qoW1B /8Z5ZlOPiBmA8SyiMegO806wA929h1s= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-164-y8Zuu7plPDeKH0l21_fVcg-1; Wed, 20 Sep 2023 09:01:57 -0400 X-MC-Unique: y8Zuu7plPDeKH0l21_fVcg-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 812CC89C6B1; Wed, 20 Sep 2023 13:01:53 +0000 (UTC) Received: from max-p1.redhat.com (unknown [10.39.208.35]) by smtp.corp.redhat.com (Postfix) with ESMTP id 63496140273D; Wed, 20 Sep 2023 13:01:51 +0000 (UTC) From: Maxime Coquelin To: dev@dpdk.org, rmelton@cisco.com, davejo@cisco.com, speechu@cisco.com, chenbo.xia@outlook.com, mbumgard@cisco.com, cbrezove@cisco.com, david.marchand@redhat.com Cc: Maxime Coquelin , stable@dpdk.org Subject: [PATCH] net/virtio: fix descriptors buffer addresses on 32 bits builds Date: Wed, 20 Sep 2023 15:01:47 +0200 Message-ID: <20230920130147.1567735-1-maxime.coquelin@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.7 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org With Virtio-user, the Virtio descriptor buffer address is the virtual address of the mbuf's buffer. On 32 bits builds, it is expected to be 32 bits. With Virtio-PCI, the Virtio descriptor buffer address is the physical address of the mbuf's buffer. On 32 bits builds running on 64 bits kernel, it is expected to be up to 64 bits. This patch introduces a new mask field in virtqueue's struct to filter our the upper 4 bytes of the address only when necessary. An optimization is introduced for 64 bits builds to remove the masking, as the address is always 64 bits wide. Fixes: ba55c94a7ebc ("net/virtio: revert forcing IOVA as VA mode for virtio-user") Cc: stable@dpdk.org Reported-by: Sampath Peechu Signed-off-by: Maxime Coquelin Reviewed-by: David Marchand Reported-by: Sampath Peechu Signed-off-by: Maxime Coquelin --- drivers/net/virtio/virtqueue.c | 2 ++ drivers/net/virtio/virtqueue.h | 18 ++++++++++++++---- 2 files changed, 16 insertions(+), 4 deletions(-) diff --git a/drivers/net/virtio/virtqueue.c b/drivers/net/virtio/virtqueue.c index 1d836f2530..6f419665f1 100644 --- a/drivers/net/virtio/virtqueue.c +++ b/drivers/net/virtio/virtqueue.c @@ -469,9 +469,11 @@ virtqueue_alloc(struct virtio_hw *hw, uint16_t index, uint16_t num, int type, if (hw->use_va) { vq->vq_ring_mem = (uintptr_t)mz->addr; vq->mbuf_addr_offset = offsetof(struct rte_mbuf, buf_addr); + vq->mbuf_addr_mask = UINTPTR_MAX; } else { vq->vq_ring_mem = mz->iova; vq->mbuf_addr_offset = offsetof(struct rte_mbuf, buf_iova); + vq->mbuf_addr_mask = UINT64_MAX; } PMD_INIT_LOG(DEBUG, "vq->vq_ring_mem: 0x%" PRIx64, vq->vq_ring_mem); diff --git a/drivers/net/virtio/virtqueue.h b/drivers/net/virtio/virtqueue.h index 9d4aba11a3..c1cb941c43 100644 --- a/drivers/net/virtio/virtqueue.h +++ b/drivers/net/virtio/virtqueue.h @@ -114,17 +114,26 @@ virtqueue_store_flags_packed(struct vring_packed_desc *dp, #define VIRTQUEUE_MAX_NAME_SZ 32 +#ifdef RTE_ARCH_32 +#define VIRTIO_MBUF_ADDR_MASK(vq) ((vq)->mbuf_addr_mask) +#else +#define VIRTIO_MBUF_ADDR_MASK(vq) UINT64_MAX +#endif + /** * Return the IOVA (or virtual address in case of virtio-user) of mbuf * data buffer. * * The address is firstly casted to the word size (sizeof(uintptr_t)) - * before casting it to uint64_t. This is to make it work with different - * combination of word size (64 bit and 32 bit) and virtio device - * (virtio-pci and virtio-user). + * before casting it to uint64_t. It is then masked with the expected + * address length (64 bits for virtio-pci, word size for virtio-user). + * + * This is to make it work with different combination of word size (64 + * bit and 32 bit) and virtio device (virtio-pci and virtio-user). */ #define VIRTIO_MBUF_ADDR(mb, vq) \ - ((uint64_t)(*(uintptr_t *)((uintptr_t)(mb) + (vq)->mbuf_addr_offset))) + ((*(uint64_t *)((uintptr_t)(mb) + (vq)->mbuf_addr_offset)) & \ + VIRTIO_MBUF_ADDR_MASK(vq)) /** * Return the physical address (or virtual address in case of @@ -194,6 +203,7 @@ struct virtqueue { void *vq_ring_virt_mem; /**< linear address of vring*/ unsigned int vq_ring_size; uint16_t mbuf_addr_offset; + uint64_t mbuf_addr_mask; union { struct virtnet_rx rxq;