From patchwork Sat Sep 9 16:57:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 131323 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6B5AA42556; Sat, 9 Sep 2023 18:57:55 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 112024029E; Sat, 9 Sep 2023 18:57:55 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id E7F1D40295 for ; Sat, 9 Sep 2023 18:57:53 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 389Bsrdv030375 for ; Sat, 9 Sep 2023 09:57:53 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=zxZcsmOSB5Qh7CtusiYro7APjg0ft2B+wztWvVBk4Ik=; b=OpUU8gEOlcSCaG0kI5GMa+CnJfugTREePObgTja9Pxkll5tNRjG+sqFpknAzhnbpOqJa BV88iERUEK8BFfzBIAnnm3o07Qga6y5zanw3MMY+bBplKFLs5MGZ7quHJHinqXMHEWth UlNvlYhLlYt4Gaq499ylyarA21BT9xcLghz6E4mQSigKPSz0AwGaeAgaFFl+FaY+qvt7 78Z4s7sk5RBrVB5TIKH0ZtlztR+BRwExos4p0E5ZxEzZ6I11+Z81dUClP9enRffIcpm3 w1giYkA9CgdozkrBZNs0RshVdZMpXl/GVGWKDlICdjKWmpVzKJLOdFuvD6OVOvi0INda dA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3t0r7kgjvb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sat, 09 Sep 2023 09:57:53 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Sat, 9 Sep 2023 09:57:51 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Sat, 9 Sep 2023 09:57:51 -0700 Received: from MININT-80QBFE8.corp.innovium.com (MININT-80QBFE8.marvell.com [10.28.164.106]) by maili.marvell.com (Postfix) with ESMTP id A95453F707F; Sat, 9 Sep 2023 09:57:49 -0700 (PDT) From: To: , Pavan Nikhilesh , "Shijith Thotton" CC: Subject: [PATCH 1/2] event/cnxk: flush flow context on cleanup Date: Sat, 9 Sep 2023 22:27:46 +0530 Message-ID: <20230909165747.7458-1-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-GUID: roI7xnlDCISJUGATlWnxhclp8KZ2-kyH X-Proofpoint-ORIG-GUID: roI7xnlDCISJUGATlWnxhclp8KZ2-kyH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-09-09_15,2023-09-05_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Flush currently held flow context on event port cleanup. Signed-off-by: Pavan Nikhilesh --- drivers/event/cnxk/cn10k_eventdev.c | 18 ++++++++++++++---- drivers/event/cnxk/cn9k_eventdev.c | 25 +++++++++++++++++++------ 2 files changed, 33 insertions(+), 10 deletions(-) diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c index 499a3aace7..211c51fd12 100644 --- a/drivers/event/cnxk/cn10k_eventdev.c +++ b/drivers/event/cnxk/cn10k_eventdev.c @@ -200,12 +200,14 @@ cn10k_sso_hws_reset(void *arg, void *hws) cnxk_sso_hws_swtag_untag(base + SSOW_LF_GWS_OP_SWTAG_UNTAG); plt_write64(0, base + SSOW_LF_GWS_OP_DESCHED); + } else if (pend_tt != SSO_TT_EMPTY) { + plt_write64(0, base + SSOW_LF_GWS_OP_SWTAG_FLUSH); } /* Wait for desched to complete. */ do { pend_state = plt_read64(base + SSOW_LF_GWS_PENDSTATE); - } while (pend_state & BIT_ULL(58)); + } while (pend_state & (BIT_ULL(58) | BIT_ULL(56))); switch (dev->gw_mode) { case CN10K_GW_MODE_PREF: @@ -582,11 +584,16 @@ cn10k_sso_port_quiesce(struct rte_eventdev *event_dev, void *port, cn10k_sso_hws_get_work_empty(ws, &ev, (NIX_RX_OFFLOAD_MAX - 1) | NIX_RX_REAS_F | NIX_RX_MULTI_SEG_F); - if (is_pend && ev.u64) { + if (is_pend && ev.u64) if (flush_cb) flush_cb(event_dev->data->dev_id, ev, args); + ptag = (plt_read64(ws->base + SSOW_LF_GWS_TAG) >> 32) & SSO_TT_EMPTY; + if (ptag != SSO_TT_EMPTY) cnxk_sso_hws_swtag_flush(ws->base); - } + + do { + ptag = plt_read64(ws->base + SSOW_LF_GWS_PENDSTATE); + } while (ptag & BIT_ULL(56)); /* Check if we have work in PRF_WQE0, if so extract it. */ switch (dev->gw_mode) { @@ -610,8 +617,11 @@ cn10k_sso_port_quiesce(struct rte_eventdev *event_dev, void *port, if (ev.u64) { if (flush_cb) flush_cb(event_dev->data->dev_id, ev, args); - cnxk_sso_hws_swtag_flush(ws->base); } + cnxk_sso_hws_swtag_flush(ws->base); + do { + ptag = plt_read64(ws->base + SSOW_LF_GWS_PENDSTATE); + } while (ptag & BIT_ULL(56)); } ws->swtag_req = 0; plt_write64(0, ws->base + SSOW_LF_GWS_OP_GWC_INVAL); diff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c index 6cce5477f0..a03e3c138b 100644 --- a/drivers/event/cnxk/cn9k_eventdev.c +++ b/drivers/event/cnxk/cn9k_eventdev.c @@ -222,16 +222,16 @@ cn9k_sso_hws_reset(void *arg, void *hws) cnxk_sso_hws_swtag_untag( base + SSOW_LF_GWS_OP_SWTAG_UNTAG); plt_write64(0, base + SSOW_LF_GWS_OP_DESCHED); + } else if (pend_tt != SSO_TT_EMPTY) { + plt_write64(0, base + SSOW_LF_GWS_OP_SWTAG_FLUSH); } /* Wait for desched to complete. */ do { pend_state = plt_read64(base + SSOW_LF_GWS_PENDSTATE); - } while (pend_state & BIT_ULL(58)); - + } while (pend_state & (BIT_ULL(58) | BIT_ULL(56))); plt_write64(0, base + SSOW_LF_GWS_OP_GWC_INVAL); } - if (dev->dual_ws) dws->swtag_req = 0; else @@ -686,12 +686,25 @@ cn9k_sso_port_quiesce(struct rte_eventdev *event_dev, void *port, base, &ev, dev->rx_offloads, dev->dual_ws ? dws->lookup_mem : ws->lookup_mem, dev->dual_ws ? dws->tstamp : ws->tstamp); - if (is_pend && ev.u64) { + if (is_pend && ev.u64) if (flush_cb) flush_cb(event_dev->data->dev_id, ev, args); - cnxk_sso_hws_swtag_flush(ws->base); - } + + ptag = (plt_read64(base + SSOW_LF_GWS_TAG) >> 32) & SSO_TT_EMPTY; + if (ptag != SSO_TT_EMPTY) + cnxk_sso_hws_swtag_flush(base); + + do { + ptag = plt_read64(base + SSOW_LF_GWS_PENDSTATE); + } while (ptag & BIT_ULL(56)); + + plt_write64(0, base + SSOW_LF_GWS_OP_GWC_INVAL); } + + if (dev->dual_ws) + dws->swtag_req = 0; + else + ws->swtag_req = 0; } static int From patchwork Sat Sep 9 16:57:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 131324 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 707AA42556; Sat, 9 Sep 2023 18:57:59 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 39804402E0; Sat, 9 Sep 2023 18:57:58 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id BF273402DD for ; Sat, 9 Sep 2023 18:57:56 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 389FghPO032405 for ; Sat, 9 Sep 2023 09:57:56 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=GvqMO7/03BOinpGPiE6BLUbWtBog+ouU55CU620xqKw=; b=bJYWHInayrxdplnIYeljeZJ8QtbZCig/9OBzo3Qmdb5+nfPfCHZ29EiJAlJcaiv6csN8 7OeK9d0b/PPElYC//3G6JChOJrEEQOB7HKZ740Q+RFfF+RVFGwTdfMuG/UVRf5izgFIP CQjPZ9K0hWn5DiCpNzWayi/Bo7GIPQjqbY0XAMepp4Lm2Ez3fckipKElOTefj6R3iwfD xwfntdvTJtTXOz73rnMMrw5FowcK0dclePPuh8+gINkvCsTa91tJLa+dHY1Tlduf16zE x8r5NxA/BBoLyv+YbjS5Ex7g0sO76kBl65t5CQWk9NXb65qhDkCTkfmthwYqY8NNCzXe Xw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3t0p2q0up6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sat, 09 Sep 2023 09:57:55 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Sat, 9 Sep 2023 09:57:54 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Sat, 9 Sep 2023 09:57:54 -0700 Received: from MININT-80QBFE8.corp.innovium.com (MININT-80QBFE8.marvell.com [10.28.164.106]) by maili.marvell.com (Postfix) with ESMTP id BBD863F7080; Sat, 9 Sep 2023 09:57:51 -0700 (PDT) From: To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: , Pavan Nikhilesh Subject: [PATCH 2/2] common/cnxk: split XAQ counts Date: Sat, 9 Sep 2023 22:27:47 +0530 Message-ID: <20230909165747.7458-2-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230909165747.7458-1-pbhagavatula@marvell.com> References: <20230909165747.7458-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 9EwcjRM6ortI07HHFYFnN67O9eyTdgGf X-Proofpoint-GUID: 9EwcjRM6ortI07HHFYFnN67O9eyTdgGf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-09-09_15,2023-09-05_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Split XAQ counts into reserved and cached to allow more events to be inflight. Signed-off-by: Pavan Nikhilesh --- drivers/common/cnxk/roc_sso.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/common/cnxk/roc_sso.c b/drivers/common/cnxk/roc_sso.c index a5f48d5bbc..0a1074b018 100644 --- a/drivers/common/cnxk/roc_sso.c +++ b/drivers/common/cnxk/roc_sso.c @@ -5,7 +5,8 @@ #include "roc_api.h" #include "roc_priv.h" -#define SSO_XAQ_CACHE_CNT (0x7) +#define SSO_XAQ_CACHE_CNT (0x3) +#define SSO_XAQ_RSVD_CNT (0x4) #define SSO_XAQ_SLACK (16) /* Private functions. */ @@ -499,6 +500,7 @@ sso_hwgrp_init_xaq_aura(struct dev *dev, struct roc_sso_xaq_data *xaq, * pipelining. */ xaq->nb_xaq = (SSO_XAQ_CACHE_CNT * nb_hwgrp); + xaq->nb_xaq += (SSO_XAQ_RSVD_CNT * nb_hwgrp); xaq->nb_xaq += PLT_MAX(1 + ((xaq->nb_xae - 1) / xae_waes), xaq->nb_xaq); xaq->nb_xaq += SSO_XAQ_SLACK; @@ -542,8 +544,7 @@ sso_hwgrp_init_xaq_aura(struct dev *dev, struct roc_sso_xaq_data *xaq, * There should be a minimum headroom of 7 XAQs per HWGRP for SSO * to request XAQ to cache them even before enqueue is called. */ - xaq->xaq_lmt = - xaq->nb_xaq - (nb_hwgrp * SSO_XAQ_CACHE_CNT) - SSO_XAQ_SLACK; + xaq->xaq_lmt = xaq->nb_xaq - (nb_hwgrp * SSO_XAQ_CACHE_CNT) - SSO_XAQ_SLACK; return 0; npa_fill_fail: