From patchwork Wed Jun 21 01:19:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenzhuo Lu X-Patchwork-Id: 128877 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8103E42D0A; Wed, 21 Jun 2023 03:58:47 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 518E740DFB; Wed, 21 Jun 2023 03:58:47 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id 372FF40DDC; Wed, 21 Jun 2023 03:58:46 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1687312726; x=1718848726; h=from:to:cc:subject:date:message-id; bh=BMIuQaUFhomfX0v/yLBRxf9hbREaw27ef3EMvi9d+7M=; b=fN962iqa9cEbSJatuf/4xNlws+0rKIzVwCB49shf4uEghPEw50ebKx1x ycTGd5MB8wA+mHUnD3Ty4atEJiYrM+zTFj3QG++QKsVkQhZz41JkzZIjN i0a4xJwqOT1LZxEzMfgJz8ZVfBTUski91cKh2RzDHFdjs5l8O4LTrm3Ft gyoKgJ08ddHWF0eqJtP4cB+iZUVt/zKDawTkyoTxj33/5oG3U9QTdU9sX 4WI5F0lO7dt5kcGngkHJUus61R6Na9Gt43G2vTj/R42l71W3lpSIZwv+h IzPifL+3WcRekt7r5IL/JFLEbx01taf5bBr0wiryLU+QIVfoAPThGuR4s A==; X-IronPort-AV: E=McAfee;i="6600,9927,10747"; a="360045501" X-IronPort-AV: E=Sophos;i="6.00,258,1681196400"; d="scan'208";a="360045501" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jun 2023 18:58:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10747"; a="888461226" X-IronPort-AV: E=Sophos;i="6.00,258,1681196400"; d="scan'208";a="888461226" Received: from dpdk-wenzhuo-cascadelake.sh.intel.com ([10.67.110.255]) by orsmga005.jf.intel.com with ESMTP; 20 Jun 2023 18:58:42 -0700 From: Wenzhuo Lu To: dev@dpdk.org Cc: Wenzhuo Lu , stable@dpdk.org Subject: [PATCH] net/iavf: fix VLAN insertion in vector path Date: Wed, 21 Jun 2023 09:19:15 +0800 Message-Id: <1687310355-130696-1-git-send-email-wenzhuo.lu@intel.com> X-Mailer: git-send-email 1.8.3.1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org As the VLAN insertion is partially supported in vector path, the behavior is different in scalar and vector path. For a VLAN packet, if using scalar path, the new VLAN tag will be inserted after the original VLAN tag. If using vector path, the new VLAN tag is inserted before the original VLAN tag. To avoid any misleading, disable VLAN insertion in vector path. Fixes: 059f18ae2aec ("net/iavf: add offload path for Tx AVX512") Cc: stable@dpdk.org Signed-off-by: Wenzhuo Lu --- drivers/net/iavf/iavf_rxtx.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/iavf/iavf_rxtx.h b/drivers/net/iavf/iavf_rxtx.h index 547b68f..2459c15 100644 --- a/drivers/net/iavf/iavf_rxtx.h +++ b/drivers/net/iavf/iavf_rxtx.h @@ -27,13 +27,13 @@ #define IAVF_VPMD_TX_MAX_FREE_BUF 64 #define IAVF_TX_NO_VECTOR_FLAGS ( \ + RTE_ETH_TX_OFFLOAD_VLAN_INSERT | \ + RTE_ETH_TX_OFFLOAD_QINQ_INSERT | \ RTE_ETH_TX_OFFLOAD_MULTI_SEGS | \ RTE_ETH_TX_OFFLOAD_TCP_TSO | \ RTE_ETH_TX_OFFLOAD_SECURITY) #define IAVF_TX_VECTOR_OFFLOAD ( \ - RTE_ETH_TX_OFFLOAD_VLAN_INSERT | \ - RTE_ETH_TX_OFFLOAD_QINQ_INSERT | \ RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | \ RTE_ETH_TX_OFFLOAD_SCTP_CKSUM | \ RTE_ETH_TX_OFFLOAD_UDP_CKSUM | \