From patchwork Thu Jun 28 03:19:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "John Daley (johndale)" X-Patchwork-Id: 41771 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E67E54C87; Thu, 28 Jun 2018 05:19:48 +0200 (CEST) Received: from alln-iport-1.cisco.com (alln-iport-1.cisco.com [173.37.142.88]) by dpdk.org (Postfix) with ESMTP id 61B6A4B4B for ; Thu, 28 Jun 2018 05:19:47 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=@cisco.com; l=5017; q=dns/txt; s=iport; t=1530155987; x=1531365587; h=from:to:cc:subject:date:message-id; bh=O0xQ1KIW7tf89iFJN6xSXoeXUfowAmf7Lclg714LVoE=; b=K5AIshOrauS1jeJJBcA01HjYy5fHPARHK8tYQ5K1RwAA0KsoO05d50yG wIjtDRC+5TemjNsHpvKEOoNhO81mv8kjeUyGeOrB8IuP7ZzDb4AA66+Wo kNFotfOmYjmV7v4YEVK4qixn0xr/vRfXR/90bMzKqgT5kTF3KTd85MIkL E=; X-IronPort-AV: E=Sophos;i="5.51,281,1526342400"; d="scan'208";a="135725372" Received: from alln-core-3.cisco.com ([173.36.13.136]) by alln-iport-1.cisco.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2018 03:19:46 +0000 Received: from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48]) by alln-core-3.cisco.com (8.14.5/8.14.5) with ESMTP id w5S3JkGP028892; Thu, 28 Jun 2018 03:19:46 GMT Received: by cisco.com (Postfix, from userid 392789) id E0F5220F2001; Wed, 27 Jun 2018 20:19:45 -0700 (PDT) From: John Daley To: ferruh.yigit@intel.com Cc: dev@dpdk.org, Hyong Youb Kim Date: Wed, 27 Jun 2018 20:19:27 -0700 Message-Id: <20180628031940.17397-1-johndale@cisco.com> X-Mailer: git-send-email 2.16.2 Subject: [dpdk-dev] [PATCH 01/14] net/enic: fix receive packet types X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hyong Youb Kim Fix missing or incorrect packet types discovered by DTS. - Non-IP inner packets Set the tunnel flag. - Inner Ethernet packets All supported tunnel packets have Ethernet as inner packets. So, set INNER_L2_ETHER for all tunnel types. - IPv4 fragments carrying TCP/UDP The NIC indicates TCP/UDP based on the protocol in IP header. For fragments, ignore that bit and always set L4_FRAG. - IPv6 fragments The NIC does regconize fragments (IPv6 packets with fragment extension headers). Set packet types for these. Fixes: 93fb21fdbe23 ("net/enic: enable overlay offload for VXLAN and GENEVE") Signed-off-by: Hyong Youb Kim Reviewed-by: John Daley --- drivers/net/enic/enic_rxtx.c | 42 ++++++++++++++++++++++++++++++++++++------ 1 file changed, 36 insertions(+), 6 deletions(-) diff --git a/drivers/net/enic/enic_rxtx.c b/drivers/net/enic/enic_rxtx.c index 8853a2044..bbb0444ad 100644 --- a/drivers/net/enic/enic_rxtx.c +++ b/drivers/net/enic/enic_rxtx.c @@ -137,51 +137,81 @@ enic_cq_rx_flags_to_pkt_type(struct cq_desc *cqd, uint8_t tnl) */ static const uint32_t cq_type_table[128] __rte_cache_aligned = { [0x00] = RTE_PTYPE_UNKNOWN, + [0x01] = RTE_PTYPE_UNKNOWN | + RTE_PTYPE_TUNNEL_GRENAT | + RTE_PTYPE_INNER_L2_ETHER, [0x20] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_NONFRAG, [0x21] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_NONFRAG | RTE_PTYPE_TUNNEL_GRENAT | + RTE_PTYPE_INNER_L2_ETHER | RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_INNER_L4_NONFRAG, [0x22] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_UDP, [0x23] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_UDP | RTE_PTYPE_TUNNEL_GRENAT | + RTE_PTYPE_INNER_L2_ETHER | RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_INNER_L4_UDP, [0x24] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_TCP, [0x25] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_TCP | RTE_PTYPE_TUNNEL_GRENAT | + RTE_PTYPE_INNER_L2_ETHER | RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_INNER_L4_TCP, [0x60] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_FRAG, [0x61] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_FRAG | RTE_PTYPE_TUNNEL_GRENAT | + RTE_PTYPE_INNER_L2_ETHER | RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_INNER_L4_FRAG, - [0x62] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_UDP, - [0x63] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_UDP | + [0x62] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_FRAG, + [0x63] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_FRAG | RTE_PTYPE_TUNNEL_GRENAT | + RTE_PTYPE_INNER_L2_ETHER | RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | - RTE_PTYPE_INNER_L4_UDP, - [0x64] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_TCP, - [0x65] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_TCP | + RTE_PTYPE_INNER_L4_FRAG, + [0x64] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_FRAG, + [0x65] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_FRAG | RTE_PTYPE_TUNNEL_GRENAT | + RTE_PTYPE_INNER_L2_ETHER | RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN | - RTE_PTYPE_INNER_L4_TCP, + RTE_PTYPE_INNER_L4_FRAG, [0x10] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_NONFRAG, [0x11] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_NONFRAG | RTE_PTYPE_TUNNEL_GRENAT | + RTE_PTYPE_INNER_L2_ETHER | RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_INNER_L4_NONFRAG, [0x12] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_UDP, [0x13] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_UDP | RTE_PTYPE_TUNNEL_GRENAT | + RTE_PTYPE_INNER_L2_ETHER | RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_INNER_L4_UDP, [0x14] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_TCP, [0x15] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_TCP | RTE_PTYPE_TUNNEL_GRENAT | + RTE_PTYPE_INNER_L2_ETHER | RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_INNER_L4_TCP, + [0x50] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_FRAG, + [0x51] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_FRAG | + RTE_PTYPE_TUNNEL_GRENAT | + RTE_PTYPE_INNER_L2_ETHER | + RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN | + RTE_PTYPE_INNER_L4_FRAG, + [0x52] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_FRAG, + [0x53] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_FRAG | + RTE_PTYPE_TUNNEL_GRENAT | + RTE_PTYPE_INNER_L2_ETHER | + RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN | + RTE_PTYPE_INNER_L4_FRAG, + [0x54] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_FRAG, + [0x55] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_FRAG | + RTE_PTYPE_TUNNEL_GRENAT | + RTE_PTYPE_INNER_L2_ETHER | + RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN | + RTE_PTYPE_INNER_L4_FRAG, /* All others reserved */ }; cqrd_flags &= CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT From patchwork Thu Jun 28 03:19:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "John Daley (johndale)" X-Patchwork-Id: 41772 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id F0DE41B05C; Thu, 28 Jun 2018 05:20:24 +0200 (CEST) Received: from alln-iport-7.cisco.com (alln-iport-7.cisco.com [173.37.142.94]) by dpdk.org (Postfix) with ESMTP id 740FD1B05A for ; Thu, 28 Jun 2018 05:20:23 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=@cisco.com; l=9759; q=dns/txt; s=iport; t=1530156023; x=1531365623; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=fLZadybVczHXilsrCUPhfnRRTP2sKheZv0dBBnPPJzE=; b=fm81L3cbOaf9ZPomu2Ad7+vtEIv0UHa9I4Vol10NHG2RpUAAL4Z0JVp7 azP1l4dumtP02lzxypr/3gTvXzVTA1JStsQdeFLGf5K1fw0toApIk6GmZ P/FbB6oWGwTqyKF37qSMGUN168i7wAzcZaGaA1EcmaEWwWsKo8eTEuiAx w=; X-IronPort-AV: E=Sophos;i="5.51,281,1526342400"; d="scan'208";a="135104116" Received: from alln-core-7.cisco.com ([173.36.13.140]) by alln-iport-7.cisco.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2018 03:20:22 +0000 Received: from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48]) by alln-core-7.cisco.com (8.14.5/8.14.5) with ESMTP id w5S3KMWE019360; Thu, 28 Jun 2018 03:20:22 GMT Received: by cisco.com (Postfix, from userid 392789) id 400C520F2001; Wed, 27 Jun 2018 20:20:22 -0700 (PDT) From: John Daley To: ferruh.yigit@intel.com Cc: dev@dpdk.org, Hyong Youb Kim Date: Wed, 27 Jun 2018 20:19:28 -0700 Message-Id: <20180628031940.17397-2-johndale@cisco.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180628031940.17397-1-johndale@cisco.com> References: <20180628031940.17397-1-johndale@cisco.com> Subject: [dpdk-dev] [PATCH 02/14] net/enic: update the UDP RSS detection mechanism X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hyong Youb Kim The UDP RSS interface has changed in the release firmware for 100G VIC adapters. The capability bit is now in NIC_CFG. Also the driver is supposed to use CMD_NIC_CFG_CHK and check if RSS config is successful. No more changes are expected with respect to UDP RSS API. Fixes: 94c351895888 ("net/enic: update UDP RSS controls") Signed-off-by: Hyong Youb Kim Reviewed-by: John Daley --- drivers/net/enic/base/vnic_dev.c | 16 ++++++++++++++++ drivers/net/enic/base/vnic_dev.h | 4 ++++ drivers/net/enic/base/vnic_devcmd.h | 23 ++++++++++++++++++++++- drivers/net/enic/base/vnic_enet.h | 5 ++--- drivers/net/enic/base/vnic_nic.h | 4 ++-- drivers/net/enic/enic.h | 2 ++ drivers/net/enic/enic_main.c | 9 ++++++--- drivers/net/enic/enic_res.c | 11 +++++++---- 8 files changed, 61 insertions(+), 13 deletions(-) diff --git a/drivers/net/enic/base/vnic_dev.c b/drivers/net/enic/base/vnic_dev.c index 8483f76f3..16e8814a6 100644 --- a/drivers/net/enic/base/vnic_dev.c +++ b/drivers/net/enic/base/vnic_dev.c @@ -528,6 +528,22 @@ int vnic_dev_capable_filter_mode(struct vnic_dev *vdev, u32 *mode, return 0; } +void vnic_dev_capable_udp_rss_weak(struct vnic_dev *vdev, bool *cfg_chk, + bool *weak) +{ + u64 a0 = CMD_NIC_CFG, a1 = 0; + int wait = 1000; + int err; + + *cfg_chk = false; + *weak = false; + err = vnic_dev_cmd(vdev, CMD_CAPABILITY, &a0, &a1, wait); + if (err == 0 && a0 != 0 && a1 != 0) { + *cfg_chk = true; + *weak = !!((a1 >> 32) & CMD_NIC_CFG_CAPF_UDP_WEAK); + } +} + int vnic_dev_capable(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd) { u64 a0 = (u32)cmd, a1 = 0; diff --git a/drivers/net/enic/base/vnic_dev.h b/drivers/net/enic/base/vnic_dev.h index 3c9084304..270a47bd2 100644 --- a/drivers/net/enic/base/vnic_dev.h +++ b/drivers/net/enic/base/vnic_dev.h @@ -6,6 +6,8 @@ #ifndef _VNIC_DEV_H_ #define _VNIC_DEV_H_ +#include + #include #include @@ -109,6 +111,8 @@ int vnic_dev_capable_adv_filters(struct vnic_dev *vdev); int vnic_dev_capable(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd); int vnic_dev_capable_filter_mode(struct vnic_dev *vdev, u32 *mode, u8 *filter_actions); +void vnic_dev_capable_udp_rss_weak(struct vnic_dev *vdev, bool *cfg_chk, + bool *weak); int vnic_dev_asic_info(struct vnic_dev *vdev, u16 *asic_type, u16 *asic_rev); int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, size_t size, void *value); diff --git a/drivers/net/enic/base/vnic_devcmd.h b/drivers/net/enic/base/vnic_devcmd.h index 2865eb4d4..a22d8a76c 100644 --- a/drivers/net/enic/base/vnic_devcmd.h +++ b/drivers/net/enic/base/vnic_devcmd.h @@ -138,9 +138,27 @@ enum vnic_devcmd_cmd { /* del VLAN id in (u16)a0 */ CMD_VLAN_DEL = _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 15), - /* nic_cfg in (u32)a0 */ + /* + * nic_cfg in (u32)a0 + * + * Capability query: + * out: (u64) a0= 1 if a1 is valid + * (u64) a1= (NIC_CFG bits supported) | (flags << 32) + * (flags are CMD_NIC_CFG_CAPF_xxx) + */ CMD_NIC_CFG = _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 16), + /* + * nic_cfg_chk (same as nic_cfg, but may return error) + * in (u32)a0 + * + * Capability query: + * out: (u64) a0= 1 if a1 is valid + * (u64) a1= (NIC_CFG bits supported) | (flags << 32) + * (flags are CMD_NIC_CFG_CAPF_xxx) + */ + CMD_NIC_CFG_CHK = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 16), + /* union vnic_rss_key in mem: (u64)a0=paddr, (u16)a1=len */ CMD_RSS_KEY = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 17), @@ -605,6 +623,9 @@ enum filter_cap_mode { /* flags for CMD_INIT */ #define CMD_INITF_DEFAULT_MAC 0x1 /* init with default mac addr */ +/* flags for CMD_NIC_CFG */ +#define CMD_NIC_CFG_CAPF_UDP_WEAK (1ULL << 0) /* Bodega-style UDP RSS */ + /* flags for CMD_PACKET_FILTER */ #define CMD_PFILTER_DIRECTED 0x01 #define CMD_PFILTER_MULTICAST 0x02 diff --git a/drivers/net/enic/base/vnic_enet.h b/drivers/net/enic/base/vnic_enet.h index 49504a7da..901f3b46e 100644 --- a/drivers/net/enic/base/vnic_enet.h +++ b/drivers/net/enic/base/vnic_enet.h @@ -53,9 +53,8 @@ struct vnic_enet_config { #define VENETF_NVGRE 0x20000 /* NVGRE offload */ #define VENETF_GRPINTR 0x40000 /* group interrupt */ #define VENETF_NICSWITCH 0x80000 /* NICSWITCH enabled */ -#define VENETF_RSSHASH_UDP_WEAK 0x100000 /* VIC has Bodega-style UDP RSS */ -#define VENETF_RSSHASH_UDPIPV4 0x200000 /* Hash on UDP + IPv4 fields */ -#define VENETF_RSSHASH_UDPIPV6 0x400000 /* Hash on UDP + IPv6 fields */ +#define VENETF_RSSHASH_UDPIPV4 0x100000 /* Hash on UDP + IPv4 fields */ +#define VENETF_RSSHASH_UDPIPV6 0x200000 /* Hash on UDP + IPv6 fields */ #define VENET_INTR_TYPE_MIN 0 /* Timer specs min interrupt spacing */ #define VENET_INTR_TYPE_IDLE 1 /* Timer specs idle time before irq */ diff --git a/drivers/net/enic/base/vnic_nic.h b/drivers/net/enic/base/vnic_nic.h index e318d0cb5..160408522 100644 --- a/drivers/net/enic/base/vnic_nic.h +++ b/drivers/net/enic/base/vnic_nic.h @@ -32,8 +32,8 @@ #define NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 (1 << 2) #define NIC_CFG_RSS_HASH_TYPE_IPV6 (1 << 3) #define NIC_CFG_RSS_HASH_TYPE_TCP_IPV6 (1 << 4) -#define NIC_CFG_RSS_HASH_TYPE_IPV6_EX (1 << 5) -#define NIC_CFG_RSS_HASH_TYPE_TCP_IPV6_EX (1 << 6) +#define NIC_CFG_RSS_HASH_TYPE_RSVD1 (1 << 5) +#define NIC_CFG_RSS_HASH_TYPE_RSVD2 (1 << 6) #define NIC_CFG_RSS_HASH_TYPE_UDP_IPV6 (1 << 7) static inline void vnic_set_nic_cfg(u32 *nic_cfg, diff --git a/drivers/net/enic/enic.h b/drivers/net/enic/enic.h index ee83fe573..ea0a688d3 100644 --- a/drivers/net/enic/enic.h +++ b/drivers/net/enic/enic.h @@ -123,6 +123,8 @@ struct enic { u8 filter_actions; /* HW supported actions */ bool vxlan; bool disable_overlay; /* devargs disable_overlay=1 */ + bool nic_cfg_chk; /* NIC_CFG_CHK available */ + bool udp_rss_weak; /* Bodega style UDP RSS */ unsigned int flags; unsigned int priv_flags; diff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c index a25d303de..899603fa7 100644 --- a/drivers/net/enic/enic_main.c +++ b/drivers/net/enic/enic_main.c @@ -1197,7 +1197,7 @@ int enic_set_rss_conf(struct enic *enic, struct rte_eth_rss_conf *rss_conf) rss_hash_type |= NIC_CFG_RSS_HASH_TYPE_TCP_IPV4; if (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) { rss_hash_type |= NIC_CFG_RSS_HASH_TYPE_UDP_IPV4; - if (ENIC_SETTING(enic, RSSHASH_UDP_WEAK)) { + if (enic->udp_rss_weak) { /* * 'TCP' is not a typo. The "weak" version of * UDP RSS requires both the TCP and UDP bits @@ -1213,7 +1213,7 @@ int enic_set_rss_conf(struct enic *enic, struct rte_eth_rss_conf *rss_conf) rss_hash_type |= NIC_CFG_RSS_HASH_TYPE_TCP_IPV6; if (rss_hf & (ETH_RSS_NONFRAG_IPV6_UDP | ETH_RSS_IPV6_UDP_EX)) { rss_hash_type |= NIC_CFG_RSS_HASH_TYPE_UDP_IPV6; - if (ENIC_SETTING(enic, RSSHASH_UDP_WEAK)) + if (enic->udp_rss_weak) rss_hash_type |= NIC_CFG_RSS_HASH_TYPE_TCP_IPV6; } } else { @@ -1237,8 +1237,11 @@ int enic_set_rss_conf(struct enic *enic, struct rte_eth_rss_conf *rss_conf) enic->rss_hf = rss_hf; enic->rss_hash_type = rss_hash_type; enic->rss_enable = rss_enable; + } else { + dev_err(enic, "Failed to update RSS configurations." + " hash=0x%x\n", rss_hash_type); } - return 0; + return ret; } int enic_set_vlan_strip(struct enic *enic) diff --git a/drivers/net/enic/enic_res.c b/drivers/net/enic/enic_res.c index 6b404c3c0..d1113b2f1 100644 --- a/drivers/net/enic/enic_res.c +++ b/drivers/net/enic/enic_res.c @@ -82,6 +82,8 @@ int enic_get_vnic_config(struct enic *enic) "Error getting filter modes, %d\n", err); return err; } + vnic_dev_capable_udp_rss_weak(enic->vdev, &enic->nic_cfg_chk, + &enic->udp_rss_weak); dev_info(enic, "Flow api filter mode: %s Actions: %s%s%s\n", ((enic->flow_filter_mode == FILTER_DPDK_1) ? "DPDK" : @@ -124,7 +126,7 @@ int enic_get_vnic_config(struct enic *enic) ENIC_SETTING(enic, RXCSUM) ? "yes" : "no", ENIC_SETTING(enic, RSS) ? (ENIC_SETTING(enic, RSSHASH_UDPIPV4) ? "+UDP" : - ((ENIC_SETTING(enic, RSSHASH_UDP_WEAK) ? "+udp" : + ((enic->udp_rss_weak ? "+udp" : "yes"))) : "no", c->intr_mode == VENET_INTR_MODE_INTX ? "INTx" : c->intr_mode == VENET_INTR_MODE_MSI ? "MSI" : @@ -161,7 +163,7 @@ int enic_get_vnic_config(struct enic *enic) if (ENIC_SETTING(enic, RSSHASH_TCPIPV6)) enic->flow_type_rss_offloads |= ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX; - if (ENIC_SETTING(enic, RSSHASH_UDP_WEAK)) + if (enic->udp_rss_weak) enic->flow_type_rss_offloads |= ETH_RSS_NONFRAG_IPV4_UDP | ETH_RSS_NONFRAG_IPV6_UDP | ETH_RSS_IPV6_UDP_EX; @@ -235,6 +237,7 @@ int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en, u8 ig_vlan_strip_en) { + enum vnic_devcmd_cmd cmd; u64 a0, a1; u32 nic_cfg; int wait = 1000; @@ -245,8 +248,8 @@ int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type, a0 = nic_cfg; a1 = 0; - - return vnic_dev_cmd(enic->vdev, CMD_NIC_CFG, &a0, &a1, wait); + cmd = enic->nic_cfg_chk ? CMD_NIC_CFG_CHK : CMD_NIC_CFG; + return vnic_dev_cmd(enic->vdev, cmd, &a0, &a1, wait); } int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len) From patchwork Thu Jun 28 03:19:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "John Daley (johndale)" X-Patchwork-Id: 41773 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 59AA91B05A; Thu, 28 Jun 2018 05:20:48 +0200 (CEST) Received: from rcdn-iport-1.cisco.com (rcdn-iport-1.cisco.com [173.37.86.72]) by dpdk.org (Postfix) with ESMTP id 321061B000 for ; Thu, 28 Jun 2018 05:20:47 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=@cisco.com; l=3734; q=dns/txt; s=iport; t=1530156047; x=1531365647; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=SGfGJDEmX6ucf0xzKaYwyLNvkxD9cNDYr5Gj2IzsEng=; b=Bf86RWcvmKPKwIfaRgyh0LZ6GNlWWMNrW3urDinyJBshNErOkdEAtgFZ D3ZZXjNKkmyUupYSlFqybO5vTKcvpni5I/uBNvpa31AMDHJ/o3i4P2zgh oT0XnfrHk8B6vn74LVSa5OPuiYfD6J/joWamRQYlZUqtYNrlyuoRikT/y s=; X-IronPort-AV: E=Sophos;i="5.51,281,1526342400"; d="scan'208";a="416306956" Received: from rcdn-core-11.cisco.com ([173.37.93.147]) by rcdn-iport-1.cisco.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2018 03:20:46 +0000 Received: from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48]) by rcdn-core-11.cisco.com (8.14.5/8.14.5) with ESMTP id w5S3KkZW029203; Thu, 28 Jun 2018 03:20:46 GMT Received: by cisco.com (Postfix, from userid 392789) id 0855120F2001; Wed, 27 Jun 2018 20:20:46 -0700 (PDT) From: John Daley To: ferruh.yigit@intel.com Cc: dev@dpdk.org, Hyong Youb Kim Date: Wed, 27 Jun 2018 20:19:29 -0700 Message-Id: <20180628031940.17397-3-johndale@cisco.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180628031940.17397-1-johndale@cisco.com> References: <20180628031940.17397-1-johndale@cisco.com> Subject: [dpdk-dev] [PATCH 03/14] net/enic: do not overwrite admin Tx queue limit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hyong Youb Kim Currently, enic_alloc_wq (via rte_eth_tx_queue_setup) may overwrite the admin limit with a lower value. This is wrong as seen in the following sequence. 1. UCS admin-set Tx queue limit (config.wq_desc_count) = 4096 2. Set up tx queue with 512 descriptors The admin limit (config.wq_desc_count) becomes 512. 3. Stop ports and now set up Tx queue with 1024 descriptors. This fails because 1024 is greater than the admin limit (512). Do not modify the admin limit, and when queried, report the current number of descriptors instead of the admin limit. The rx queue setup (enic_alloc_rq) does not this problem. Fixes: fefed3d1e62c ("enic: new driver") Signed-off-by: Hyong Youb Kim Reviewed-by: John Daley --- drivers/net/enic/enic_ethdev.c | 5 +++-- drivers/net/enic/enic_main.c | 30 ++++++++++++++---------------- 2 files changed, 17 insertions(+), 18 deletions(-) diff --git a/drivers/net/enic/enic_ethdev.c b/drivers/net/enic/enic_ethdev.c index 286308924..6ebad8d96 100644 --- a/drivers/net/enic/enic_ethdev.c +++ b/drivers/net/enic/enic_ethdev.c @@ -731,13 +731,14 @@ static void enicpmd_dev_rxq_info_get(struct rte_eth_dev *dev, } static void enicpmd_dev_txq_info_get(struct rte_eth_dev *dev, - __rte_unused uint16_t tx_queue_id, + uint16_t tx_queue_id, struct rte_eth_txq_info *qinfo) { struct enic *enic = pmd_priv(dev); + struct vnic_wq *wq = &enic->wq[tx_queue_id]; ENICPMD_FUNC_TRACE(); - qinfo->nb_desc = enic->config.wq_desc_count; + qinfo->nb_desc = wq->ring.desc_count; memset(&qinfo->conf, 0, sizeof(qinfo->conf)); qinfo->conf.offloads = enic->tx_offload_capa; /* tx_thresh, and all the other fields are not applicable for enic */ diff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c index 899603fa7..aba2ff5a7 100644 --- a/drivers/net/enic/enic_main.c +++ b/drivers/net/enic/enic_main.c @@ -869,25 +869,23 @@ int enic_alloc_wq(struct enic *enic, uint16_t queue_idx, static int instance; wq->socket_id = socket_id; - if (nb_desc) { - if (nb_desc > enic->config.wq_desc_count) { - dev_warning(enic, - "WQ %d - number of tx desc in cmd line (%d)"\ - "is greater than that in the UCSM/CIMC adapter"\ - "policy. Applying the value in the adapter "\ - "policy (%d)\n", - queue_idx, nb_desc, enic->config.wq_desc_count); - } else if (nb_desc != enic->config.wq_desc_count) { - enic->config.wq_desc_count = nb_desc; - dev_info(enic, - "TX Queues - effective number of descs:%d\n", - nb_desc); - } + if (nb_desc > enic->config.wq_desc_count) { + dev_warning(enic, + "WQ %d - number of tx desc in cmd line (%d) " + "is greater than that in the UCSM/CIMC adapter " + "policy. Applying the value in the adapter " + "policy (%d)\n", + queue_idx, nb_desc, enic->config.wq_desc_count); + nb_desc = enic->config.wq_desc_count; + } else if (nb_desc != enic->config.wq_desc_count) { + dev_info(enic, + "TX Queues - effective number of descs:%d\n", + nb_desc); } /* Allocate queue resources */ err = vnic_wq_alloc(enic->vdev, &enic->wq[queue_idx], queue_idx, - enic->config.wq_desc_count, + nb_desc, sizeof(struct wq_enet_desc)); if (err) { dev_err(enic, "error in allocation of wq\n"); @@ -895,7 +893,7 @@ int enic_alloc_wq(struct enic *enic, uint16_t queue_idx, } err = vnic_cq_alloc(enic->vdev, &enic->cq[cq_index], cq_index, - socket_id, enic->config.wq_desc_count, + socket_id, nb_desc, sizeof(struct cq_enet_wq_desc)); if (err) { vnic_wq_free(wq); From patchwork Thu Jun 28 03:19:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "John Daley (johndale)" X-Patchwork-Id: 41774 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 2881B1B04F; Thu, 28 Jun 2018 05:21:13 +0200 (CEST) Received: from rcdn-iport-6.cisco.com (rcdn-iport-6.cisco.com [173.37.86.77]) by dpdk.org (Postfix) with ESMTP id 6DDD21B04F for ; Thu, 28 Jun 2018 05:21:11 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=@cisco.com; l=1283; q=dns/txt; s=iport; t=1530156071; x=1531365671; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=hElbvEo+lbK1WLzGfEm3Pal6WbsdopkRyVGnhRTAELI=; b=IkyxjuVlUsDGBRcu1of7QGOwIQ5YTpG7LqM1k1ZINk8s9fQPMvY80/+C lw37Kqq0U+XOq0mZDDfccdNfRyqsPrRv/FS9CU+Uw8fFerQng5O/2Om2o uzRfb8tOq2BuHMENKaPm3ZGninjaiUciFBhz76tf7fDwopC38bT04Y3M0 o=; X-IronPort-AV: E=Sophos;i="5.51,281,1526342400"; d="scan'208";a="416421047" Received: from alln-core-3.cisco.com ([173.36.13.136]) by rcdn-iport-6.cisco.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2018 03:21:10 +0000 Received: from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48]) by alln-core-3.cisco.com (8.14.5/8.14.5) with ESMTP id w5S3LAr5030052; Thu, 28 Jun 2018 03:21:10 GMT Received: by cisco.com (Postfix, from userid 392789) id 4EE6620F2001; Wed, 27 Jun 2018 20:21:10 -0700 (PDT) From: John Daley To: ferruh.yigit@intel.com Cc: dev@dpdk.org, Hyong Youb Kim Date: Wed, 27 Jun 2018 20:19:30 -0700 Message-Id: <20180628031940.17397-4-johndale@cisco.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180628031940.17397-1-johndale@cisco.com> References: <20180628031940.17397-1-johndale@cisco.com> Subject: [dpdk-dev] [PATCH 04/14] net/enic: initialize RQ fetch index before enabling RQ X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hyong Youb Kim The fetch index must be initialized only when RQ is disabled. Otherwise, it may lead to stale entries in IG descriptor cache on the VIC. Fixes: a74629cfa3a1 ("net/enic: enable RQ first and then post Rx buffers") Signed-off-by: Hyong Youb Kim Reviewed-by: John Daley --- drivers/net/enic/enic_main.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c index aba2ff5a7..863d2463c 100644 --- a/drivers/net/enic/enic_main.c +++ b/drivers/net/enic/enic_main.c @@ -320,6 +320,8 @@ enic_alloc_rx_queue_mbufs(struct enic *enic, struct vnic_rq *rq) * enic_start_rq(). */ rq->need_initial_post = true; + /* Initialize fetch index while RQ is disabled */ + iowrite32(0, &rq->ctrl->fetch_index); return 0; } @@ -345,7 +347,6 @@ enic_initial_post_rx(struct enic *enic, struct vnic_rq *rq) dev_debug(enic, "port=%u, qidx=%u, Write %u posted idx, %u sw held\n", enic->port_id, rq->index, rq->posted_index, rq->rx_nb_hold); iowrite32(rq->posted_index, &rq->ctrl->posted_index); - iowrite32(0, &rq->ctrl->fetch_index); rte_rmb(); rq->need_initial_post = false; } From patchwork Thu Jun 28 03:19:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "John Daley (johndale)" X-Patchwork-Id: 41775 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5303F1B14D; Thu, 28 Jun 2018 05:21:33 +0200 (CEST) Received: from rcdn-iport-8.cisco.com (rcdn-iport-8.cisco.com [173.37.86.79]) by dpdk.org (Postfix) with ESMTP id B53D51B063 for ; Thu, 28 Jun 2018 05:21:31 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=@cisco.com; l=4937; q=dns/txt; s=iport; t=1530156091; x=1531365691; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=B6TSHFee0yWICotquYuuFUS08GgLeqFaXpWQe91stao=; b=WwRUVD5W/ZghCzO99iZdFFJ0XFB1Olg5IWt847hvilHpyEW4tYNq6XoN PGOYDa/zCDUM31zPfOk0XfTZP5z5QpSIvonwqa13RF+E8rmsDcMtmaMUI v3FJWmKtKMd6aCekIDLAVxZt7X/7iCeXzFxROH72fl+puvwfGITX6o1pS M=; X-IronPort-AV: E=Sophos;i="5.51,281,1526342400"; d="scan'208";a="414337695" Received: from alln-core-12.cisco.com ([173.36.13.134]) by rcdn-iport-8.cisco.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2018 03:21:30 +0000 Received: from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48]) by alln-core-12.cisco.com (8.14.5/8.14.5) with ESMTP id w5S3LUm7017422; Thu, 28 Jun 2018 03:21:30 GMT Received: by cisco.com (Postfix, from userid 392789) id 8FA4420F2001; Wed, 27 Jun 2018 20:21:30 -0700 (PDT) From: John Daley To: ferruh.yigit@intel.com Cc: dev@dpdk.org, Hyong Youb Kim Date: Wed, 27 Jun 2018 20:19:31 -0700 Message-Id: <20180628031940.17397-5-johndale@cisco.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180628031940.17397-1-johndale@cisco.com> References: <20180628031940.17397-1-johndale@cisco.com> Subject: [dpdk-dev] [PATCH 05/14] net/enic: report ring limits and preferred default values X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hyong Youb Kim Report min/max ring sizes, alignments, and so on, and rely on the common checks implemented in the rte_ethdev layer. Signed-off-by: Hyong Youb Kim Reviewed-by: John Daley --- drivers/net/enic/enic_ethdev.c | 24 ++++++++++++++++++++++++ drivers/net/enic/enic_main.c | 24 ++++++++---------------- drivers/net/enic/enic_res.h | 12 ++++++++++++ 3 files changed, 44 insertions(+), 16 deletions(-) diff --git a/drivers/net/enic/enic_ethdev.c b/drivers/net/enic/enic_ethdev.c index 6ebad8d96..697dd6508 100644 --- a/drivers/net/enic/enic_ethdev.c +++ b/drivers/net/enic/enic_ethdev.c @@ -482,6 +482,30 @@ static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev, device_info->reta_size = enic->reta_size; device_info->hash_key_size = enic->hash_key_size; device_info->flow_type_rss_offloads = enic->flow_type_rss_offloads; + device_info->rx_desc_lim = (struct rte_eth_desc_lim) { + .nb_max = enic->config.rq_desc_count, + .nb_min = ENIC_MIN_RQ_DESCS, + .nb_align = ENIC_ALIGN_DESCS, + }; + device_info->tx_desc_lim = (struct rte_eth_desc_lim) { + .nb_max = enic->config.wq_desc_count, + .nb_min = ENIC_MIN_WQ_DESCS, + .nb_align = ENIC_ALIGN_DESCS, + .nb_seg_max = ENIC_TX_XMIT_MAX, + .nb_mtu_seg_max = ENIC_NON_TSO_MAX_DESC, + }; + device_info->default_rxportconf = (struct rte_eth_dev_portconf) { + .burst_size = ENIC_DEFAULT_RX_BURST, + .ring_size = RTE_MIN(device_info->rx_desc_lim.nb_max, + ENIC_DEFAULT_RX_RING_SIZE), + .nb_queues = ENIC_DEFAULT_RX_RINGS, + }; + device_info->default_txportconf = (struct rte_eth_dev_portconf) { + .burst_size = ENIC_DEFAULT_TX_BURST, + .ring_size = RTE_MIN(device_info->tx_desc_lim.nb_max, + ENIC_DEFAULT_TX_RING_SIZE), + .nb_queues = ENIC_DEFAULT_TX_RINGS, + }; } static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev) diff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c index 863d2463c..2cd85168d 100644 --- a/drivers/net/enic/enic_main.c +++ b/drivers/net/enic/enic_main.c @@ -743,8 +743,8 @@ int enic_alloc_rq(struct enic *enic, uint16_t queue_idx, } /* number of descriptors have to be a multiple of 32 */ - nb_sop_desc = (nb_desc / mbufs_per_pkt) & ~0x1F; - nb_data_desc = (nb_desc - nb_sop_desc) & ~0x1F; + nb_sop_desc = (nb_desc / mbufs_per_pkt) & ENIC_ALIGN_DESCS_MASK; + nb_data_desc = (nb_desc - nb_sop_desc) & ENIC_ALIGN_DESCS_MASK; rq_sop->max_mbufs_per_pkt = mbufs_per_pkt; rq_data->max_mbufs_per_pkt = mbufs_per_pkt; @@ -752,7 +752,7 @@ int enic_alloc_rq(struct enic *enic, uint16_t queue_idx, if (mbufs_per_pkt > 1) { min_sop = 64; max_sop = ((enic->config.rq_desc_count / - (mbufs_per_pkt - 1)) & ~0x1F); + (mbufs_per_pkt - 1)) & ENIC_ALIGN_DESCS_MASK); min_data = min_sop * (mbufs_per_pkt - 1); max_data = enic->config.rq_desc_count; } else { @@ -870,19 +870,11 @@ int enic_alloc_wq(struct enic *enic, uint16_t queue_idx, static int instance; wq->socket_id = socket_id; - if (nb_desc > enic->config.wq_desc_count) { - dev_warning(enic, - "WQ %d - number of tx desc in cmd line (%d) " - "is greater than that in the UCSM/CIMC adapter " - "policy. Applying the value in the adapter " - "policy (%d)\n", - queue_idx, nb_desc, enic->config.wq_desc_count); - nb_desc = enic->config.wq_desc_count; - } else if (nb_desc != enic->config.wq_desc_count) { - dev_info(enic, - "TX Queues - effective number of descs:%d\n", - nb_desc); - } + /* + * rte_eth_tx_queue_setup() checks min, max, and alignment. So just + * print an info message for diagnostics. + */ + dev_info(enic, "TX Queues - effective number of descs:%d\n", nb_desc); /* Allocate queue resources */ err = vnic_wq_alloc(enic->vdev, &enic->wq[queue_idx], queue_idx, diff --git a/drivers/net/enic/enic_res.h b/drivers/net/enic/enic_res.h index e68f1307b..6a3a0c5cc 100644 --- a/drivers/net/enic/enic_res.h +++ b/drivers/net/enic/enic_res.h @@ -16,6 +16,10 @@ #define ENIC_MIN_RQ_DESCS 64 #define ENIC_MAX_RQ_DESCS 4096 +/* A descriptor ring has a multiple of 32 descriptors */ +#define ENIC_ALIGN_DESCS 32 +#define ENIC_ALIGN_DESCS_MASK ~(ENIC_ALIGN_DESCS - 1) + #define ENIC_MIN_MTU 68 /* Does not include (possible) inserted VLAN tag and FCS */ @@ -31,6 +35,14 @@ #define ENIC_DEFAULT_RX_FREE_THRESH 32 #define ENIC_TX_XMIT_MAX 64 +/* Defaults for dev_info.default_{rx,tx}portconf */ +#define ENIC_DEFAULT_RX_BURST 32 +#define ENIC_DEFAULT_RX_RINGS 1 +#define ENIC_DEFAULT_RX_RING_SIZE 512 +#define ENIC_DEFAULT_TX_BURST 32 +#define ENIC_DEFAULT_TX_RINGS 1 +#define ENIC_DEFAULT_TX_RING_SIZE 512 + #define ENIC_RSS_DEFAULT_CPU 0 #define ENIC_RSS_BASE_CPU 0 #define ENIC_RSS_HASH_BITS 7 From patchwork Thu Jun 28 03:19:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "John Daley (johndale)" X-Patchwork-Id: 41776 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BA8D01B063; Thu, 28 Jun 2018 05:21:52 +0200 (CEST) Received: from alln-iport-6.cisco.com (alln-iport-6.cisco.com [173.37.142.93]) by dpdk.org (Postfix) with ESMTP id 6BBBE1B063 for ; Thu, 28 Jun 2018 05:21:50 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=@cisco.com; l=5039; q=dns/txt; s=iport; t=1530156110; x=1531365710; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=DSJfudXnC1IJgkDwQA4JzF6BADNUrqA7sbrVwyIP2Vs=; b=Ct2mjY6A4zWH1ly/EFmErocS452Ud5Rl/GFVFSXOTpdO5O19JgDNnVVh 0MyR7TGFbAaGICulNBrmaFza6QkcyQQgS7pnZvAAAEgkcJmourtsaZwlw IcG35S1MJ7peWow9Hlk9fL5kA4ri8RY5QJXPu4DqJbAUjhx2tW2XwFhvj E=; X-IronPort-AV: E=Sophos;i="5.51,281,1526342400"; d="scan'208";a="135100825" Received: from alln-core-7.cisco.com ([173.36.13.140]) by alln-iport-6.cisco.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2018 03:21:49 +0000 Received: from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48]) by alln-core-7.cisco.com (8.14.5/8.14.5) with ESMTP id w5S3Ln16020224; Thu, 28 Jun 2018 03:21:49 GMT Received: by cisco.com (Postfix, from userid 392789) id 4074220F2001; Wed, 27 Jun 2018 20:21:49 -0700 (PDT) From: John Daley To: ferruh.yigit@intel.com Cc: dev@dpdk.org, Hyong Youb Kim Date: Wed, 27 Jun 2018 20:19:32 -0700 Message-Id: <20180628031940.17397-6-johndale@cisco.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180628031940.17397-1-johndale@cisco.com> References: <20180628031940.17397-1-johndale@cisco.com> Subject: [dpdk-dev] [PATCH 06/14] net/enic: add devarg to specify ingress VLAN rewrite mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hyong Youb Kim Add a new devarg "ig-vlan-rewrite" to allow the user to set non-default rewrite mode. The UCS VIC may add/remove/modify the VLAN header of an ingress packet depending on the ingress VLAN rewrite mode. By default, the driver sets the pass-through mode, which tells the NIC "do not touch VLAN header and preserve it as is". This mode is usually sufficient, but can complicate deployments for certain environments. For example, OVS-DPDK in UCS blade environments may want to use "untag default VLAN mode", which removes the VLAN header from an ingress packet if it matches vNIC's default VLAN. Signed-off-by: Hyong Youb Kim Reviewed-by: John Daley --- drivers/net/enic/enic.h | 1 + drivers/net/enic/enic_ethdev.c | 46 +++++++++++++++++++++++++++++++++++++++--- drivers/net/enic/enic_main.c | 4 +++- 3 files changed, 47 insertions(+), 4 deletions(-) diff --git a/drivers/net/enic/enic.h b/drivers/net/enic/enic.h index ea0a688d3..f1895fe70 100644 --- a/drivers/net/enic/enic.h +++ b/drivers/net/enic/enic.h @@ -125,6 +125,7 @@ struct enic { bool disable_overlay; /* devargs disable_overlay=1 */ bool nic_cfg_chk; /* NIC_CFG_CHK available */ bool udp_rss_weak; /* Bodega style UDP RSS */ + uint8_t ig_vlan_rewrite_mode; /* devargs ig-vlan-rewrite */ unsigned int flags; unsigned int priv_flags; diff --git a/drivers/net/enic/enic_ethdev.c b/drivers/net/enic/enic_ethdev.c index 697dd6508..111bdc82c 100644 --- a/drivers/net/enic/enic_ethdev.c +++ b/drivers/net/enic/enic_ethdev.c @@ -41,6 +41,7 @@ static const struct rte_pci_id pci_id_enic_map[] = { }; #define ENIC_DEVARG_DISABLE_OVERLAY "disable-overlay" +#define ENIC_DEVARG_IG_VLAN_REWRITE "ig-vlan-rewrite" RTE_INIT(enicpmd_init_log); static void @@ -858,23 +859,61 @@ static int enic_parse_disable_overlay(__rte_unused const char *key, return 0; } +static int enic_parse_ig_vlan_rewrite(__rte_unused const char *key, + const char *value, + void *opaque) +{ + struct enic *enic; + + enic = (struct enic *)opaque; + if (strcmp(value, "trunk") == 0) { + /* Trunk mode: always tag */ + enic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_DEFAULT_TRUNK; + } else if (strcmp(value, "untag") == 0) { + /* Untag default VLAN mode: untag if VLAN = default VLAN */ + enic->ig_vlan_rewrite_mode = + IG_VLAN_REWRITE_MODE_UNTAG_DEFAULT_VLAN; + } else if (strcmp(value, "priority") == 0) { + /* + * Priority-tag default VLAN mode: priority tag (VLAN header + * with ID=0) if VLAN = default + */ + enic->ig_vlan_rewrite_mode = + IG_VLAN_REWRITE_MODE_PRIORITY_TAG_DEFAULT_VLAN; + } else if (strcmp(value, "pass") == 0) { + /* Pass through mode: do not touch tags */ + enic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_PASS_THRU; + } else { + dev_err(enic, "Invalid value for " ENIC_DEVARG_IG_VLAN_REWRITE + ": expected=trunk|untag|priority|pass given=%s\n", + value); + return -EINVAL; + } + return 0; +} + static int enic_check_devargs(struct rte_eth_dev *dev) { static const char *const valid_keys[] = { - ENIC_DEVARG_DISABLE_OVERLAY, NULL}; + ENIC_DEVARG_DISABLE_OVERLAY, + ENIC_DEVARG_IG_VLAN_REWRITE, + NULL}; struct enic *enic = pmd_priv(dev); struct rte_kvargs *kvlist; ENICPMD_FUNC_TRACE(); enic->disable_overlay = false; + enic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_PASS_THRU; if (!dev->device->devargs) return 0; kvlist = rte_kvargs_parse(dev->device->devargs->args, valid_keys); if (!kvlist) return -EINVAL; if (rte_kvargs_process(kvlist, ENIC_DEVARG_DISABLE_OVERLAY, - enic_parse_disable_overlay, enic) < 0) { + enic_parse_disable_overlay, enic) < 0 || + rte_kvargs_process(kvlist, ENIC_DEVARG_IG_VLAN_REWRITE, + enic_parse_ig_vlan_rewrite, enic) < 0) { rte_kvargs_free(kvlist); return -EINVAL; } @@ -939,4 +978,5 @@ RTE_PMD_REGISTER_PCI(net_enic, rte_enic_pmd); RTE_PMD_REGISTER_PCI_TABLE(net_enic, pci_id_enic_map); RTE_PMD_REGISTER_KMOD_DEP(net_enic, "* igb_uio | uio_pci_generic | vfio-pci"); RTE_PMD_REGISTER_PARAM_STRING(net_enic, - ENIC_DEVARG_DISABLE_OVERLAY "=<0|1> "); + ENIC_DEVARG_DISABLE_OVERLAY "=0|1 " + ENIC_DEVARG_IG_VLAN_REWRITE "=trunk|untag|priority|pass"); diff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c index 2cd85168d..24de38d5e 100644 --- a/drivers/net/enic/enic_main.c +++ b/drivers/net/enic/enic_main.c @@ -1637,8 +1637,10 @@ int enic_probe(struct enic *enic) } /* Set ingress vlan rewrite mode before vnic initialization */ + dev_debug(enic, "Set ig_vlan_rewrite_mode=%u\n", + enic->ig_vlan_rewrite_mode); err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev, - IG_VLAN_REWRITE_MODE_PASS_THRU); + enic->ig_vlan_rewrite_mode); if (err) { dev_err(enic, "Failed to set ingress vlan rewrite mode, aborting.\n"); From patchwork Thu Jun 28 03:19:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "John Daley (johndale)" X-Patchwork-Id: 41777 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 915A01B3AA; Thu, 28 Jun 2018 05:22:00 +0200 (CEST) Received: from rcdn-iport-2.cisco.com (rcdn-iport-2.cisco.com [173.37.86.73]) by dpdk.org (Postfix) with ESMTP id C4DD31B06D for ; Thu, 28 Jun 2018 05:21:58 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=@cisco.com; l=4780; q=dns/txt; s=iport; t=1530156118; x=1531365718; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=HdbHMTyxvoTvy3bo9CoqM48KPQcm509mfGRGv+NRWkU=; b=WhKNUKkHbx4G3ijKS4ev6L0RTmeHB+/7iIYQSEsFY4wZPkb0GRtrJXfR MCE6tWtJL4BrJQrLrUTPfJSTNLNQKMJaGwu4wrZOp6ClEadW9hjsxB+8e 9f4FL0WzVCEb1qdEWXOaPL2PwHPRo64FggX95YckCjB03qfQb5lW+h/KT 8=; X-IronPort-AV: E=Sophos;i="5.51,281,1526342400"; d="scan'208";a="419538925" Received: from alln-core-12.cisco.com ([173.36.13.134]) by rcdn-iport-2.cisco.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2018 03:21:58 +0000 Received: from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48]) by alln-core-12.cisco.com (8.14.5/8.14.5) with ESMTP id w5S3Lvbn017654; Thu, 28 Jun 2018 03:21:57 GMT Received: by cisco.com (Postfix, from userid 392789) id B61C520F2001; Wed, 27 Jun 2018 20:21:57 -0700 (PDT) From: John Daley To: ferruh.yigit@intel.com Cc: dev@dpdk.org, Hyong Youb Kim Date: Wed, 27 Jun 2018 20:19:33 -0700 Message-Id: <20180628031940.17397-7-johndale@cisco.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180628031940.17397-1-johndale@cisco.com> References: <20180628031940.17397-1-johndale@cisco.com> Subject: [dpdk-dev] [PATCH 07/14] net/enic: add handlers to add/delete vxlan port number X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hyong Youb Kim The NIC has one configurable VXLAN port, which is set to the default 4789 upon vNIC reset. Adding a non-default port replaces this single VXLAN port. Deleting the previously added non-default port restores the VXLAN port to the hardware default. Signed-off-by: Hyong Youb Kim Reviewed-by: John Daley --- drivers/net/enic/enic.h | 4 +++ drivers/net/enic/enic_ethdev.c | 75 ++++++++++++++++++++++++++++++++++++++++++ drivers/net/enic/enic_main.c | 1 + 3 files changed, 80 insertions(+) diff --git a/drivers/net/enic/enic.h b/drivers/net/enic/enic.h index f1895fe70..b611f0a24 100644 --- a/drivers/net/enic/enic.h +++ b/drivers/net/enic/enic.h @@ -50,6 +50,9 @@ #define ENICPMD_FDIR_MAX 64 +/* HW default VXLAN port */ +#define ENIC_DEFAULT_VXLAN_PORT 4789 + /* * Interrupt 0: LSC and errors * Interrupt 1: rx queue 0 @@ -126,6 +129,7 @@ struct enic { bool nic_cfg_chk; /* NIC_CFG_CHK available */ bool udp_rss_weak; /* Bodega style UDP RSS */ uint8_t ig_vlan_rewrite_mode; /* devargs ig-vlan-rewrite */ + uint16_t vxlan_port; /* current vxlan port pushed to NIC */ unsigned int flags; unsigned int priv_flags; diff --git a/drivers/net/enic/enic_ethdev.c b/drivers/net/enic/enic_ethdev.c index 111bdc82c..117b362de 100644 --- a/drivers/net/enic/enic_ethdev.c +++ b/drivers/net/enic/enic_ethdev.c @@ -789,6 +789,79 @@ static int enicpmd_dev_rx_queue_intr_disable(struct rte_eth_dev *eth_dev, return 0; } +static int udp_tunnel_common_check(struct enic *enic, + struct rte_eth_udp_tunnel *tnl) +{ + if (tnl->prot_type != RTE_TUNNEL_TYPE_VXLAN) + return -ENOTSUP; + if (!enic->overlay_offload) { + PMD_INIT_LOG(DEBUG, " vxlan (overlay offload) is not " + "supported\n"); + return -ENOTSUP; + } + return 0; +} + +static int update_vxlan_port(struct enic *enic, uint16_t port) +{ + if (vnic_dev_overlay_offload_cfg(enic->vdev, + OVERLAY_CFG_VXLAN_PORT_UPDATE, + port)) { + PMD_INIT_LOG(DEBUG, " failed to update vxlan port\n"); + return -EINVAL; + } + PMD_INIT_LOG(DEBUG, " updated vxlan port to %u\n", port); + enic->vxlan_port = port; + return 0; +} + +static int enicpmd_dev_udp_tunnel_port_add(struct rte_eth_dev *eth_dev, + struct rte_eth_udp_tunnel *tnl) +{ + struct enic *enic = pmd_priv(eth_dev); + int ret; + + ENICPMD_FUNC_TRACE(); + ret = udp_tunnel_common_check(enic, tnl); + if (ret) + return ret; + /* + * The NIC has 1 configurable VXLAN port number. "Adding" a new port + * number replaces it. + */ + if (tnl->udp_port == enic->vxlan_port || tnl->udp_port == 0) { + PMD_INIT_LOG(DEBUG, " %u is already configured or invalid\n", + tnl->udp_port); + return -EINVAL; + } + return update_vxlan_port(enic, tnl->udp_port); +} + +static int enicpmd_dev_udp_tunnel_port_del(struct rte_eth_dev *eth_dev, + struct rte_eth_udp_tunnel *tnl) +{ + struct enic *enic = pmd_priv(eth_dev); + int ret; + + ENICPMD_FUNC_TRACE(); + ret = udp_tunnel_common_check(enic, tnl); + if (ret) + return ret; + /* + * Clear the previously set port number and restore the + * hardware default port number. Some drivers disable VXLAN + * offloads when there are no configured port numbers. But + * enic does not do that as VXLAN is part of overlay offload, + * which is tied to inner RSS and TSO. + */ + if (tnl->udp_port != enic->vxlan_port) { + PMD_INIT_LOG(DEBUG, " %u is not a configured vxlan port\n", + tnl->udp_port); + return -EINVAL; + } + return update_vxlan_port(enic, ENIC_DEFAULT_VXLAN_PORT); +} + static const struct eth_dev_ops enicpmd_eth_dev_ops = { .dev_configure = enicpmd_dev_configure, .dev_start = enicpmd_dev_start, @@ -838,6 +911,8 @@ static const struct eth_dev_ops enicpmd_eth_dev_ops = { .reta_update = enicpmd_dev_rss_reta_update, .rss_hash_conf_get = enicpmd_dev_rss_hash_conf_get, .rss_hash_update = enicpmd_dev_rss_hash_update, + .udp_tunnel_port_add = enicpmd_dev_udp_tunnel_port_add, + .udp_tunnel_port_del = enicpmd_dev_udp_tunnel_port_del, }; static int enic_parse_disable_overlay(__rte_unused const char *key, diff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c index 24de38d5e..e20256986 100644 --- a/drivers/net/enic/enic_main.c +++ b/drivers/net/enic/enic_main.c @@ -1585,6 +1585,7 @@ static int enic_dev_init(struct enic *enic) PKT_TX_OUTER_IP_CKSUM | PKT_TX_TUNNEL_MASK; enic->overlay_offload = true; + enic->vxlan_port = ENIC_DEFAULT_VXLAN_PORT; dev_info(enic, "Overlay offload is enabled\n"); } From patchwork Thu Jun 28 03:19:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "John Daley (johndale)" X-Patchwork-Id: 41778 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 532981B064; Thu, 28 Jun 2018 05:22:30 +0200 (CEST) Received: from alln-iport-8.cisco.com (alln-iport-8.cisco.com [173.37.142.95]) by dpdk.org (Postfix) with ESMTP id 9A6881B006 for ; Thu, 28 Jun 2018 05:22:28 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=@cisco.com; l=5369; q=dns/txt; s=iport; t=1530156148; x=1531365748; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=QHbgNIWd75I/GbA8+MEab5/aPnDguym19LuocyGQPIM=; b=eJAUT/0bOInpSSvFflznu+PMm1bygD7UQN+Y4ARwAEerXjFfbnbG4hWB 5OcHNYRtqr7FvjwIwv9eoxBB+/pH/9QC5dygR3HRppfrZBFmwd9r48/fb DqEV/8pZaTvfuNWdXvYwwgwHr0AIx9wGnc/4sv1jpllhKqJkTuFa9x5IG M=; X-IronPort-AV: E=Sophos;i="5.51,281,1526342400"; d="scan'208";a="135244662" Received: from rcdn-core-10.cisco.com ([173.37.93.146]) by alln-iport-8.cisco.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2018 03:22:27 +0000 Received: from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48]) by rcdn-core-10.cisco.com (8.14.5/8.14.5) with ESMTP id w5S3MRSB020086; Thu, 28 Jun 2018 03:22:27 GMT Received: by cisco.com (Postfix, from userid 392789) id 7C14420F2001; Wed, 27 Jun 2018 20:22:27 -0700 (PDT) From: John Daley To: ferruh.yigit@intel.com Cc: dev@dpdk.org, Hyong Youb Kim Date: Wed, 27 Jun 2018 20:19:34 -0700 Message-Id: <20180628031940.17397-8-johndale@cisco.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180628031940.17397-1-johndale@cisco.com> References: <20180628031940.17397-1-johndale@cisco.com> Subject: [dpdk-dev] [PATCH 08/14] net/enic: use mbuf pointer array for inflight Tx packets X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hyong Youb Kim WQ is currently using vnic_wq_buf to store mbuf pointers for Tx packets. But, it contains an unused mempool pointer and mbuf is unnecessarily cast to void pointer. Remove vnic_wq_buf entirely and use an mbuf pointer array instead. Signed-off-by: Hyong Youb Kim Reviewed-by: John Daley --- drivers/net/enic/base/vnic_wq.c | 8 ++++---- drivers/net/enic/base/vnic_wq.h | 10 ++-------- drivers/net/enic/enic_main.c | 6 +++--- drivers/net/enic/enic_rxtx.c | 18 ++++++------------ 4 files changed, 15 insertions(+), 27 deletions(-) diff --git a/drivers/net/enic/base/vnic_wq.c b/drivers/net/enic/base/vnic_wq.c index d61c4c6e2..a4c08a769 100644 --- a/drivers/net/enic/base/vnic_wq.c +++ b/drivers/net/enic/base/vnic_wq.c @@ -32,8 +32,8 @@ static int vnic_wq_alloc_bufs(struct vnic_wq *wq) { unsigned int count = wq->ring.desc_count; /* Allocate the mbuf ring */ - wq->bufs = (struct vnic_wq_buf *)rte_zmalloc_socket("wq->bufs", - sizeof(struct vnic_wq_buf) * count, + wq->bufs = (struct rte_mbuf **)rte_zmalloc_socket("wq->bufs", + sizeof(struct rte_mbuf *) * count, RTE_CACHE_LINE_SIZE, wq->socket_id); wq->head_idx = 0; wq->tail_idx = 0; @@ -145,9 +145,9 @@ int vnic_wq_disable(struct vnic_wq *wq) } void vnic_wq_clean(struct vnic_wq *wq, - void (*buf_clean)(struct vnic_wq_buf *buf)) + void (*buf_clean)(struct rte_mbuf **buf)) { - struct vnic_wq_buf *buf; + struct rte_mbuf **buf; unsigned int to_clean = wq->tail_idx; buf = &wq->bufs[to_clean]; diff --git a/drivers/net/enic/base/vnic_wq.h b/drivers/net/enic/base/vnic_wq.h index 0135bffc5..86ac10e28 100644 --- a/drivers/net/enic/base/vnic_wq.h +++ b/drivers/net/enic/base/vnic_wq.h @@ -36,19 +36,13 @@ struct vnic_wq_ctrl { u32 pad9; }; -/* 16 bytes */ -struct vnic_wq_buf { - struct rte_mempool *pool; - void *mb; -}; - struct vnic_wq { unsigned int index; uint64_t tx_offload_notsup_mask; struct vnic_dev *vdev; struct vnic_wq_ctrl __iomem *ctrl; /* memory-mapped */ struct vnic_dev_ring ring; - struct vnic_wq_buf *bufs; + struct rte_mbuf **bufs; unsigned int head_idx; unsigned int tail_idx; unsigned int socket_id; @@ -164,5 +158,5 @@ unsigned int vnic_wq_error_status(struct vnic_wq *wq); void vnic_wq_enable(struct vnic_wq *wq); int vnic_wq_disable(struct vnic_wq *wq); void vnic_wq_clean(struct vnic_wq *wq, - void (*buf_clean)(struct vnic_wq_buf *buf)); + void (*buf_clean)(struct rte_mbuf **buf)); #endif /* _VNIC_WQ_H_ */ diff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c index e20256986..c03ec247a 100644 --- a/drivers/net/enic/enic_main.c +++ b/drivers/net/enic/enic_main.c @@ -69,12 +69,12 @@ enic_rxmbuf_queue_release(__rte_unused struct enic *enic, struct vnic_rq *rq) } } -static void enic_free_wq_buf(struct vnic_wq_buf *buf) +static void enic_free_wq_buf(struct rte_mbuf **buf) { - struct rte_mbuf *mbuf = (struct rte_mbuf *)buf->mb; + struct rte_mbuf *mbuf = *buf; rte_pktmbuf_free_seg(mbuf); - buf->mb = NULL; + *buf = NULL; } static void enic_log_q_error(struct enic *enic) diff --git a/drivers/net/enic/enic_rxtx.c b/drivers/net/enic/enic_rxtx.c index bbb0444ad..549288c20 100644 --- a/drivers/net/enic/enic_rxtx.c +++ b/drivers/net/enic/enic_rxtx.c @@ -473,7 +473,7 @@ enic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, static inline void enic_free_wq_bufs(struct vnic_wq *wq, u16 completed_index) { - struct vnic_wq_buf *buf; + struct rte_mbuf *buf; struct rte_mbuf *m, *free[ENIC_MAX_WQ_DESCS]; unsigned int nb_to_free, nb_free = 0, i; struct rte_mempool *pool; @@ -483,13 +483,10 @@ static inline void enic_free_wq_bufs(struct vnic_wq *wq, u16 completed_index) nb_to_free = enic_ring_sub(desc_count, wq->tail_idx, completed_index) + 1; tail_idx = wq->tail_idx; - buf = &wq->bufs[tail_idx]; - pool = ((struct rte_mbuf *)buf->mb)->pool; + pool = wq->bufs[tail_idx]->pool; for (i = 0; i < nb_to_free; i++) { - buf = &wq->bufs[tail_idx]; - m = rte_pktmbuf_prefree_seg((struct rte_mbuf *)(buf->mb)); - buf->mb = NULL; - + buf = wq->bufs[tail_idx]; + m = rte_pktmbuf_prefree_seg(buf); if (unlikely(m == NULL)) { tail_idx = enic_ring_incr(desc_count, tail_idx); continue; @@ -574,7 +571,6 @@ uint16_t enic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint64_t ol_flags_mask; unsigned int wq_desc_avail; int head_idx; - struct vnic_wq_buf *buf; unsigned int desc_count; struct wq_enet_desc *descs, *desc_p, desc_tmp; uint16_t mss; @@ -669,8 +665,7 @@ uint16_t enic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, vlan_id, 0); *desc_p = desc_tmp; - buf = &wq->bufs[head_idx]; - buf->mb = (void *)tx_pkt; + wq->bufs[head_idx] = tx_pkt; head_idx = enic_ring_incr(desc_count, head_idx); wq_desc_avail--; @@ -691,8 +686,7 @@ uint16_t enic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, 0); *desc_p = desc_tmp; - buf = &wq->bufs[head_idx]; - buf->mb = (void *)tx_pkt; + wq->bufs[head_idx] = tx_pkt; head_idx = enic_ring_incr(desc_count, head_idx); wq_desc_avail--; } From patchwork Thu Jun 28 03:19:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "John Daley (johndale)" X-Patchwork-Id: 41779 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8A3DE1B3A0; Thu, 28 Jun 2018 05:23:00 +0200 (CEST) Received: from alln-iport-2.cisco.com (alln-iport-2.cisco.com [173.37.142.89]) by dpdk.org (Postfix) with ESMTP id BAE621B3A0 for ; Thu, 28 Jun 2018 05:22:58 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=@cisco.com; l=5414; q=dns/txt; s=iport; t=1530156178; x=1531365778; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=8rNu1YJDYg4Tmov1cxvCbPi5yE+srLk4h/zDEIwirOI=; b=AjBE0xApIExm1jwIfQXjObUgq2UQKdr0cKv9LWb0nXlOwxpGTesoFc+Y DUgz5w5KFK+ctih/6SLdq3h7Ge/jyI8HlFWDNxVR+MPlLkFjq+Awf6GUi v2O292GV8Bt1bOj9oymFyzUhRKN4f+cYIyU+ur2oACWvwLAoh/KWPoE6w I=; X-IronPort-AV: E=Sophos;i="5.51,281,1526342400"; d="scan'208";a="135715762" Received: from alln-core-3.cisco.com ([173.36.13.136]) by alln-iport-2.cisco.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2018 03:22:58 +0000 Received: from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48]) by alln-core-3.cisco.com (8.14.5/8.14.5) with ESMTP id w5S3Mv0Z030952; Thu, 28 Jun 2018 03:22:57 GMT Received: by cisco.com (Postfix, from userid 392789) id B4BE020F2001; Wed, 27 Jun 2018 20:22:57 -0700 (PDT) From: John Daley To: ferruh.yigit@intel.com Cc: dev@dpdk.org, Hyong Youb Kim Date: Wed, 27 Jun 2018 20:19:35 -0700 Message-Id: <20180628031940.17397-9-johndale@cisco.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180628031940.17397-1-johndale@cisco.com> References: <20180628031940.17397-1-johndale@cisco.com> Subject: [dpdk-dev] [PATCH 09/14] net/enic: support mbuf fast free offload X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hyong Youb Kim Signed-off-by: Hyong Youb Kim Reviewed-by: John Daley --- drivers/net/enic/base/vnic_wq.h | 1 + drivers/net/enic/enic.h | 1 + drivers/net/enic/enic_ethdev.c | 11 ++++++++--- drivers/net/enic/enic_res.c | 2 ++ drivers/net/enic/enic_rxtx.c | 30 +++++++++++++++++++++++++++++- 5 files changed, 41 insertions(+), 4 deletions(-) diff --git a/drivers/net/enic/base/vnic_wq.h b/drivers/net/enic/base/vnic_wq.h index 86ac10e28..6622a8a2d 100644 --- a/drivers/net/enic/base/vnic_wq.h +++ b/drivers/net/enic/base/vnic_wq.h @@ -48,6 +48,7 @@ struct vnic_wq { unsigned int socket_id; const struct rte_memzone *cqmsg_rz; uint16_t last_completed_index; + uint64_t offloads; }; static inline unsigned int vnic_wq_desc_avail(struct vnic_wq *wq) diff --git a/drivers/net/enic/enic.h b/drivers/net/enic/enic.h index b611f0a24..af790fc2e 100644 --- a/drivers/net/enic/enic.h +++ b/drivers/net/enic/enic.h @@ -183,6 +183,7 @@ struct enic { uint64_t rx_offload_capa; /* DEV_RX_OFFLOAD flags */ uint64_t tx_offload_capa; /* DEV_TX_OFFLOAD flags */ + uint64_t tx_queue_offload_capa; /* DEV_TX_OFFLOAD flags */ uint64_t tx_offload_mask; /* PKT_TX flags accepted */ }; diff --git a/drivers/net/enic/enic_ethdev.c b/drivers/net/enic/enic_ethdev.c index 117b362de..ef18f8802 100644 --- a/drivers/net/enic/enic_ethdev.c +++ b/drivers/net/enic/enic_ethdev.c @@ -185,17 +185,21 @@ static int enicpmd_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t queue_idx, uint16_t nb_desc, unsigned int socket_id, - __rte_unused const struct rte_eth_txconf *tx_conf) + const struct rte_eth_txconf *tx_conf) { int ret; struct enic *enic = pmd_priv(eth_dev); + struct vnic_wq *wq; if (rte_eal_process_type() != RTE_PROC_PRIMARY) return -E_RTE_SECONDARY; ENICPMD_FUNC_TRACE(); RTE_ASSERT(queue_idx < enic->conf_wq_count); - eth_dev->data->tx_queues[queue_idx] = (void *)&enic->wq[queue_idx]; + wq = &enic->wq[queue_idx]; + wq->offloads = tx_conf->offloads | + eth_dev->data->dev_conf.txmode.offloads; + eth_dev->data->tx_queues[queue_idx] = (void *)wq; ret = enic_alloc_wq(enic, queue_idx, socket_id, nb_desc); if (ret) { @@ -477,6 +481,7 @@ static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev, device_info->max_mac_addrs = ENIC_MAX_MAC_ADDR; device_info->rx_offload_capa = enic->rx_offload_capa; device_info->tx_offload_capa = enic->tx_offload_capa; + device_info->tx_queue_offload_capa = enic->tx_queue_offload_capa; device_info->default_rxconf = (struct rte_eth_rxconf) { .rx_free_thresh = ENIC_DEFAULT_RX_FREE_THRESH }; @@ -765,7 +770,7 @@ static void enicpmd_dev_txq_info_get(struct rte_eth_dev *dev, ENICPMD_FUNC_TRACE(); qinfo->nb_desc = wq->ring.desc_count; memset(&qinfo->conf, 0, sizeof(qinfo->conf)); - qinfo->conf.offloads = enic->tx_offload_capa; + qinfo->conf.offloads = wq->offloads; /* tx_thresh, and all the other fields are not applicable for enic */ } diff --git a/drivers/net/enic/enic_res.c b/drivers/net/enic/enic_res.c index d1113b2f1..11d66a626 100644 --- a/drivers/net/enic/enic_res.c +++ b/drivers/net/enic/enic_res.c @@ -183,7 +183,9 @@ int enic_get_vnic_config(struct enic *enic) * Default hardware capabilities. enic_dev_init() may add additional * flags if it enables overlay offloads. */ + enic->tx_queue_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE; enic->tx_offload_capa = + enic->tx_queue_offload_capa | DEV_TX_OFFLOAD_MULTI_SEGS | DEV_TX_OFFLOAD_VLAN_INSERT | DEV_TX_OFFLOAD_IPV4_CKSUM | diff --git a/drivers/net/enic/enic_rxtx.c b/drivers/net/enic/enic_rxtx.c index 549288c20..89a1e66fe 100644 --- a/drivers/net/enic/enic_rxtx.c +++ b/drivers/net/enic/enic_rxtx.c @@ -471,6 +471,31 @@ enic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, return nb_rx; } +static void enic_fast_free_wq_bufs(struct vnic_wq *wq, u16 completed_index) +{ + unsigned int desc_count, n, nb_to_free, tail_idx; + struct rte_mempool *pool; + struct rte_mbuf **m; + + desc_count = wq->ring.desc_count; + nb_to_free = enic_ring_sub(desc_count, wq->tail_idx, completed_index) + + 1; + tail_idx = wq->tail_idx; + wq->tail_idx += nb_to_free; + wq->ring.desc_avail += nb_to_free; + if (wq->tail_idx >= desc_count) + wq->tail_idx -= desc_count; + /* First, free at most until the end of ring */ + m = &wq->bufs[tail_idx]; + pool = (*m)->pool; + n = RTE_MIN(nb_to_free, desc_count - tail_idx); + rte_mempool_put_bulk(pool, (void **)m, n); + n = nb_to_free - n; + /* Then wrap and free the rest */ + if (unlikely(n)) + rte_mempool_put_bulk(pool, (void **)wq->bufs, n); +} + static inline void enic_free_wq_bufs(struct vnic_wq *wq, u16 completed_index) { struct rte_mbuf *buf; @@ -518,7 +543,10 @@ unsigned int enic_cleanup_wq(__rte_unused struct enic *enic, struct vnic_wq *wq) completed_index = *((uint32_t *)wq->cqmsg_rz->addr) & 0xffff; if (wq->last_completed_index != completed_index) { - enic_free_wq_bufs(wq, completed_index); + if (wq->offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE) + enic_fast_free_wq_bufs(wq, completed_index); + else + enic_free_wq_bufs(wq, completed_index); wq->last_completed_index = completed_index; } return 0; From patchwork Thu Jun 28 03:19:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "John Daley (johndale)" X-Patchwork-Id: 41780 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B467E1B000; Thu, 28 Jun 2018 05:23:34 +0200 (CEST) Received: from rcdn-iport-6.cisco.com (rcdn-iport-6.cisco.com [173.37.86.77]) by dpdk.org (Postfix) with ESMTP id CB5B41B000 for ; Thu, 28 Jun 2018 05:23:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=@cisco.com; l=3523; q=dns/txt; s=iport; t=1530156212; x=1531365812; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=XLcASu8I4ktZf+E87DXX+AU6zxcN7ZrzWRMNlU//GfE=; b=RYjXLDP4oD99VOungFP12ksKlhyE8Fuzy584Rnwjz3q6UmomD+OtsnoW agrDdOn0chzmK3Z03lp2LJRmBR7n4LAeDrr1e/lqFxa4gQEdVc5K3Bqbo tJdLUDCrYlltWmlji2hf3VaSXWWwtbYF88cjgZ4OsadoHYeu0fytPM7dM g=; X-IronPort-AV: E=Sophos;i="5.51,281,1526342400"; d="scan'208";a="416421504" Received: from rcdn-core-5.cisco.com ([173.37.93.156]) by rcdn-iport-6.cisco.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2018 03:23:32 +0000 Received: from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48]) by rcdn-core-5.cisco.com (8.14.5/8.14.5) with ESMTP id w5S3NVjf015999; Thu, 28 Jun 2018 03:23:32 GMT Received: by cisco.com (Postfix, from userid 392789) id D474320F2001; Wed, 27 Jun 2018 20:23:31 -0700 (PDT) From: John Daley To: ferruh.yigit@intel.com Cc: dev@dpdk.org, Hyong Youb Kim Date: Wed, 27 Jun 2018 20:19:36 -0700 Message-Id: <20180628031940.17397-10-johndale@cisco.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180628031940.17397-1-johndale@cisco.com> References: <20180628031940.17397-1-johndale@cisco.com> Subject: [dpdk-dev] [PATCH 10/14] net/enic: reduce Tx completion updates X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hyong Youb Kim Request one completion update per roughly 32 buffers. It saves DMA resources on the NIC, PCIe utilization, and cache miss rates. Signed-off-by: Hyong Youb Kim Reviewed-by: John Daley --- drivers/net/enic/base/vnic_wq.c | 1 + drivers/net/enic/base/vnic_wq.h | 1 + drivers/net/enic/enic_res.h | 3 +++ drivers/net/enic/enic_rxtx.c | 23 +++++++++++++++++------ 4 files changed, 22 insertions(+), 6 deletions(-) diff --git a/drivers/net/enic/base/vnic_wq.c b/drivers/net/enic/base/vnic_wq.c index a4c08a769..c9bf3572c 100644 --- a/drivers/net/enic/base/vnic_wq.c +++ b/drivers/net/enic/base/vnic_wq.c @@ -113,6 +113,7 @@ void vnic_wq_init(struct vnic_wq *wq, unsigned int cq_index, vnic_wq_init_start(wq, cq_index, 0, 0, error_interrupt_enable, error_interrupt_offset); + wq->cq_pend = 0; wq->last_completed_index = 0; } diff --git a/drivers/net/enic/base/vnic_wq.h b/drivers/net/enic/base/vnic_wq.h index 6622a8a2d..236cf6962 100644 --- a/drivers/net/enic/base/vnic_wq.h +++ b/drivers/net/enic/base/vnic_wq.h @@ -44,6 +44,7 @@ struct vnic_wq { struct vnic_dev_ring ring; struct rte_mbuf **bufs; unsigned int head_idx; + unsigned int cq_pend; unsigned int tail_idx; unsigned int socket_id; const struct rte_memzone *cqmsg_rz; diff --git a/drivers/net/enic/enic_res.h b/drivers/net/enic/enic_res.h index 6a3a0c5cc..6b1f6acad 100644 --- a/drivers/net/enic/enic_res.h +++ b/drivers/net/enic/enic_res.h @@ -20,6 +20,9 @@ #define ENIC_ALIGN_DESCS 32 #define ENIC_ALIGN_DESCS_MASK ~(ENIC_ALIGN_DESCS - 1) +/* Request a completion index every 32 buffers (roughly packets) */ +#define ENIC_WQ_CQ_THRESH 32 + #define ENIC_MIN_MTU 68 /* Does not include (possible) inserted VLAN tag and FCS */ diff --git a/drivers/net/enic/enic_rxtx.c b/drivers/net/enic/enic_rxtx.c index 89a1e66fe..7cddb53d9 100644 --- a/drivers/net/enic/enic_rxtx.c +++ b/drivers/net/enic/enic_rxtx.c @@ -603,7 +603,7 @@ uint16_t enic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, struct wq_enet_desc *descs, *desc_p, desc_tmp; uint16_t mss; uint8_t vlan_tag_insert; - uint8_t eop; + uint8_t eop, cq; uint64_t bus_addr; uint8_t offload_mode; uint16_t header_len; @@ -686,10 +686,14 @@ uint16_t enic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, break; } } - - + wq->cq_pend++; + cq = 0; + if (eop && wq->cq_pend >= ENIC_WQ_CQ_THRESH) { + cq = 1; + wq->cq_pend = 0; + } wq_enet_desc_enc(&desc_tmp, bus_addr, data_len, mss, header_len, - offload_mode, eop, eop, 0, vlan_tag_insert, + offload_mode, eop, cq, 0, vlan_tag_insert, vlan_id, 0); *desc_p = desc_tmp; @@ -702,14 +706,21 @@ uint16_t enic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, tx_pkt->next) { data_len = tx_pkt->data_len; - if (tx_pkt->next == NULL) + wq->cq_pend++; + cq = 0; + if (tx_pkt->next == NULL) { eop = 1; + if (wq->cq_pend >= ENIC_WQ_CQ_THRESH) { + cq = 1; + wq->cq_pend = 0; + } + } desc_p = descs + head_idx; bus_addr = (dma_addr_t)(tx_pkt->buf_iova + tx_pkt->data_off); wq_enet_desc_enc((struct wq_enet_desc *) &desc_tmp, bus_addr, data_len, - mss, 0, offload_mode, eop, eop, + mss, 0, offload_mode, eop, cq, 0, vlan_tag_insert, vlan_id, 0); From patchwork Thu Jun 28 03:19:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "John Daley (johndale)" X-Patchwork-Id: 41781 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D4B5F5B36; Thu, 28 Jun 2018 05:25:41 +0200 (CEST) Received: from alln-iport-1.cisco.com (alln-iport-1.cisco.com [173.37.142.88]) by dpdk.org (Postfix) with ESMTP id 49D5A5B20 for ; Thu, 28 Jun 2018 05:25:40 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=@cisco.com; l=10092; q=dns/txt; s=iport; t=1530156340; x=1531365940; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=hiFzwqa5BKQioiup/I88pZkDvulO3/JtevHVhI6cc8s=; b=Vy2Ba9SFW6V0xv78qMEVywHnaqJXDJctflXdqI5Zz8vGyiEjIRKTv3TU ZFxs+68U5HTa985NzQWG18xdDklaO4aZ9TNRg4q2ZigHIFxZC7H4Q4Y1n 6ouxFP+ehsm40lVjvQjUiwVv3vbylRbCTpjBpxqYfYiWyGKVLKxYLwZ8T c=; X-IronPort-AV: E=Sophos;i="5.51,281,1526342400"; d="scan'208";a="135726619" Received: from rcdn-core-10.cisco.com ([173.37.93.146]) by alln-iport-1.cisco.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2018 03:25:39 +0000 Received: from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48]) by rcdn-core-10.cisco.com (8.14.5/8.14.5) with ESMTP id w5S3PdFP022450; Thu, 28 Jun 2018 03:25:39 GMT Received: by cisco.com (Postfix, from userid 392789) id 4576820F2001; Wed, 27 Jun 2018 20:25:39 -0700 (PDT) From: John Daley To: ferruh.yigit@intel.com Cc: dev@dpdk.org, Hyong Youb Kim Date: Wed, 27 Jun 2018 20:19:37 -0700 Message-Id: <20180628031940.17397-11-johndale@cisco.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180628031940.17397-1-johndale@cisco.com> References: <20180628031940.17397-1-johndale@cisco.com> Subject: [dpdk-dev] [PATCH 11/14] net/enic: add the simple version of Tx handler X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hyong Youb Kim Add a much-simplified handler that works when all offloads are disabled, except mbuf fast free. When compared against the default handler, under ideal conditions, cycles per packet drop by 60+%. By default, the driver tries to use the simple handler. Add a new devarg (disable-simple-tx) to allow the user to force-disable this new handler. The idea of using specialized/simplified handlers is from the Intel and Mellanox drivers. Signed-off-by: Hyong Youb Kim Reviewed-by: John Daley --- drivers/net/enic/enic.h | 3 ++ drivers/net/enic/enic_compat.h | 5 +++ drivers/net/enic/enic_ethdev.c | 31 ++++++++++------- drivers/net/enic/enic_main.c | 37 ++++++++++++++++++++ drivers/net/enic/enic_rxtx.c | 77 ++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 141 insertions(+), 12 deletions(-) diff --git a/drivers/net/enic/enic.h b/drivers/net/enic/enic.h index af790fc2e..e1d0ea552 100644 --- a/drivers/net/enic/enic.h +++ b/drivers/net/enic/enic.h @@ -126,6 +126,7 @@ struct enic { u8 filter_actions; /* HW supported actions */ bool vxlan; bool disable_overlay; /* devargs disable_overlay=1 */ + bool disable_simple_tx; /* devargs disable-simple-tx=1 */ bool nic_cfg_chk; /* NIC_CFG_CHK available */ bool udp_rss_weak; /* Bodega style UDP RSS */ uint8_t ig_vlan_rewrite_mode; /* devargs ig-vlan-rewrite */ @@ -318,6 +319,8 @@ uint16_t enic_dummy_recv_pkts(void *rx_queue, uint16_t nb_pkts); uint16_t enic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts); +uint16_t enic_simple_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, + uint16_t nb_pkts); uint16_t enic_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts); int enic_set_mtu(struct enic *enic, uint16_t new_mtu); diff --git a/drivers/net/enic/enic_compat.h b/drivers/net/enic/enic_compat.h index c0af1ed29..ceb1b0962 100644 --- a/drivers/net/enic/enic_compat.h +++ b/drivers/net/enic/enic_compat.h @@ -56,6 +56,11 @@ #define dev_debug(x, args...) dev_printk(DEBUG, args) extern int enicpmd_logtype_flow; +extern int enicpmd_logtype_init; + +#define PMD_INIT_LOG(level, fmt, args...) \ + rte_log(RTE_LOG_ ## level, enicpmd_logtype_init, \ + "%s" fmt "\n", __func__, ##args) #define __le16 u16 #define __le32 u32 diff --git a/drivers/net/enic/enic_ethdev.c b/drivers/net/enic/enic_ethdev.c index ef18f8802..d013333f9 100644 --- a/drivers/net/enic/enic_ethdev.c +++ b/drivers/net/enic/enic_ethdev.c @@ -24,10 +24,6 @@ int enicpmd_logtype_init; int enicpmd_logtype_flow; -#define PMD_INIT_LOG(level, fmt, args...) \ - rte_log(RTE_LOG_ ## level, enicpmd_logtype_init, \ - "%s" fmt "\n", __func__, ##args) - #define ENICPMD_FUNC_TRACE() PMD_INIT_LOG(DEBUG, " >>") /* @@ -42,6 +38,7 @@ static const struct rte_pci_id pci_id_enic_map[] = { #define ENIC_DEVARG_DISABLE_OVERLAY "disable-overlay" #define ENIC_DEVARG_IG_VLAN_REWRITE "ig-vlan-rewrite" +#define ENIC_DEVARG_DISABLE_SIMPLE_TX "disable-simple-tx" RTE_INIT(enicpmd_init_log); static void @@ -920,22 +917,27 @@ static const struct eth_dev_ops enicpmd_eth_dev_ops = { .udp_tunnel_port_del = enicpmd_dev_udp_tunnel_port_del, }; -static int enic_parse_disable_overlay(__rte_unused const char *key, - const char *value, - void *opaque) +static int enic_parse_zero_one(const char *key, + const char *value, + void *opaque) { struct enic *enic; + bool b; enic = (struct enic *)opaque; if (strcmp(value, "0") == 0) { - enic->disable_overlay = false; + b = false; } else if (strcmp(value, "1") == 0) { - enic->disable_overlay = true; + b = true; } else { - dev_err(enic, "Invalid value for " ENIC_DEVARG_DISABLE_OVERLAY - ": expected=0|1 given=%s\n", value); + dev_err(enic, "Invalid value for %s" + ": expected=0|1 given=%s\n", key, value); return -EINVAL; } + if (strcmp(key, ENIC_DEVARG_DISABLE_OVERLAY) == 0) + enic->disable_overlay = b; + if (strcmp(key, ENIC_DEVARG_DISABLE_SIMPLE_TX) == 0) + enic->disable_simple_tx = b; return 0; } @@ -976,6 +978,7 @@ static int enic_check_devargs(struct rte_eth_dev *dev) { static const char *const valid_keys[] = { ENIC_DEVARG_DISABLE_OVERLAY, + ENIC_DEVARG_DISABLE_SIMPLE_TX, ENIC_DEVARG_IG_VLAN_REWRITE, NULL}; struct enic *enic = pmd_priv(dev); @@ -984,6 +987,7 @@ static int enic_check_devargs(struct rte_eth_dev *dev) ENICPMD_FUNC_TRACE(); enic->disable_overlay = false; + enic->disable_simple_tx = false; enic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_PASS_THRU; if (!dev->device->devargs) return 0; @@ -991,7 +995,9 @@ static int enic_check_devargs(struct rte_eth_dev *dev) if (!kvlist) return -EINVAL; if (rte_kvargs_process(kvlist, ENIC_DEVARG_DISABLE_OVERLAY, - enic_parse_disable_overlay, enic) < 0 || + enic_parse_zero_one, enic) < 0 || + rte_kvargs_process(kvlist, ENIC_DEVARG_DISABLE_SIMPLE_TX, + enic_parse_zero_one, enic) < 0 || rte_kvargs_process(kvlist, ENIC_DEVARG_IG_VLAN_REWRITE, enic_parse_ig_vlan_rewrite, enic) < 0) { rte_kvargs_free(kvlist); @@ -1059,4 +1065,5 @@ RTE_PMD_REGISTER_PCI_TABLE(net_enic, pci_id_enic_map); RTE_PMD_REGISTER_KMOD_DEP(net_enic, "* igb_uio | uio_pci_generic | vfio-pci"); RTE_PMD_REGISTER_PARAM_STRING(net_enic, ENIC_DEVARG_DISABLE_OVERLAY "=0|1 " + ENIC_DEVARG_DISABLE_SIMPLE_TX "=0|1 " ENIC_DEVARG_IG_VLAN_REWRITE "=trunk|untag|priority|pass"); diff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c index c03ec247a..66706448c 100644 --- a/drivers/net/enic/enic_main.c +++ b/drivers/net/enic/enic_main.c @@ -493,6 +493,27 @@ static void enic_rxq_intr_deinit(struct enic *enic) } } +static void enic_prep_wq_for_simple_tx(struct enic *enic, uint16_t queue_idx) +{ + struct wq_enet_desc *desc; + struct vnic_wq *wq; + unsigned int i; + + /* + * Fill WQ descriptor fields that never change. Every descriptor is + * one packet, so set EOP. Also set CQ_ENTRY every ENIC_WQ_CQ_THRESH + * descriptors (i.e. request one completion update every 32 packets). + */ + wq = &enic->wq[queue_idx]; + desc = (struct wq_enet_desc *)wq->ring.descs; + for (i = 0; i < wq->ring.desc_count; i++, desc++) { + desc->header_length_flags = 1 << WQ_ENET_FLAGS_EOP_SHIFT; + if (i % ENIC_WQ_CQ_THRESH == ENIC_WQ_CQ_THRESH - 1) + desc->header_length_flags |= + (1 << WQ_ENET_FLAGS_CQ_ENTRY_SHIFT); + } +} + int enic_enable(struct enic *enic) { unsigned int index; @@ -535,6 +556,22 @@ int enic_enable(struct enic *enic) } } + /* + * Use the simple TX handler if possible. All offloads must be disabled + * except mbuf fast free. + */ + if (!enic->disable_simple_tx && + (eth_dev->data->dev_conf.txmode.offloads & + ~DEV_TX_OFFLOAD_MBUF_FAST_FREE) == 0) { + PMD_INIT_LOG(DEBUG, " use the simple tx handler"); + eth_dev->tx_pkt_burst = &enic_simple_xmit_pkts; + for (index = 0; index < enic->wq_count; index++) + enic_prep_wq_for_simple_tx(enic, index); + } else { + PMD_INIT_LOG(DEBUG, " use the default tx handler"); + eth_dev->tx_pkt_burst = &enic_xmit_pkts; + } + for (index = 0; index < enic->wq_count; index++) enic_start_wq(enic, index); for (index = 0; index < enic->rq_count; index++) diff --git a/drivers/net/enic/enic_rxtx.c b/drivers/net/enic/enic_rxtx.c index 7cddb53d9..7dec486fe 100644 --- a/drivers/net/enic/enic_rxtx.c +++ b/drivers/net/enic/enic_rxtx.c @@ -741,4 +741,81 @@ uint16_t enic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, return index; } +static void enqueue_simple_pkts(struct rte_mbuf **pkts, + struct wq_enet_desc *desc, + uint16_t n, + struct enic *enic) +{ + struct rte_mbuf *p; + + while (n) { + n--; + p = *pkts++; + desc->address = p->buf_iova + p->data_off; + desc->length = p->pkt_len; + /* + * The app should not send oversized + * packets. tx_pkt_prepare includes a check as + * well. But some apps ignore the device max size and + * tx_pkt_prepare. Oversized packets cause WQ errrors + * and the NIC ends up disabling the whole WQ. So + * truncate packets.. + */ + if (unlikely(p->pkt_len > ENIC_TX_MAX_PKT_SIZE)) { + desc->length = ENIC_TX_MAX_PKT_SIZE; + rte_atomic64_inc(&enic->soft_stats.tx_oversized); + } + desc++; + } +} + +uint16_t enic_simple_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, + uint16_t nb_pkts) +{ + unsigned int head_idx, desc_count; + struct wq_enet_desc *desc; + struct vnic_wq *wq; + struct enic *enic; + uint16_t rem, n; + + wq = (struct vnic_wq *)tx_queue; + enic = vnic_dev_priv(wq->vdev); + enic_cleanup_wq(enic, wq); + /* Will enqueue this many packets in this call */ + nb_pkts = RTE_MIN(nb_pkts, wq->ring.desc_avail); + if (nb_pkts == 0) + return 0; + + head_idx = wq->head_idx; + desc_count = wq->ring.desc_count; + + /* Descriptors until the end of the ring */ + n = desc_count - head_idx; + n = RTE_MIN(nb_pkts, n); + /* Save mbuf pointers to free later */ + memcpy(wq->bufs + head_idx, tx_pkts, sizeof(struct rte_mbuf *) * n); + + /* Enqueue until the ring end */ + rem = nb_pkts - n; + desc = ((struct wq_enet_desc *)wq->ring.descs) + head_idx; + enqueue_simple_pkts(tx_pkts, desc, n, enic); + + /* Wrap to the start of the ring */ + if (rem) { + tx_pkts += n; + memcpy(wq->bufs, tx_pkts, sizeof(struct rte_mbuf *) * rem); + desc = (struct wq_enet_desc *)wq->ring.descs; + enqueue_simple_pkts(tx_pkts, desc, rem, enic); + } + rte_wmb(); + + /* Update head_idx and desc_avail */ + wq->ring.desc_avail -= nb_pkts; + head_idx += nb_pkts; + if (head_idx >= desc_count) + head_idx -= desc_count; + wq->head_idx = head_idx; + iowrite32_relaxed(head_idx, &wq->ctrl->posted_index); + return nb_pkts; +} From patchwork Thu Jun 28 03:19:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "John Daley (johndale)" X-Patchwork-Id: 41782 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A8EFF5B40; Thu, 28 Jun 2018 05:26:06 +0200 (CEST) Received: from alln-iport-8.cisco.com (alln-iport-8.cisco.com [173.37.142.95]) by dpdk.org (Postfix) with ESMTP id 974305B20 for ; Thu, 28 Jun 2018 05:26:04 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=@cisco.com; l=966; q=dns/txt; s=iport; t=1530156364; x=1531365964; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=dfUISO493J5eaymq4Drw0MBFdMxaZk9SL30WXWDExfs=; b=hKjMwsZxT9T6N9qAfiYRjf5tWuZWhIcaxarCKtWWI1IcdTDXJLcdcnhw HTilC/4DVIMHLvibAFxDr/wGT6ZqpWrdCol3f9DqoSkyHBAj9V4ZLNMuA 93il6A1Rw+0lxPZorWuDUhrAn/3wNHZq7OOkv6GsHKtPmJw0qcdNj+dy1 8=; X-IronPort-AV: E=Sophos;i="5.51,281,1526342400"; d="scan'208";a="135245370" Received: from rcdn-core-11.cisco.com ([173.37.93.147]) by alln-iport-8.cisco.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2018 03:26:04 +0000 Received: from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48]) by rcdn-core-11.cisco.com (8.14.5/8.14.5) with ESMTP id w5S3Q3ip031781; Thu, 28 Jun 2018 03:26:03 GMT Received: by cisco.com (Postfix, from userid 392789) id ABC2C20F2001; Wed, 27 Jun 2018 20:26:03 -0700 (PDT) From: John Daley To: ferruh.yigit@intel.com Cc: dev@dpdk.org, Hyong Youb Kim Date: Wed, 27 Jun 2018 20:19:38 -0700 Message-Id: <20180628031940.17397-12-johndale@cisco.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180628031940.17397-1-johndale@cisco.com> References: <20180628031940.17397-1-johndale@cisco.com> Subject: [dpdk-dev] [PATCH 12/14] net/enic: check maximum packet size in Tx prepare handler X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hyong Youb Kim The default tx handler checks the maximum packet size. Check it in the prepare handler too. WQ stops working if the app/driver tries to send oversized packets, so these checks are unavoidable. Signed-off-by: Hyong Youb Kim Reviewed-by: John Daley --- drivers/net/enic/enic_rxtx.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/enic/enic_rxtx.c b/drivers/net/enic/enic_rxtx.c index 7dec486fe..04a77fcb4 100644 --- a/drivers/net/enic/enic_rxtx.c +++ b/drivers/net/enic/enic_rxtx.c @@ -563,6 +563,10 @@ uint16_t enic_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, for (i = 0; i != nb_pkts; i++) { m = tx_pkts[i]; + if (unlikely(m->pkt_len > ENIC_TX_MAX_PKT_SIZE)) { + rte_errno = EINVAL; + return i; + } ol_flags = m->ol_flags; if (ol_flags & wq->tx_offload_notsup_mask) { rte_errno = ENOTSUP; From patchwork Thu Jun 28 03:19:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "John Daley (johndale)" X-Patchwork-Id: 41783 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id EA8037ED7; Thu, 28 Jun 2018 05:27:07 +0200 (CEST) Received: from aer-iport-3.cisco.com (aer-iport-3.cisco.com [173.38.203.53]) by dpdk.org (Postfix) with ESMTP id E84277ED7 for ; Thu, 28 Jun 2018 05:27:06 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=@cisco.com; l=9475; q=dns/txt; s=iport; t=1530156426; x=1531366026; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=XvE9StFPfzL+Gi2zVYTc2aUWJhDfgDfKVo4vHD/TjQs=; b=THqzv1wTfF9i0YOMTw4yxTU/tQ5B7TL2WwXsirlkAUfVgTVmSCtzLgMX N4OG0gQSlrO9EoN8o6lQoxaxs2gil8fkRUSG2B8Ljvd8hHQju7i68Aeyu 7aTPjWiPiKgLqRgScHDfzo9uZ5p9MU2BACwd5NtLpuwdXUqbKEHX1yvwk A=; X-IronPort-AV: E=Sophos;i="5.51,281,1526342400"; d="scan'208";a="4769221" Received: from aer-iport-nat.cisco.com (HELO aer-core-4.cisco.com) ([173.38.203.22]) by aer-iport-3.cisco.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2018 03:27:06 +0000 Received: from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48]) by aer-core-4.cisco.com (8.14.5/8.14.5) with ESMTP id w5S3R5cx025688; Thu, 28 Jun 2018 03:27:06 GMT Received: by cisco.com (Postfix, from userid 392789) id 6467C20F2001; Wed, 27 Jun 2018 20:27:05 -0700 (PDT) From: John Daley To: ferruh.yigit@intel.com Cc: dev@dpdk.org, John Daley , Hyong Youb Kim Date: Wed, 27 Jun 2018 20:19:39 -0700 Message-Id: <20180628031940.17397-13-johndale@cisco.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180628031940.17397-1-johndale@cisco.com> References: <20180628031940.17397-1-johndale@cisco.com> Subject: [dpdk-dev] [PATCH 13/14] net/enic: add simple Rx handler X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add an optimized Rx handler for non-scattered Rx. Signed-off-by: Hyong Youb Kim Signed-off-by: John Daley --- drivers/net/enic/base/cq_desc.h | 1 + drivers/net/enic/base/vnic_rq.h | 2 + drivers/net/enic/enic.h | 2 + drivers/net/enic/enic_ethdev.c | 3 +- drivers/net/enic/enic_main.c | 36 ++++++++++++- drivers/net/enic/enic_res.h | 1 + drivers/net/enic/enic_rxtx.c | 114 ++++++++++++++++++++++++++++++++++++++++ 7 files changed, 156 insertions(+), 3 deletions(-) diff --git a/drivers/net/enic/base/cq_desc.h b/drivers/net/enic/base/cq_desc.h index 7e1380270..ae8847c6d 100644 --- a/drivers/net/enic/base/cq_desc.h +++ b/drivers/net/enic/base/cq_desc.h @@ -38,6 +38,7 @@ struct cq_desc { #define CQ_DESC_TYPE_MASK ((1 << CQ_DESC_TYPE_BITS) - 1) #define CQ_DESC_COLOR_MASK 1 #define CQ_DESC_COLOR_SHIFT 7 +#define CQ_DESC_COLOR_MASK_NOSHIFT 0x80 #define CQ_DESC_Q_NUM_BITS 10 #define CQ_DESC_Q_NUM_MASK ((1 << CQ_DESC_Q_NUM_BITS) - 1) #define CQ_DESC_COMP_NDX_BITS 12 diff --git a/drivers/net/enic/base/vnic_rq.h b/drivers/net/enic/base/vnic_rq.h index 9619290de..d8e67f747 100644 --- a/drivers/net/enic/base/vnic_rq.h +++ b/drivers/net/enic/base/vnic_rq.h @@ -52,6 +52,8 @@ struct vnic_rq { struct vnic_dev *vdev; struct vnic_rq_ctrl __iomem *ctrl; /* memory-mapped */ struct vnic_dev_ring ring; + struct rte_mbuf **free_mbufs; /* reserve of free mbufs */ + int num_free_mbufs; struct rte_mbuf **mbuf_ring; /* array of allocated mbufs */ unsigned int mbuf_next_idx; /* next mb to consume */ void *os_buf_head; diff --git a/drivers/net/enic/enic.h b/drivers/net/enic/enic.h index e1d0ea552..d0ffc7783 100644 --- a/drivers/net/enic/enic.h +++ b/drivers/net/enic/enic.h @@ -314,6 +314,8 @@ int enic_clsf_init(struct enic *enic); void enic_clsf_destroy(struct enic *enic); uint16_t enic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts); +uint16_t enic_noscatter_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, + uint16_t nb_pkts); uint16_t enic_dummy_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts); diff --git a/drivers/net/enic/enic_ethdev.c b/drivers/net/enic/enic_ethdev.c index d013333f9..0d63cb466 100644 --- a/drivers/net/enic/enic_ethdev.c +++ b/drivers/net/enic/enic_ethdev.c @@ -525,7 +525,8 @@ static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev) RTE_PTYPE_UNKNOWN }; - if (dev->rx_pkt_burst == enic_recv_pkts) + if (dev->rx_pkt_burst == enic_recv_pkts || + dev->rx_pkt_burst == enic_noscatter_recv_pkts) return ptypes; return NULL; } diff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c index 66706448c..0651ed95f 100644 --- a/drivers/net/enic/enic_main.c +++ b/drivers/net/enic/enic_main.c @@ -572,6 +572,14 @@ int enic_enable(struct enic *enic) eth_dev->tx_pkt_burst = &enic_xmit_pkts; } + /* Use the non-scatter, simplified RX handler if possible. */ + if (enic->rq_count > 0 && enic->rq[0].data_queue_enable == 0) { + PMD_INIT_LOG(DEBUG, " use the non-scatter Rx handler"); + eth_dev->rx_pkt_burst = &enic_noscatter_recv_pkts; + } else { + PMD_INIT_LOG(DEBUG, " use the normal Rx handler"); + } + for (index = 0; index < enic->wq_count; index++) enic_start_wq(enic, index); for (index = 0; index < enic->rq_count; index++) @@ -624,6 +632,19 @@ void enic_free_rq(void *rxq) enic = vnic_dev_priv(rq_sop->vdev); rq_data = &enic->rq[rq_sop->data_queue_idx]; + if (rq_sop->free_mbufs) { + struct rte_mbuf **mb; + int i; + + mb = rq_sop->free_mbufs; + for (i = ENIC_RX_BURST_MAX - rq_sop->num_free_mbufs; + i < ENIC_RX_BURST_MAX; i++) + rte_pktmbuf_free(mb[i]); + rte_free(rq_sop->free_mbufs); + rq_sop->free_mbufs = NULL; + rq_sop->num_free_mbufs = 0; + } + enic_rxmbuf_queue_release(enic, rq_sop); if (rq_data->in_use) enic_rxmbuf_queue_release(enic, rq_data); @@ -787,13 +808,13 @@ int enic_alloc_rq(struct enic *enic, uint16_t queue_idx, rq_data->max_mbufs_per_pkt = mbufs_per_pkt; if (mbufs_per_pkt > 1) { - min_sop = 64; + min_sop = ENIC_RX_BURST_MAX; max_sop = ((enic->config.rq_desc_count / (mbufs_per_pkt - 1)) & ENIC_ALIGN_DESCS_MASK); min_data = min_sop * (mbufs_per_pkt - 1); max_data = enic->config.rq_desc_count; } else { - min_sop = 64; + min_sop = ENIC_RX_BURST_MAX; max_sop = enic->config.rq_desc_count; min_data = 0; max_data = 0; @@ -864,10 +885,21 @@ int enic_alloc_rq(struct enic *enic, uint16_t queue_idx, goto err_free_sop_mbuf; } + rq_sop->free_mbufs = (struct rte_mbuf **) + rte_zmalloc_socket("rq->free_mbufs", + sizeof(struct rte_mbuf *) * + ENIC_RX_BURST_MAX, + RTE_CACHE_LINE_SIZE, rq_sop->socket_id); + if (rq_sop->free_mbufs == NULL) + goto err_free_data_mbuf; + rq_sop->num_free_mbufs = 0; + rq_sop->tot_nb_desc = nb_desc; /* squirl away for MTU update function */ return 0; +err_free_data_mbuf: + rte_free(rq_data->mbuf_ring); err_free_sop_mbuf: rte_free(rq_sop->mbuf_ring); err_free_cq: diff --git a/drivers/net/enic/enic_res.h b/drivers/net/enic/enic_res.h index 6b1f6acad..3786bc0e2 100644 --- a/drivers/net/enic/enic_res.h +++ b/drivers/net/enic/enic_res.h @@ -37,6 +37,7 @@ #define ENIC_NON_TSO_MAX_DESC 16 #define ENIC_DEFAULT_RX_FREE_THRESH 32 #define ENIC_TX_XMIT_MAX 64 +#define ENIC_RX_BURST_MAX 64 /* Defaults for dev_info.default_{rx,tx}portconf */ #define ENIC_DEFAULT_RX_BURST 32 diff --git a/drivers/net/enic/enic_rxtx.c b/drivers/net/enic/enic_rxtx.c index 04a77fcb4..e0f93dd5e 100644 --- a/drivers/net/enic/enic_rxtx.c +++ b/drivers/net/enic/enic_rxtx.c @@ -471,6 +471,120 @@ enic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, return nb_rx; } +uint16_t +enic_noscatter_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, + uint16_t nb_pkts) +{ + struct rte_mbuf *mb, **rx, **rxmb; + uint16_t cq_idx, nb_rx, max_rx; + struct cq_enet_rq_desc *cqd; + struct rq_enet_desc *rqd; + unsigned int port_id; + struct vnic_cq *cq; + struct vnic_rq *rq; + struct enic *enic; + uint8_t color; + bool overlay; + bool tnl; + + rq = rx_queue; + enic = vnic_dev_priv(rq->vdev); + cq = &enic->cq[enic_cq_rq(enic, rq->index)]; + cq_idx = cq->to_clean; + + /* + * Fill up the reserve of free mbufs. Below, we restock the receive + * ring with these mbufs to avoid allocation failures. + */ + if (rq->num_free_mbufs == 0) { + if (rte_mempool_get_bulk(rq->mp, (void **)rq->free_mbufs, + ENIC_RX_BURST_MAX)) + return 0; + rq->num_free_mbufs = ENIC_RX_BURST_MAX; + } + + /* Receive until the end of the ring, at most. */ + max_rx = RTE_MIN(nb_pkts, rq->num_free_mbufs); + max_rx = RTE_MIN(max_rx, cq->ring.desc_count - cq_idx); + + cqd = (struct cq_enet_rq_desc *)(cq->ring.descs) + cq_idx; + color = cq->last_color; + rxmb = rq->mbuf_ring + cq_idx; + port_id = enic->port_id; + overlay = enic->overlay_offload; + + rx = rx_pkts; + while (max_rx) { + max_rx--; + if ((cqd->type_color & CQ_DESC_COLOR_MASK_NOSHIFT) == color) + break; + if (unlikely(cqd->bytes_written_flags & + CQ_ENET_RQ_DESC_FLAGS_TRUNCATED)) { + rte_pktmbuf_free(*rxmb++); + rte_atomic64_inc(&enic->soft_stats.rx_packet_errors); + cqd++; + continue; + } + + mb = *rxmb++; + /* prefetch mbuf data for caller */ + rte_packet_prefetch(RTE_PTR_ADD(mb->buf_addr, + RTE_PKTMBUF_HEADROOM)); + mb->data_len = cqd->bytes_written_flags & + CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK; + mb->pkt_len = mb->data_len; + mb->port = port_id; + tnl = overlay && (cqd->completed_index_flags & + CQ_ENET_RQ_DESC_FLAGS_FCOE) != 0; + mb->packet_type = + enic_cq_rx_flags_to_pkt_type((struct cq_desc *)cqd, + tnl); + enic_cq_rx_to_pkt_flags((struct cq_desc *)cqd, mb); + /* Wipe the outer types set by enic_cq_rx_flags_to_pkt_type() */ + if (tnl) { + mb->packet_type &= ~(RTE_PTYPE_L3_MASK | + RTE_PTYPE_L4_MASK); + } + cqd++; + *rx++ = mb; + } + /* Number of descriptors visited */ + nb_rx = cqd - (struct cq_enet_rq_desc *)(cq->ring.descs) - cq_idx; + if (nb_rx == 0) + return 0; + rqd = ((struct rq_enet_desc *)rq->ring.descs) + cq_idx; + rxmb = rq->mbuf_ring + cq_idx; + cq_idx += nb_rx; + rq->rx_nb_hold += nb_rx; + if (unlikely(cq_idx == cq->ring.desc_count)) { + cq_idx = 0; + cq->last_color ^= CQ_DESC_COLOR_MASK_NOSHIFT; + } + cq->to_clean = cq_idx; + + memcpy(rxmb, rq->free_mbufs + ENIC_RX_BURST_MAX - rq->num_free_mbufs, + sizeof(struct rte_mbuf *) * nb_rx); + rq->num_free_mbufs -= nb_rx; + while (nb_rx) { + nb_rx--; + mb = *rxmb++; + mb->data_off = RTE_PKTMBUF_HEADROOM; + rqd->address = mb->buf_iova + RTE_PKTMBUF_HEADROOM; + rqd++; + } + if (rq->rx_nb_hold > rq->rx_free_thresh) { + rq->posted_index = enic_ring_add(rq->ring.desc_count, + rq->posted_index, + rq->rx_nb_hold); + rq->rx_nb_hold = 0; + rte_wmb(); + iowrite32_relaxed(rq->posted_index, + &rq->ctrl->posted_index); + } + + return rx - rx_pkts; +} + static void enic_fast_free_wq_bufs(struct vnic_wq *wq, u16 completed_index) { unsigned int desc_count, n, nb_to_free, tail_idx; From patchwork Thu Jun 28 03:19:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "John Daley (johndale)" X-Patchwork-Id: 41784 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C92111B446; Thu, 28 Jun 2018 05:27:45 +0200 (CEST) Received: from rcdn-iport-8.cisco.com (rcdn-iport-8.cisco.com [173.37.86.79]) by dpdk.org (Postfix) with ESMTP id EFB861B445 for ; Thu, 28 Jun 2018 05:27:44 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=@cisco.com; l=3124; q=dns/txt; s=iport; t=1530156465; x=1531366065; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=tFT+IT8nHTeXMmyBBF1ew4ZNW03b3oMn4UJNBHKmzIk=; b=gddhn/xxFjUssKf5HmpcaCF6jTvapNwM91u4xHqN3kShY2NDCGroKJqi kRxQdzxvMvPZfClPE/weuzu+dNFtOtek45EULNloQE2H4gUoVFe0pnnYD 6KJ0nlwey6Q4TzjaWpGX9qGbcuKiS67ukxugVpir1e8wU2ueWDrrOfJfG Y=; X-IronPort-AV: E=Sophos;i="5.51,281,1526342400"; d="scan'208";a="414338894" Received: from rcdn-core-10.cisco.com ([173.37.93.146]) by rcdn-iport-8.cisco.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2018 03:27:44 +0000 Received: from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48]) by rcdn-core-10.cisco.com (8.14.5/8.14.5) with ESMTP id w5S3RiY3023780; Thu, 28 Jun 2018 03:27:44 GMT Received: by cisco.com (Postfix, from userid 392789) id 06C9220F2001; Wed, 27 Jun 2018 20:27:43 -0700 (PDT) From: John Daley To: ferruh.yigit@intel.com Cc: dev@dpdk.org, John Daley Date: Wed, 27 Jun 2018 20:19:40 -0700 Message-Id: <20180628031940.17397-14-johndale@cisco.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180628031940.17397-1-johndale@cisco.com> References: <20180628031940.17397-1-johndale@cisco.com> Subject: [dpdk-dev] [PATCH 14/14] net/enic: cap Rx packet processing to end of desc ring X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" In the default Rx handler stop processing packets at the end of the completion ring so that wrapping doesn't have to be checked in the inner while loop. Also, check the color bit in the completion without using a conditional. Signed-off-by: John Daley Reviewed-by: Hyong Youb Kim --- drivers/net/enic/enic_rxtx.c | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/net/enic/enic_rxtx.c b/drivers/net/enic/enic_rxtx.c index e0f93dd5e..7ae03f31b 100644 --- a/drivers/net/enic/enic_rxtx.c +++ b/drivers/net/enic/enic_rxtx.c @@ -310,7 +310,7 @@ enic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, struct vnic_rq *rq; struct enic *enic = vnic_dev_priv(sop_rq->vdev); uint16_t cq_idx; - uint16_t rq_idx; + uint16_t rq_idx, max_rx; uint16_t rq_num; struct rte_mbuf *nmb, *rxmb; uint16_t nb_rx = 0; @@ -325,19 +325,23 @@ enic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, cq = &enic->cq[enic_cq_rq(enic, sop_rq->index)]; cq_idx = cq->to_clean; /* index of cqd, rqd, mbuf_table */ cqd_ptr = (struct cq_desc *)(cq->ring.descs) + cq_idx; + color = cq->last_color; data_rq = &enic->rq[sop_rq->data_queue_idx]; - while (nb_rx < nb_pkts) { + /* Receive until the end of the ring, at most. */ + max_rx = RTE_MIN(nb_pkts, cq->ring.desc_count - cq_idx); + + while (max_rx) { volatile struct rq_enet_desc *rqd_ptr; struct cq_desc cqd; uint8_t packet_error; uint16_t ciflags; + max_rx--; + /* Check for pkts available */ - color = (cqd_ptr->type_color >> CQ_DESC_COLOR_SHIFT) - & CQ_DESC_COLOR_MASK; - if (color == cq->last_color) + if ((cqd_ptr->type_color & CQ_DESC_COLOR_MASK_NOSHIFT) == color) break; /* Get the cq descriptor and extract rq info from it */ @@ -361,13 +365,7 @@ enic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, /* Get the mbuf to return and replace with one just allocated */ rxmb = rq->mbuf_ring[rq_idx]; rq->mbuf_ring[rq_idx] = nmb; - - /* Increment cqd, rqd, mbuf_table index */ cq_idx++; - if (unlikely(cq_idx == cq->ring.desc_count)) { - cq_idx = 0; - cq->last_color = cq->last_color ? 0 : 1; - } /* Prefetch next mbuf & desc while processing current one */ cqd_ptr = (struct cq_desc *)(cq->ring.descs) + cq_idx; @@ -419,6 +417,7 @@ enic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, first_seg->packet_type = enic_cq_rx_flags_to_pkt_type(&cqd, tnl); enic_cq_rx_to_pkt_flags(&cqd, first_seg); + /* Wipe the outer types set by enic_cq_rx_flags_to_pkt_type() */ if (tnl) { first_seg->packet_type &= ~(RTE_PTYPE_L3_MASK | @@ -438,6 +437,10 @@ enic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, /* store the mbuf address into the next entry of the array */ rx_pkts[nb_rx++] = first_seg; } + if (unlikely(cq_idx == cq->ring.desc_count)) { + cq_idx = 0; + cq->last_color ^= CQ_DESC_COLOR_MASK_NOSHIFT; + } sop_rq->pkt_first_seg = first_seg; sop_rq->pkt_last_seg = last_seg;