From patchwork Wed Apr 19 19:51:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arkadiusz Kusztal X-Patchwork-Id: 126265 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 63A544298C; Wed, 19 Apr 2023 21:51:17 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1C15040A79; Wed, 19 Apr 2023 21:51:17 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id BCA9E4021F for ; Wed, 19 Apr 2023 21:51:15 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1681933875; x=1713469875; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=FABjBY4PPA14XaMTrSZXRL3+X/1YSZ3Xm6cqyXA3ddE=; b=j8YQVO7RFnK71cTegFlV/usQJ37oXml4e7VO76reZ2hh096bHNLcHG5J Lvv4C5vUKjWE6aM1dTtChDawVoHk4JqpA3Zegu6o05XQ7hXCFgxcumaM4 wNV0yrD7s+4A//h2+COVUbMHy5MZ8OihTsVhN4lR68XTRtPnj2P8idF+c 1DF1KEChs65B8vdArLjjqNdzScsEV7pL3LBpf6Ga/aAKe4kwDZgCTs5/a f+9ftE4YyZoD9+jOHR7GN+9sjq4Vl8pi/9TavLM2T+5KP45XeVPmpeOo8 l2wfP6WsX69uyXw9ieWV3qTxKF813C9Hxc0Cj10VfQt+MJV53FGfst/Cc A==; X-IronPort-AV: E=McAfee;i="6600,9927,10685"; a="410779929" X-IronPort-AV: E=Sophos;i="5.99,210,1677571200"; d="scan'208";a="410779929" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2023 12:51:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10685"; a="937791495" X-IronPort-AV: E=Sophos;i="5.99,210,1677571200"; d="scan'208";a="937791495" Received: from silpixa00401012.ir.intel.com ([10.243.22.82]) by fmsmga006.fm.intel.com with ESMTP; 19 Apr 2023 12:51:13 -0700 From: Arek Kusztal To: dev@dpdk.org Cc: gakhil@marvell.com, kai.ji@intel.com, ciara.power@intel.com, Arek Kusztal Subject: [PATCH 1/2] crypto/qat: add hash mode 2 Date: Wed, 19 Apr 2023 19:51:08 +0000 Message-Id: <20230419195109.1659341-1-arkadiuszx.kusztal@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This commit adds hash mode 2 to the Intel QuickAssist Technology symmetric crypto PMD. Signed-off-by: Arek Kusztal --- drivers/common/qat/qat_adf/icp_qat_fw_la.h | 10 ++++++++++ drivers/crypto/qat/qat_sym_session.h | 2 ++ 2 files changed, 12 insertions(+) diff --git a/drivers/common/qat/qat_adf/icp_qat_fw_la.h b/drivers/common/qat/qat_adf/icp_qat_fw_la.h index c4901eb869..fe57d8e488 100644 --- a/drivers/common/qat/qat_adf/icp_qat_fw_la.h +++ b/drivers/common/qat/qat_adf/icp_qat_fw_la.h @@ -80,6 +80,10 @@ struct icp_qat_fw_la_bulk_req { #define ICP_QAT_FW_LA_PARTIAL_END 2 #define QAT_LA_PARTIAL_BITPOS 0 #define QAT_LA_PARTIAL_MASK 0x3 +#define QAT_FW_LA_MODE2_BITPOS 5 +#define QAT_FW_LA_MODE2 1 +#define QAT_FW_LA_NO_MODE2 0 +#define QAT_FW_LA_MODE2_MASK 0x1 #define ICP_QAT_FW_LA_FLAGS_BUILD(zuc_proto, gcm_iv_len, auth_rslt, proto, \ cmp_auth, ret_auth, update_state, \ ciph_iv, ciphcfg, partial) \ @@ -187,6 +191,12 @@ struct icp_qat_fw_la_bulk_req { QAT_FIELD_SET(flags, val, QAT_LA_PARTIAL_BITPOS, \ QAT_LA_PARTIAL_MASK) +#define ICP_QAT_FW_HASH_FLAG_MODE2_SET(flags, val) \ + QAT_FIELD_SET(flags, \ + val, \ + QAT_FW_LA_MODE2_BITPOS, \ + QAT_FW_LA_MODE2_MASK) + struct icp_qat_fw_cipher_req_hdr_cd_pars { union { struct { diff --git a/drivers/crypto/qat/qat_sym_session.h b/drivers/crypto/qat/qat_sym_session.h index 6322d7e3bc..d487bca11f 100644 --- a/drivers/crypto/qat/qat_sym_session.h +++ b/drivers/crypto/qat/qat_sym_session.h @@ -47,6 +47,7 @@ ICP_QAT_HW_CIPHER_DECRYPT) #define QAT_AES_CMAC_CONST_RB 0x87 +#define QAT_PREFIX_TABLE_SZ 128 #define QAT_CRYPTO_SLICE_SPC 1 #define QAT_CRYPTO_SLICE_UCS 2 @@ -77,6 +78,7 @@ typedef int (*qat_sym_build_request_t)(void *in_op, struct qat_sym_session *ctx, struct qat_sym_cd { struct icp_qat_hw_cipher_algo_blk cipher; struct icp_qat_hw_auth_algo_blk hash; + uint8_t prefix_state[QAT_PREFIX_TABLE_SZ] __rte_cache_aligned; } __rte_packed __rte_cache_aligned; struct qat_sym_session { From patchwork Wed Apr 19 19:51:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arkadiusz Kusztal X-Patchwork-Id: 126266 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D365A4298C; Wed, 19 Apr 2023 21:51:24 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 70B4C42D0C; Wed, 19 Apr 2023 21:51:19 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id 5FAFB410D3 for ; Wed, 19 Apr 2023 21:51:17 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1681933877; x=1713469877; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=U/9jrNDge/VKws8DE68QurQ9eiNW2UOcx4UoJBZCGQk=; b=UXfZmNDwFdKjQpgQ5gbuyclz27D25g8U5m6zfUaEZKOvW7YdDPrRK5Vp dCOxdI0dZ8hG3Gd5tC2YnL/+bGmaDarlP8ZWqnxCzRwZBDq9XxeMDBFqf jRla4GqlpIir1ixghCdXssSPKqfsvkewEGxYotEdbe3unUY80Kw9YFjo2 JCcEEIFRKxWcvVZu6SMbzZ6UcMY5PVisHOA1u99SgRxOcS3LQcFtB3UKu woDeIrEA8PW/Lf8fVDWQ93vUaqV6K2pPOzmO9Sr5gDJlhxje87jxPILv6 yMJB/CBoIY3mXUOZnKGROrzGSRNa+x25HEPMO5GmRek6kSaVD5CGuq1w7 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10685"; a="410779951" X-IronPort-AV: E=Sophos;i="5.99,210,1677571200"; d="scan'208";a="410779951" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2023 12:51:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10685"; a="937791612" X-IronPort-AV: E=Sophos;i="5.99,210,1677571200"; d="scan'208";a="937791612" Received: from silpixa00401012.ir.intel.com ([10.243.22.82]) by fmsmga006.fm.intel.com with ESMTP; 19 Apr 2023 12:51:15 -0700 From: Arek Kusztal To: dev@dpdk.org Cc: gakhil@marvell.com, kai.ji@intel.com, ciara.power@intel.com, Arek Kusztal Subject: [PATCH 2/2] crypto/qat: add sm3 hmac Date: Wed, 19 Apr 2023 19:51:09 +0000 Message-Id: <20230419195109.1659341-2-arkadiuszx.kusztal@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230419195109.1659341-1-arkadiuszx.kusztal@intel.com> References: <20230419195109.1659341-1-arkadiuszx.kusztal@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This commit adds SM3-HMAC algorithm to the Intel QuickAssist Technology symmetric crypto PMD. Signed-off-by: Arek Kusztal --- drivers/crypto/qat/qat_sym_session.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_sym_session.c index 6ad6c7ee3a..50b4a6391d 100644 --- a/drivers/crypto/qat/qat_sym_session.c +++ b/drivers/crypto/qat/qat_sym_session.c @@ -695,6 +695,9 @@ qat_sym_session_configure_auth(struct rte_cryptodev *dev, session->digest_length = auth_xform->digest_length; switch (auth_xform->algo) { + case RTE_CRYPTO_AUTH_SM3_HMAC: + session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SM3; + session->auth_mode = ICP_QAT_HW_AUTH_MODE2; case RTE_CRYPTO_AUTH_SM3: session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SM3; session->auth_mode = ICP_QAT_HW_AUTH_MODE0;